Method and apparatus for matching impedance of optical components using tapered transmission lines - Patents.com

Abstract

A method and apparatus are provided for matching different impedances between optical components for optical communication and a package using a tapered transmission line (or taper). The taper can be configured to include a first section, a second section, and a third section, each corresponding to a different component. By way of example, the first section of the taper can be configured to be allocated from the driver to a flex joint on a printed circuit board (PCB), the second section of the taper can be configured to be allocated to the flex circuit, and the third section of the taper can be configured to be allocated to a submount containing a transistor outline (TO) and a directly modulated laser (DML). The taper is configured to minimize the amount of impedance mismatch between the optical component and the package.

Description

[Technical Field]

[0001] The present disclosure relates to design and implementation techniques for matching the impedance of optical components in optical devices or equipment, for example, using tapered transmission lines, and in particular to methods and techniques for matching different impedance values ​​of a directly modulated laser (DML) and a package using tapered transmission lines. [Background technology]

[0002] A common problem in developing optical subassemblies (OSAs) is the impedance mismatch between the test equipment and the device under test (DUT). Currently, there are several cases of impedance mismatch. For example, there are cases of impedance mismatch involving directly modulated lasers (DMLs) and other components. DMLs are typically distributed feedback (DFB) or Fabry-Perot (FP) lasers, and the inherent impedance of DMLs is approximately 10 ohms. One of the internal components is the transmitter optical subassembly (TOSA), which is responsible for converting electrical signals to optical signals and then transmitting the optical signals through the optical fiber channel. Furthermore, DML transmitter circuits are typically designed to have an impedance of 25 ohms, so the TOSA package has an impedance of 25 ohms. Therefore, cases of impedance mismatch arise. To address the problem, a matching resistor can be added in series with the DML to make it 25 ohms and match the impedance. Alternatively, the DML may be mounted on a submount and packaged in a TOSA package with a 25 ohm impedance, and the TOSA package is electrically connected to a printed circuit board assembly via a flexible circuit. This would result in a significant impedance mismatch between the DML and peripheral devices such as the submount, TOSA package, and flexible circuit, which would cause design problems and degrade system performance.

[0003] For example, when a DML TOSA is designed based on 25 ohms, many test engineers find it difficult to evaluate the performance of a DML, DML chip-on-carrier (CoC), or packaged DML TOSA. When measuring a DML CoC or DML TOSA, test engineers use the impedance conversion function provided by a light wave component analyzer (LCA) with a 50 ohm impedance. However, to properly use the impedance conversion function, the test board usually needs to be precisely calibrated. Furthermore, there are several options for developing an evaluation board for a DML TOSA. This is often daunting for many test engineers because of issues such as where the interface point is located between 50 ohms and 25 ohms and how the impedance can be calibrated relative to the interface point.

[0004] Furthermore, regarding the characterization of DML chips, such as S-parameters, DML chips are usually mounted in a chain of custody (CoC) state, and therefore characterization can be performed relatively accurately using the impedance conversion function of an LCA with appropriate calibration. However, if a sample of a DML TOSA must be provided to a customer, the problem can become challenging because the impedance of the customer's test equipment is usually 50 ohms, and measurements are performed in a 50 ohm system without proper calibration. As a result, if the customer does not have a well-calibrated evaluation board, it will be difficult for the customer to accurately measure the TOSA's performance. Furthermore, the same problem can occur if the customer attempts to verify the optical performance using a pulse pattern generator (PPG) with an impedance of 50 ohms.

[0005] Furthermore, in the case of Mach-Zehnder modulator (MZM) designs, MZMs are typically packaged in packages with a 50 ohm impedance, but typical InP-based MZM chips can have impedances ranging from 20 ohms to 40 ohms, creating impedance mismatches. As a result, the submount must have a 50 ohm impedance, and the termination must also have a typical 50 ohm impedance. Therefore, characterizing MZM chips can encounter the same testing issues as DML TOSAs. Therefore, CoCs have 50 ohm lines, and testing MZM chips mounted in CoC configurations presents calibration issues similar to DML TOSAs because the submount has a 50 ohm impedance. In other cases, some engineers may try to drive a 50 ohm EML TOSA with a 25 ohm driver IC, or a 50 ohm driver IC with a 25 ohm TOSA. Although this type of trial effort has been attempted in various implementations of transceivers, such examples are rare.

[0006] Therefore, impedance mismatch remains a significant problem in optical component design and transceiver implementation. Therefore, there remains a need for advanced techniques to resolve the apparent impedance mismatch between optical components to be integrated into a package. Summary of the Invention

[0007] Existing techniques are sought to address the problem of impedance matching. For example, effectively matching various impedance values ​​would solve many of the difficulties associated with testing optical components such as directly modulated lasers (DMLs), Mach-Zehnder modulators (MZMs), and the like, and would address the problems encountered in mounting evaluation boards for various optical components such as DML transmitter optical subassemblies (TOSAs) and / or MZM TOSAs.

[0008] Currently, all directly modulated lasers (DMLs) in transistor outline (TO) packages are assembled to 25 ohm headers or 25 ohm TO headers. The impedance of all commercially available DML driver integrated circuits (ICs) is approximately 25 ohms. Therefore, with existing technology, the impedance from the driver IC to the TO pin input plus the submount is always matched to 25 ohms, even though the actual impedance of the DML is approximately 10 ohms. It should also be noted that when the DML driver IC impedance is approximately 25 ohms (single-ended) and the DML impedance is approximately 10 ohms, the S-parameter S11 (reflection coefficient or return loss) is approximately -7.3 dB, which can be improved by using various aspects of the present technology.

[0009] In an embodiment of the present disclosure, a system, technique, or method is presented for matching the impedance of a directly modulated laser (DML) using a tapered transmission line. By way of example, the tapered transmission line or taper is configured to include a first section, a second section, and a third section. The first section of the taper is configured to be allocated from the driver to a flex joint on a printed circuit board (PCB) or printed wire board (PWB), the second section of the taper is configured to be allocated to the flex circuit, and the third section of the taper is configured to be allocated to a submount containing a TO and a DML. Furthermore, in an embodiment of the present disclosure, the impedance of the TO package is also part of the taper, so the impedance of the TO package is modified to obtain an accurate taper design.

[0010] In embodiments of the present disclosure, the DML is enclosed in a package, which may be a TO, ceramic box, Consortium on board optics (COBO), or chip on board (COB) package.

[0011] In an embodiment of the present disclosure, the first section of the taper is configured to accommodate the TO and the internal submount.

[0012] In another aspect of the present disclosure, the first section of the taper includes the first three segments, the second section includes the second fifteen segments, and the third section includes the third three segments.

[0013] In another aspect of the present disclosure, the first and third sections are relatively short, and the impedance values ​​of the first and third sections, respectively, can approximate the average value of the three segments, which may come at the cost of slight performance degradation.

[0014] In another aspect of the present disclosure, an optical communication device or equipment is provided that can include a DML, a DML driver IC, and a taper disposed between the DML and the DML driver IC, the taper configured to match different impedances of the DML driver IC, the DML, and / or the package.

[0015] In another aspect of the disclosure, the impedance of the DML may be about 10 ohms and the impedance of the DML driver IC may be about 25 ohms.

[0016] In another aspect of the present disclosure, the taper of an optical communication device or equipment may include a first section, a second section, and a third section, where the first section is allocated from the driver to the flex joint on the PCB or PWB, the second section is allocated to the flex circuit, and the third section is allocated to the TO and submount.

[0017] In another aspect of the present disclosure, a first section of a taper in an optical communications device or optical communications equipment includes a first set of three segments, a second section of the taper includes a second set of fifteen segments, and a third section of the taper includes a third set of three segments.

[0018] In another aspect of the present disclosure, the impedance of the first and third sections of a taper in an optical communication device or equipment is approximated to the average value of the three segments, which may come at the cost of a slight degradation in performance.

[0019] In another aspect of the present technology, an optical communication device is provided, the optical communication device being configured to include a package having a first impedance, an optical component having a second impedance, and a taper coupled to the optical component and the package, the taper coupled to the optical component and the package being configured to minimize an amount of impedance mismatch between the first impedance and the second impedance.

[0020] In another aspect of the present disclosure, the optical components of the optical communication device may be enclosed within the package. Alternatively, some of the optical components of the optical communication device may be outside the package.

[0021] In another aspect of the present disclosure, the optical communications device may include, as an optical component, a directly modulated laser, a Mach-Zehnder modulator laser, or a vertical cavity surface emitting laser.

[0022] In another aspect of the present disclosure, the taper of the optical communication device may be designed to match the impedance of the optical component with the impedance of the package.

[0023] In another embodiment of the present disclosure, the package can be a TO, ceramic box, COBO, or COB package.

[0024] In another aspect of the present disclosure, the taper of the optical communication device is designed to match a second impedance of the optical component to a first impedance of the package.

[0025] Thus, implementation of one or more aspects of the present technology can realize many benefits resulting from impedance matching over existing technology, including lower drive voltages and less power consumption, less reflections, less radio frequency radiation, etc.

[0026] These and other features, aspects, and advantages of the present disclosure will become better understood from the following description, appended claims, and accompanying drawings. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a diagram conceptually illustrating an embodiment of the present disclosure. [Figures 2A-2C] 1 is a perspective view of an exemplary embodiment in accordance with aspects of the present disclosure; [Figure 2D] FIG. 10 conceptually illustrates impedance matching of an exemplary embodiment in accordance with aspects of the present disclosure. [Figure 2E] 10 is a graph of the reflection coefficient response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figure 3] 10 is a graph of the reflection coefficient response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figure 4] 1 is a table of exemplary taper designs according to aspects of the present disclosure. [Figure 5A-5B] 10 is a graph of the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 6A-6B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 7A-7B] 10 is a graph illustrating reflection coefficient response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figure 8A-8B] 10 is a graph illustrating reflection coefficient response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figure 9]10 is a table of alternative exemplary taper designs in accordance with aspects of the present disclosure. [Figures 10A-10C] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 11A-11B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 12A-12B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 13A-13B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 14A-14B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 15A-15B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 16A-16B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 17A-17B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. [Figures 18A-18B] 10 is a graph illustrating the output response of an exemplary embodiment in accordance with aspects of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0028] A detailed description of illustrative examples will now be described below in conjunction with various figures. The following description is intended to be illustrative and in no way limit the scope of the present technology. The following description presents detailed examples of possible implementations and is not intended to represent the only configurations in which the concepts described herein may be practiced. Thus, the detailed description includes specific details for the purpose of providing a thorough understanding of various concepts, and it should be noted that such concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts. It should be noted that like reference numerals are used in the figures to denote like elements and features.

[0029] Additionally, methods and devices implementing exemplary embodiments of various features of the present technology are described herein. References in the description herein to "one embodiment" or "embodiment" are intended to indicate that each individual feature, structure, or characteristic described in connection with the exemplary embodiment is included in at least one embodiment of the present technology or disclosure. The appearances of the phrases "in one embodiment," "embodiment," or "exemplary embodiment" in various places in the description herein do not necessarily all refer to the same embodiment.

[0030] In the following description, specific details are given to enable a thorough understanding of the exemplary embodiments. However, those skilled in the art will understand that the exemplary embodiments may be practiced without such specific details. Well-known circuits, structures, and techniques may not be shown in detail so as not to obscure the exemplary embodiments (e.g., circuitry, interconnections, etc. in block diagrams).

[0031] Furthermore, as used herein, the term "transistor outline (TO)" shall mean its normal and customary meaning used in the optical industry, an industry standard governing the design and size of packaging and housing for current-conducting microelectronics. A typical TO package may consist of two components: a TO header and a TO cap. The TO header is configured to allow the delivery of electrical power to the encapsulated components, and the TO cap is configured to reliably and smoothly transmit optical signals and includes an optical transmitter, e.g., a laser diode, and an optical receiver, e.g., a photodiode.

[0032] Additionally, while exemplary embodiments herein describe various aspects of the present technology with reference to standard TO package designs and sizes, application of the present technology is not limited thereto and may be applied to other designs, sizes, and package types, which may be, by way of example, TO, ceramic box, Consortium on Board Optics (COBO), Chip on Board (COB) packages, or any other package type.

[0033] In this disclosure, the term "DML" as used herein refers to a directly modulated laser or directly modulated laser diode, and / or a directly modulated vertical cavity surface emitting laser (VCSEL). Directly modulated lasers (DMLs) generally provide a cost-effective transmitter compared to externally modulated lasers (EMLs), which use a continuous wave laser followed by an electro-absorption modulator (EAM). An advantage of DMLs is their simplicity over EMLs; therefore, various embodiments of the present technology are presented for illustrative purposes using DMLs. However, application of the technology disclosed herein is not limited to the use of DMLs.

[0034] Furthermore, DMLs are sometimes called distributed feedback (DFB) lasers due to their structure, and a single chip is used with simple electrical circuitry for its small footprint and low power consumption. In DMLs, information is imprinted on an optical beam by modulating an on / off electrical input generated by a driver integrated circuit (IC) and applying it directly to the laser diode to generate a modulated optical signal output. Therefore, DMLs are typically used for lower data rates and shorter distances.

[0035] Furthermore, while the impedance of the DML is assumed to be purely resistive, the DML impedance is a complex impedance of approximately 10 ohms. Note also that adding a small resistor reduces the effect of the DML's complex impedance. Moreover, adding a small resistor also slightly increases the load impedance, improving impedance matching and overall performance. Therefore, even a slightly reduced source impedance and a slightly increased load impedance can help achieve better impedance matching.

[0036] In an embodiment of the present disclosure, to better understand impedance matching, a simple description of impedance matching of two impedances Z1 and Z2, as shown in FIG. 1, is presented herein. In a specific frequency range, the two impedances Z1 and Z2 can be matched using a tapered transmission line. Impedance mismatch or impedance transformation is a traditional problem in radio frequency (RF) and microwave applications. As an example, the RF system may be a 50 ohm-based system, and the Yagi antenna may have an impedance value of approximately 73 ohms. Thus, this example in FIG. 1 presents one of the traditional problems of impedance mismatch. One common methodology for dealing with such impedance mismatch may be described in an article published in 1956 by R.W. Klopfenstein, entitled "A Transmission Line Taper of Improved Design," IRE Proceedings, pp. 31-35, January 1956, the contents of which are incorporated herein by reference in their entirety. It should also be noted that impedance matching networks using tapered lines can be implemented with a variety of techniques and the technology is not limited to the embodiments described in this disclosure, i.e., impedance matching networks can be designed with continuous tapers or tapered transmission lines using a variety of techniques.

[0037] However, there has been no application of the methodology, similar methodologies, or techniques in the field of optical communications, specifically in the design of various optical components, including transmitter optical sub-assemblies (TOSAs), receiver optical sub-assemblies (ROSAs), and other optical transceivers in various packages. This disclosure presents various techniques or applications of the methodology for matching impedance using tapered transmission lines, specifically in the design of TOSAs and optical transceivers. However, applications of the present disclosure are not limited thereto.

[0038] In embodiments of the present disclosure, a tapered transmission line is used to reduce impedance mismatch in the design of an optical device or optical equipment. For example, the use of a tapered transmission line in the design of an optical device may enable several application areas. By way of example, in one or more embodiments of the present disclosure, an impedance transformer using a tapered transmission line (or taper) may be applied to, among other things: (i) characterization of a 25 ohm-based TOSA using test equipment with a 50 ohm impedance; (ii) impedance matching of a DML TOSA between a submount / TOSA package and a DML chip with a 10 ohm impedance; (iii) impedance matching between a 25 ohm driver IC and a 50 ohm TOSA; (iv) impedance matching between a 50 ohm driver IC and a 25 ohm TOSA; (v) impedance matching between a 50 ohm driver IC and a 20-30 ohm Mach-Zehnder Modulator (MZM); (vi) impedance matching in VCSEL designs, and many other situations. It should also be noted that in the examples disclosed herein, the DML has very low impedance and, as mentioned above, often causes impedance mismatches due to the different impedance values ​​between the components (e.g., 10 ohms vs. 25 ohms). Thus, in an attempt to address impedance mismatches, an absorbing resistor-capacitor (RC) circuit is sometimes implemented between the transmission line and ground, while tapered transmission lines or tapers may be used or implemented to match different impedance values ​​within various types of packages, such as ceramic box, TO, COBO, or COB packages.

[0039] First, impedance matching over a very wide bandwidth can be implemented using the tapered transmission line shown in FIGS. 2A-2C. FIGS. 2A-2C show various perspective views of an exemplary embodiment of the present technology. FIGS. 2A-2C show various perspective views of an exemplary embodiment of a TO-type TOSA. FIG. 2A is a side view of an exemplary embodiment according to aspects of the present disclosure. In this example, the DML is disposed on a submount within the TO. FIG. 2B is a bottom perspective view of an exemplary embodiment showing an exemplary taper disposed on a submount according to aspects of the present disclosure. FIG. 2C is a bottom view of an exemplary embodiment showing a taper disposed on a flex circuit according to aspects of the present disclosure. Furthermore, in aspects of the present disclosure, although the tapers in the examples of FIGS. 2A-2C are shown as being located on the submount and flex circuit, the location of the taper may not be limited thereto, and thus the taper may be located anywhere between the DML and the DML driver IC.

[0040] 2D conceptually illustrates another exemplary embodiment of the present technology. In this example, a tapered transmission line (or taper) is designed or implemented with an impedance match between a driver output impedance (Z1) of 25 ohms and a DML impedance (Z2) of 10 ohms. In this example, the impedance match of the taper may be implemented by two separate impedances or implementations, for example, a first portion of the taper on the flex circuit and a second portion of the taper on the submount, split by the Zx impedance of the TO header. Alternatively, as previously discussed, the matching impedance may be implemented with a single taper.

[0041] FIG. 2E shows a diagram conceptually illustrating impedance matching of an embodiment in accordance with one or more aspects of the present disclosure. FIG. 2E shows the reflection response, e.g., reflection coefficient response, of a tapered transmission line over a GHz frequency bandwidth. As shown in FIG. 2D, at 10 GHz (e.g., F min) is maintained below -20 dB. That is, in this example, the reflection in the passband is approximately -20 dB using a tapered design including a tapered transmission line according to aspects of the present disclosure. Furthermore, in this example, the maximum reflection coefficient or S11 value at zero frequency can be determined by 20*log((Z2-Z1) / (Z1+Z2)), where Z1 is the first impedance and Z2 is the second impedance. Furthermore, in the tapered design, F min and F min A maximum reflection beyond F can be specified. That is, for given values ​​of a dielectric material, such as the dielectric constant and thickness of the material, the length of the taper design (or taper) can be determined and / or modified according to the theory of taper design described in the Klopfenstein paper cited above, which is incorporated by reference in its entirety. Thus, in one implementation, F min Since is a lower frequency, the length of the taper to be designed can be longer based on the desired matching characteristics, as explained below.

[0042] For illustrative purposes, a design example of a 50 ohm to 25 ohm impedance transformer (or impedance matching) is presented herein, and the design example is based on the use of tapered transmission lines. Note that the 50 ohm to 25 ohm transformation can be important in the design of evaluation boards for characterization of 25 ohm DML TOSAs, the design of submounts for characterization of Mach-Zehnder modulators (MZMs), and the design of printed wiring boards (PWBs) between 50 ohm driver ICs and 25 ohm DML TOSAs.

[0043] In one example embodiment of the present disclosure, different impedances need to be matched between a 50 ohm measurement instrument (evaluation board) and a 25 ohm DML TOSA. In such a case, the reflection coefficient response shown in FIG. 3 can be designed and the taper design shown in FIG. 4 can be implemented. In this example, the maximum reflection coefficient or S value at zero frequency can be determined by 20*log((Z2-Z1) / (Z1+Z2)), where Z1 is 25 ohms and Z2 is 50 ohms, so the maximum S response at zero frequency is calculated to be -9.54 dB. Furthermore, for these input values, the reflection coefficient response S (of the designed taper) and the transfer function response S over the frequency range are shown in FIGS. 5A and 5B.

[0044] In yet another example, a DML TOSA design may use a substrate material with a dielectric constant of 9.8, a substrate thickness of 100 μm, and a conductor thickness of 3 μm. Also, aluminum oxide (Al2O3) or aluminum nitride (AlN) may be used in the submount design, and tapered transmission lines may be implemented to match different impedance values ​​between the driver IC impedance of 50 ohms and the DML TOSA impedance of 25 ohms. In this example, the goal of impedance matching between the two different impedance values ​​is the 10 GHz (F min ) can have a reflection coefficient (S11) response of -20 dB.

[0045] In embodiments of the present disclosure, to implement a tapered transmission line, tapers, including microstrip tapers, can be used for impedance matching, and the taper can be designed in a geometry such that the total length of the tapered transmission line, including a 21-step segmented tapered section, can be 3.63 mm, as shown in FIG. 4 . In another implementation, the taper can include a coplanar waveguide or coplanar stripline. In this example, each segment of the tapered transmission line can have a different width size (mm) but the same length (e.g., 173 μm) as well as the same impedance value (ohms). It should also be noted that while specific dimensions of the tapered transmission line or taper are used herein for purposes of clarity and illustration, the present disclosure of the present technology is not limited thereto, and other dimensions may be used in accordance with one or more embodiments of the present disclosure.

[0046] Returning to Figures 3 and 4, the goal of the tapered design is to achieve a frequency of 10 GHz (F min ) the maximum value of the reflection coefficient S11 response above F can be maintained at about -20 dB. min Note that at 10 GHz, the reflection in the passband is approximately -20 dB. Additionally, note that the reflection coefficient or S11 response below 10 GHz increases as the frequency decreases toward zero frequency. The maximum reflection coefficient S11 response at zero frequency is shown to be approximately -9.54 dB, as shown in Figure 3, which is determined by the two impedance values ​​Z1 and Z2, as shown in Figure 2E. That is, in this example, the maximum reflection coefficient or S11 value at zero frequency can be determined by 20*log((Z2-Z1) / (Z1+Z2)), where Z1 is 25 ohms and Z2 is 50 ohms, and in this example, the maximum S11 response at zero frequency is calculated to be -9.54 dB.

[0047] Furthermore, as mentioned above, in an exemplary design, the taper may be designed such that the total length of the required tapered transmission line is 3.633 mm with 21 steps, and each step is 0.173 mm long, as shown in Figure 4. As can be seen in Figure 4, the designed taper segments include various impedance and width values. That is, the characteristic impedance of the tapered transmission line may be modified by tapering the width of the transmission line, thereby increasing or decreasing the width of the transmission line (e.g., microstrip, stripline, etc.), to create a desired impedance taper.

[0048] Output simulation results of an exemplary design for impedance matching between 25 ohms and 50 ohms using the design parameters shown in FIGS. 3 and 4 can be obtained as shown in FIGS. 5A and 5B, which show the reflection coefficient response S11 and transfer function response S21 over the frequency range (of the designed taper).

[0049] 6A and 6B show different F min 6A and 6B show the results of two different designs of F. In another aspect of the present disclosure, the present disclosure provides other exemplary techniques or methodologies for impedance transformation, for example, from 25 ohms to 10 ohms. By way of example, as shown in FIGS. 6A and 6B, min Multiple designs with different values ​​of F can be implemented. min Figure 6B shows that the first design achieves a tapered output length of 5.84 mm in 21 steps, with a frequency of 10 GHz and a passband reflection of -30 dB. min The second design, with a passband reflection of -25 dB at 5 GHz, shows that a tapered design output length of 9.68 mm can be achieved with 21 steps.

[0050] In embodiments of the present disclosure, for illustrative purposes, in another example, a tapered impedance transformer (e.g., 25 ohms to 10 ohms) for DFB packaging may be implemented. For DFB TOs, the impedance of the TO header is typically about 25 ohms, the internal submount can be designed with a 25 ohm transmission line, and a 10 ohm DFB chip can be mounted on top of the 25 ohm transmission line. Because the 10 ohm impedance is terminated at the end of the 25 ohm transmission line, DFB TO designs without using current technology may result in a worsening of the reflection coefficient S11 and transfer function S21 response. However, by implementing a tapered transmission line according to one or more embodiments of the present disclosure, the reflection coefficient S11 and transfer function response S21 can each be significantly improved.

[0051] In another embodiment of the present disclosure, in an exemplary design of a taper for a 25 ohm TOSA package, a taper from 25 ohms to 10 ohms may be designed using predetermined input parameters. As an example, as shown in FIG. 7A, the design conditions may be specified as follows: substrate material is 99.8% alumina, substrate thickness is 200 um, gold thickness is 2 um, and dielectric constant is 9.8, and input parameters are Z1=10 ohms, Z2=25 ohms, F min = 5 GHz, and reflection in the passband = -20 dB. With the above design conditions and input parameters, the output result of the required taper design can be obtained as shown in Figures 7A and 7B, with a taper length of 7.65 mm in 21 steps.

[0052] However, in this example, it should be noted that using a designed taper length of 7.65 mm for a DFB TO submount may be impractical because typical lengths available within TO56 for DFB lasers are typically approximately 1-2 mm, much shorter than the designed taper length. Therefore, the design conditions may need to be modified and the process may need to be repeated to obtain a more realistic taper design length that fits within the TO56. However, it should also be noted that in another aspect of the present disclosure, the initial design length may be applicable and used for a different type of package, for example, a box-type package with relatively large internal dimensions. Alternatively, a tapered design with a shorter taper length may be obtained using relaxed design specifications.

[0053] In another aspect of the present disclosure, the designed taper length can be controlled by using a thinner substrate thickness and a larger load impedance. For example, in this example, the substrate thickness can be changed to 150 um and the load impedance Z1 can be changed to 13 ohms, which results in a designed taper length of 6.61 mm in 21 steps, as shown in Figures 8A and 8B.

[0054] However, it should be noted that even with a substrate thickness of 150 um, the designed length of the taper (e.g., 6.61 mm) may still be longer than desired, so the load impedance may be further modified based on trial and error until the desired result is achieved.

[0055] As previously mentioned, the tapered design can be utilized to achieve better impedance matching in optical devices or optical equipment, including DML packaging, and improved impedance matching contributes to improved overall performance. As a result, the overall performance of the optical system, optical device, or optical equipment can be superior even with slight variations in source impedance, load impedance, printed wiring board (PWB) line impedance, TO / submount impedance, etc.

[0056] In another aspect of the present disclosure, the impedance values ​​of the PWB, TO, and submount can each be fixed to a predetermined value. Minor variations in the PWB, TO, and submount can less significantly affect overall performance. Also, the flex circuit can be designed with a modified or simpler tapered design, potentially making it easier to implement.

[0057] As previously mentioned, the taper can be designed and implemented to match different impedance values, for example, to address the impedance mismatch between 25 ohms and 10 ohms. Furthermore, using given design requirements, the total length of the taper can be 19 mm, which may be too long to implement in the flex circuit and DML TO, resulting in the need for multiple iterations of the taper design as well as input parameter modifications. Furthermore, the designed taper can include multiple sections, such as the three sections shown in FIG. 9 , corresponding to different components. As an example, the three sections of the taper can include: (i) a first section or segment from the driver on the printed circuit board (PCB) to the flex joint; (ii) a second section or segment of the flex circuit; and (iii) a third section or segment of the submount containing the TO and DML. Furthermore, because the impedance of the TO package is also part of the taper, the impedance of the TO package needs to be modified to obtain an accurate taper design.

[0058] 9 shows an exemplary taper design according to an embodiment of the present disclosure. In this example, the length of the first section of the designed taper corresponding to the PCB or PWB is 2.73 mm, the length of the second section of the designed taper corresponding to the flex circuit is 13.65 mm, and the length of the third section of the designed taper corresponding to the TO and submount is 2.73 mm. Therefore, the designed taper length totals 19.11 mm, which may be too long to implement the designed taper on a flex circuit and may require further design iterations based on various input parameters.

[0059] Also as mentioned above, in the example shown in FIG. 9, the designed taper may include three sections. That is, the designed taper includes a first section corresponding to the PWB, a second section corresponding to the flex circuit, and a third section corresponding to the TO and submount. In this example, the first section is 2.73 mm long and includes three segments. The second section is 13.6 mm long and includes 15 segments. The third section is 2.73 mm long and includes three segments. Furthermore, in this example, each segment x has a width of X (mm or inches) and an impedance value of Z0 (ohms).

[0060] Furthermore, note that in this example, the first and third sections of the taper are relatively short, and the impedance of the first and third sections can be approximated as the average value of the three segments included in the first and third sections, respectively. Also, with regard to the flex circuit, the total length of the flex circuit may be 13.65 mm, which may be too long to fit, resulting in further iterations of the taper length design. Also, in the second section, the segments can be grouped into five secondary groups, and the average impedance of each secondary group can be used for the new impedance of each secondary group.

[0061] Figures 10A, 10B, and 10C show simulation results for a modified taper design relative to Figure 9. Please note that in the accompanying drawings and figures, wherever applicable, the red trace is for the original taper design and the blue trace is for the modified taper design.

[0062] 11 and 12 show the optimization results of the modified taper design relative to the original taper design. In another embodiment of the present disclosure, the modified taper design can be further optimized by changing the lengths of different sections or segments. As an example, the length of the flex circuit can be shortened from 2.73 mm to 2 mm for each segment. As shown in FIGS. 11 and 12, as the flex circuit length is shortened, the S33 response (response of the modified taper design) deteriorates as frequency increases, but the S43 response (response of the modified taper design) improves slightly at the expense of a degradation in S33, as shown in the superimposed graphs.

[0063] 11A and 11B show optimization results when the length of the flex circuit is shortened from 2.73 mm to 2 mm for each section. 12A and 12B show another optimization result when the length of the flex circuit can be shortened from 2.73 mm to 1.5 mm for each section. As shown in FIGS. 12A and 12B, the S33 response worsens as the frequency increases, but the S43 response improves at the expense of a degradation in the S33 response. Note that further shortening the length of each section to 1.3 mm results in a slight improvement in S21, at the expense of a degradation in S11 at high frequencies.

[0064] 13A and 13B show another optimization result of the modified taper design. In an embodiment of the present disclosure, the load impedance can be changed. As an example, the load impedance can be changed from 10 ohms to 15 ohms, and the length of the flex circuit is also shortened from 2.73 mm to 2 mm for each segment.

[0065] 14A and 14B show another optimization result of the modified taper design. In embodiments of the present disclosure, the source impedance can be changed. As an example, the source impedance can be changed from 25 ohms to 25 ohms ±10% (22.5 ohms to 27.5 ohms), and the length of the flex circuit is also shortened from 2.73 mm to 2 mm for each segment.

[0066] 15A and 15B show another optimization result of the modified taper design. In an embodiment of the present disclosure, both the source impedance and the load impedance are varied. As an example, the source impedance is set to 22.5 ohms and the load impedance is set to 12 ohms. The length of the flex circuit can be reduced from 2.73 mm to 2 mm for each segment.

[0067] 16A and 16B show another optimization result of the modified taper design. In this embodiment of the present disclosure, the PWB line impedance is changed from 20.44 ohms to 25 ohms, and the length of the flex circuit is also shortened from 2.73 mm to 2 mm per segment. Note also that the overall performance is not significantly affected by keeping the PWB line impedance at 25 ohms, as in the conventional design.

[0068] 17A and 17B show another optimization result of a modified taper design. In an embodiment of the present disclosure, the impedance of the TO and submount can be changed from 12.22 ohms to 13.22 ohms, which is the impedance of the last section of the flex circuit. The length of the flex circuit can be shortened from 2.73 mm to 2 mm per segment. In this example, even if the impedance of the TO and submount is slightly increased to the same value as the impedance of the last section of the flex circuit, the overall performance is not significantly affected.

[0069] 18A and 18B show another optimization result of the modified taper design. In this example, the TO and submount impedances can be set to 13.22 ohms. The PWB impedance can still be set to 25 ohms. The load impedance can also be changed from 10 ohms to 13 ohms. The length of the flex circuit can be shortened from 2.73 mm to 2 mm per segment. Note that the overall S21 performance is well maintained even with the TO and submount impedances slightly increased and the PWB impedance set to 25 ohms. Furthermore, note that the S43 and S33 responses exhibit the best performance when the load impedance is 13 ohms. Note also that in this example, a 10 ohm load exhibits the worst performance as the TO and submount impedances increase.

[0070] In various embodiments of the present disclosure, better impedance matching, in one example, of a DML package match at 25 ohms, has been demonstrated based on the implementation of a taper design between components. The results show that the overall performance of an optical device or optical equipment incorporating a DML package and taper design is significantly improved, even with slight variations in source impedance, load impedance, and TO / submount impedance. It should also be noted that a slightly reduced source impedance and a slightly increased load impedance can also result in better impedance matching.

[0071] Additionally, in another aspect of the present disclosure, tapers can be designed and implemented to further enhance performance from the PWB to the DML. In another aspect of the present disclosure, the impedances of the PWB, TO, and submount can be fixed to a certain value, and slight variations in the PWB, TO, and submount may not significantly affect overall performance. Also, the flex can be designed with one or more modified taper designs, making it easier to implement.

[0072] Thus, the present disclosure presents new and novel taper designs and applications of taper designs for impedance matching between various components of an optical device or optical equipment. By way of example, the different impedances of a DML and a DML driver in a TO package can be effectively matched, thereby improving the performance of the DML packaged in TO and the overall performance of the optical communication device, optical system, or optical equipment that includes the DML.

[0073] Furthermore, implementation of the present technology may result in many benefits, including better matched designs, improved performance, lower drive voltages and power consumption, reduced reflections, reduced radio frequency emissions, etc.

[0074] As indicated above, various methods, techniques, arrangements, or variations thereof may be implemented using tapered transmission line designs and implementations in optical devices or equipment to match different impedance values. Other embodiments of the present technology may be possible and are not limited to the embodiments disclosed herein.

[0075] In this disclosure, the singular can include the plural unless the context clearly dictates otherwise. Also, the article "a" when used herein is intended to include one or more items. Furthermore, no element, act, step, or instruction used in this disclosure should be construed as critical or essential to the disclosure unless explicitly described as such in the disclosure. As used herein, unless expressly stated otherwise, the term "comprises (present tense)" and variations of the term, such as "comprises (present participle)," "comprises (third person singular)," and "comprised (past tense)," are not intended to exclude other additional elements, components, integers, or steps. As used herein, terms such as "first," "second," and the like may be used to describe various components, but the components are not limited by the terms above. The terms above are used only to distinguish one component from another without departing from the scope of the disclosure. Also, as used herein, the term "and / or" includes multiple associated items or any combination of multiple associated items. Furthermore, when an element is described as being "coupled" or "connected" to another element, it should be noted that the element may be directly coupled or connected to the other element, or the element may be coupled or connected to the other element through a third element. Also, as used herein, the terms "comprise" or "have" indicate the presence of features, operations, components, steps, numbers, parts, or any combination thereof described herein. Furthermore, the terms "comprise" or "have" do not exclude the possible presence or addition of one or more other features, operations, components, steps, numbers, parts, or combinations. Furthermore, as used herein, the article "a" is intended to include one or more items. Furthermore, no element, act, step, or instruction used in this disclosure should be construed as critical or essential to the invention unless expressly described as such in the disclosure.

[0076] Although the present technology has been illustrated in conjunction with the specific examples described herein for purposes of illustrating exemplary embodiments, those skilled in the relevant art will recognize that a wide variety of alternative and / or equivalent implementations may be substituted for the specific examples shown and described without departing from the scope of the present disclosure. Accordingly, the present disclosure is intended to cover any adaptations or variations of the examples and / or embodiments shown and described herein without departing from the spirit and scope of the present disclosure.

Claims

1. 1. A method for matching impedance of a directly modulated laser (DML) using a taper, the taper being configured to include a first section, a second section, and a third section; The taper of the first section is configured to be allocated from a driver located on a printed circuit board (PCB) or a printed wiring board (PWB) to a joint with the flex circuit; The taper of the second section is configured to be assigned to the flex circuit; The taper of the third section is configured to be assigned to a submount including a package and the DML located on the flex circuit; The method, wherein taper lengths are designed in the order of the first section, the second section, and the third section.

2. 10. The method of claim 1, wherein the DML is enclosed in a package, the package comprising a transistor outline (TO), a ceramic box, a consortium on board optics (COBO), or a chip on board (COB) package.

3. 2. The method of claim 1, wherein the first section of the taper comprises a first three segments, the second section of the taper comprises a second fifteen segments, and the third section of the taper comprises a third three segments.

4. 2. The method of claim 1, wherein the first section of the taper and the third section of the taper are relatively short, and the impedance value of the first section of the taper and the impedance value of the third section of the taper are each approximated as an average value of three segments.

5. A directly modulated laser (DML) disposed within the package; a DML driver integrated circuit (IC) coupled to the DML; and A taper disposed between the DML driver IC and the DML wherein the taper is configured to match different impedances of the DML driver IC, the DML, and / or the package; the taper is configured to include a first section, a second section, and a third section; the taper of the first section is allocated from a driver located on a printed circuit board (PCB) or a printed wiring board (PWB) to a joint with the flex circuit; a taper of the second section is assigned to the flex circuit; the taper of the third section is assigned to the package and a submount located on the flex circuit; An optical communication device, wherein taper lengths are designed in the order of the first section, the second section, and the third section.

6. 6. The optical communication device of claim 5, wherein the impedance of the DML is about 10 ohms, the impedance of the DML driver IC is about 25 ohms, and the taper is configured to match the impedance of the DML and the impedance of the DML driver IC.

7. 6. The optical communication device of claim 5, wherein the package comprises a transistor outline (TO), a ceramic box, a consortium on board optics (COBO), or a chip on board (COB) package.

8. The optical communication device of claim 5 , wherein the package includes a transistor outline (TO).

9. 9. The optical communication device of claim 8, wherein the first section of the taper comprises a first set of three segments, the second section of the taper comprises a second set of fifteen segments, and the third section of the taper comprises a third set of three segments, and an impedance of the first section and an impedance of the third section are each approximated as an average of three segments.

10. a package having a first impedance; an optical component having a second impedance; a taper coupled to the optical component and to the package; wherein the taper is configured to minimize an amount of impedance mismatch between the first impedance and the second impedance; the taper is configured to include a first section, a second section, and a third section; the taper of the first section is allocated from a driver located on a printed circuit board (PCB) or a printed wiring board (PWB) to a joint with the flex circuit; a taper of the second section is assigned to the flex circuit; the taper of the third section is assigned to the package and a submount located on the flex circuit; An optical communication device, wherein taper lengths are designed in the order of the first section, the second section, and the third section.

11. The optical communication device of claim 10 , wherein the optical components are disposed inside the package.

12. The optical communications device of claim 10 , wherein the optical components are disposed external to the package.

13. 11. The optical communications device of claim 10, wherein the package comprises a Transistor Outline (TO), Ceramic Box, Consortium On Board Optics (COBO), or Chip On Board (COB) package.

14. 11. The optical communication device of claim 10, wherein the optical component comprises a directly modulated laser (DML), a Mach-Zehnder modulator (MZM), or a vertical-cavity surface-emitting laser (VCSEL).

15. 11. The optical communications device of claim 10, wherein the taper is designed to match the second impedance of the optical component to the first impedance of the package.

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