LOAD DRIVE CIRCUIT, ELECTRONIC CONTROL DEVICE, AND CONTROL METHOD FOR ELECTRONIC CONTROL DEVICE

Abstract

The present invention provides: a load drive circuit that includes a switching circuit for selecting power-supply voltages and that is highly reliable and capable of seamlessly switching the power-supply voltages without using a switch or a determination circuit; an electronic control device using the load drive circuit; and a control method for the electronic control device. The present invention comprises a boost circuit that boosts an output from a power supply and a voltage switching circuit that switches between the output from the power supply and an output from the boost circuit. The voltage switching circuit includes a first MOSFET, a second MOSFET, and a gate voltage generating circuit that generates gate voltages for the first MOSFET and the second MOSFET. The present invention is characterized in that gate terminals of the first MOSFET and the second MOSFET are connected to the gate voltage generating circuit, source terminals of the first MOSFET and the second MOSFET are connected to the same node, a drain terminal of the first MOSFET is connected to an output terminal of the boost circuit, a drain terminal of the second MOSFET is connected to an output terminal of the power supply, and the voltage switching circuit seamlessly switches between an output from the power supply and an output from the boost circuit according to an output voltage from the power supply.

Description

[Technical field]

[0001] The present invention relates to the configuration of a load driving circuit and its control, and in particular to a technique that is effective when applied to a load driving circuit having a switching circuit that selects a power supply voltage. [Background technology]

[0002] In recent years, many ECUs (Electronic Control Units) have been put to practical use in the field of car electronics for powertrains and autonomous driving. These ECUs use high-side drivers that use N-type semiconductor elements with low on-resistance to drive the load. For example, a voltage higher than the source voltage is required to control the drive of a high-side driver that uses an NMOS, so a high voltage boosted by a boost circuit is used.

[0003] If a charge pump circuit, for example, is always used as the boost circuit, a boost voltage can be secured even in the low power supply voltage range, ensuring stable operation. However, in the high power supply voltage range, the boost capability becomes excessive, resulting in high power consumption.

[0004] To solve this problem, for example in the case of a switching regulator, an example is disclosed in Patent Document 1 in which a boosted voltage provided by a bootstrap circuit is used when the power supply voltage is high, and a boosted voltage provided by a charge pump circuit is used when the power supply voltage drops. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2014-11841 A Summary of the Invention [Problem to be solved by the invention]

[0006] In addition to the problem of increased power consumption due to the boost circuit when the power supply voltage is high, in a configuration such as that in Patent Document 1 above, which detects a drop in the power supply voltage (battery voltage in the case of an in-vehicle device) and uses the boosted voltage from a charge pump circuit, there is a concern that malfunctions may occur due to sudden changes in battery voltage, which are unique to in-vehicle devices.

[0007] Therefore, a seamless method that does not use switches or decision circuits is desirable for switching the voltage supplied to the circuit that drives and controls the high-side driver that uses N-type semiconductor elements such as NMOS.

[0008] Therefore, an object of the present invention is to provide a highly reliable load driving circuit having a switching circuit that selects a power supply voltage, which is capable of seamlessly switching power supply voltages without using switches or judgment circuits, and an electronic control device and a control method for an electronic control device using the same. [Means for solving the problem]

[0009] In order to solve the above problems, the present invention provides a boost circuit for boosting an output from a power supply, and Output from the boost circuit Change the ratio of a voltage switching circuit, the voltage switching circuit including a first MOSFET and The gate width / gate length ratio is larger than that of the first MOSFET a second MOSFET and a gate voltage generating circuit that generates gate voltages for the first MOSFET and the second MOSFET, wherein gate terminals of the first MOSFET and the second MOSFET are connected to the gate voltage generating circuit, source terminals of the first MOSFET and the second MOSFET are connected to the same node, a drain terminal of the first MOSFET is connected to an output terminal of the boost circuit, and a drain terminal of the second MOSFET is connected to an output terminal of the power supply, and a relationship between the gate width / gate length ratio of the first MOSFET and the gate width / gate length ratio of the second MOSFET. In response to the output from the power supply Current and Output from the boost circuit The ratio to the current changes It is characterized by:

[0010] The present invention is also characterized in that it comprises a load driving circuit for controlling the driving of a load and a microcontroller, and the load driving circuit is a highly reliable load driving circuit capable of seamlessly switching power supply voltages without using the above-mentioned switch or judgment circuit.

[0011] The present invention also relates to a boost circuit for boosting an output from a power supply, and and Output from the boost circuit Change the ratio of A control method for an electronic control device including a voltage switching circuit, the voltage switching circuit has a first MOSFET, a second MOSFET having a gate width / gate length ratio larger than that of the first MOSFET, and a gate voltage generation circuit that generates gate voltages for the first MOSFET and the second MOSFET, wherein gate terminals of the first MOSFET and the second MOSFET are connected to the gate voltage generation circuit, source terminals of the first MOSFET and the second MOSFET are connected to the same node, a drain terminal of the first MOSFET is connected to an output terminal of the boost circuit, and a drain terminal of the second MOSFET is connected to an output terminal of the power supply, The output voltage from the power supply and a relationship between the gate width / gate length ratio of the first MOSFET and the gate width / gate length ratio of the second MOSFET. In response to the output from the power supply Current and Output from the boost circuit The ratio of the current changes, It is characterized by outputting to a load. Effect of the Invention

[0012] According to the present invention, in a load driving circuit having a switching circuit that selects a power supply voltage, it is possible to realize a highly reliable load driving circuit that is capable of seamlessly switching power supply voltages without using switches or judgment circuits, as well as an electronic control device and a control method for an electronic control device using the same.

[0013] This reduces the power consumption of the electronic control device and improves its reliability.

[0014] Problems, configurations and effects other than those described above will become apparent from the following description of the embodiments. [Brief description of the drawings]

[0015] [Figure 1] FIG. 1 is a diagram showing a configuration of a conventional load driving circuit. [Diagram 2] 1 is a diagram showing a configuration of a load driving circuit according to a first embodiment of the present invention. [Diagram 3] 3 is a diagram conceptually showing a load driving current in the configuration of FIG. 2. FIG. [Figure 4] FIG. 11 is a diagram showing a configuration of a load driving circuit according to a second embodiment of the present invention. [Diagram 5]FIG. 11 is a diagram showing a configuration of a load driving circuit according to a third embodiment of the present invention. [Figure 6] 6 is a diagram showing a configuration of a high-side driver drive control circuit in FIG. 5. [Figure 7] FIG. 11 is a diagram showing a configuration of a load driving circuit according to a fourth embodiment of the present invention. [Figure 8] FIG. 11 is a diagram showing a configuration of a load driving circuit according to a fifth embodiment of the present invention. [Figure 9] FIG. 13 is a diagram showing a schematic configuration of an electronic control device according to a sixth embodiment of the present invention. [Figure 10] FIG. 13 is a diagram showing a schematic configuration of an electronic control device according to a seventh embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the drawings are simplified, and the technical scope of the present invention should not be interpreted narrowly based on the description in the drawings. In addition, in the description of this specification, the same elements are given the same reference numerals, and duplicated descriptions are omitted. EXAMPLES

[0017] First, the configuration of a conventional load driving circuit and its problems will be described with reference to Fig. 1. Fig. 1 is a diagram showing the configuration of a conventional load driving circuit.

[0018] As shown in FIG. 1, the conventional load driving circuit drives a load 24 by a source follower of an NMOS (M1) 23.

[0019] This is a source follower that outputs to the source terminal the VGS voltage (voltage between the gate and source), that is, a voltage that is lower than the gate voltage by ((voltage of signal line 3) - (voltage of signal line 4)), depending on the current output from the source terminal of the NMOS (M1) 23.

[0020] A voltage dropped from the voltage of the signal line 3 by an amount of the VGS voltage determined by the element size of the NMOS (M1) 23 and the current driving the load 24 becomes the output voltage of the source follower (the voltage of the signal line 4).

[0021] The gate voltage generating circuit 22 supplies a gate voltage (the voltage of the signal line 3) so that the voltage of the signal line 4 output to the load 24 falls within a predetermined range. The output voltage (signal line 2) of the boost circuit 21 is connected to the drain terminal of the NMOS (M1) 23 in order to ensure operation even in a region where the output voltage of the power supply 20 is low.

[0022] This conventional configuration can ensure stable operation even in the range where the output voltage of the power supply 20 is low, but in the range where the output voltage of the power supply 20 is high, the boost circuit 21 boosts the voltage excessively, resulting in a problem of increased power consumption.

[0023] Next, a load driving circuit and its driving current according to the first embodiment of the present invention will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a diagram showing the configuration of the load driving circuit of this embodiment. Fig. 3 is a diagram conceptually showing the load driving current in the configuration of Fig. 2.

[0024] The load driving circuit of this embodiment is a circuit that reduces the supply current from the boost circuit 21 in order to reduce the power consumption that is a problem in the conventional example.

[0025] As shown in FIG. 2, the load driving circuit of this embodiment includes an NMOS (M2) 25 in addition to the conventional configuration (FIG. 1).

[0026] The gate terminal and the source terminal of the NMOS (M2) 25 are commonly connected to the gate terminal and the source terminal of the NMOS (M1) 23, respectively, and the drain terminal is connected to the output voltage of the power supply 20 (signal line 1).

[0027] In other words, the load driving circuit of this embodiment has a configuration in which source followers having different drain voltage supply sources are connected in parallel to the load 24 .

[0028] In a region where the output voltage of the power supply 20 is high, the current driving the load 24 is shared between the NMOS (M1) 23 and the NMOS (M2) 25, so that the output current of the boost circuit 21, which is the current flowing through the NMOS (M1) 23, can be reduced.

[0029] The ratio of the current flowing through the NMOS (M1) 23 and the NMOS (M2) 25 can be changed by the element size. When the W / L (gate width / gate length) ratio of the NMOS (M2) 25 is made larger than that of the NMOS (M1) 23, the current on the NMOS (M2) 25 side increases, and the current of the NMOS (M1) 23 can be further reduced.

[0030] Even if the current to drive the load 24 cannot be supplied from the NMOS (M2) 25 side when the output voltage of the power supply 20 is low, the current can be supplied only from the NMOS (M1) 23 using the boosted voltage, ensuring stable operation. At this time, the output voltage of the power supply 20 is low, so the power consumption is small.

[0031] For example, consider a case where the size ratio of the NMOS (M1) 23 and the NMOS (M2) 25, which have characteristics such that the drain voltage dependency in the MOS saturation region is negligibly small, is 1:3.

[0032] In a region where the output voltage of the power supply 20 is high, the drive current of the load 24 is borne at a ratio of 1:3.

[0033] On the other hand, when the NMOS (M2) 25 cannot supply a driving current in a region where the output voltage of the power supply 20 is low, the burden becomes 4:0.

[0034] When the output voltage of the power supply 20 is in an intermediate range between a high range and a low range, the sharing ratio is transient, and an image of this state is shown in FIG.

[0035] In addition, the current value flowing through the NMOS (M1) 23 differs by four times between the high and low output voltage regions of the power supply 20. However, the current value in the MOS saturation region is (VGS-Vth) 2Since the gate-source voltage is proportional to the gate-source voltage, the value of (VGS-Vth) is twice as large. Note that VGS is the gate-source voltage, and Vth is the MOS threshold voltage.

[0036] Here, if the element size is set so that the value of (VGS-Vth) is, for example, 300 mV, Vth does not change, so if the current increases fourfold, the VGS voltage will increase by about 300 mV to 600 mV. It should be noted that the voltage output to load 24 varies depending on the source follower NMOS element size in the high and low output voltage ranges of power supply 20, but this is not a problem as long as it does not affect the characteristics of the circuit used.

[0037] As described above, the load driving circuit of this embodiment can reduce power consumption in a range where the output voltage of the power supply 20 is high by seamless switching without using a switch or a determination circuit.

[0038] As described above, the load drive circuit of this embodiment includes the boost circuit 21 that boosts the output from the power supply 20, and the voltage switching circuit 100 that seamlessly switches between the output from the power supply 20 and the output from the boost circuit 21. The voltage switching circuit 100 has a first MOSFET (NMOS(M1) 23), a second MOSFET (NMOS(M2) ​​25), and a gate voltage generation circuit 22 that generates gate voltages for the first MOSFET (NMOS(M1) 23) and the second MOSFET (NMOS(M2) ​​25). Each gate terminal of the OSFET (NMOS (M2) 25) is connected to a gate voltage generating circuit 22, each source terminal of the first MOSFET (NMOS (M1) 23) and the second MOSFET (NMOS (M2) 25) is connected to the same node, the drain terminal of the first MOSFET (NMOS (M1) 23) is connected to the output terminal of the boost circuit 21, and the drain terminal of the second MOSFET (NMOS (M2) 25) is connected to the output terminal of the power supply 20. The circuit is configured to seamlessly switch between the output from the power supply 20 and the output from the boost circuit 21 according to the output voltage from the power supply 20.

[0039] This makes it possible to realize a highly reliable load driving circuit that is capable of seamlessly switching the power supply voltage without using a switch or a determination circuit. EXAMPLES

[0040] Second Exemplary Embodiment A load driving circuit according to a second exemplary embodiment of the present invention will be described with reference to Fig. 4. Fig. 4 is a diagram showing the configuration of the load driving circuit according to the present exemplary embodiment.

[0041] As shown in FIG. 4, the load driving circuit of this embodiment has a diode 26 and a signal line 5 added to the configuration of the first embodiment (FIG. 2).

[0042] In this embodiment, a portion consisting of the source follower of the NMOS (M1) 23, the source follower of the NMOS (M2) 25, the gate voltage generating circuit 22, and the diode 26 is defined as a voltage switching circuit 100.

[0043] By adding the diode 26, it is possible to prevent a current from flowing back from the signal line 4 to the signal line 1 via the NMOS (M2) 25 when the voltage of the signal line 4 is high in a region where the output voltage of the power supply 20 is low. EXAMPLES

[0044] A load driving circuit according to a third embodiment of the present invention will be described with reference to Fig. 5 and Fig. 6. Fig. 5 is a diagram showing the configuration of the load driving circuit according to the third embodiment. Fig. 6 is a diagram showing the configuration of the high-side driver driving control circuit of Fig. 5.

[0045] In this embodiment, the load 24 in the second embodiment (FIG. 4) is embodied as a high-side driver drive control circuit 27.

[0046] The load driving circuit of the present embodiment is a driver circuit that drives a second load 31, and is composed of a high-side driver NMOS (M3) 28, a high-side driver driving control circuit 27, a low-side driver NMOS (M4) 30, and a low-side driver driving control circuit 29, with the output voltage of the power supply 20 being the Hi level and GND being the Lo level.

[0047] A circuit including the voltage switching circuit 100 and the high side driver drive control circuit 27 is referred to as a high side driver control circuit 101. Moreover, the entire circuit including the voltage switching circuit 100, the high side driver drive control circuit 27, the low side driver drive control circuit 29, the high side driver NMOS (M3) 28, and the low side driver NMOS (M4) 30 is referred to as a driver circuit 102.

[0048] Here, an NMOS is used as an example of an N-type semiconductor element used as a high-side driver, but elements such as an NPN bipolar transistor or an IGBT can also be used as the N-type semiconductor element.

[0049] 6 shows an example of the circuit configuration of the high-side driver drive control circuit 27. The high-side driver drive control circuit 27 controls the high-side driver NMOS (M3) 28 by a VGS voltage (gate-source voltage) based on the source terminal (signal line 8) of the high-side driver NMOS (M3) 28.

[0050] The Hi level of the VGS voltage is a current supplied from the output (signal line 4) of the voltage switching circuit 100 with respect to the source terminal (signal line 8), and is a voltage (signal line 55) generated by the driving VGS voltage generating circuit 50. The Lo level is the source terminal (signal line 8) voltage of the high-side driver NMOS (M3) 28.

[0051] Using the Hi level / Lo level of a transmission signal (signal line 56) from an external circuit as an input signal, an on / off control signal (signal line 6) for the high side driver NMOS (M3) 28 is output via an inverter circuit consisting of PMOS 51 and NMOS 52, and an inverter circuit consisting of PMOS 53 and NMOS 54.

[0052] When the high-side driver NMOS (M3) 28 is turned on and the low-side driver NMOS (M4) 30 is turned off, the source terminal (signal line 8) voltage rises to the output voltage level of the power supply 20, so the gate terminal (signal line 6) voltage needs to be a voltage higher by VGS.

[0053] In the high-side driver drive control circuit 27, the PMOS 53 of the inverter circuit shown in FIG. 6 is on and the NMOS 54 is off, the PMOS 51 is off and the NMOS 52 is on, so that the Hi level (signal line 55) voltage=(output voltage of the power supply 20)+(VGS voltage of the high-side driver NMOS (M3) 28).

[0054] Since the voltage of the output (signal line 4) of the voltage switching circuit 100 needs to be higher than the output voltage of the power supply 20, current cannot be supplied from the NMOS (M2) 25 side of the voltage switching circuit 100, and the current required to generate the Hi level (signal line 55) in the drive VGS voltage generation circuit 50 is entirely supplied from the output voltage (signal line 2) of the boost circuit 21.

[0055] When the high side driver NMOS (M3) 28 is off and the low side driver NMOS (M4) 30 is on, the source terminal (signal line 8) voltage drops to the GND level. Therefore, in the high side driver drive control circuit 27, the PMOS 53 of the inverter circuit shown in FIG. 6 is off and the NMOS 54 is on, the PMOS 51 is on and the NMOS 52 is off, and the Hi level (signal line 55) voltage=(GND)+(VGS voltage of the high side driver NMOS (M3) 28).

[0056] In a region where the output voltage of the power supply 20 is high, the voltage of the output (signal line 4) of the voltage switching circuit 100 becomes higher than the VGS voltage of the high-side driver NMOS (M3) 28. Therefore, the current required for generating the Hi level (signal line 55) in the drive VGS voltage generation circuit 50 can be supplied from the NMOS (M2) 25 side of the voltage switching circuit 100, and the current from the boost circuit 21 can be reduced.

[0057] In this way, the voltage switching circuit 100 can reduce the supply current from the boost circuit 21 only when the high-side driver NMOS (M3) 28 is turned off. EXAMPLES

[0058] A load driving circuit according to a fourth embodiment of the present invention will be described with reference to Fig. 7. Fig. 7 is a diagram showing the configuration of the load driving circuit according to the fourth embodiment.

[0059] As shown in FIG. 7, the load driving circuit of this embodiment is obtained by adding a constant voltage source 32 and a signal line 9 to the configuration of the third embodiment (FIG. 5).

[0060] Since the voltage level on the high-side driver side is changed to the voltage of the constant voltage source 32, the load of the driver circuit is shown changed from the second load 31 to a third load 33. Also, the entire circuit including the constant voltage source 32 is shown as a driver circuit 103. For the rest, the same symbols as in FIG. 5 are used for convenience.

[0061] Constant voltage source 32 is a circuit that outputs a desired constant voltage using power source 20. Here, it is a constant voltage source that outputs a voltage lower than the output voltage of power source 20, and outputs a predetermined voltage in the region where the output voltage of power source 20 is high. When the output voltage of power source 20 is lower than the predetermined voltage in the region where the output voltage of power source 20 is low, it is not possible to output the predetermined voltage, so it outputs a voltage lower than the voltage output of power source 20, which is lower than the predetermined voltage.

[0062] The difference from the third embodiment (FIG. 5) is that, if we consider the case where the high side driver NMOS (M3) 28 is on, when the high side driver NMOS (M3) 28 is on and the low side driver NMOS (M4) 30 is off, the source terminal (signal line 8) voltage rises to the output voltage level of the constant voltage source 32, and the gate terminal (signal line 6) voltage requires a voltage that is even higher by VGS.

[0063] Therefore, the Hi level (signal line 55) voltage in the high side driver drive control circuit shown in FIG. 6 is Hi level (signal line 55) voltage=(output voltage of constant voltage source 32)+(VGS of high side driver NMOS (M3) 28).

[0064] In addition to the case where the high side driver NMOS (M3) 28 is off as described in the third embodiment, even when the high side driver NMOS (M3) 28 is on, in a region where the output voltage of the power supply 20 is high, when the output voltage of the constant voltage source 32 is sufficiently lower than the output voltage of the power supply 20, the current required for generating the Hi level (signal line 55) in the drive VGS voltage generation circuit 50 can be supplied from the NMOS (M2) 25 side of the voltage switching circuit 100, and the current from the boost circuit 21 can be reduced. EXAMPLES

[0065] A load driving circuit according to a fifth embodiment of the present invention will be described with reference to Fig. 8. Fig. 8 is a diagram showing the configuration of the load driving circuit according to the fifth embodiment.

[0066] In the configuration of the step-down switching regulator shown in FIG. 8, a feedback loop from the output voltage (signal line 12) via an error amplifier 40 controls the on / off of the NMOS (M5) 35 of the main switch by a switching control circuit 34, and a desired output voltage (signal line 12) is obtained from the output voltage of a second constant voltage source 41 to drive a fourth load 39.

[0067] A switching circuit including the voltage switching circuit 100 and the switching control circuit 34 is designated as 104, and a switching regulator including the switching circuit 104, the error amplifier 40, and the second constant voltage source 41 is designated as 105 as a whole.

[0068] The second constant voltage source 41 has the same characteristics as the constant voltage source 32 shown in the fourth embodiment (FIG. 7).

[0069] The main switch NMOS (M5) 35 of the switching regulator 105 is a high-side driver, and the switching control circuit 34 corresponds to the high-side driver drive control circuit 27 of the fourth embodiment (FIG. 7).

[0070] The source terminal voltage (signal line 11) rises to the output voltage level of the second constant voltage source 41 when the NMOS (M5) 35 is on, and drops to (GND-VF voltage of the diode 36) when the NMOS (M5) 35 is off.

[0071] Therefore, when the high side driver NMOS (M5) 35 is off, it operates in the same manner as in the third embodiment (FIG. 5), and when the high side driver NMOS (M5) 35 is on, it operates in the same manner as in the fourth embodiment (FIG. 7). Therefore, when the output voltage of the power supply 20 is in a high range and the output voltage of the second constant voltage source 41 is sufficiently lower than the output voltage of the power supply 20, current can be supplied from the NMOS (M2) 25 side of the voltage switching circuit 100, and the current from the boost circuit 21 can be reduced. EXAMPLES

[0072] An electronic control device according to a sixth embodiment of the present invention will be described with reference to Fig. 9. Fig. 9 is a diagram showing a schematic configuration of the electronic control device according to the present embodiment.

[0073] The electronic control device 200 of this embodiment shown in FIG. 9 is a configuration diagram of an electronic control device (hereinafter referred to as ECU: Electronic Control Unit) equipped with the driver circuit 103 shown in, for example, the fourth embodiment (FIG. 7), and specifically, is an ECU for use in an automobile.

[0074] 9, the system is shown as an in-vehicle system including a power supply 20 (corresponding to a battery) and an ECU 200. The ECU 200 includes a boost circuit 21 that boosts the output voltage of the power supply 20, the driver circuit 103 in FIG.

[0075] The microcomputer 201 performs various controls using a plurality of input signals 202 and a plurality of output signals 203. It also controls the driver circuit 103 using a control signal 204, and drives the load with the output of the driver circuit 103 (signal line 8: load drive signal).

[0076] In this example, the driver circuit 103 is used, but the driver circuit 102 shown in the third embodiment (FIG. 5) can also be used.

[0077] Although not shown in FIG. 9, the ECU 200 is equipped with a plurality of high-side driver circuits, and the voltage switching circuit 100 can reduce power consumption. EXAMPLES

[0078] An electronic control device according to a seventh embodiment of the present invention will be described with reference to Fig. 10. Fig. 10 is a diagram showing a schematic configuration of the electronic control device according to this embodiment.

[0079] An electronic control unit 200 of this embodiment shown in FIG. 10 is a configuration diagram of an electronic control unit (ECU) equipped with the switching regulator 105 shown in the fifth embodiment (FIG. 8), for example, and is specifically an ECU for use in a vehicle.

[0080] 10, the system is shown as an in-vehicle system including a power supply 20 (corresponding to a battery) and an ECU 200. The ECU 200 includes a boost circuit 21 that boosts the output voltage of the power supply 20, the switching regulator 105 in FIG.

[0081] The output voltage (signal line 12) of the switching regulator 105 is supplied as a power supply voltage to a microcomputer 201. The microcomputer 201 uses a plurality of input signals 202 and a plurality of output signals 203 to perform various controls.

[0082] The ECU 200 of this embodiment is equipped with a switching regulator 105 and operates by controlling a main switch, which is a high-side driver circuit, and the voltage switching circuit 100 can reduce power consumption.

[0083] Furthermore, by using the electronic control devices described in the above sixth and seventh embodiments in on-board electronic control devices such as a transmission drive system or a powertrain drive system, seamless switching of power supply voltages becomes possible, and malfunctions due to sudden changes in battery voltage can be prevented.

[0084] Furthermore, the present invention is not limited to the above-mentioned embodiment, and various modifications are included. For example, the above-mentioned embodiment has been described in detail to clearly explain the present invention, and is not necessarily limited to those having all of the configurations described. Furthermore, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace a part of the configuration of each embodiment with another configuration. [Explanation of symbols]

[0085] 1 to 14...signal lines, 20...power supply, 21...booster circuit, 22...gate voltage generation circuit, 23...NMOS (M1), 24...load, 25...NMOS (M2), 26...diode, 27...high-side driver drive control circuit, 28...high-side driver NMOS (M3), 29...low-side driver drive control circuit, 30...low-side driver NMOS (M4), 31...second load, 32...constant voltage source, 33...third load, 34...switching control circuit, 35...NMOS (M5), 36...diode, 37...inductor , 38...capacitor, 39...fourth load, 40...error amplifier, 41...second constant voltage source, 50...driving VGS voltage generation circuit, 51, 53...PMOS, 52, 54...NMOS, 55, 56, 57...signal line, 100...voltage switching circuit, 101...high side driver control circuit, 102...driver circuit, 103...driver circuit, 104...switching circuit, 105...switching regulator, 200...electronic control unit (ECU), 201...microcontroller (microcomputer), 202, 203, 204...signal line

Claims

1. a boost circuit for boosting an output from a power supply; a voltage switching circuit that changes a ratio of an output from the power supply and an output from the boosting circuit, the voltage switching circuit includes a first MOSFET, a second MOSFET having a gate width / gate length ratio larger than that of the first MOSFET, and a gate voltage generating circuit that generates gate voltages for the first MOSFET and the second MOSFET; a gate terminal of the first MOSFET and a gate terminal of the second MOSFET are connected to the gate voltage generating circuit; the source terminals of the first MOSFET and the second MOSFET are connected to the same node; a drain terminal of the first MOSFET is connected to an output terminal of the boost circuit; a drain terminal of the second MOSFET connected to an output terminal of the power supply; A load drive circuit in which a ratio of an output current from the power supply to an output current from the boost circuit changes depending on an output voltage from the power supply and a relationship between a gate width / gate length ratio of the first MOSFET and a gate width / gate length ratio of the second MOSFET.

2. 2. The load driving circuit according to claim 1, a load driving circuit including a diode connected between the power supply and the drain terminal of the second MOSFET, the diode having a forward direction from the power supply to the drain terminal of the second MOSFET;

3. 2. The load driving circuit according to claim 1, The voltage switching circuit is a load driving circuit mounted on a high-side driver control circuit.

4. 4. The load driving circuit according to claim 3, a voltage of a current supply source of the high-side driver driven by the high-side driver control circuit is lower than an output voltage of the power supply; a load drive circuit that operates with a current from the second MOSFET side, the current being supplied from the power supply when the high-side driver is turned on;

5. 4. The load driving circuit according to claim 3, The high-side driver control circuit is a load drive circuit that is a switching circuit of a switching regulator that converts an input DC voltage into a target DC voltage by the switching operation of a switching element and outputs the target DC voltage.

6. a load drive circuit for driving and controlling the load; A microcontroller, The electronic control device, wherein the load driving circuit is a load driving circuit according to any one of claims 1 to 5.

7. 7. The electronic control device according to claim 6, The load driving circuit includes a high-side driver circuit, An electronic control device in which the output voltage of a switching regulator equipped with the high-side driver circuit is used as a power supply source for the microcontroller.

8. 7. The electronic control device according to claim 6, An electronic control device used in a transmission drive system or a powertrain drive system.

9. 1. A method for controlling an electronic control device including a boost circuit that boosts an output from a power source and a voltage switching circuit that changes a ratio between the output from the power source and the output from the boost circuit, comprising: the voltage switching circuit includes a first MOSFET, a second MOSFET having a gate width / gate length ratio larger than that of the first MOSFET, and a gate voltage generating circuit that generates gate voltages for the first MOSFET and the second MOSFET; a gate terminal of the first MOSFET and a gate terminal of the second MOSFET are connected to the gate voltage generating circuit; the source terminals of the first MOSFET and the second MOSFET are connected to the same node; a drain terminal of the first MOSFET is connected to an output terminal of the boost circuit; a drain terminal of the second MOSFET connected to an output terminal of the power supply; A control method for an electronic control device in which a ratio between an output current from the power supply and an output current from the boost circuit is changed depending on an output voltage from the power supply and a relationship between a gate width / gate length ratio of the first MOSFET and a gate width / gate length ratio of the second MOSFET, and the current is output to a load.

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