Semiconductor device, power conversion device, and method for manufacturing the same

Abstract

To provide a semiconductor device whose size along an in-plane direction of a mount part can be reduced and where the leak of sealing resin when sealing with the sealing resin is performed can be suppressed, a power conversion device, and a manufacturing method for the semiconductor device.SOLUTION: A semiconductor device 100 includes a semiconductor element 1, a lead frame 2, a substrate 4, sealing resin 6, and a top-surface terminal 7. The sealing resin 6 seals the semiconductor element 1, the lead frame 2, and a part of the substrate 4. The top-surface terminal 7 is exposed from the sealing resin 6. At least one side-surface terminal 3 is exposed from the sealing resin 6. The substrate 4 includes a first region 401 and a second region 402. The first region 401 is exposed from the sealing resin 6. The second region 402 is exposed from the sealing resin 6. The second region 402 is surrounded by the first region 401. The top-surface terminal 7 is connected to the second region 402 of the substrate 4.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Among semiconductor devices, there is a semiconductor device for power use called a power module. A power module is equipped with power semiconductor elements such as an IGBT (Insulated Gate Bipolar Transistor) and an FWD (Free Wheeling Diode). The power semiconductor elements are semiconductor elements for power use. The lead frame of the power module is equipped with a circuit for controlling the operation of the power semiconductor elements, a circuit for measuring current and resistance, etc. The power semiconductor elements are heat-generating components. Heat generated from the power semiconductor elements is dissipated through the lead frame.

[0003] The above-mentioned semiconductor device is manufactured by placing a lead frame on which a circuit is mounted in a resin molding die, and then injecting a thermosetting sealing resin. The circuit is sealed with the sealing resin, thereby ensuring the insulation of the circuit. The shape of the package of the semiconductor device is also molded with the resin. For example, in the semiconductor device described in JP 2015-76488 A (Patent Document 1), the lead (lead frame) on which the above-mentioned circuit is mounted is sealed with the sealing resin in a state in which it is spaced apart from the circuit board (substrate). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2015-76488 A Summary of the Invention [Problem to be solved by the invention]

[0005] In the semiconductor device described in the above publication, if the semiconductor device is to be connected to an external device (not shown), it is necessary to provide a terminal. If the lead frame (lead) includes a terminal for connection to the external device and the terminal protrudes from the inside of the sealing resin to the outside, the dimension of the semiconductor device along the in-plane direction of the mounting portion of the lead frame on which the semiconductor element is mounted becomes large.

[0006] Furthermore, when a semiconductor element (semiconductor chip) or the like is sealed with a sealing resin, the sealing resin may leak onto the surface of the lead frame.

[0007] The present disclosure has been made in consideration of the above-mentioned problems, and its purpose is to provide a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device that can reduce the dimensions of the semiconductor device along the in-plane direction of the mounting portion and can suppress leakage of sealing resin when sealing with the sealing resin. [Means for solving the problem]

[0008] The semiconductor device of the present disclosure includes a semiconductor element, a lead frame, a substrate, a sealing resin, and a top terminal. The lead frame includes a mounting portion and at least one side terminal. The mounting portion has a semiconductor element mounted thereon. The at least one side terminal is connected to an end portion in an in-plane direction of the mounting portion. The at least one side terminal is bent with respect to an in-plane direction of the mounting portion. The substrate is overlaid on the lead frame with a gap therebetween from the semiconductor element. The substrate is electrically connected to the lead frame. The sealing resin seals the semiconductor element, the lead frame, and a portion of the substrate. The top terminal is connected to the substrate. The top terminal is exposed from the sealing resin. At least one side terminal is exposed from the sealing resin. The substrate includes a first region and a second region. The first region is exposed from the sealing resin. The second region is exposed from the sealing resin. The second region is surrounded by the first region. The top terminal is connected to the second region of the substrate. Effect of the Invention

[0009] According to the semiconductor device of the present disclosure, the top terminal is connected to the second region of the substrate. Therefore, the number of side terminals can be reduced compared to when the semiconductor device does not include a top terminal. Therefore, the dimension of the semiconductor device along the in-plane direction of the mounting portion can be reduced. In addition, the second region of the substrate is surrounded by the first region. Therefore, sealing with the sealing resin can be performed in a state where a mold having a portion surrounding the second region is in contact with the entire periphery of the first region. Therefore, leakage of the sealing resin can be suppressed. [Brief description of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view illustrating a schematic configuration of a semiconductor device according to a first embodiment. [Diagram 2] 1 is a top view illustrating a schematic configuration of a semiconductor device according to a first embodiment. [Diagram 3] 1 is a perspective view illustrating a schematic configuration of a semiconductor device according to a first embodiment. [Figure 4] 1 is a cross-sectional view roughly showing a configuration of a semiconductor device according to a first modification of the first embodiment. [Diagram 5] 11 is a cross-sectional view roughly showing a configuration of a semiconductor device according to a second modification of the first embodiment. FIG. [Figure 6] FIG. 11 is a cross-sectional view roughly showing a configuration of a semiconductor device according to a third modification of the first embodiment. [Figure 7] FIG. 13 is a cross-sectional view roughly showing a configuration of a semiconductor device according to a fourth modification of the first embodiment. [Figure 8] 3 is a flowchart illustrating an outline of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 9] 2 is a cross-sectional view showing schematic configurations of a first mold and a second mold used in the method for manufacturing a semiconductor device according to the first embodiment. FIG. [Figure 10] 4 is a cross-sectional view that roughly illustrates the semiconductor device according to the first embodiment in a state in which the lead frame of the semiconductor device is placed in a first mold and the top terminals are accommodated in recesses. FIG. [Figure 11] 1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment in a state in which a semiconductor element, a lead frame, and a part of a substrate are sealed with a sealing resin. [Figure 12] FIG. 13 is a perspective view showing a schematic configuration of a lead frame according to a comparative example. [Figure 13] 1 is a perspective view showing a schematic configuration of a lead frame according to a first embodiment. [Figure 14] FIG. 11 is a perspective view illustrating a schematic configuration of a semiconductor device according to a second embodiment. [Figure 15] 11 is a cross-sectional view that shows a schematic diagram of a semiconductor device according to a second embodiment in a state in which a lead frame of the semiconductor device is placed in a first mold and a top terminal is accommodated in a recess. FIG. [Figure 16] 11 is a cross-sectional view illustrating a semiconductor device according to a second embodiment, in which a semiconductor element, a lead frame, and a part of a substrate are sealed with a sealing resin. FIG. [Figure 17] 11 is a cross-sectional view illustrating a semiconductor device according to a third embodiment in a state in which a semiconductor element, a lead frame, and a part of a substrate are sealed with a sealing resin. FIG. [Figure 18] 13 is a cross-sectional view illustrating a schematic configuration of a first die used in manufacturing a semiconductor device according to a third embodiment. FIG. [Figure 19] FIG. 11 is a top view illustrating a schematic configuration of a semiconductor device according to a fourth embodiment. [Figure 20] FIG. 11 is a cross-sectional view illustrating a schematic configuration of a semiconductor device according to a fourth embodiment. [Figure 21] FIG. 11 is a perspective view illustrating a schematic configuration of a semiconductor device according to a fourth embodiment. [Figure 22] 13 is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment in a state in which a semiconductor element, a lead frame, and a part of a substrate are sealed with a sealing resin. FIG. [Figure 23] FIG. 13 is a block diagram illustrating a schematic configuration of a power conversion device according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment will be described with reference to the drawings. In the following, the same or corresponding parts are denoted by the same reference characters, and overlapping descriptions will not be repeated.

[0012] Embodiment 1 1, the semiconductor device 100 includes a semiconductor element 1, a lead frame 2, a substrate 4, a connection member 5, a sealing resin 6, and a top terminal 7. The package of the semiconductor device 100 is formed by resin molding using the sealing resin 6. In this embodiment, the semiconductor device 100 is a semiconductor device for power generation. A semiconductor device for power generation is called a power module.

[0013] The semiconductor element 1 is mounted on a lead frame 2. In this embodiment, the semiconductor element 1 is a power semiconductor element. The semiconductor element 1 is electrically connected to the lead frame 2 by a first connecting part 16. The semiconductor element 1 may include a plurality of first semiconductor element portions 11. Each of the plurality of first semiconductor element portions 11 is mounted on the lead frame 2.

[0014] The lead frame 2 includes a mounting portion 21, an opposing surface 22, and at least one side terminal 3. A semiconductor element 1 is mounted on the mounting portion 21. The mounting portion 21 faces the substrate 4. The mounting portion 21 has a planar shape. The mounting portion 21 is partially sealed with sealing resin 6. An end 2E in the in-plane direction of the mounting portion 21 is exposed from the sealing resin 6. The opposing surface 22 is provided on the opposite side of the mounting portion 21 to the substrate 4. In this embodiment, the opposing surface 22 is exposed from the sealing resin 6.

[0015] At least one side terminal 3 is connected to an end 2E in the in-plane direction of the mounting portion 21. At least one side terminal 3 is exposed from the sealing resin 6. Therefore, at least one side terminal 3 and the end 2E in the in-plane direction of the mounting portion 21 are connected outside the sealing resin 6. Note that in FIG. 1, for convenience of explanation, the boundary between the end 2E in the in-plane direction of the mounting portion 21 and the side terminal 3 is illustrated by a dashed line. In this embodiment, the mounting portion 21 and the at least one side terminal 3 are configured from the same material.

[0016] At least one side surface terminal 3 is bent with respect to the in-plane direction of the mounting portion 21. At least one side surface terminal 3 extends so as to follow the top surface terminal 7. At least one side surface terminal 3 extends so as to intersect with the in-plane direction of the mounting portion 21. It is desirable that at least one side surface terminal 3 extends so as to be perpendicular to the in-plane direction of the mounting portion 21.

[0017] The substrate 4 is placed on the lead frame 2 with a gap between it and the semiconductor element 1. The substrate 4 is electrically connected to the lead frame 2. The substrate 4 is electrically connected to the lead frame 2 by a connection member 5.

[0018] The substrate 4 includes a first region 401 and a second region 402. The substrate 4 may further include a third region 403. The first region 401 is exposed from the sealing resin 6. The second region 402 is exposed from the sealing resin 6. The third region 403 is covered with the sealing resin 6.

[0019] The substrate 4 includes a front surface 41 and a back surface 42. A first region 401, a second region 402, and a third region 403 are provided on the front surface 41. The front surface 41 is provided on the opposite side of the back surface 42 from the mounting portion 21. The front surface 41 is at least partially exposed from the sealing resin 6. The back surface 42 faces the mounting portion 21. The back surface 42 is sealed with the sealing resin 6.

[0020] The substrate 4 is configured as, for example, a control substrate for controlling the driving of the semiconductor element 1. The substrate 4 is, for example, a glass epoxy substrate. The substrate 4 may be, for example, a ceramic substrate or a metal substrate. This improves the heat dissipation properties of the substrate 4.

[0021] The connection member 5 electrically connects the lead frame 2 and the substrate 4. The connection member 5 is an elastic material having electrical conductivity. The connection member 5 is, for example, a metal wire made of aluminum (Al). When the connection member 5 is a metal wire made of aluminum (Al), the wire diameter of the connection member 5 is, for example, 300 μm or 400 μm. The connection member 5 may be, for example, a ribbon-shaped metal material. This makes it easier for heat to be transferred from the lead frame 2 to the substrate 4.

[0022] The sealing resin 6 seals the semiconductor element 1, the lead frame 2, a portion of the substrate 4, and the connection member 5. More specifically, the portion of the substrate 4 sealed with the sealing resin 6 is the rear surface 42 and the third region 403 of the substrate 4.

[0023] The sealing resin 6 includes a main body portion 61 and a surrounding portion 62. The main body portion 61 seals the semiconductor element 1, at least a part of the mounting portion 21, the rear surface 42 of the substrate 4, and the connection member 5. The surrounding portion 62 is connected to the main body portion 61. The surrounding portion 62 is disposed on the front surface 41. The surrounding portion 62 is formed so as to rise from the main body portion 61. The dimension of the surrounding portion 62 in the height direction is constant. The connection member 5 is disposed across the main body portion 61 and the surrounding portion 62.

[0024] The sealing resin 6 is a thermosetting resin and is hardened by heating.

[0025] The top terminal 7 is connected to the substrate 4. More specifically, the top terminal 7 is connected to the second region 402 of the substrate 4. The top terminal 7 is exposed from the sealing resin 6. The top terminal 7 may be in direct contact with the substrate 4. The top terminal 7 may be joined to the substrate 4 by, for example, solder. The top terminal 7 is a terminal for connecting an external device (not shown) to the semiconductor element 1, the lead frame 2, the substrate 4, etc.

[0026] The top surface terminals 7 extend so as to intersect with the in-plane direction of the mounting portion 21. It is preferable that the top surface terminals 7 extend so as to be perpendicular to the in-plane direction of the mounting portion 21. The top surface terminals 7 extend along the side surface terminals 3. In this embodiment, the semiconductor device 100 includes a plurality of top surface terminals 7.

[0027] As shown in Fig. 2, in this embodiment, the lead frame 2 includes a plurality of side terminals 3. Each of the plurality of side terminals 3 is connected to an end 2E in the in-plane direction of the mounting portion 21. For ease of explanation, in Fig. 2, the boundary between the first region 401 and the second region 402 is shown by a two-dot chain line. Also, the outline of the substrate 4 is shown by a one-dot chain line. Also, the outline of the connection member 5 is shown by a dashed line.

[0028] The first region 401 has an annular shape. The second region 402 is surrounded by the first region 401. The third region 403 surrounds the first region 401. The third region 403 has an annular shape. The third region 403 is covered by a surrounding portion 62 of the sealing resin 6. The surrounding portion 62 surrounds the first region 401 and the second region 402.

[0029] 2 and 3, in the present embodiment, each of the multiple side terminals 3 protrudes from one side of the sealing resin 6. Each of the multiple side terminals 3 is connected to only one side of the sealing resin 6. FIG 1 is a cross-sectional view taken along line II in FIG 3.

[0030] Next, the configuration of a semiconductor device 100 according to a first modification of the first embodiment will be described with reference to FIG.

[0031] In FIG. 1, the semiconductor element 1 is mounted only on the mounting portion 21 of the lead frame 2, but as shown in FIG. 4, a heat-generating component HP may be mounted on the back surface 42 of the substrate 4. The heat-generating component HP is an electronic component that generates heat. The heat-generating component HP is electrically connected to the substrate 4 by the second connecting component 17. As a result, a circuit may be mounted on the substrate 4. The circuit mounted on the substrate 4 is, for example, a control circuit. Although not shown, a heat-generating component HP may be mounted on each of the front surface 41 and the back surface 42 of the substrate 4.

[0032] Next, the configuration of a semiconductor device 100 according to a second modification of the first embodiment will be described with reference to FIG.

[0033] 5, the semiconductor device 100 according to the present embodiment further includes an insulating material 91 and a metal base 92. The insulating material 91 is connected to the lead frame 2 on the side opposite to the semiconductor element 1 with respect to the lead frame 2. The insulating material 91 is disposed on the opposing surface 22 of the lead frame 2.

[0034] The metal base 92 is exposed from the sealing resin 6 and is connected to the lead frame 2 via the insulating material 91. The insulating material 91 and the metal base 92 are configured as a heat sink.

[0035] Next, a configuration of a semiconductor device 100 according to a third modification of the first embodiment will be described with reference to FIG.

[0036] 6, the semiconductor device 100 according to the present embodiment further includes a coating resin 60. The coating resin 60 covers the first region 401 and the second region 402 of the substrate 4. The coating resin 60 is surrounded by a surrounding portion 62.

[0037] Next, a configuration of a semiconductor device 100 according to a fourth modification of the first embodiment will be described with reference to FIG.

[0038] As shown in FIG. 7, the top terminal 7 is configured to be connectable to an external terminal 70. That is, the top terminal 7 is configured as a terminal block. The external terminal 70 is a terminal for connecting the semiconductor device 100 to an external device (not shown). The external terminal 70 is, for example, a connector pin 75, a screw-fastening terminal 76, and a press-fit terminal 77. The top terminal includes, for example, a connector pin receiving portion 71, a screw-fastening terminal receiving portion 72, and a press-fit terminal receiving portion 73. The connector pin receiving portion 71 is connectable to the connector pin 75. The screw-fastening terminal receiving portion 72 is connectable to the screw-fastening terminal 76. The press-fit terminal receiving portion 73 is connectable to the press-fit terminal 77.

[0039] Next, a method for manufacturing the semiconductor device 100 according to the first embodiment will be described with reference to Figures 8 to 11. Although the semiconductor device 100 including the insulating material 91 and the metal base 92 is illustrated in Figures 9 to 11, the semiconductor device 100 does not necessarily have to include the insulating material 91 and the metal base 92.

[0040] As shown in Fig. 8, the manufacturing method of the semiconductor device 100 includes a housing step S101, a sealing step S102, and a forming step S103. As shown in Fig. 9, the manufacturing method of the semiconductor device 100 uses a first mold M1 and a second mold M2, which are resin molding molds. In this embodiment, the first mold M1 is configured as a lower mold. The second mold M2 is configured as an upper mold.

[0041] As shown in FIG. 10, the lead frame 2 is placed in the first mold M1. The mounting portion 21 of the lead frame 2 is placed in the first cavity portion M11 of the first mold M1. If the semiconductor device 100 includes an insulating material 91 and a metal base 92, the insulating material 91 and the metal base 92 are placed in the first cavity portion M11 before the lead frame 2 is placed in the first mold M1. The lead frame 2 is placed in the first cavity portion M11 so as to be in contact with the insulating material 91. The portion of the lead frame 2 that becomes the side terminal 3 (see FIG. 1) extends along the in-plane direction of the mounting portion 21. The sealing resin 6 is placed in the supply portion M12 of the first mold M1 in a cylindrical shape called a tablet.

[0042] Furthermore, after the top terminals 7 are connected to the second region 402, the top terminals 7 are accommodated in the recesses M22 of the second mold M2. The top terminals 7 are accommodated in the recesses M22 with the substrate 4 disposed relative to the lead frame 2 with a gap therebetween.

[0043] The second mold M2 includes a contact portion M21. The contact portion M21 is a flat surface configured to contact the first region 401 of the substrate 4. The contact portion M21 is annular. The second region 402 is disposed inside the contact portion M21. The second mold M2 is provided with a recess M22, a second cavity portion M23, and a runner portion M24. The recess M22 and the second cavity portion M23 are recessed from the contact portion M21. The recess M22 is surrounded by the contact portion M21. The height dimension of the recess M22 is larger than the height dimension of the top terminal 7. The contact portion M21 is surrounded by the second cavity portion M23. The runner portion M24 is configured to allow the softened sealing resin 6 to flow.

[0044] The elastic force of the connection member 5 causes the substrate 4 to be spaced apart from the lead frame 2. That is, the substrate 4 is held in mid-air by the connection member 5. For example, when the connection member 5 is a plurality of metal wires made of aluminum (Al) and having a diameter of 300 μm or 400 μm, the elastic force of the connection member 5 causes the substrate 4 to be spaced apart from the lead frame 2. Furthermore, even if vibrations are applied when the lead frame 2, the substrate 4, and the connection member 5 are transported, the substrate 4 is prevented from moving significantly with respect to the lead frame 2.

[0045] When the second mold M2 is placed on the first mold M1 (the mold is closed), the second mold M2 is placed on the first mold M1 with the first region 401 of the substrate 4 in contact with the contact portion M21.

[0046] 11, the semiconductor element 1, the lead frame 2 and a part of the substrate 4 are sealed in the sealing resin 6 with the contact portion M21 of the second mold M2 in contact with the entire periphery of the first region 401.

[0047] Specifically, the first mold M1 and the second mold M2 in a sealed state are heated by a heater to the molding temperature of the sealing resin 6. The sealing resin 6 arranged in the supply section M12 is softened by heating. The softened sealing resin 6 moves into the first cavity section M11 and the second cavity section 23 through the runner section M24 by pushing up the plunger section M13.

[0048] As the thermal curing of the sealing resin 6 progresses, the viscosity of the sealing resin 6 increases, and the sealing resin 6 hardens. When the sealing resin 6 is in a softened state, the plunger portion M13 is further pressed in, so that a molding pressure is applied to the sealing resin 6. This applies hydrostatic pressure to the sealing resin 6 and the insulating material 91, improving the adhesion between the sealing resin 6 and the lead frame 2 and between the insulating material 91 and the lead frame 2. The pressure applied by the plunger portion M13 is, for example, 10 MPa when the semiconductor device 100 is an IC (Integrated Circuit) package.

[0049] Next, as shown in Figures 1 and 11, the lead frame 2, semiconductor element 1, substrate 4, top terminals 7 and sealing resin 6 are removed from the first mold M1 and the second mold M2, and then the lead frame 2 is bent at the in-plane end 2E of the mounting portion 21 to form at least one side terminal 3.

[0050] 6, when the semiconductor device 100 includes the coating resin 60, the coating resin 60 is poured onto the surface 41 at room temperature or at a high temperature that does not cause thermal curing. The coating resin 60 on the surface 41 is thermally cured by being placed in a high-temperature curing oven.

[0051] Next, the effects of this embodiment will be described.

[0052] According to the semiconductor device 100 according to the first embodiment, as shown in FIG. 1, the top surface terminal 7 is connected to the second region 402 of the substrate 4. At least one side surface terminal 3 and each of the top surface terminals 7 are connected to an external device (not shown). Therefore, the number of the side surface terminals 3 connected to the external device can be reduced compared to the case where the semiconductor device 100 is connected to the external device (not shown) only by the side surface terminals 3. That is, the number of the side surface terminals 3 can be reduced compared to the case where the semiconductor device 100 does not include the top surface terminal 7. The side surface terminals 3 are respectively connected to the ends 2E exposed from the sealing resin 6 in the in-plane direction of the mounting portion 21. Therefore, by reducing the number of the side surface terminals 3, the number of the ends 2E exposed from the sealing resin 6 in the in-plane direction of the mounting portion 21 is also reduced. This allows the dimension of the mounting portion 21 along the in-plane direction to be reduced. Therefore, the dimension of the semiconductor device 100 along the in-plane direction of the mounting portion 21 can be reduced.

[0053] The reduction in the dimensions of the semiconductor device 100 will be described in more detail with reference to FIGS. 12 and 13. FIGS. 12 and 13 are perspective views showing a plurality of lead frames 2 connected to the inside of a frame portion 29. The plurality of lead frames 2 before being sealed in the sealing resin 6 (see FIG. 1) are connected to the inside of the frame portion 29 by the connection portions 28. The connection portions 28 and the frame portion 29 are cut off by a press or the like after the sealing resin 6 is molded. As shown in FIG. 12, in the comparative example, the portions that become the side terminals 3 extend along each of the first direction DR1 (short direction) and the second direction DR2 (longitudinal direction) that intersects with the first direction DR1. As shown in FIG. 13, in the present embodiment, the portions that become the side terminals 3 extend only along the first direction DR1. Therefore, the dimensions of the lead frames 2 in the second direction DR2 can be reduced. Therefore, the dimensions of the semiconductor device 100 in the second direction DR2 can be reduced. Also, many lead frames 2 can be arranged along the second direction DR2 inside the frame portion 29. This allows many lead frames 2 to be arranged within one frame portion 29, increasing the number of pieces that can be produced. Also, the dimensions of the first mold M1 in which the lead frames 2 are arranged can be reduced. As a result, the top terminals 7 can improve the efficiency of production of the semiconductor device 100.

[0054] 2, the second region 402 of the substrate 4 is surrounded by the first region 401. For this reason, as shown in FIG. 11, sealing with the sealing resin 6 can be performed in a state where a mold (second mold M2) having a portion (contact portion M21) surrounding the second region 402 is in contact with the entire periphery of the first region 401. This makes it possible to prevent the sealing resin 6 from leaking. Specifically, it is possible to prevent the sealing resin 6 from leaking from the outside of the first region 401 and the second region 402 of the substrate 4 into the second region 402.

[0055] 1, the second region 402 of the substrate 4 is exposed from the sealing resin 6. Therefore, heat generated in the semiconductor element 1, the circuits, etc. is dissipated from the second region 402. In other words, the second region 402 can be used as a heat dissipation surface.

[0056] 1, the substrate 4 is covered by the surrounding portion 62. Therefore, the substrate 4 is sandwiched between the main body portion 61 and the surrounding portion 62. Therefore, it is possible to prevent the substrate 4 from peeling off from the sealing resin 6.

[0057] 1, the dimension of the surrounding portion 62 in the height direction is constant. Therefore, by arranging an external device (not shown) to which the semiconductor device 100 of the present embodiment is connected on the surrounding portion 62, the height position of the external device can be made constant. In addition, by appropriately setting the dimensions of the surrounding portion 62 in the height direction and width direction, warping of the semiconductor device 100 including the substrate 4 can be suppressed.

[0058] 1, the connection member 5 is covered with the sealing resin 6. This makes it possible to protect the connection member 5. Furthermore, insulation between the connection member 5 and the outside of the sealing resin 6 can be maintained.

[0059] 4, in the semiconductor device 100 according to the first modification of the first embodiment, the heat-generating component HP is mounted on the substrate 4. Therefore, the heat generated from the heat-generating component HP can be dissipated from the substrate 4.

[0060] 5, in the semiconductor device 100 according to the second modification of the first embodiment, the metal base 92 is connected to the lead frame 2 via the insulating material 91 in a state where it is exposed from the sealing resin 6. Therefore, heat generated from the semiconductor element 1 and the like is dissipated to the outside of the sealing resin 6 by the metal base 92. Therefore, it is possible to improve the heat dissipation property of the semiconductor device 100. Also, it is possible to improve the insulation property of the lead frame 2.

[0061] According to the semiconductor device 100 of the third modification of the first embodiment, as shown in Fig. 6, the coating resin 60 covers the first region 401 and the second region 402 of the surface 41. This makes it possible to prevent foreign matter from adhering to the surface 41. It also makes it possible to prevent the surface 41 from being damaged due to contact with foreign matter. It also makes it possible to improve the insulation property of the surface 41.

[0062] 6, the coating resin 60 is surrounded by a surrounding portion 62. Therefore, when the coating resin 60 is poured onto the surface 41, the coating resin 60 can be prevented from flowing out from the inside of the surrounding portion 62 to the outside.

[0063] According to the manufacturing method of the semiconductor device 100 of the first embodiment, as shown in FIG. 11, the semiconductor element 1, the lead frame 2, and a part of the substrate 4 are sealed with the sealing resin 6 in a state where the contact portion M21 of the second mold M2 is in contact with the entire circumference of the first region 401. Therefore, it is possible to prevent the sealing resin 6 from leaking from the outside of the first region 401 and the second region 402 of the substrate 4 into the second region 402. That is, it is possible to prevent the sealing resin 6 from leaking. In addition, since the part of the lead frame 2 extending outside the first cavity portion M11 and the second cavity portion M23 is directly sandwiched between the first mold M1 and the second mold M2, the sealing resin 6 is prevented from leaking from the part at a pressure of, for example, about 10 MPa.

[0064] Embodiment 2 Next, the configuration of a semiconductor device 100 according to a second embodiment will be described with reference to Figures 14 to 16. Unless otherwise specified, the second embodiment has the same configuration, manufacturing method, and effects as the first embodiment. Therefore, the same components as the first embodiment are denoted by the same reference numerals, and description thereof will not be repeated.

[0065] As shown in FIG. 14, in the semiconductor device 100 according to the present embodiment, the substrate 4 includes at least one substrate extension 48. At least one substrate extension 48 protrudes from the sealing resin 6 along the in-plane direction of the mounting portion 21 (see FIG. 1). At least one substrate extension 48 is exposed from the sealing resin 6. In the present embodiment, the substrate 4 includes a plurality of substrate extensions 48. FIG. 15 is a cross-sectional view of a cross section passing through the substrate extension 48. In FIG. 15, the connection member 5 is illustrated for convenience of explanation, but the connection member 5 is disposed on the near side or the far side of the paper surface from the cross-sectional line. In order to suppress interference between the substrate extension 48 and a portion that becomes the side terminal 3 (see FIG. 1) of the lead frame 2, the lead frame is disposed in the package (sealing resin 6) in the cross section passing through the substrate extension 48.

[0066] Next, the configurations of a first mold M1 and a second mold M2 used in manufacturing the semiconductor device 100 according to the second embodiment will be described with reference to FIG.

[0067] As shown in FIG. 15, the first mold M1 includes a protrusion M14. The protrusion M14 is capable of supporting the back surface 42 of the substrate 4. The protrusion M14 is capable of supporting at least one substrate extension 48. The at least one substrate extension 48 is directly sandwiched between the protrusion M14 of the first mold M1 and the second mold M2. The substrate 4 is supported by the protrusion M14. The protrusion M14 is configured to support the back surface 42 of the substrate 4 when the first mold M1 and the second mold M2 are sealed together, thereby pressing the first region 401 of the substrate 4 against the contact portion M21 of the second mold M2.

[0068] The contact portion M21 of the second mold M2 includes a root portion M251 and a protruding portion M252. The root portion M251 is flat. The protruding portion M252 protrudes from the root portion M251 toward the substrate 4. The protruding portion M252 is embedded in the first region 401 of the substrate 4. In FIG. 15, the outline of the protruding portion M252 embedded in the substrate 4 is shown by a dashed line. The protruding portion M252 protrudes, for example, 1 mm from the root portion M251. In FIG. 15, the runner portion M24 is provided in front of or behind the cross-sectional line. The outline of the runner portion M24 is also shown by a dashed line.

[0069] Next, a manufacturing method of the semiconductor device 100 according to the second embodiment will be described with reference to FIGS.

[0070] 15 and 16, with the first region 401 pressed against the contact portion M21 by the protrusion M14 of the first mold M1, the semiconductor element 1, the lead frame 2, and a portion of the substrate 4 are sealed with the sealing resin 6. With the base portion M251 of the contact portion M21 pressed against the first region 401 and the protrusion M252 of the contact portion M21 biting into the first region 401, the semiconductor element 1, the lead frame 2, and a portion of the substrate 4 are sealed with the sealing resin 6. With at least one substrate extension 48 directly sandwiched between the protrusion M14 of the first mold M1 and the second mold M2, the semiconductor element 1, the lead frame 2, and a portion of the substrate 4 are sealed with the sealing resin 6.

[0071] Next, the effects of this embodiment will be described.

[0072] 16, in the manufacturing method of the semiconductor device 100 according to the second embodiment, the semiconductor element 1, the lead frame 2, and a part of the substrate 4 are sealed with the sealing resin 6 in a state in which the first region 401 is pressed against the contact portion M21 by the protrusion M14 of the first mold M1. Therefore, it is possible to prevent the sealing resin 6 from leaking into the first region 401 and the second region 402, compared to a case in which the semiconductor element 1 and the like are sealed in a state in which the first region 401 is not pressed against the contact portion M21. Also, it is possible to prevent the sealing resin 6 from leaking into the first region 401 and the second region 402, compared to a case in which the first region 401 is pressed against the contact portion M21 only by the elastic force of the connection member 5.

[0073] Embodiment 3 Next, a manufacturing method of the semiconductor device 100 according to the third embodiment will be described with reference to Figures 17 and 18. Unless otherwise specified, the third embodiment has the same manufacturing method and functions and effects as the first embodiment. Therefore, the same components as the first embodiment will be denoted by the same reference numerals, and the description will not be repeated.

[0074] As shown in FIG. 17, in the manufacturing method of the semiconductor device 100 according to the present embodiment, the first mold M1 includes a movable pin M15 and a plate portion M16. The movable pin M15 can support the rear surface 42 of the substrate 4. The movable pin M15 is connected to the plate portion M16. The movable pin M15 can penetrate an insertion port INS provided in the lead frame 2. The insertion port INS is, for example, a through hole or a notch. By arranging the insulating material 91 and the metal base 92 in the lead frame 2 with the movable pin M15 inserted into the insertion port INS, movement of the lead frame 2 due to contact between the insulating material 91 and the metal base 92 and the lead frame 2 is suppressed. That is, the movable pin M15 is used as a positioning pin.

[0075] The movable pin M15 is movable toward the second mold M2. The movable pin M15 is movable along the direction in which the first mold M1 and the second mold M2 are overlapped. The movable pin M15 moves as the plate portion M16 moves along the direction in which the first mold M1 and the second mold M2 are overlapped.

[0076] In this embodiment, the first mold M1 includes a plurality of movable pins M15. The plurality of movable pins M15 are arranged so as to contact, for example, the four corners of the substrate 4 or between the corners.

[0077] As shown in FIG. 17, the semiconductor element 1, the lead frame 2 and a part of the substrate 4 are sealed with the sealing resin 6 in a state in which the first region 401 is pressed against the contact portion M21 by the movable pin M15 of the first mold M1.

[0078] Specifically, first, as shown in FIG. 18, the movable pin M15 is lowered so as not to interfere with the member. Also, as shown in FIG. 17 and FIG. 18, the insulating material 91, the metal base 92, the lead frame 2 to which the substrate 4 is connected, and the sealing resin 6 in the form of a tablet are arranged. Then, the plate portion M16 is raised, and the movable pin M15 moves to a height position where the movable pin M15 and the substrate 4 come into contact with each other. The first mold M1 and the second mold M2 are sealed. Then, the sealing resin 6 is injected. After the injection of the sealing resin 6 and before the sealing resin 6 is pressurized by the plunger portion M13, the movable pin M15 is lowered to the bottom of the first cavity portion M11. As a result, the cavity of the sealing resin 6 at the location where the movable pin M15 was located is filled with the sealing resin 6 softened by the molding pressure. As a result, the semiconductor device 100 in which no cavity is provided inside the sealing resin 6 is provided.

[0079] Next, the effects of this embodiment will be described.

[0080] 17, in a state where the first region 401 is pressed against the contact portion M21 by the movable pin M15 of the first mold M1, the semiconductor element 1, the lead frame 2, and a part of the substrate 4 are sealed with the sealing resin 6. Therefore, it is possible to prevent the sealing resin 6 from leaking into the first region 401 and the second region 402, compared to a case where the semiconductor element 1 and the like are sealed in a state where the first region 401 is not pressed against the contact portion M21. Also, it is possible to prevent the sealing resin 6 from leaking into the first region 401 and the second region 402, compared to a case where the first region 401 is pressed against the contact portion M21 only by the elastic force of the connection member 5.

[0081] Embodiment 4 Next, the configuration of a semiconductor device 100 according to embodiment 4 will be described with reference to Figures 19 to 21. Unless otherwise specified, embodiment 4 has the same configuration, manufacturing method, and effects as embodiment 3. Therefore, the same components as embodiment 3 are denoted by the same reference numerals, and description thereof will not be repeated.

[0082] 19, in the semiconductor device 100 according to the present embodiment, the second region 402 includes a plurality of second portions 402A. Each of the plurality of second portions 402A is surrounded by the first region 401. As shown in Fig. 19 and Fig. 20, the second portions 402A are arranged at intervals along the in-plane direction of the mounting portion 21.

[0083] As shown in FIG. 20, the sealing resin 6 includes a main body portion 61, a surrounding portion 62, and a rib portion 63. The rib portion 63 is disposed on the substrate 4 between adjacent second portions 402A. The main body portion 61 is connected to the rib portion 63 by the surrounding portion 62. The main body portion 61 is disposed on the opposite side of the substrate 4 to the rib portion 63. The main body portion 61 and the rib portion 63 of the sealing resin 6 sandwich the substrate 4. The main body portion 61 and the rib portion 63 are in direct contact with the substrate 4.

[0084] 21, the rib portion 63 is provided in a straight line, but the rib portion 63 may be provided in a lattice pattern.

[0085] Next, a manufacturing method of the semiconductor device 100 according to the fourth embodiment will be described with reference to FIG.

[0086] 22, the second mold M2 according to this embodiment includes a support portion M27. The support portion M27 protrudes from the bottom of the recess M22 toward the substrate 4. The support portion M27 includes a flat portion M28. The support portion M27 is provided with a flow path M29 recessed from the flat portion M28 in the direction away from the substrate 4.

[0087] With the support portion M27 in contact with the second region 402, the semiconductor element 1, the lead frame 2, and a portion of the substrate 4 are sealed with the sealing resin 6. When the semiconductor element 1, the lead frame 2, and a portion of the substrate 4 are sealed with the sealing resin 6, the sealing resin 6 flows into the flow path M29, whereby a rib portion 63 of the sealing resin 6 is formed on the substrate 4, and a main portion 61 of the sealing resin 6 is formed. The substrate 4 is sandwiched between the main portion 61 and the rib portion 63. The main portion 61 and the rib portion 63 are in direct contact with the substrate 4.

[0088] Next, the effects of this embodiment will be described.

[0089] 20, in the semiconductor device 100 according to this embodiment, the body portion 61 and the rib portion 63 of the sealing resin 6 sandwich the substrate 4. This improves the adhesion between the substrate 4 and the sealing resin 6. Furthermore, when the rib portions 63 are arranged in a lattice pattern or when the sealing resin 6 includes a plurality of rib portions 63, the adhesion between the substrate 4 and the sealing resin 6 is further improved.

[0090] According to the manufacturing method of the semiconductor device 100 of this embodiment, as shown in FIG. 22, the semiconductor element 1, the lead frame 2, and a part of the substrate 4 are sealed by the sealing resin 6 with the support portion M27 in contact with the second region 402. This makes it possible to suppress deformation of the substrate 4 toward the bottom side of the recessed portion M22. More specifically, if the support portion M27 is not provided and the dimension of the substrate 4 in the in-plane direction is large, the substrate 4 may be deformed toward the bottom side of the recessed portion M22 due to the molding pressure of the sealing resin 6 during resin molding. In addition, if the substrate 4 is a ceramic substrate, the substrate 4 may be cracked due to deformation. In this embodiment, the substrate 4 is supported by the support portion M27, so that deformation toward the bottom side of the substrate 4 is suppressed, and therefore cracking of the substrate 4 can be suppressed.

[0091] 22, when the semiconductor element 1, the lead frame 2, and a part of the substrate 4 are sealed with the sealing resin 6, the sealing resin 6 flows into the flow path M29, whereby a rib portion 63 of the sealing resin 6 is formed on the substrate 4, and a main portion 61 of the sealing resin 6 that seals the semiconductor element 1 is formed. The substrate 4 is sandwiched between the main portion 61 that seals the semiconductor element 1 and the rib portion 63. This improves the adhesion between the substrate 4 and the sealing resin 6.

[0092] Embodiment 5. In this embodiment, the semiconductor device according to the above-mentioned embodiments 1 to 4 is applied to a power conversion device. Although the present disclosure is not limited to a specific power conversion device, a case where the present disclosure is applied to a three-phase inverter will be described below as embodiment 5.

[0093] FIG. 23 is a block diagram showing a configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0094] The power conversion system shown in Fig. 23 is composed of a power source 150, a power conversion device 200, and a load 300. The power source 150 is a DC power source and supplies DC power to the power conversion device 200. The power source 150 can be composed of various things, for example, a DC system, a solar cell, or a storage battery, or it may be composed of a rectifier circuit connected to an AC system or an AC / DC converter. Moreover, the power source 150 may be composed of a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0095] The power conversion device 200 is a three-phase inverter connected between the power source 150 and the load 300, converts DC power supplied from the power source 150 into AC power, and supplies the AC power to the load 300. As shown in Fig. 23, the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.

[0096] The load 300 is a three-phase motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific use, but is a motor mounted on various electric devices, and is used as, for example, a motor for a hybrid car, an electric car, a railroad car, an elevator, or an air conditioner.

[0097] The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes switching elements and free wheel diodes (not shown), and converts DC power supplied from the power source 150 into AC power by switching the switching elements, and supplies the AC power to the load 300. There are various specific circuit configurations of the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full bridge circuit, and can be configured with six switching elements and six free wheel diodes connected in reverse parallel to each switching element. At least one of the switching elements and free wheel diodes of the main conversion circuit 201 is a switching element or free wheel diode of the semiconductor device 100 corresponding to any of the semiconductor devices according to any of the above-mentioned embodiments 1 to 4. The six switching elements are connected in series with two switching elements to form upper and lower arms, and each upper and lower arm forms each phase (U phase, V phase, W phase) of the full bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0098] The main conversion circuit 201 also includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be built in the semiconductor device 100, or the semiconductor device 100 may include a drive circuit separately. The drive circuit generates drive signals for driving the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with a control signal from a control circuit 203 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal for turning the switching element on and a drive signal for turning the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.

[0099] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that a desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the time (on time) for each switching element of the main conversion circuit 201 to be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on time of the switching elements according to the voltage to be output. Then, a control command (control signal) is output to a drive circuit provided in the main conversion circuit 201 so that an on signal is output to a switching element that should be in the on state at each time point, and an off signal is output to a switching element that should be in the off state. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element according to this control signal.

[0100] In the power conversion device of this embodiment, the semiconductor device 100 of embodiments 1 to 4 is applied as the semiconductor device 100 constituting the main conversion circuit 201, so that the dimensions of the semiconductor device 100 along the in-plane direction of the mounting portion 21 can be reduced, and leakage of the sealing resin 6 when sealing with the sealing resin 6 can be suppressed.

[0101] In the present embodiment, an example of applying the present disclosure to a two-level three-phase inverter has been described, but the present disclosure is not limited thereto and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may be used. In addition, when power is supplied to a single-phase load, the present disclosure may be applied to a single-phase inverter. In addition, when power is supplied to a DC load or the like, the present disclosure may be applied to a DC / DC converter or an AC / DC converter.

[0102] Furthermore, the power conversion device to which the present disclosure is applied is not limited to the case where the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0103] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0104] 1 semiconductor element, 2 lead frame, 2E end portion, 3 side terminal, 4 substrate, 6 sealing resin, 7 top terminal, 21 mounting surface, 42 back surface, 61 main body portion, 63 rib portion, 100 semiconductor device, 150 power source, 200 power conversion device, 201 main conversion circuit, 202 semiconductor device, 203 control circuit, 300 load, 401 first region, 402 second region, 402A second portion, M1 first mold, M14 protrusion portion, M15 movable pin, M2 second mold, M21 contact portion, M22 recess portion, M251 base portion, M252 convex portion, M27 support portion, M28 flat portion, M29 flow path.

Claims

1. A semiconductor element; a lead frame including a mounting portion on which the semiconductor element is mounted, and at least one side terminal connected to an end portion of the mounting portion in an in-plane direction and bent with respect to the in-plane direction; a substrate overlapping the lead frame with a space therebetween from the semiconductor element and electrically connected to the lead frame; a sealing resin that seals the semiconductor element, the lead frame, and a portion of the substrate; a top surface terminal connected to the substrate and exposed from the sealing resin; the at least one side terminal is exposed from the sealing resin; the substrate includes a first region exposed from the sealing resin, a second region exposed from the sealing resin and surrounded by the first region, and a third region whose upper surface and side surfaces are covered by the sealing resin and surrounds the first region; The top surface terminal is connected to the second region of the substrate.

2. A metal base and an insulating material connected to the lead frame on a side opposite to the semiconductor element with respect to the lead frame, 2. The semiconductor device according to claim 1, wherein said metal base is connected to said lead frame via said insulating material in a state where said metal base is exposed from said sealing resin.

3. the second region includes a plurality of second portions arranged at intervals along the in-plane direction of the mounting portion, the sealing resin includes a rib portion disposed on the substrate between the second portions adjacent to each other, and a main body portion disposed on an opposite side of the substrate from the rib portion, The semiconductor device according to claim 1 , wherein the substrate is sandwiched between the body portion and the rib portion of the sealing resin.

4. A main conversion circuit having the semiconductor device according to any one of claims 1 to 3, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit; A power conversion device comprising:

5. a step of placing a lead frame having a semiconductor element mounted on a mounting portion in a first mold, connecting a top terminal to a second region surrounded by a first region of a substrate electrically connected to the lead frame, and then accommodating the top terminal in a recess recessed from a contact portion of a second mold; a step of sealing the semiconductor element, the lead frame and a part of the substrate with a sealing resin in a state in which the contact portion of the second mold is in contact with the entire periphery of the first region; a step of removing the lead frame, the semiconductor element, the substrate, the top terminal and the sealing resin from the first mold and the second mold, and then bending the lead frame at an in-plane end of the mounting portion to form at least one side terminal.

6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor element, the lead frame and the portion of the substrate are sealed with the sealing resin while the first region is pressed against the contact portion by a protrusion of the first mold capable of supporting the back surface of the substrate opposite the first region.

7. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor element, the lead frame and the portion of the substrate are sealed with the sealing resin while the first region is pressed against the contact portion by a movable pin of the first mold capable of supporting a back surface of the substrate opposite the first region and movable toward the second mold.

8. The method for manufacturing a semiconductor device according to any one of claims 5 to 7, wherein the semiconductor element, the lead frame and the portion of the substrate are sealed with the sealing resin while a base portion of the contact portion is pressed against the first region and a convex portion of the contact portion protruding from the base portion toward the substrate is embedded in the first region.

9. The method for manufacturing a semiconductor device according to any one of claims 5 to 8, wherein the semiconductor element, the lead frame and the portion of the substrate are sealed with the sealing resin while a support portion of the second mold protruding from the bottom of the recess toward the substrate is in contact with the second region.

10. when the semiconductor element, the lead frame, and the portion of the substrate are sealed with the sealing resin, the sealing resin flows from the flat portion of the support portion that contacts the first region into a recessed flow path in a direction away from the substrate, whereby a rib portion of the sealing resin is formed on the substrate, and a main body portion of the sealing resin that seals the semiconductor element is formed; The method for manufacturing a semiconductor device according to claim 9 , wherein the substrate is sandwiched between the body portion and the rib portion which seals the semiconductor element.

Images