Wafer Processing Method

Abstract

The purpose of the present invention is to provide a method for wafer treatment, the method making it possible to inhibit wafer-position shifting in wafer treatments.　This method for wafer treatment comprises: a wafer-less charge removal step in which, in a treatment device equipped with a sample table having an electrode capable of electrostatically holding a wafer, any charge accumulated on the sample table is removed, with the sample table having no wafer placed thereon; and a wafer treatment step in which after the wafer-less charge removal step, a wafer placed on the sample table is electrostatically held thereon and the wafer is treated.　The wafer-less charge removal step comprises a plasma generation step in which a plasma is generated using a first gas for charge removal and a power supply step in which first electric power is supplied to the electrode of the sample table.

Description

[Technical field]

[0001] The present invention relates to a wafer processing method. [Background technology]

[0002] In recent years, the semiconductor device market has been demanding lower power consumption and increased memory capacity, and to meet these requirements, there has been growing interest in developing semiconductor devices with three-dimensional structures. As one of the methods for processing three-dimensional structures, plasma etching is used, which allows either anisotropic or isotropic etching to be selected depending on the application.

[0003] In the process of etching using plasma, for example, reaction products are generated between the material to be processed and radicals. It is known that if the reaction products adhere or deposit inside the processing chamber, they can cause various problems in the etching performance of the plasma processing apparatus.

[0004] As a countermeasure to these problems, it has been proposed to remove the reaction products by periodic cleaning. Japanese Patent Laid-Open Publication No. 2002-217166 (Patent Document 1) describes a plasma cleaning method that removes deposits in a vacuum chamber by plasma processing, and a gas cleaning method that performs cleaning by introducing gas without using plasma. In these cleaning methods, cleaning is performed with a dummy wafer placed on the sample stage to protect the electrostatic attraction surface and electrodes from gas and plasma.

[0005] In addition, 2020-177959 Patent Publication 2 discloses a waferless cleaning method in which a dummy wafer is not placed on the sample stage as a cleaning method for the inside of a vacuum chamber and especially the periphery of the sample stage. This method uses plasma from O2 gas and performs plasma cleaning without placing a dummy wafer on the sample stage. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2002-217166 A [Patent Document 2] JP 2020-177959 A Summary of the Invention [Problem to be solved by the invention]

[0007] In Patent Document 1, a dummy wafer is placed to protect the lower electrode, but the influence of charged particles remaining on the sample stage having the lower electrode is not taken into consideration. Also, as described in Patent Document 2, when plasma is generated in a waferless state to perform cleaning processing inside the processing chamber, charged particles such as ions generated by the plasma adhere to the sample stage. As described above, none of the above prior art techniques takes sufficient consideration into the case where charged particles remain on the sample stage.

[0008] When a wafer is placed on the sample stage with charged particles remaining on it, a force caused by the electric charge acts on the wafer, which may cause the wafer to shift from the position where it was originally placed. Wafer position shifting is one of the factors that reduce the efficiency and yield when manufacturing semiconductor devices.

[0009] An object of the present invention is to provide a wafer processing method capable of suppressing misalignment of a wafer during wafer processing. [Means for solving the problem]

[0010] In order to solve the above problems, the wafer processing method of the present invention includes: A processing chamber in which a wafer to be processed is placed, and a processing device for processing the wafer, which is placed in the processing chamber, A sample stage with electrodes that can electrostatically attach a wafer a dispersion plate disposed above the sample stage in the processing chamber and facing the sample stage, the dispersion plate having through holes through which particles of a processing gas flow into the processing chamber; In a processing device comprising: The dispersion plate has a plurality of the through holes arranged in a ring shape on an outer periphery thereof, Without placing a wafer on the sample stage Charged particles are supplied into the processing chamber through the through holes of the dispersion plate.The method includes a waferless charge removal process for removing electric charges that have been charged on the sample stage, and a wafer processing process for electrostatically adsorbing a wafer placed on the sample stage and processing the wafer after the waferless charge removal process. Effect of the Invention

[0011] According to the present invention, it is possible to provide a wafer processing method that makes it possible to suppress misalignment of a wafer during wafer processing. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a vertical cross-sectional view showing the configuration of a plasma processing apparatus for performing a plasma processing method according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a plan view showing a schematic diagram of the dispersion plate according to the embodiment. [Diagram 3] FIG. 3 is a vertical cross-sectional view that illustrates a schematic configuration of a sample stage according to an embodiment. [Figure 4] FIG. 4 is a plan view showing a schematic configuration of the electrostatic adhesion film 302 according to the embodiment. [Diagram 5] FIG. 5 is a vertical cross-sectional view that typically shows how a wafer is electrostatically attracted in the embodiment. [Figure 6] FIG. 6 is a diagram showing a case where a positional deviation occurs in the conventional technology. [Figure 7] FIG. 7 is a time chart showing the wafer processing method according to the embodiment. [Figure 8] FIG. 8 is a diagram showing the electrical circuit from the plasma to ground. [Figure 9] FIG. 9 is a timing chart showing a plasma processing method according to a modified example of the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. It should be noted that the present invention is not limited to the embodiment. In addition, in the drawings, the same parts are denoted by the same reference numerals. When there are multiple components having the same or similar functions, they may be described by using the same reference numerals with different subscripts, or when there is no need to distinguish between these multiple components, the subscripts may be omitted. In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0014] In this disclosure, the term "top surface" refers to the surface shown at the top of a drawing when a plate-shaped member or a cross section of a plate-shaped member is illustrated, and the term "side surface" refers to a surface or a layer thickness portion of a plate-shaped member or a cross section of a plate-shaped member.

[0015] In addition, in the case of a disk-shaped or cylindrical object, the "central axis" refers to an axis that passes through the center of a circular surface and extends in a direction perpendicular to the surface.

[0016] [Embodiment] (Device Configuration) The configuration of a plasma processing apparatus for performing a plasma processing method according to an embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a vertical cross-sectional view showing the configuration of a plasma processing apparatus for performing a plasma processing method according to an embodiment of the present invention.

[0017] The plasma processing apparatus 100 of the embodiment includes a vacuum vessel 101. A processing chamber 104, which is a cylindrical space, is provided inside the vacuum vessel 101. The vacuum vessel 101 is connected to a vacuum pump 1015, such as a turbo molecular pump, via a pressure regulation valve 1016. The vacuum pump 1015 exhausts particles from the processing chamber 104 and sets the processing chamber 104 to a predetermined pressure. The pressure regulation valve 1016 has a function of changing the cross-sectional area of ​​a passage connecting the vacuum pump 1015 and the processing chamber 104 to adjust the exhaust flow rate or speed.

[0018] The vacuum vessel 101 includes a discharge chamber 102 located upstream of a processing chamber 104. The processing chamber 104 is connected to the discharge chamber 102, where plasma is generated, via a dispersion plate 106. The discharge chamber 102 and the processing chamber 104 are both cylindrical spaces. The central axis of the discharge chamber 102 and the central axis of the processing chamber 104 are a common axis or are located in a position close enough to be considered as a common axis.

[0019] The dispersion plate 106 is provided between the discharge chamber 102 and the processing chamber 104, and separates the discharge chamber 102 from the processing chamber 104. More specifically, the dispersion plate 106 is disposed in a passage connecting the discharge chamber 102 and the processing chamber 104. In the embodiment, the passage between the discharge chamber 102 and the processing chamber 104 has a cylindrical shape, and the dispersion plate 106 is a disk-shaped plate member having the same diameter as the diameter of the passage. The dispersion plate 106 will be described in detail later.

[0020] A wafer to be processed is placed on the sample stage 103. In this embodiment, the sample stage 103 is disposed at a position facing the dispersion plate 106. Details of the sample stage 103 will be described later.

[0021] The discharge chamber 102 is a space inside a dielectric chamber 107 made of a dielectric (quartz in this embodiment). A coil 108 is arranged on the outer peripheral side wall of the dielectric chamber 107 so as to surround the dielectric chamber 107. The coil 108 is electrically connected to a high frequency power supply 110 via a matching box 109, and high frequency power is supplied from the high frequency power supply 110. The high frequency power used is power in a frequency band of several tens of megahertz, such as 13.56 MHz.

[0022] A top plate 1012 and a gas dispersion plate 10121 are disposed at the upper end of the dielectric chamber 107. 2. The inside and the outside of the dielectric chamber 107 are separated by the top plate 1012 and the gas distribution plate 10121. A passage extending from a gas source 1013 is connected to the top plate 1012. Gas supplied from the gas source 1013 is introduced into the discharge chamber 102 via the gas distribution plate 10121.

[0023] The gas source 1013 has a storage section for each type of gas to be supplied. A mass flow controller 1014 provided between the gas source 1013 and the top plate 1012 adjusts the amount of gas supplied to the discharge chamber 102. The processing gas used in the embodiment includes a combustible gas, a combustion supporting gas, and a mixed gas of these, or a gas obtained by diluting these gases with an inert gas.

[0024] The IR lamp unit 105 is disposed so as to surround the passage or the dispersion plate 106 connecting between the discharge chamber 102 and the processing chamber 104. The IR lamp unit 105 heats the sample stage 103 or the wafer placed thereon, the inside of the processing chamber 104, etc. by irradiating electromagnetic waves. In the embodiment, the IR lamp unit 105 is configured by an IR lamp 1017 that irradiates electromagnetic waves including an infrared (IR) band. In addition to the IR lamp 1017, the IR lamp unit 105 includes a reflector 1018 that reflects the IR light emitted from the IR lamp 1017 toward the processing chamber 104, and an IR light transmission window 1019 that transmits the IR light emitted from the IR lamp 1017 toward the processing chamber 104 or the dispersion plate 106.

[0025] In the plasma processing apparatus 100, wafer processing is performed on a wafer placed on a sample stage 103. In the wafer processing, first, gas is introduced into the discharge chamber 102. Next, high-frequency power is supplied to the coil 108, forming an induced magnetic field at the center of the coil 108. When the induced magnetic field is generated, gas particles in the discharge chamber 102 are excited, causing a discharge, and the particles are ionized and dissociated to generate an inductively coupled plasma (ICP) 1011. Heating by an IR lamp unit 105 or the like at the sample stage 103, which will be described later, excites the gas particles in the discharge chamber 102, causing a discharge. Warm While adjusting the intensity, processing such as etching is performed by the generated plasma 1011. In the embodiment, plasma for etching, plasma for discharging, and plasma for cleaning are generated according to the gas and high frequency power used.

[0026] (Configuration of the dispersion plate) Here, the configuration of the dispersion plate 106 will be described with reference to Fig. 2. Fig. 2 is a plan view that shows a schematic diagram of the dispersion plate 106 according to the embodiment. The dispersion plate 106 shown in Fig. 1 is a cross-sectional view, whereas the dispersion plate 106 shown in Fig. 2 is a cross-sectional view. Board 1 06 is a view from above of FIG.

[0027] As shown in FIG. 2, the dispersion plate 106 is a plate-like member having a circular shape. The dispersion plate 106 has a plurality of through holes 201 that allow the movement of charged particles from the discharge chamber 102 to the processing chamber 104. Each of the plurality of through holes 201 is a circular hole. When considering the radial direction from the center of the dispersion plate 106, three circular holes are arranged from a point beyond a predetermined radius. Similarly, three holes are arranged at positions shifted 15° in the circumferential direction. In other words, a plurality of through holes 201 are provided in a ring shape on the outer periphery side of the dispersion plate 106. In the embodiment, the dispersion plate 106 is composed of a member made of a dielectric material such as quartz having translucency. The material is not limited to quartz and can be appropriately selected.

[0028] Through these multiple through holes 201, neutral particles such as radicals of the gas contained in the plasma 1011 are uniformly introduced from the discharge chamber 102 to the processing chamber 104. That is, the neutral particles such as radicals are introduced into the processing chamber 104 from a ring-shaped portion on the outer periphery of the dispersion plate 106 arranged at a position facing the wafer placed on the sample stage 103. The arrangement of the multiple through holes 201 as described above is not limited to this. The arrangement of the through holes can be appropriately selected so that the distribution of neutral particles such as radicals that reach the surface of the wafer introduced into the processing chamber 104 results in a desired processing result of the film layer to be processed. Note that the introduction of charged particles such as ions and electrons contained in the plasma 1011 from the discharge chamber 102 to the processing chamber 104 is suppressed by the dispersion plate 106.

[0029] (Configuration of sample stage) Next, the configuration of the sample stage 103 according to the embodiment and the configuration for electrostatically adsorbing a wafer will be described with reference to Figs. 3 and 4. Fig. 3 is a vertical cross-sectional view that typically shows the configuration of the sample stage 103 according to the embodiment. Fig. 4 is a plan view that typically shows the configuration of the electrostatic adsorption film 302 according to the embodiment.

[0030] In an embodiment, a process chamber 104 and a process chamber within 104 The sample stage 103 has an electrode capable of electrostatically adsorbing a wafer placed on the sample stage 103. R In the apparatus, the wafer W is electrostatically attracted and processed. The sample stage 103 shown in FIG. 3 has a cylindrical shape. The central axis of the sample stage 103 and the central axis of the processing chamber 104 are a common axis or are located at positions close to each other so that they can be regarded as a common axis. The sample stage 103 includes a base material 301 made of a conductor such as metal, an electrostatic attraction film 302 arranged on the base material 301, and a susceptor ring 311 arranged to surround the sides of the base material 301 and the electrostatic attraction film 302. The wafer placed on the sample stage 103 is placed on the electrostatic attraction film 302. The electrostatic attraction film 302 contacts the wafer and holds the wafer by electrostatic attraction. The electrostatic attraction film 302 also includes a sheet S made of polyimide resin. The sheet S made of polyimide resin is provided on the surface of the electrostatic attraction film 302. The susceptor ring 311 is made of a dielectric material and has a function of protecting the base material 301 from the plasma 1011. The susceptor ring 311 of the embodiment has a shape that surrounds the sidewall of the electrostatic adhesion film 302 on the upper part of the base material 301 and covers from the sidewall of the base material 301 to the lower part of the base material 301 .

[0031] A coolant flow passage 303 is disposed inside the substrate 301. A coolant is supplied to the coolant flow passage 303 from a chiller 312, and the supplied coolant circulates through the coolant flow passage 303. The chiller 312 is disposed in a space below the floor of a building such as a clean room in which the plasma processing apparatus 100 is disposed, and is connected to the coolant flow passage 303. The wafer placed on the sample stage 103 is adjusted to a desired temperature suitable for wafer processing by heat exchange with the coolant flowing through the coolant flow passage 303 via the electrostatic adsorption film 302 and the substrate 301. The shape of the coolant flow passage 303 may be, for example, concentrically disposed about a central axis that is an axis perpendicular to the surface direction of the substrate 301, or may be spirally disposed.

[0032] A plurality of grooves 308 are formed on the upper surface of the electrostatic adhesion film 302. A heat transfer gas source 310 supplies a gas having thermal conductivity, such as He gas, through a path having a valve 309 that opens and closes. The gas supplied from the heat transfer gas source 310 diffuses along the grooves 308 and reaches the rear surface of the wafer W. The He gas filling the grooves 308 promotes heat transfer between the refrigerant flowing through the refrigerant flow path 303 and the wafer W, and the temperature of the wafer W is efficiently adjusted. The surface of the electrostatic adhesion film 302 is formed of a polyimide resin sheet S. The polyimide resin sheet S is a film formed of a resin material containing polyimide. It is generally known that polyimide resin has a low friction coefficient, abrasion resistance, and excellent insulation properties. The polyimide resin sheet S has a function of preventing scratches on the rear surface of the wafer due to expansion or contraction of the wafer even if a temperature change occurs due to heating or cooling while the wafer is electrostatically attracted. The material of the sheet S is not limited to this and can be selected appropriately.

[0033] 4 shows a cross-sectional structure of the electrostatic attraction film 302 cut in the planar direction. As shown in FIG. 4, a plurality of film-like electrodes 304 and 305 are disposed inside the electrostatic attraction film 302. DC power is supplied to the electrode 304 from a DC power source 306, and DC power is supplied to the electrode 305 from a DC power source 307. The electrodes 304 and 30 5has a plurality of arc-shaped arms arranged concentrically around the central axis in the planar direction of the sample stage 103, and has a so-called comb-like arrangement in which the arms of one electrode are sandwiched between the arms of the other electrode. Note that the shape of the electrodes 304 and 305 is not limited to this. It is sufficient that the electrodes are arranged so as to be uniformly distributed within the electrostatic adhesion film 302.

[0034] (Electrostatic adhesion on the sample stage) Next, the process of electrostatically adsorbing a wafer on the sample stage 103 will be described with reference to Fig. 5. Fig. 5 is a vertical cross-sectional view that typically shows how a wafer is electrostatically adsorbed in an embodiment. The sample stage 103 shown in Fig. 5 is the same as the sample stage 103 shown in Fig. 3. In Fig. 5, for ease of understanding, the components shown in Fig. 3 are omitted, and components not shown in Fig. 3 are also shown. Also, for ease of understanding, the scale of the components is changed.

[0035] 5, a negative voltage is applied to electrode 304 from DC power supply 306, and a positive voltage is applied to electrode 305 from DC power supply 307. By applying voltages of different polarities to electrodes 304 and 305, a dipole electrode is formed between electrodes 304 and 305. Positive ions in wafer W approach electrode 304, which is at a negative voltage, and negative ions approach electrode 305, which is at a positive voltage. Electrostatic forces are generated between the positive ions in wafer W and electrode 304, and between the negative ions in wafer W and electrode 305, respectively, and wafer W is attracted to sample stage 103.

[0036] In this embodiment, a voltage of −1500 V is applied to the electrode 304 from a DC power supply 306 , and a voltage of 1500 V is applied to the other electrode 305 from a DC power supply 307 .

[0037] Conversely, when a voltage of 1500 V is applied to the electrode 304 by the DC power supply 306, a voltage of −1500 V may be applied to the electrode 305 by the DC power supply 307. In the embodiment, the voltages from the DC power supplies 306 and 307 are adjusted to ±1500 V, and voltages of the same magnitude but different polarities are applied from one DC power supply and the other DC power supply, but this is not limited to this. As long as the wafer W can be attracted onto the electrostatic attraction film 302 and the occurrence and amount of positional deviation during the holding or removal of the wafer W can be kept within an allowable range, a voltage exceeding or less than ±1500 V may be used, and the absolute values ​​of the voltages applied to the electrodes may not be the same. Also, the electrodes 304 and 305 may be given the same polarity.

[0038] The plasma processing apparatus 100 includes a plurality of (e.g., three) push-up pins 313 extending from inside the sample stage 103 toward the upper surface of the sample stage 103 in order to detach the wafer W from the sample stage 103 after the etching process of the wafer W is completed and the electrostatic adsorption is released. After the electrostatic adsorption of the wafer W is released, the push-up pins 313 stored inside the sample stage 103 move upward to push up the wafer W, thereby detaching the wafer W from the sample stage 103. The detached wafer W is held by a transfer mechanism such as a robot arm and carried out from the processing chamber 104.

[0039] [Cause of misalignment in conventional technology] When performing a plasma process such as cleaning in a waferless state where no wafer is placed on the sample stage 103, three events that may cause the wafer to shift in position are considered to occur. This will be explained with reference to Fig. 6. Fig. 6 is a diagram showing a case where a position shift occurs in the prior art.

[0040] (Events caused by charged particles) The first phenomenon is caused by charged particles generated during processing. When performing plasma processing in a waferless state, the electrostatic adhesion film 302 may be damaged by collisions of charged particles such as ions, or reaction products may adhere to the electrostatic adhesion film 302. To avoid such problems, generally, no power is supplied to the electrodes 304 and 305 in the electrostatic adhesion film 302 during waferless plasma processing. In such a case, since no power is supplied from the power source and there is no other path through which charges can easily flow, when charged particles such as ions adhere to the electrostatic adhesion film 302, they remain as negative charges on the surface of the electrostatic adhesion film 302, as shown in FIG. 6.

[0041] Assume that a wafer is processed in such a state that there is a residual charge. When the wafer W is transported through the processing chamber 104, the wafer W is negatively charged due to friction with the gas present in the processing chamber, or the residual charge in the processing chamber 104 is attached to the wafer W. When such a charged wafer is transported to the electrostatic attraction film 302 having the residual charge, the charge of the wafer and the charge of the electrostatic attraction film 302 repel each other, causing the wafer to tilt and causing a positional deviation of the wafer. In addition, when a charged wafer is electrostatically attracted, there is a possibility that the wafer is electrostatically attracted unevenly to a part of the wafer. If the wafer is attracted unevenly to a part of the electrode surface, a positional deviation may occur when the wafer is replaced.

[0042] In addition, in an experiment conducted by the inventors, the potential of the surface of electrostatic attraction film 302 was detected before, during and after waferless plasma processing using plasma processing apparatus 100, and it was found that the potential varied before and after the processing. From this, it is assumed that an electric charge exists on electrostatic attraction film 302 during the processing step using waferless plasma, as described above.

[0043] (Event caused by dispersion plate) The second phenomenon is caused by the dispersion plate 106. It will be described with reference to Fig. 6. Although the dispersion plate 106 can prevent the charged particles such as ions from moving to the processing chamber 104 in the areas where the through-holes 201 are not arranged, some of the charged particles flow from the discharge chamber 102 into the processing chamber 104 through the areas where the through-holes 201 are arranged. The charged particles that flow in adhere relatively more to the outer periphery of the surface of the electrostatic adsorption film 302 due to the nature of the distribution of the through-holes.

[0044] When the wafer W is electrostatically attracted to the sample stage 103 having the charged particles attached thereto, there is a risk of one-sided attraction occurring, in which a large electrostatic attraction force acts locally on a portion of the back surface of the wafer W. When the wafer W is one-sidedly attracted, even if a charge removal process after plasma processing as shown in the prior art is performed, the charge in the electrostatic attraction film 302 is not sufficiently reduced and the electrostatic force remains. Therefore, the residual attraction force acts on the wafer W, making it difficult to detach the wafer W from the sample stage 103, and a large force acts on the wafer W during detachment, which may cause damage to the wafer W or cause it to shift in position.

[0045] (An event caused by a polyimide resin sheet) The third phenomenon is caused by the polyimide resin sheet S. The wafer mounting surface of the electrostatic adsorption film 302 is made of the polyimide resin sheet S. It is generally known that highly insulating materials such as polyimide resin have the property of being difficult to conduct electricity and tending to leave charged particles. Therefore, the charge cannot be sufficiently removed by only carrying out the charge removal process shown in the prior art.

[0046] (Wafer Processing) Wafer processing including a charge removal process for removing residual charged particles will be described with reference to FIG. 7. FIG. 7 is a time chart showing a wafer processing method according to an embodiment. FIG. 7(a) shows the presence or absence of a wafer W on the sample stage 103. FIG. 7(b) shows the output (power) of a high-frequency power source 110 that supplies high-frequency power for forming a plasma 1011 to the coil 108. FIG. 7(c) shows the potentials of the electrodes 304 and 305. FIG. 7(d) shows the potential of the surface of the wafer W or the electrostatic attraction film 302. FIG. 7(e) shows the potential difference between the electrode 304 and the wafer W or the potential difference between the electrode 305 and the wafer W.

[0047] In the embodiment, before the wafer W is placed on the sample stage 103, a waferless charge removal process is performed to remove charged particles remaining on the electrostatic attraction film 302. The waferless charge removal process is performed in a so-called waferless state in which there is no member covering the upper surface of the sample stage 103 on which the wafer is placed. As shown in Fig. 7(a), the waferless state continues from time Tp0 to time Tp2.

[0048] In addition, since the wafer W is not present in the waferless charge removal process, the potential difference between the wafer W and the electrode 304 and between the wafer W and the electrode 305 cannot be measured. Therefore, FIG. 7(e), which shows the potential difference, does not show the potential in the charge removal process from Tp0 to Tp2. Furthermore, when the plasma 1011 is formed in the discharge chamber 102, the generated charged particles such as ions enter the process chamber 104 and adhere to the surface of the electrostatic attraction film 302 of the sample stage 103. Therefore, the potential from time Tp0 to time Tp2 in FIG. 7(d) shows the potential of the electrostatic attraction film 302.

[0049] <Waferless static elimination process> In the embodiment, a waferless charge removal process is performed in which the charge on the sample stage 103 is removed without placing a wafer on the sample stage 103 .

[0050] First, in the waferless static elimination process of the embodiment, plasma for static elimination is generated. As a static elimination gas for generating plasma for static elimination (hereinafter also referred to as "first static elimination gas"), for example, a gas such as SF6 that is reactive with the deposit or an inert gas such as Ar is used. As such a static elimination gas, a gas that causes little damage to polyimide resin, which is a material constituting the electrostatic adsorption film 302, is selected. Note that such a gas includes a gas that has not only a static elimination effect but also a cleaning effect for removing reaction products and the like that are attached to the processing chamber 104.

[0051] First, at time Tp0, a plasma generation process is performed in which plasma is generated using a first static elimination gas. The plasma generation process is a process in which plasma is generated from the first static elimination gas using high-frequency power in the discharge chamber 102. At time Tp0, as shown in FIG. 7(b), high-frequency power (hereinafter also referred to as "first high-frequency power") is supplied from the high-frequency power source 110 to the coil 108. At the time Tp0, the first static elimination gas introduced in advance is present in the discharge chamber 102.

[0052] At time Tp0, a power supply step is performed to supply a first power to the electrodes 304 and 305 of the sample stage 103. As the first power to be supplied, 100 V is supplied from the DC power supply 306 to the electrode 304. application Then, a voltage of −100 V is applied to the electrode 305 from a DC power supply 307 .

[0053] Here, the flow of the charged particles generated from the plasma 1011 will be described with reference to FIG. 8. FIG. 8 is a diagram showing an electric circuit from the plasma to the ground. The dashed line indicates the flow of the charge. The charged particles generated in the plasma 1011 reach the ground connected to the DC power supply 306 or 307 via the electrostatic adhesion film 302, the electrode 304 or 305, the push-up pin 313, and the substrate 301. The charge generated in the plasma 1011 is directly attached to the push-up pin 313 and reaches the ground connected to the substrate 301 and the DC power supply 306 or 307. In this way, it is assumed that the charged particles attached to the electrostatic adhesion film 302 reach the ground. In this way, a circuit is formed in which the charged particles generated in the plasma 1011 are directed toward the ground, so that the charged particles attached to the surface of the electrostatic adhesion film 302 are removed, and the potential of the surface of the electrostatic adhesion film 302 becomes approximately 0V.

[0054] Then, a step of supplying power for the charge removal step to the electrodes of the sample stage 103 is performed. At time Tp1, as shown in FIG. 7(b), the high frequency power for generating the plasma 1011 is cut off, and the DC power supplied to the electrodes 304 and 305 is set to 0. Note that time Tp1 indicates the time when the charged particles remaining in the processing chamber 104 disappear. For this reason, time Tp1 is delayed by a period t1 until the afterglow discharge of the plasma 1011 disappears, and is set to time T p2 It may be extended to.

[0055] <Wafer processing process> In the embodiment, after the waferless charge removal step, a wafer processing step is performed in which the wafer W placed on the sample stage 103 is electrostatically attracted and processed. The wafer processing step includes a wafer etching step and a charge removal step while the wafer is placed. As described below, the wafer processing step includes a placement step, an electrostatic attraction step, and a plasma etching step, and the charge removal step while the wafer is placed includes a charge removal plasma generation step and a potential difference reduction step.

[0056] First, a mounting step is performed in which the wafer W is mounted on the sample stage 103. At time T0, the wafer W is carried into the processing chamber 104 by a transfer mechanism such as a robot arm, and is mounted on the sample stage 103, as shown in FIG.

[0057] Thereafter, at time T1, an electrostatic adsorption step is performed in which a second power is supplied to the electrodes 304 and 305 of the sample stage 103 to electrostatically adsorb the wafer W. As shown in Fig. 7(c), a voltage is applied to the electrodes 304 and 305, and the wafer W is electrostatically adsorbed onto the electrostatic adsorption film 302. As the second power to be supplied, the voltage applied to the electrode 304 and the voltage applied to the electrode 305 are adjusted to have different polarities and the same absolute value. As described above, for example, -1500 V is applied to the electrode 304, and 1500 V is applied to the electrode 305.

[0058] Next, a plasma etching process is performed in which a processing gas is supplied to the discharge chamber 102 and plasma is generated from the processing gas using a second high frequency power. At time T2, as shown in Fig. 7(b), a second high frequency power is supplied from the high frequency power supply 110 to the coil 108. This generates an etching plasma 1011 from the processing gas introduced into the discharge chamber 102. Reactive particles such as radicals that have passed through the dispersion plate 106 react with the film layer to be processed on the surface of the wafer W, and plasma etching progresses.

[0059] 7(d), charged particles such as ions are attached to the wafer W, and the wafer W is negatively charged. Also, as shown in FIG. 7(e), the potential difference between the wafer W and the electrode 305 increases, and the wafer W and the electrode 305 are negatively charged. 4 When the wafer W is to be detached in such a state where the potential difference is unbalanced, an electrostatic attraction force exists due to the charge remaining between the wafer W and the electrostatic attraction film 302, which may prevent the wafer W from being detached and may cause the wafer W to be misaligned.

[0060] In order to avoid such misalignment, in this embodiment, after the etching process, a discharging process is performed while the wafer is placed on the discharge chamber 102. The discharging process while the wafer is placed on the discharge chamber 102 is a process of supplying a second discharging gas to the discharge chamber 102 and generating plasma from the second discharging gas by using a third high frequency power.

[0061] First, at time T3, as shown in Fig. 7(b), the high frequency power supplied from the high frequency power supply 110 to the coil 108 is changed to a high frequency power (hereinafter referred to as "third high frequency power") different from the second high frequency power during the etching process. Also, the gas introduced into the discharge chamber 102 is switched from the process gas to a static elimination gas (hereinafter referred to as "second static elimination gas") that has little effect on the wafer W, such as an inert gas. In this manner, a static elimination plasma generation process is performed in the discharge chamber 102, in which static elimination plasma 1011 is generated from the second static elimination gas using the third high frequency power.

[0062] Next, at time T4, the electrodes 304 and 305 of the sample stage 103 become equal in potential to the potential of the wafer W. like, Supplying second power R A potential difference reduction step is performed. As shown in FIG. 7(c), the voltage applied to the electrodes 304 and 305 as the second power to be supplied is −ΔV, which is equal to the potential of the wafer W. For example, the potential of the wafer W may be determined in advance. The potential of the wafer W may be measured after the generation of the charge removal plasma 1011 after time T3. In this way, at time T4, as shown in FIG. 7(e), the potential difference between the wafer W and the electrode 304 and the potential difference between the wafer W and the electrode 305 are reduced, and the potential difference between the wafer W and the electrostatic attraction film 302 is reduced. Silence The electrostatic attraction is eliminated.

[0063] After that, at time T5, as shown in FIG. 7(b), the supply of high frequency power for generating plasma 1011 from high frequency power supply 110 is stopped.

[0064] Time T6, which is a predetermined time t2 after time T5, represents the time when the charged particles remaining in the processing chamber 104 disappear. Here, the predetermined time t2 may be the time until the afterglow discharge of the charge removal plasma 1011 disappears. During the period from time T5 to time T6, if the resistance value of the electrostatic attraction film 302 is sufficiently large, the potential of the wafer W is maintained at the value −ΔV during the charge removal plasma processing starting from time T3, as shown in FIG.

[0065] 7(c), the potentials of the electrodes 304 and 305 have not changed since time T4. The potential difference between the wafer W and the electrode 304 and the potential difference between the wafer W and the electrode 305 also remain at 0 V since time T4 as shown in FIG. 7(e), and no electrostatic attraction force is generated between the wafer W and the electrostatic attraction film 302. At the next time T6, the voltage applied to the electrodes 304 and 305 is set to 0 V as shown in FIG. 7(c). At this time, the potentials of the electrodes 304 and 305 change, but the potential of the wafer W also changes following the change in the potentials of the electrodes 304 and 305, and is approximately 0 V.

[0066] 7(e), the potential difference between the wafer W and the electrode 304 and the potential difference between the wafer W and the electrode 305 are maintained at approximately 0 V even after T6. That is, the potentials of the electrodes 304 and 305 can be set to 0 V in a state in which the electrostatic attraction force between the wafer W and the electrode 304 and the electrostatic attraction force between the wafer W and the electrode 305 are eliminated. At time T7, the wafer W is detached from the sample stage 103 by the push-up pins 313, and is carried out to the outside of the processing chamber 104.

[0067] (Action and effect) By carrying out the above-mentioned waferless charge removal process, it is possible to remove the charge from the electrostatic attraction film 302 after the plasma processing, and it is possible to suppress the positional deviation when the wafer is placed on the sample stage 103 and electrostatically attracted. In addition, by carrying out a charge removal process after a predetermined plasma processing, it is possible to suppress the positional deviation when the wafer W is removed from the sample stage 103. In addition, the discharge of the wafer W generated during the wafer processing can be suppressed. workmanBy suppressing the positional deviation of the step C, the efficiency and yield of wafer processing can be improved.

[0068] The first power, the second power, the first high frequency power, the second high frequency power, and the third high frequency power can be set appropriately according to the manufacturing conditions and the purpose of the process. The first static elimination gas and the second static elimination gas can be the same type of gas or different types of gas. The magnitude of the time in the time chart can also be set appropriately.

[0069] [Variations] When a voltage is applied to electrodes 304 and 305 during a processing step in which plasma 1011 formed in discharge chamber 102 is introduced into processing chamber 104, depending on the type of gas introduced to form plasma 1011, there is a risk that charged particles such as ions will be attracted to electrostatically attracted film 302, causing damage to electrostatically attracted film 302. For example, such a problem may occur when performing plasma cleaning to remove reaction products using plasma. A static elimination step for reducing damage and solving this problem will be described below.

[0070] FIG. 9 is a timing chart showing a plasma processing method according to a modified embodiment. FIG. 9(a) shows the presence or absence of a wafer W on the sample stage 103. FIG. 9(b) shows the output (power) of a high-frequency power source 110 that supplies high-frequency power for generating a plasma 1011 to the coil 108. FIG. 9(c) shows the potentials of the electrodes 304 and 305 for electrostatic attraction. FIG. 9(d) shows the potential of the wafer W or the surface of the electrostatic attraction film 302. FIG. 9(e) shows the potential difference between the electrode 304 and the wafer W and the potential difference between the electrode 305 and the wafer W.

[0071] The modified example differs from the embodiment in that a static elimination process is performed after cleaning. In particular, the difference is shown in Fig. 9(b), Fig. 9(c), and Fig. 9(d). In the following description, the same or equivalent components as those in the above-described embodiment are given the same reference numerals, and the description thereof will be simplified or omitted.

[0072] First, a process for cleaning the discharge chamber 102 and the processing chamber 104 is performed without using a wafer. At time Tc0, high frequency power (hereinafter also referred to as "fourth high frequency power") is supplied from the high frequency power supply 110 to the coil 108. At time Tc0, a cleaning gas is introduced into the discharge chamber 102. As the cleaning gas, a gas that causes little damage to polyimide resin, such as SF6 gas or Ar gas, is selected. In this manner, a plasma 1011 for performing cleaning is generated.

[0073] Charged particles such as ions in the plasma 1011 enter the processing chamber 104 through the through holes 201 in the dispersion plate 106 and adhere to the electrostatic attraction film 302 of the sample stage 103. This causes the potential of the electrostatic attraction film 302 to fluctuate, as shown in Fig. 9(d). If a wafer W to be processed is placed on the sample stage 103 in this state, the wafer will be misaligned due to the potential difference between the electrostatic attraction film 302 and the wafer W, as in the prior art. Therefore, in the modified example, a charge removal process is performed after cleaning.

[0074] The charge removal process after cleaning for reducing the charge on the electrostatic attraction film 302 will be described. First, at time Tc1, plasma 1011 for charge removal is generated. As shown in FIG. 9B, the high frequency power supplied from the high frequency power supply 110 to the coil 108 is changed to a high frequency power (hereinafter also referred to as "fifth high frequency power") different from the fourth high frequency power during cleaning. The fifth high frequency power is, for example, 1000 W. The gas introduced into the discharge chamber 102 is switched from the cleaning gas to a charge removal gas (hereinafter also referred to as "third charge removal gas") such as an inert gas such as Ar gas. In this way, in the discharge chamber 102, a charge removal plasma generation process is performed in which plasma 1011 for charge removal is generated from the third charge removal gas using the fifth high frequency power.

[0075] 9(c), a residual charge removal process is performed in which a third power is supplied to the electrodes 304 and 305 of the sample stage 103. As the supplied third power, for example, 100 V is applied from the DC power supply 306 to the electrode 304, and −100 V is applied from the DC power supply 307 to the electrode 305. These voltages are set smaller than the voltages applied when electrostatically attracting the wafer W.

[0076] The time when the high frequency power is changed to generate the plasma for charge removal and the time when the voltage is applied to the electrodes 304 and 305 are not necessarily the same. As shown in FIG. 9B, the time t a Alternatively, application of a voltage to the electrodes 304 and 305 may be started within the electrostatic attraction film 302. Alternatively, after application of a voltage to the electrodes 304 and 305, the high frequency power may be changed to generate the plasma 1011 for charge removal. In either case, the period during which the plasma 1011 for charge removal is generated and the period during which a voltage is applied to the electrodes 304 and 305 must overlap at least, and in a modified example, the periods overlap for one second or more. In this manner, an electrical circuit is formed between the plasma 1011 and the electrostatic attraction film 302 as shown in FIG. 8, the charged particles on the surface of the electrostatic attraction film 302 are removed, and the potential of the surface within the electrostatic attraction film 302 becomes approximately 0 V.

[0077] After that, at time Tc2, the power supply from the high frequency power supply 110 to the coil 108 is stopped as shown in Fig. 9(b). Also, as shown in Fig. 9(c), the voltage applied to the electrodes 304 and 305 is set to 0 V. As in the embodiment, the period from time Tc1 to time Tc2 is a period during which the charged particles remaining in the processing chamber 104 are sufficiently removed, and the time t until the afterglow discharge of the static elimination plasma 1011 disappears is reached. b It may be extended by a minute.

[0078] time t bAt time Tc3 after the elapse of time, the charge removal process after cleaning is completed. Thereafter, the wafer W is transferred to the processing chamber 104, and a predetermined wafer processing process is performed. The wafer processing process is the same as that of the embodiment.

[0079] (Action and effect) By carrying out the charge removal process after the cleaning as described above, the charge remaining on the electrostatic attraction film 302 can be removed in the waferless cleaning process. Therefore, it is possible to suppress the positional deviation when the wafer W is attached to or detached from the sample stage 103. Note that such a charge removal process is not limited to being carried out after the cleaning process. It can also be applied to waferless plasma processing other than cleaning in order to remove the charge remaining on the electrostatic attraction film 302.

[0080] The fourth high frequency power, the fifth high frequency power, the third static elimination gas, and the third power can be appropriately set according to the manufacturing conditions and the purpose of the process, as in the embodiment. The magnitude of the time in the time chart can also be appropriately set.

[0081] In addition, the inventors conducted an experiment to examine the relationship between the voltage applied to the electrodes 304 and 305 and the application time of the voltage in the charge removal process for reducing the charge on the electrostatic adhesion film 302, and the effect of charge removal. . high As a result of an experiment conducted by setting the power of the frequency power supply 110 to 1000 W and the voltage applied to the electrodes 304 and 305 to a value in the range of ±100 V to ±500 V, it was confirmed that the electrostatic attraction film 302 was sufficiently neutralized and that the positional deviation when the wafer W was attached to and detached from the sample stage 103 was suppressed. In addition, it was confirmed that the above-mentioned positional deviation was suppressed by performing the neutralization process by generating the neutralization plasma 1011 for one second or more when the voltage applied to the electrodes 304 and 305 was set to ±100 V or more.

[0082] In the above embodiment and modified example, the polarities of the voltages applied to the electrodes 304 and 305 are different from each other, but the same static electricity removal effect can be achieved even if the polarities are the same. In this case, in order to obtain a sufficient static electricity removal effect, the output of the high-frequency power supply 110 may be changed, or an electrostatic attraction film 302 made of another highly insulating material may be used. Furthermore, the value of the voltage applied to the electrodes 304 and 305 and the process time can be appropriately changed according to these changes.

[0083] In the above embodiment and modified example, the inductively coupled plasma 1011 is formed. but The present invention is applicable regardless of the plasma generation method, for example, to a helicon wave plasma processing apparatus, an ECR plasma processing apparatus using microwaves, a capacitively coupled plasma processing apparatus, and the like. [Explanation of symbols]

[0084] 100 Plasma treatment device 101...Vacuum container 102...discharge chamber 103: Sample stage 104 Processing chamber 105···IR lamp unit 106...dispersion plate 107: Dielectric chamber 108... Coil 109...matching box 110...High frequency power supply 201...Through hole 301, 301a...Base material 302, 302a: Electrostatic adhesion film 303... Refrigerant Flow path 304, 305...electrode 306, 307...DC power supply 308...Groove 309 Valve 310 Heat transfer gas source 311···Susceptor Ring 312 Chiller 313···Push-up pin 1011: Plasma 1012···Tabletop 10121 Gas distribution plate 1014 Mass flow controller 1015 Vacuum pump 1016 Pressure Regulating Valve 1017···IR lamp 1018...Reflector 1019...IR light transmission window

Claims

1. A processing apparatus comprising: a processing chamber in which a wafer to be processed is placed; a sample stage disposed within the processing chamber and having an electrode capable of electrostatically attracting the wafer; and a dispersion plate disposed above and facing the sample stage in the processing chamber and having through holes through which particles of a processing gas flow into the processing chamber, The dispersion plate has a plurality of the through holes arranged in a ring shape on an outer periphery thereof, a waferless charge removal process in which charged particles are supplied into the processing chamber through the through holes of the dispersion plate without placing a wafer on the sample stage, thereby removing the electric charge on the sample stage; a wafer processing step of electrostatically attracting the wafer placed on the sample stage and processing the wafer after the waferless charge removing step; A wafer processing method comprising:

2. The waferless charge removal process includes: a plasma generating step of generating plasma by using a first static elimination gas; a power supply step of supplying a first power to the electrode of the sample stage; The method of claim 1 , further comprising:

3. 3. The wafer processing method according to claim 2, wherein the plasma generating step generates plasma from a first static elimination gas by using a first high frequency power.

4. the wafer processing step includes an etching step and a charge removal step during wafer placement; The etching process includes: a step of placing a wafer on the sample stage; an electrostatic attraction step of supplying a second power to the electrode of the sample stage to electrostatically attract the wafer; A plasma etching process of generating plasma from a processing gas using a second high frequency power, The charge removal step during wafer placement includes: a static elimination plasma generating step of generating plasma from the second static elimination gas by using a third high frequency power; a potential difference reducing step of supplying a second power to the electrode of the sample stage so that the electrode has a potential equal to a potential of the wafer; 4. The method of claim 3, further comprising:

5. 3. The wafer processing method according to claim 2, wherein the first charge removing gas includes an inert gas.

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