Double-sided polishing carrier and method and apparatus for double-sided polishing of silicon wafers using the same

Abstract

To provide a carrier for double-sided polishing whose service life can be extended by improving abrasion resistance and a double-sided polishing method and device for a silicon wafer using the same.SOLUTION: A carrier 10 for double-sided polishing according to the present invention is a member for holding a silicon wafer when double-sided polishing the silicon wafer and includes: a substantially disc-like carrier body 11 which is made of a resin laminate including a fiber base material; and a wafer holding hole 12 which is formed in the carrier body 11. The fiber exposure ratio of a main surface of the carrier body 11 is less than 50%.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a carrier for double-sided polishing and a method and apparatus for double-sided polishing of silicon wafers using the carrier. [Background technology]

[0002] Silicon wafers are widely used as substrate materials for semiconductor devices. Silicon wafers are manufactured by sequentially performing processes such as outer circumference grinding, slicing, lapping, etching, double-sided polishing, single-sided polishing, and cleaning on silicon single crystal ingots. Among these processes, the double-sided polishing process is a necessary process for processing the wafer to a specified thickness and increasing the flatness of the wafer, and is performed using a double-sided polishing machine that polishes both sides of the wafer at the same time.

[0003] Double-sided polishing equipment uses double-sided polishing carriers to hold the wafers during polishing. Double-sided polishing carriers are made of metal carriers and resin carriers. Metal carriers have high abrasion resistance and a long lifespan, but they have problems such as scratches on the wafer edge and melting of metal components. Resin carriers do not scratch the wafer edge or melt metal components, but they have problems with low abrasion resistance and a short lifespan.

[0004] Patent Document 1 describes a method of double-sided polishing a silicon wafer while holding it using a resin double-sided polishing carrier. The double-sided polishing carrier is made of a resin laminate in which a hydrophilic fiber base material is impregnated with resin, and the average contact angle of the front and back surfaces in contact with the polishing cloth with pure water is 45° or more and 60° or less. In addition, the surface exposure rate of the fiber base material is 50% or more. The resin carrier described in Patent Document 1 can improve the polishing rate of the silicon wafer.

[0005] Furthermore, Patent Document 2 describes that before loading a carrier into a double-sided polishing machine to actually process the wafers, a two-stage carrier polishing (pre-processing) is carried out using equipment separate from the equipment used for wafer polishing, which consists of a primary polishing using a slurry containing abrasive grains and a secondary polishing using a slurry that does not contain abrasive grains. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2018 / 105306 Brochure [Patent Document 2] JP 2017-104958 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, the conventional double-side polishing carrier described in Patent Document 1 has a high surface exposure rate of 50% or more of the fiber base material, so even if the polishing rate increases, the carrier wears out quickly, which increases the frequency of carrier replacement and increases production costs. In addition, since the variation in flatness quality of a wafer is generally greatest immediately after carrier replacement, the more frequently the carrier is replaced, the more wafers that do not meet the desired flatness quality will be. Furthermore, in a resin carrier containing a glass fiber base material, there is a high probability that scratches will occur on the surface of the wafer due to wear particles of the glass fiber.

[0008] SUMMARY OF THE PRESENT EMBODIMENTS An object of the present invention is to provide a double-sided polishing carrier capable of achieving a longer life due to improved wear resistance, and a double-sided polishing method and apparatus for silicon wafers using the same. [Means for solving the problem]

[0009] In order to solve the above problems, the double-sided polishing carrier of the present invention is a double-sided polishing carrier that holds silicon wafers when the silicon wafers are polished on both sides, and is characterized in that it comprises an approximately disk-shaped carrier body made of a resin laminate containing a fibrous base material, and a wafer holding hole formed in the carrier body, and the fiber exposure rate of the main surface of the carrier body is less than 50%.

[0010] According to the present invention, the fiber exposure rate of the main surface of the carrier body is less than 50%, thereby improving the wear resistance. Therefore, the frequency of replacing the carrier is reduced, thereby improving the productivity and the yield of silicon wafers that satisfy the desired flatness quality.

[0011] In the present invention, the flatness of the carrier body is preferably 5 μm or less. By using a carrier having a flatness of 5 μm or less and a fiber exposure rate of less than 50%, the flatness quality of the wafer can be improved while ensuring the wear resistance of the carrier.

[0012] In the present invention, it is preferable that the thickness of the carrier body is thinner than the thickness of the silicon wafer before polishing, and the thickness difference is 5 to 20 μm. Even if the thickness of the carrier is gradually reduced by repeatedly using the carrier in the double-side polishing process and the difference between the thickness of the silicon wafer before polishing and the thickness of the carrier changes within a range of 5 to 20 μm, the fiber exposure rate of the carrier is maintained at less than 50%, so that a sudden increase in the wear rate of the carrier can be prevented.

[0013] The resin laminate has a multi-layer structure in which multiple composite sheet materials in which the fiber base material is impregnated with resin are stacked, the resin being epoxy, phenol or aramid, the fiber base material being woven glass fiber cloth or woven carbon fiber cloth, and the multi-layer structure preferably having three or more layers.

[0014] Further, a double-sided polishing method for silicon wafers according to the present invention includes the steps of preparing a double-sided polishing carrier, loading a silicon wafer into the double-sided polishing carrier disposed between an upper platen and a lower platen to which an abrasive cloth is attached, and then rotating the upper platen and the lower platen while supplying a slurry between the upper platen and the lower platen to polish the silicon wafers on both sides, wherein the double-sided polishing carrier includes a substantially disk-shaped carrier body made of a resin laminate containing a fiber base material and a wafer holding hole formed in the carrier body, and the fiber exposure rate of the main surface of the carrier body is less than 50%.

[0015] According to the present invention, it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, it is possible to improve the productivity by reducing the frequency of replacing the carrier, and to improve the yield of silicon wafers that satisfy the desired flatness quality.

[0016] The method for double-sided polishing of silicon wafers according to the present invention preferably further comprises a step of pre-polishing the carrier for double-sided polishing so that the flatness of the carrier body is 5 μm or less and the fiber exposure rate is less than 50% before the step of double-sided polishing of the silicon wafers. In this way, by using a carrier having a flatness of 5 μm or less and a fiber exposure rate of less than 50%, it is possible to improve the flatness quality of the wafer while ensuring the wear resistance of the carrier.

[0017] In the present invention, the step of pre-polishing the double-side polishing carrier preferably adjusts the thickness of the carrier body so that it is thinner than the pre-polishing thickness of the silicon wafer and the thickness difference is 5 to 10 μm. Furthermore, the step of polishing the double-side polishing silicon wafer preferably uses the double-side polishing carrier so that the thickness difference from the pre-polishing thickness of the silicon wafer is in the range of 20 μm or less. By repeatedly using the carrier in the double-side polishing process, the thickness of the carrier gradually decreases, and even if the difference between the pre-polishing thickness of the silicon wafer and the thickness of the carrier changes within the range of 5 to 20 μm, the fiber exposure rate of the carrier is maintained at less than 50%, so that a sudden increase in the wear rate of the carrier can be prevented.

[0018] In addition, a double-sided polishing apparatus according to the present invention comprises an upper platen and a lower platen each having an abrasive cloth attached thereto, and a double-sided polishing carrier for holding a silicon wafer disposed between the upper platen and the lower platen, the double-sided polishing carrier comprising an approximately disk-shaped carrier body made of a resin laminate containing a fiber base material, and a wafer holding hole formed in the carrier body, and the fiber exposure rate of the main surface of the carrier body is less than 50%.

[0019] According to the present invention, it is possible to prevent a rapid increase in the wear rate of the carrier due to an increase in the fiber exposure rate, thereby extending the life of the carrier. Therefore, it is possible to improve the productivity by reducing the frequency of replacing the carrier, and to improve the yield of silicon wafers that satisfy the desired flatness quality. Effect of the Invention

[0020] According to the present invention, it is possible to provide a double-sided polishing carrier capable of achieving a longer life due to improved wear resistance, and a double-sided polishing method and apparatus for silicon wafers using the carrier. [Brief description of the drawings]

[0021] [Figure 1] FIG. 1 is a schematic cross-sectional view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic plan view showing the configuration of a single crystal manufacturing apparatus according to an embodiment of the present invention. [Diagram 3] FIG. 3 is a schematic plan view showing the configuration of the carrier. [Figure 4] FIG. 4 is a cross-sectional view showing the cross-sectional structure of a resin laminate that constitutes the carrier. [Diagram 5] FIG. 5 is a schematic diagram for explaining the pre-polishing (pretreatment) of the carrier. [Figure 6] FIG. 6 is a flowchart for explaining a double-side polishing method for silicon wafers according to an embodiment of the present invention. [Figure 7] FIG. 7 is a schematic diagram for explaining a method for calculating the flatness of a carrier. [Figure 8] FIG. 8 is a graph showing the relationship between the flatness of the carrier and the peripheral flatness (ESFQR) of the wafer. [Figure 9] 9(a) and (b) are CCD microscope images of the carrier surface, with FIG. 9(a) showing the image before binarization processing and FIG. 9(b) showing the image after binarization processing. [Figure 10]FIG. 10 is a graph showing the relationship between the fiber exposure rate of the carrier and the wear rate. [Figure 11] FIG. 11 is a graph showing the relationship between the fiber exposure rate of the carrier and the number of processed wafers. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0023] 1 and 2 are diagrams showing the configuration of a double-sided polishing apparatus according to an embodiment of the present invention, with FIG. 1 being a schematic cross-sectional view and FIG. 2 being a schematic plan view.

[0024] 1 and 2, a double-sided polishing machine 1 includes an upper platen 2 and a lower platen 3 arranged opposite each other in the vertical direction, and a polishing cloth 4 is attached to the polishing surfaces of the upper platen 2 and the lower platen 3. As the polishing cloth 4, a nonwoven fabric impregnated with urethane resin or a polyurethane foam pad can be used.

[0025] A slurry supplying device 5 for supplying a slurry between the upper platen 2 and the lower platen 3 is provided above the upper platen 2. The slurry supplying device 5 supplies a slurry from a nozzle 6 inserted into the through-hole 2a of the upper platen 2. As the slurry, an inorganic alkaline aqueous solution containing colloidal silica can be used.

[0026] A sun gear 7 is provided in the center between the upper and lower plates 2 and 3, and an internal gear 8 is provided on the outer periphery, forming a planetary gear type double-sided polishing machine. The upper and lower plates 2 and 3, the sun gear 7, and the internal gear 8 have the same central axis of rotation and can rotate independently of each other.

[0027] A plurality of (three in this embodiment) double-side polishing carriers 10 (hereinafter simply referred to as carriers) are disposed between the upper platen 2 and the lower platen 3. Each carrier 10 is disposed between the sun gear 7 and the internal gear 8, and the outer teeth of the carrier 10 mesh with both the sun gear 7 and the internal gear 8. When the upper platen 2 and the lower platen 3 are rotated by a driving source (not shown), the sun gear 7 and the internal gear 8 also rotate in conjunction with them. As a result, the carrier 10 revolves around the sun gear 7 while rotating between the upper platen 2 and the lower platen 3. At this time, the silicon wafer W is trapped and held in a wafer holding hole provided in the carrier 10, so that both sides are polished simultaneously by the upper and lower polishing cloths 4. During the polishing process, a slurry is supplied from a nozzle 6 through a through hole 2a.

[0028] FIG. 3 is a schematic plan view showing the configuration of the carrier 10. As shown in FIG.

[0029] As shown in FIG. 3, the carrier 10 includes a carrier body 11 having a substantially disk-shaped outer shape, a wafer holding hole 12 (hereinafter simply referred to as a holding hole) for holding a silicon wafer W, and outer teeth 13 provided on the outer periphery of the carrier body 11. The holding hole 12 is a circular opening formed so as to penetrate from one main surface (front surface or upper surface) of the carrier body 11 to the other main surface (rear surface or lower surface), and the diameter of the holding hole 12 is substantially equal to the diameter of the silicon wafer W. Since the center position of the holding hole 12 is shifted from the center position of the carrier 10, the silicon wafer W in the holding hole 12 rotates eccentrically when the carrier 10 rotates. In this embodiment, the number of holding holes 12 formed in the carrier 10 is one, but a plurality of holding holes 12 may be provided.

[0030] FIG. 4 is a cross-sectional view showing the cross-sectional structure of a resin laminate that constitutes the carrier 10. As shown in FIG.

[0031] As shown in Fig. 4, the carrier body 11 of the double-sided polishing carrier 10 is made of a multi-layered resin laminate plate formed by stacking a plurality of composite sheet materials 20 (FRP sheets) each made by impregnating a fiber base material 21 with a resin 22. As the fiber base material 21, it is preferable to use a glass fiber woven fabric or a carbon fiber woven fabric. As the resin 22, it is preferable to use epoxy, phenol, aramid, or the like. The resin laminate plate is preferably formed by stacking three or more layers of the composite sheet material 20, and it is particularly preferable to have a five-layer structure as shown in the figure.

[0032] In this embodiment, the fiber exposure ratio of the main surface of the carrier 10 (carrier body 11) is less than 50%. That is, in the double-side polishing process, a carrier 10 having a fiber exposure ratio of less than 50% is used, and a carrier 10 having a fiber exposure ratio of 50% or more is not used. This is because if the fiber exposure ratio is 50% or more, the wear resistance of the carrier is rapidly reduced, shortening the life of the carrier.

[0033] The ideal fiber exposure rate of the carrier 10 used in the double-side polishing process is 0%. However, it is extremely difficult to always use a carrier 10 with a fiber exposure rate of 0%. Normally, a resin laminate is produced by integrating a plurality of composite sheet materials 20 through heat pressing. During heat pressing, the resin on the outermost surface flows off, so even if the amount of resin impregnated into the fiber base material is increased, the resin thickness on the outermost surface does not increase.

[0034] In addition, since a brand new, unused carrier immediately after completion has poor flatness, a new carrier is pre-polished (pre-processed) before it is actually used (see FIG. 5). Specifically, pre-polishing is performed so that the difference in thickness between the silicon wafer to be processed and the pre-polishing thickness is 5 to 10 μm, and the flatness of the carrier is 5 μm or less. When such pre-processing is performed, the fiber base material 21 is inevitably exposed on the main surface of the carrier 10, and depending on the removal amount, the fiber exposure rate may reach 50% or more. When the fiber exposure rate reaches 50% or more, the wear rate of the carrier increases rapidly, shortening the life of the carrier.

[0035] However, in this embodiment, the fiber exposure rate of the main surface of the carrier used in the double-sided polishing process is maintained at less than 50%, and when an unused carrier that has never been used is pre-polished, the removal amount is adjusted so that the fiber exposure rate of less than 50% is maintained not only immediately after pre-polishing, but also when the carrier has been used repeatedly and reaches the lower thickness limit, thereby improving the wear resistance of the carrier and achieving a longer lifespan.

[0036] FIG. 6 is a flowchart showing a double-side polishing method for silicon wafers according to an embodiment of the present invention.

[0037] 6, in the method for double-sided polishing of silicon wafers according to the present embodiment, first, an unused carrier 10 is prepared (step S1). As described above, the carrier 10 is produced by hot pressing a plurality of (e.g., five) composite sheet materials 20 to form a resin laminate, and then punching the laminate into a predetermined shape including the retaining holes 12 and the outer peripheral teeth 13.

[0038] Next, in order to adjust the thickness and improve the flatness of the carrier 10, the carrier is pre-polished (pre-processed) (step S2). In the pre-polishing of the carrier, a machine other than the machine for polishing the wafer is used to polish the carrier using a slurry containing abrasive grains. In the pre-polishing of the carrier, the polishing allowance is set so that the fiber exposure rate is less than 50%. For example, the polishing allowance is set so that the wafer has a predetermined thickness (upper thickness limit) that is 5 to 10 μm thinner than the pre-polishing thickness of the wafer (for example, 785 μm), and the polishing process is performed. As a result, the flatness of the carriers in one set is adjusted to 5 μm or less, and carriers with a fiber exposure rate of less than 50% are obtained. It goes without saying that in order for the flatness of the carriers in one set to be 5 μm or less, the flatness of each individual carrier is also 5 μm or less.

[0039] Next, the carrier 10 after the pre-polishing is used to actually carry out a double-sided polishing process of the silicon wafer W (step S3). The silicon wafer to be processed is polished on both sides to a target thickness and flatness. When the polishing process is completed, the silicon wafer W is taken out of the carrier and sent to the next processing process (single-sided polishing process).

[0040] The carrier 10 is reusable and is used repeatedly until the thickness reaches a predetermined lower limit (steps S4N, S5, S6, S3). When the carrier is used in the double-sided polishing process, the thickness of the carrier also decreases, and the carrier itself wears out as the wafers are repeatedly polished. In particular, resin carriers wear out more rapidly than metal carriers, so they can be used repeatedly less frequently, which leads to reduced productivity.

[0041] In order to polish the wafer W on both sides, it is necessary to use a carrier 10 thinner than the wafer W. However, if a carrier 10 that is much thinner than the target thickness of the wafer W is used, the desired flatness of the wafer cannot be ensured. Therefore, the lower limit of the thickness of the carrier that can be used in the double-sided polishing process is set to be close to the target thickness of the wafer, and carriers thinner than the lower limit are excluded from use (discarded) (steps S4Y, S7). The lower limit of the carrier thickness is set, for example, to the pre-polishing thickness of the wafer (for example, 785 μm) minus 20 μm.

[0042] Furthermore, carriers with a fiber exposure rate of 50% or more on the main surface of the carrier are also excluded from continued use (steps S5Y, S7). Usually, the fiber exposure rate of a carrier increases with the number of uses, and the wear rate of a carrier with a fiber exposure rate of 50% or more becomes very fast. Also, the increase in glass fiber wear debris significantly increases the probability of scratches occurring on the surface of the wafer. However, the carrier according to this embodiment is formed so that the fiber exposure rate is always less than 50% even if it is used repeatedly from a predetermined thickness upper limit value to a thickness lower limit value, so that the increase in the wear rate of the carrier can be suppressed and the life of the carrier can be extended. Also, the probability of scratches occurring on the surface of the wafer can be reduced.

[0043] As described above, in the method for double-sided polishing of silicon wafers according to the present embodiment, a carrier for double-sided polishing made of a resin laminate is used to polish both sides of silicon wafers, and since the fiber exposure rate of the main surface of the carrier is less than 50%, it is possible to extend the life of the carrier by improving the wear resistance.

[0044] Although a preferred embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention, and it goes without saying that these modifications are also included within the scope of the present invention.

[0045] For example, in the above embodiment, a double-sided polishing machine capable of loading three resin carriers is exemplified, but the configuration of the double-sided polishing machine is not particularly limited, and various machines capable of using resin carriers can be used. Furthermore, the number of wafers that can be loaded in a carrier and the shape of the carrier are not particularly limited. EXAMPLES

[0046] <Relationship between carrier flatness and wafer flatness quality> The effect of carrier flatness on the flatness quality of the wafer was evaluated. The double-sided polishing machine used was capable of loading five carriers with a diameter of 500 mm. The carrier had a single wafer holding hole and was capable of loading one wafer with a diameter of 300 mm. A p-type silicon single crystal wafer with a diameter of 300 mm was used as the wafer. The polishing pad was a urethane polishing pad that did not contain abrasive grains. The slurry used was an inorganic alkaline aqueous solution with a pH of 11 to 12 that contained silica abrasive grains with a particle size of 60 to 110 nm.

[0047] The manufactured carriers were pre-polished in advance, and the thickness of the carriers was measured using a laser displacement meter to determine the flatness of the carriers within one batch. The flatness of the carriers within one batch was measured at positions 1.01r (mm) away from the center of the carrier's holding hole in the four directions (up, down, left, and right) from the center of the carrier's holding hole.

[0048] The method for calculating the flatness of the carrier is shown in Figure 7. The direction from the center C of the holding hole toward the center of the carrier was set as the reference direction (θ=0°), and thickness measurement values ​​X1, X2, X3, and X4 were obtained at four points near the outer periphery in the four directions of θ=0°, 90°, 180°, and 270°. The distance from the center C of the holding hole 12 to the thickness measurement point was set to 1.01r (mm). r is the radius of the wafer holding hole.

[0049] The maximum value X among the total of 20 measured values ​​obtained from 4 points each on 5 carriers max and the minimum value X min Difference with ΔX=X max -X min was defined as the flatness (μm) of the carriers in one batch.

[0050] Next, the ESFQR (Edge Site Flatness Front Reference Least Square Range) of the silicon wafer after double-sided polishing was measured. It is an evaluation index (site flatness) of flatness focusing on the edge of the wafer where flatness is easily deteriorated, and indicates the magnitude of edge roll-off. The flatness of the edge of the wafer is obtained for each unit area (site) obtained by further equally dividing the ring-shaped outer peripheral area set in the range of 2 to 32 mm (sector length 30 mm) from the outermost circumference of the wafer in the circumferential direction. A wafer flatness measuring device (KLA-Tencor Wafer Sight) was used to measure the ESFQR. The measurement conditions were a measurement range of 296 mm (excluding the outermost circumference 2 mm), the number of sectors (number of sites) for edge site measurement was 72, and the sector length was 30 mm. The relationship between the flatness of the carrier and the ESFQR of the wafer after polishing is shown in the graph in Figure 8. The ESFQR is the average value of the measurements of five wafers in one batch.

[0051] As shown in Fig. 8, when the flatness of the carrier becomes larger than 5 μm, the ESFQR of the wafer deteriorates rapidly. This is thought to be because the large variation in thickness (flatness) of the carrier within one batch causes variation in the polishing state of the wafer within one batch.

[0052] <Relationship between carrier fiber exposure rate and carrier wear rate> Next, we evaluated the effect of the fiber exposure rate on the main surface of the carrier on the carrier wear rate.The carrier was made of a five-layer resin laminate consisting of five sheets of glass cloth base material impregnated with epoxy resin.

[0053] The fiber exposure rate of the carrier's main surface was measured at 10 randomly selected locations within 50 mm from the outer edge of the wafer-holding hole of the carrier. CCD microscope images were taken at each observation location, and the captured images were binarized to calculate the area ratio of the fiber portion. Figures 9(a) and (b) show examples of CCD microscope images of the carrier surface. Figure 9(a) shows the image before binarization, and Figure 9(b) shows the image after binarization. The image size of each measurement location was 2.8 × 2.1 (mm). The fiber exposure rate of the carrier surface was adjusted by adjusting the removal allowance in the process of pre-polishing the carrier to adjust the thickness and flatness of the carrier.

[0054] The carrier wear rate was calculated from the reduction in the carrier thickness per unit time (difference in thickness before and after polishing) when a dummy silicon wafer slightly thinner than the carrier was loaded and the carrier was polished on both sides using a silicon wafer polishing slurry containing colloidal silica. The results are shown in Figure 10. In the graph of Figure 10, the carrier wear rate on the vertical axis is a relative value when the value when the fiber exposure rate is 90% is set as the reference value of 100.

[0055] As is clear from Figure 10, when the fiber exposure rate is 42% or less, the carrier wear rate is low at 27 or less, but when the fiber exposure rate is around 50%, the carrier wear rate increases rapidly, and when the fiber exposure rate is 60% or more, the carrier wear rate approaches approximately 100. Conversely, it is seen that the carrier wear rate drops rapidly once the fiber exposure rate falls below 60%, and when the fiber exposure rate is 50%, the carrier wear rate is less than half of the carrier wear rate when the fiber exposure rate is 90%. Thus, the reason that the carrier becomes more susceptible to wear when the fiber exposure rate is 50% or more is thought to be that the highly alkaline polishing slurry causes corrosion of the glass fiber portion exposed on the surface of the carrier.

[0056] <Relationship between carrier fiber exposure rate and number of processed wafers> The number of wafers processed when a carrier is repeatedly used from the upper limit to the lower limit of the carrier thickness standard, which is set taking into consideration the thickness and flatness standards of a certain wafer, was evaluated. The results are shown in Figure 11.

[0057] As is clear from Figure 11, when the fiber exposure rate was 42% or less, the number of wafers processed was around 400. However, when the fiber exposure rate was 48%, the number of wafers processed dropped to 250. Furthermore, when the fiber exposure rate was 60% or more, the number of wafers processed dropped to about 100.

[0058] Since the fiber exposure rate of the carrier affects the wear rate of the carrier as described above, it has been confirmed that it is desirable to maintain the fiber exposure rate at less than 50%, which can extend the life of the carrier. [Explanation of symbols]

[0059] 1 Double-sided polishing machine 2 Upper surface plate 2a Through hole 3 Lower surface plate 4 Polishing cloth 5. Slurry supply device 6 Nozzles 7 Sun gear 8 Internal Gear 10 Double-sided polishing carrier 11 Carrier body 12 Wafer holding hole 13 Peripheral teeth 20 Composite sheet material 20a Composite Sheet Material 20b Composite sheet material 21 Fiber base material 22 Resin W Silicon wafer

Claims

1. A double-sided polishing carrier for holding a silicon wafer when polishing the silicon wafer on both sides, comprising: A substantially disk-shaped carrier body made of a resin laminate including a woven fabric type fiber substrate; a wafer holding hole formed in the carrier body; a fiber exposure rate of a main surface of the carrier body is greater than 0% and less than 50%, A carrier for double-sided polishing, characterized in that the flatness of the carrier body near the outer periphery of the wafer holding hole is 5 μm or less, and is calculated based on the difference between the maximum and minimum thickness measurements of the carrier body.

2. A carrier for double-sided polishing as described in claim 1, wherein the distance from the center of the wafer holding hole to the thickness measurement point is 1.01r (mm) (where r is the radius of the wafer holding hole).

3. 3. The double-side polishing carrier according to claim 2, wherein the thickness of the carrier body is thinner than the thickness of the silicon wafer before polishing, and the thickness difference is 5 to 20 μm.

4. The resin laminate has a multi-layer structure in which a plurality of composite sheet materials each having the fiber base material impregnated with a resin are stacked, the resin is an epoxy, a phenolic or an aramid; The fiber substrate is a woven glass fiber fabric or a woven carbon fiber fabric, The double-side polishing carrier according to claim 1 , wherein the multi-layer structure has three or more layers.

5. preparing a double-sided polishing carrier; and loading silicon wafers into the double-side polishing carrier disposed between an upper platen and a lower platen to which polishing cloths are respectively attached, and then rotating the upper platen and the lower platen while supplying a slurry between the upper platen and the lower platen, thereby polishing the silicon wafers on both sides. The double-side polishing carrier is A substantially disk-shaped carrier body made of a resin laminate including a woven fabric type fiber substrate; a wafer holding hole formed in the carrier body, and a fiber exposure rate of a main surface of the carrier body is greater than 0% and less than 50%, A method for polishing silicon wafers on both sides, characterized in that the flatness of the carrier body near the outer periphery of the wafer holding hole is 5 μm or less, and is determined based on the difference between the maximum and minimum thickness measurements of the carrier body.

6. 6. The double-sided polishing method according to claim 5, further comprising a step of pre-polishing the carrier for double-sided polishing, before the step of double-sided polishing the silicon wafer, so that the flatness of the carrier body is 5 μm or less and the fiber exposure rate is greater than 0% and less than 50%.

7. 7. The double-sided polishing method according to claim 6, wherein the step of pre-polishing the double-sided polishing carrier includes adjusting a thickness of the carrier body so that the thickness is thinner than a thickness of the silicon wafer before polishing and the thickness difference is 5 to 10 μm.

8. 8. The double-sided polishing method according to claim 7, wherein the step of polishing the silicon wafers on both sides uses the double-sided polishing carrier so that a difference in thickness between the silicon wafers before and after polishing is within a range of 20 μm or less.

9. an upper surface plate and a lower surface plate each having an abrasive cloth attached thereto; a double-side polishing carrier for holding a silicon wafer disposed between the upper platen and the lower platen, The double-side polishing carrier is A substantially disk-shaped carrier body made of a resin laminate including a woven fabric type fiber substrate; a wafer holding hole formed in the carrier body; a fiber exposure rate of a main surface of the carrier body is greater than 0% and less than 50%, A double-sided polishing apparatus, characterized in that the flatness of the carrier body near the outer periphery of the wafer holding hole is 5 μm or less, and is calculated based on the difference between the maximum and minimum thickness measurements of the carrier body.

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