Calculation program and information processing method

Abstract

This computational model can be applied to an Ising model or QUBO, and has a plurality of expression bits and a first surplus bit, wherein each of the plurality of expression bits is a binary variable, the plurality of expression bits represent each choice in a combinatorial optimization problem, and the first surplus bit couples with any of the plurality of expression bits.

Description

[Technical field]

[0001] The present invention is Program and Information Processing By law Regarding. [Background technology]

[0002] Attempts are being made to find optimal solutions to combinatorial optimization problems using quantum annealing (for example, Patent Document 1). [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] International Publication No. 2020 / 196872 Summary of the Invention [Problem to be solved by the invention]

[0004] Quantum annealing machines can sometimes experience errors due to unintended quantum transitions or noise, which can prevent the optimal solution from being found properly.

[0005] The present invention has been made in consideration of the above circumstances, and has an object to provide a calculation model, an information processing method, a calculation program, and an information processing device that are capable of detecting errors caused by noise or the like. [Means for solving the problem]

[0006] In order to solve the above problems, the present invention provides the following means.

[0007] (1) A computational model according to a first aspect is a computational model applicable to an Ising model or a QUBO, and has a plurality of representation bits and a first surplus bit, each of the plurality of representation bits being a binary variable, each of the plurality of representation bits representing each of options in a combinatorial optimization problem, and the first surplus bit being combined with any of the plurality of representation bits.

[0008] (2) The computation model may have a plurality of the first redundant bits, each of which is coupled to one of the plurality of representation bits.

[0009] (3) The computation model may further include a representation bit to which the first surplus bit is combined or a second surplus bit to which the first surplus bit is combined.

[0010] (4) In the above computational model, the plurality of representation bits may represent the options in a one-hot manner.

[0011] (5) In the above computational model, the plurality of representation bits may represent the options in binary.

[0012] (6) In the above computational model, the Ising model or the QUBO may be subjected to optimization calculation by a quantum annealing machine.

[0013] (7) An information processing method according to a second aspect is an information processing method using the above-mentioned computation model. This information processing method compares the first redundant bit with a representation bit combined with the first redundant bit to detect an error.

[0014] (8) The information processing method according to the above aspect is an information processing method using a computational model, which compares the first surplus bit with a representation bit combined with the first surplus bit, detects an error, and corrects the error based on the values ​​of the first surplus bit, the second surplus bit, and the representation bit.

[0015] (9) A computation program according to a third aspect includes a computation program that performs computations using the computation model according to the above aspect, and a detection program that compares the first surplus bit with a representation bit combined with the first surplus bit to detect an error.

[0016] (10) The computation program according to the above aspect includes a computation program that performs computation using the computation model according to the above aspect, a detection program that compares the first surplus bit with a representation bit combined with the first surplus bit to detect an error, and a correction program that corrects the error based on values ​​of the first surplus bit, the second surplus bit, and the representation bit.

[0017] (11) An information processing device according to a fourth aspect includes the calculation program according to the above aspect. Effect of the Invention

[0018] The computational model, information processing method, computational program, and information processing device according to the present invention can detect errors caused by noise or the like. [Brief description of the drawings]

[0019] [Figure 1] This is an image of the Ising model, QUBO. [Diagram 2] FIG. 2 is an image diagram of a calculation model according to the present embodiment. [Diagram 3] This is an example of a combinatorial optimization problem in which options are one-hot represented using multiple representation bits. [Figure 4] This is an example of a combinatorial optimization problem in which options are expressed in binary using multiple representation bits. [Diagram 5] This is an example of the case where the options are displayed including the first surplus bit and the second surplus bit in the one-hot representation shown in FIG. [Figure 6] This is an example of the case where the options are displayed including the first surplus bit and the second surplus bit in the binary representation shown in FIG. [Figure 7] FIG. 2 is a process flow diagram of the information processing method according to the present embodiment. [Figure 8] This is another example of the case where options are displayed including the first and second surplus bits in the case of the binary representation shown in FIG. [Figure 9] 13 is a modified example of the calculation model according to the present embodiment. [Figure 10] 13 is a modified example of the calculation model according to the present embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] The present embodiment will be described in detail below with reference to the drawings as appropriate. The drawings used in the following description may show characteristic parts in an enlarged scale for the sake of convenience in order to make the features of the present embodiment easier to understand, and the dimensional ratios of each component may differ from the actual ones. The materials, dimensions, etc. exemplified in the following description are merely examples, and the present invention is not limited thereto, and may be appropriately modified and implemented within the scope of the present invention.

[0021] "First embodiment" The computational model according to the first embodiment is a computational model applicable to the Ising model or QUBO used in quantum annealing. Quantum annealing is an algorithm for finding a state (ground state) with the minimum energy according to the computational model.

[0022] The Ising model is a model that predicts a stable overall state when multiple elements interact with each other and each element is subjected to a forcing force.

[0023] Figure 1 is an image of the Ising model. The Ising model has multiple bits b that interact with each other through a forcing force F. Each bit b consists of a spin s. The spin s indicates either an up or down state. Each bit b is a variable that indicates a binary state. Depending on the setting of the forcing force F, adjacent spins s can be stable in a parallel state or in an antiparallel state. The forcing force F is called the interaction parameter.

[0024] The Ising model is expressed by the following energy function (cost function).

[0025]

number

[0026] where σ i , σ j are input variables. σ i , σ j indicates one of the two values, +1 or -1. σ i , σ j corresponds to the state of spin s in Figure 1. J ij is the interaction parameter. J ij corresponds to the forcing force F in Figure 1. h i is a parameter associated with external factors.

[0027] QUBO (Quadratic Unconstrained Binary Optimization) is a computational model that can be converted to be equivalent to the Ising model. In the Ising model, each bit b is represented by a binary variable of +1 or -1, whereas in QUBO, each bit b is represented by a binary variable of 0 or 1. QUBO can be applied to computational models similar to the Ising model. QUBO is expressed by the following energy function (cost function).

[0028]

number

[0029] Here, q i , q j are input variables. q i , q j indicates one of the two values, 1 or 0. i , q j corresponds to the state of spin s in the Ising model. Q ij is the interaction parameter in QUBO. Q ij corresponds to the forcing force F in the Ising model.

[0030] The Ising model and QUBO can be applied to combinatorial optimization problems.

[0031] 2 is a conceptual diagram of an example of a computation model according to this embodiment. The computation model 100 according to this embodiment has a plurality of representation bits 10, a plurality of first surplus bits 21, and a plurality of second surplus bits 22.

[0032] The representation bit 10, the first surplus bit 21, and the second surplus bit 22 correspond to the bit b in Fig. 1. The representation bit 10, the first surplus bit 21, and the second surplus bit 22 correspond to the input variable σ i , σ j or the input variable q i , q j It is.

[0033] The representation bit 10, the first surplus bit 21, and the second surplus bit 22 represent the binary variables x1 to x5, y 11 ~y 51 , y 12 ~y 52 Variables x1 to x5, y 11 ~y 51 , y 12 ~y 52 Each of the variables x1 to x5 and y 11 ~y 51 , y 12 ~y 52may represent, for example, +1 or -1, respectively. The numbers of the representation bits 10, the first redundant bits 21, and the second redundant bits 22 are not important.

[0034] A representation bit 10 is coupled to two or more bits. A representation bit 10 is coupled to other representation bits 10. The strength of the coupling between the representation bits 10 depends on the magnitude of the coercive force F.

[0035] The first redundant bits 21 are combined with the representation bits 10. For example, the first redundant bits 21 are combined one by one with each of the representation bits 10. The first redundant bits 21 shown in FIG.

[0036] The second redundant bits 22 are, for example, combined with the representation bits 10. The second redundant bits 22 are, for example, combined one by one with each of the representation bits 10. The second redundant bits 22 shown in FIG.

[0037] The multiple representation bits 10 are combinations of values ​​that represent each of the options in the combinatorial optimization problem. The value of each representation bit 10 is a parameter that represents an option in the combinatorial optimization problem. For example, in the case of the traveling salesman problem, an option in the combinatorial optimization problem is a route to which cities to go in what order.

[0038] The multiple representation bits 10 may represent options in a combinatorial optimization problem as one-hot representations, as binary representations, or as a combination of one-hot representations and binary representations. Combining one-hot representations and binary representations means representing some of the multiple options as one-hot representations and the remaining options as binary representations.

[0039] Figure 3 is an example of displaying options in one-hot representation. A, B, and C in Figure 3 are options in a combinatorial optimization problem. In Figure 3, the respective representation bits 10 indicate "1" and "0".

[0040] One-hot representation is a method of representing N types of information with N representation bits 10. With one-hot representation, only one of the N representation bits 10 will be "1", and all other bits will be "0". In Figure 3, option A is assigned to (1,0,0), option B is assigned to (0,1,0), and option C is assigned to (0,0,1).

[0041] Although an example with three options is shown here, in the case of one-hot representation, options exceeding the number of expression bits of 10 cannot be expressed. For example, the computational model 100 shown in Fig. 2 has five expression bits of 10, so it can only express five options.

[0042] Figure 4 is an example of displaying options in binary notation. A to H in Figure 4 are options in a combinatorial optimization problem.

[0043] Binary representation is a way to express N types of information in binary numbers. Binary representation allows multiple bits to be "1" at the same time. In Figure 4, option A is assigned to (1,0,0), option B is assigned to (0,1,0), option C is assigned to (0,0,1), option D is assigned to (1,1,0), option E is assigned to (0,1,1), option F is assigned to (1,0,1), option G is assigned to (0,0,0), and option H is assigned to (1,1,1).

[0044] For example, the computational model 100 shown in FIG. 2 has five representation bits 10, so if expressed in binary, 5 The following options can be expressed:

[0045] Binary representation has the advantage of being able to represent multiple states with a small number of bits. On the other hand, if one of the bits is rewritten by noise, etc., the binary representation will represent a different state. For example, in option A in Figure 4, if x1 is mistakenly recognized as "0" instead of "1" due to noise, it will represent option G. For this reason, binary representation requires measures to deal with noise in particular.

[0046] The first surplus bit 21 is combined with the representation bit 10. 11 ~y 51 has a certain rule between the variables x1 to x5 of the representation bit 10 to be combined. The certain rule can be incorporated into the energy function by setting a forcing force F between the representation bit 10 and the first surplus bit 21. For example, 11 ~y 51 indicates the same value as variables x1 to x5 of the combined representation bit 10.

[0047] The second redundant bit 22 is combined with, for example, the representation bit 10. 12 ~y 52 has a certain rule between the variables x1 to x5 of the representation bit 10 to be combined. The certain rule can be incorporated into the energy function by setting a forcing force F between the representation bit 10 and the second surplus bit 22. For example, 12 ~y 52 indicates the same value as variables x1 to x5 of the combined representation bit 10.

[0048] Fig. 5 is an example of a case where options are displayed including the first surplus bit 21 and the second surplus bit 22 in the case of the one-hot representation shown in Fig. 3. Fig. 6 is an example of a case where options are displayed including the first surplus bit 21 and the second surplus bit 22 in the case of the binary representation shown in Fig. 4.

[0049] The computational model 100 according to this embodiment can detect and correct errors using the first surplus bit 21 and the second surplus bit 22. For example, a bit inversion in which a bit that should be recognized as "1" is recognized as "0" is one example of an error. Errors occur when unintended quantum transitions, noise, or the like occur in the quantum annealing machine. An information processing method using the computational model according to this embodiment will be described below.

[0050] 7 is a process flow of the information processing method according to this embodiment. The information processing method according to this embodiment includes, for example, an optimization step S1, an error detection step S2, and a correction step S3.

[0051] In the optimization step S1, a calculation is performed to solve the optimization problem using the above-mentioned calculation model. For example, the options for the optimization problem are applied to the above-mentioned energy function (cost function). For example, the input variable q i , q j is the representation bit 10, the first surplus bit 21, and the second surplus bit 22 of variables x1 to x5, y 11 ~y 51 , y 12 ~y 52 In addition, the interaction parameter Q between the representation bit 10 and the first redundant bit 21 corresponds to ij By setting the interaction parameter Q between the representation bit 10 and the first surplus bit 21, a certain rule can be given. Similarly, the interaction parameter Q between the representation bit 10 and the second surplus bit 22 can be set as ij By setting the above, a certain rule can be imposed between the representation bit 10 and the second surplus bit 22.

[0052] The error detection step S2 is performed, for example, after the optimization step S1.

[0053] In the error detection step S2, the values ​​of the variables x1 to x5 of the representation bit 10 and the variable y 11 ~y 51 Compare the value of with.

[0054] The values ​​of the variables x1 to x5 of the representation bit 10 and the variable y of the first surplus bit 21 that is associated with the representation bit 10 11 ~y 51 As long as no bit inversion occurs due to an error, the value of the variable y of the first redundant bit 21 has a relationship according to a certain rule. 11 ~y 51 The rule is that the variables x1 to x5 of the combined expression bit 10 have the same value. Therefore, if the variable x1 of the expression bit 10 is "1", the variable y 11 is "1", and if the variable x1 of the representation bit 10 is "0", then the variable y 11 is "0".

[0055] In contrast, when a bit inversion occurs due to an error, the representation bit 10 and the first surplus bit 21 coupled to the representation bit 10 do not satisfy a given rule. For example, in the case of FIG. 5 and FIG. 6, the variable y 11 ~y 51 For example, if the variable x1 of the representation bit 10 is misrecognized as "0", the variable y 11 becomes "1".

[0056] In other words, if the representation bit 10 and the first redundant bit 21 combined with the representation bit 10 satisfy certain rules, it can be determined that no error has occurred, and if the certain rules are not satisfied, it can be determined that an error has occurred.

[0057] Next, a correction step S3 is performed. The correction step S3 includes an error portion identifying step and a bit inversion step.

[0058] The error determined in the error detection step S2 may be caused by a bit inversion of the representation bit 10, or may be caused by a bit inversion of the first surplus bit 21. In the error portion identification step, it is identified which is the cause.

[0059] In the error portion identification step, the values ​​of the variables x1 to x5 of the expression bit 10 determined to have an error and the variable y 11 ~y 51 The value of the variable y 12 ~y 52 Compare the value of with.

[0060] For example, if the bit of x1 in option A in FIG. 5 and FIG. 6 is inverted, (x1, y 11 ,y 12 ) = (0,1,1). Since bit inversion occurs bit by bit, only the bit in which the error occurred is inverted, and the other bits are not inverted. For example, if a rule is given between these that the three values ​​match, the inverted bit can be identified by majority vote.

[0061] In the bit-flipping step, the bits identified as causing the error are flipped back to their proper values. For example, in the above case, (x1,y 11 ,y 12 )=(0,1,1), flip x1 and change (x1,y 11 ,y 12 )=(1,1,1).

[0062] The optimization step S1 is executed by, for example, an information processing device (Ising machine) specialized for calculation of the Ising model or QUBO. For example, a quantum annealing machine (D-wave, NEC), a coherent Ising machine (NTT), a simulated bifurcation machine (Toshiba), a digital annealer (Fujitsu), a CMOS annealer (Hitachi), etc. are examples of information processing devices.

[0063] The error detection step S2 and the correction step S3 are performed using a general-purpose information processing device that has general-purpose properties. For example, machines such as personal computers, supercomputers, and microcomputers are examples of general-purpose information processing devices. Between the optimization step S1 and the error detection step S2, the Ising machine sends the values ​​of the representation bits and surplus bits calculated in the optimization step S1 to the general-purpose information processing device, and the general-purpose information processing device executes the error detection step S2 and subsequent steps using the values ​​of the representation bits and surplus bits sent from the Ising machine.

[0064] The optimization step S1 may be executed by the general-purpose information processing device.

[0065] The information processing device (annealing machine) may be a quantum gate type computer. For example, if the quantum approximation optimization algorithm (QAQA) is used, the Ising model and QUBO can be calculated by the quantum gate type computer.

[0066] The information processing device performs the above information processing based on an optimization program.

[0067] The optimization program performs an optimization step S1. The detection program performs an error detection step S2. The correction program performs a correction step S3.

[0068] The calculation program and information processing device of this embodiment can detect errors using the first surplus bits 21, can correct errors using the second surplus bits 22, and can find an appropriate optimal solution.

[0069] The above describes the embodiments of the present invention in detail with reference to the drawings. However, each configuration and combination thereof in each embodiment is merely an example, and addition, omission, substitution, and other modifications of the configuration are possible without departing from the spirit of the present invention.

[0070] For example, in the above embodiment, a rule is applied between the representation bit 10, the first surplus bit 21, and the second surplus bit 22 that their respective values ​​match, but the rule applied between these is not limited to this rule.

[0071] Fig. 8 is another example of a case where options are displayed including the first surplus bit and the second surplus bit in the case of the binary representation shown in Fig. 4. In Fig. 8, a rule is applied that the value of the representation bit 10 is different from the values ​​of the first surplus bit 21 and the second surplus bit 22.

[0072] In this case, the first surplus bit 21 of the variable y 11 ~y 51 If the variables x1 to x5 of the combined representation bits 10 match, it is determined that an error has occurred, and if they do not match, it is determined that no error has occurred. 11 ~y 51 and the second surplus bit 22 of variable y 12 ~y 52 If they match, it can be determined that an error has occurred in representation bit 10, and the location of the error can be identified.

[0073] Alternatively, a rule may be applied between the representation bit 10 and the first surplus bit 21 that their values ​​match, and a rule may be applied between the representation bit 10 and the second surplus bit 22 that their values ​​do not match. Also, the opposite rule may be applied between each of them.

[0074] 2 shows a case where each of the first surplus bit 21 and the second surplus bit 22 is combined with the representation bit 10, but the second surplus bit 22 may be combined with the first surplus bit 21. A calculation model 101 shown in FIG 9 is a modified example of the calculation model according to this embodiment.

[0075] 9 is combined with the first surplus bit 21. 12 ~y 52is the variable y of the first surplus bit 21 to be combined. 11 ~y 51 The certain rule can be incorporated into the energy function by setting a forcing force F between the first surplus bit 21 and the second surplus bit 22.

[0076] 10, the calculation model 102 may not have the second surplus bit 22. The calculation model 102 shown in FIG. 10 is a modified example of the calculation model according to this embodiment. The calculation model 102 has the first surplus bit 21, and therefore can detect errors. The calculation model 102 cannot correct errors, but if error correction is performed by another means, or if there is a provision for initializing the calculation when an error is detected, the calculation model 102 may not have a function for correcting errors.

[0077] The characteristic configurations of the above-described embodiments and modifications can be appropriately combined. [Explanation of symbols]

[0078] 10...Representation bits 21…First excess bit 22…Second surplus bit 100, 101, 102... Calculation model S1: Optimization process S2: Error detection process S3…Correction process S4…Recalculation process x1~x5, y 11 ~y 51 , y 12 ~y 52 variable

Claims

1. A computational program executed by an Ising machine specialized for an Ising model or QUBO or a general-purpose information processing device, the calculation program includes an operation program and a detection program, The calculation program instructs the Ising machine or the general-purpose information processing device to perform a calculation using a calculation model, The computation model is an Ising model or a computation model applicable to QUBO, and has a plurality of representation bits and a first surplus bit; each of the plurality of representation bits is a binary variable; the plurality of representation bits represent respective options in a combinatorial optimization problem; the first redundant bit is combined with any one of the plurality of representation bits; The detection program instructs the Ising machine or the general-purpose information processing device to compare the first surplus bit with a representation bit combined with the first surplus bit and detect an error. A calculation program.

2. The first redundant bits are multiple, The computer program product according to claim 1 , wherein each of the first redundant bits is combined with any one of the plurality of representation bits.

3. The computer program product according to claim 1 , further comprising a representation bit to which the first redundant bit is combined or a second redundant bit to which the first redundant bit is combined.

4. The computer program product according to any one of claims 1 to 3, wherein the plurality of representation bits represent the options as a one-hot representation.

5. 5. The computer program product according to claim 1, wherein the plurality of representation bits represent the options in binary.

6. 4. The computer program according to claim 3, further comprising a correction program that instructs the Ising machine or the general-purpose information processing device to correct the error based on values ​​of the first surplus bits, the second surplus bits, and the representation bits.

7. An information processing method, comprising causing an Ising machine specialized for an Ising model or QUBO, or a general-purpose information processing device with general-purpose capabilities, to execute a computational program described in any one of claims 1 to 6.

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