Method for manufacturing electronic component device

Abstract

To provide a method capable of efficiently manufacturing an electronic component device while suppressing a decrease in yield even when the electronic component device having fine rewiring is manufactured.SOLUTION: A manufacturing method of an electronic component device includes the steps of preparing an encapsulation structure that includes an encapsulation layer with two opposing main surfaces, an electronic component, and a connection portion, and in which the connection portion is exposed on the circuit surface which is one of the main surfaces of the sealing layer, preparing a rewiring structure having a rewiring portion having two opposing main surfaces and a plurality of bumps, and bonding the sealing structure and the rewiring structure to each other with the circuit surface and the plurality of bumps facing each other with an insulating adhesive layer interposed therebetween, such that the sealing structure and the rewiring structure are connected to each other.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing an electronic component device, and to an electronic component device. [Background technology]

[0002] As a method for manufacturing a semiconductor package having multiple semiconductor chips, a method is known in which semiconductor chips are arranged on a carrier substrate, the semiconductor chips are sealed, and then the carrier substrate is peeled off (for example, Patent Document 1). In this method, following the peeling off of the carrier substrate, rewiring connected to the semiconductor chips is formed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2018 / 0366407 Summary of the Invention [Problem to be solved by the invention]

[0004] One aspect of the present invention provides a method that enables efficient manufacture of electronic component devices while suppressing a decrease in yield, even in the case of manufacturing electronic component devices having fine rewiring. [Means for solving the problem]

[0005] One aspect of the present invention relates to a method for manufacturing an electronic component device, the method comprising the steps of: preparing a sealing structure including a sealing layer having two opposing main surfaces, an electronic component sealed in the sealing layer, and a connection portion connected to the electronic component, the connection portion being exposed to a circuit surface which is one of the main surfaces of the sealing layer; preparing a rewiring structure including a rewiring portion having two opposing main surfaces and a plurality of bumps provided on one of the main surfaces of the rewiring portion, the rewiring portion including rewirings connected to the plurality of bumps, and an insulating layer; and adhering the sealing structure and the rewiring structure with an insulating adhesive layer interposed therebetween, in an orientation in which the circuit surface and the plurality of bumps face each other, so that the connection portion and at least a portion of the plurality of bumps are connected, thereby forming an electronic component device in which the sealing structure and the rewiring structure are connected.

[0006] Another aspect of the present invention relates to an electronic component device including the sealing structure, the rewiring structure, and the insulating adhesive layer, the sealing structure and the rewiring structure being bonded together with the circuit surface and the bumps facing each other, with the insulating adhesive layer interposed therebetween, so that the connection portions and at least some of the bumps are connected, thereby connecting the sealing structure and the rewiring structure. Effect of the Invention

[0007] In the method according to one aspect of the present invention, a sealing structure having electronic components sealed in a sealing layer and a rewiring structure having rewiring are separately prepared. Therefore, it is easier to form fine rewiring with high precision on a structure including electronic components sealed in a sealing layer than when rewiring is formed while ensuring connection with the electronic components. In addition, it is possible to manufacture electronic component devices by selecting good sealing structures and rewiring structures, which is also excellent in terms of yield. [Brief description of the drawings]

[0008] [Figure 1] 1A to 1C are process diagrams illustrating an embodiment of a method for manufacturing an electronic component device. [Diagram 2] 1A to 1C are process diagrams illustrating an embodiment of a method for manufacturing an electronic component device. [Diagram 3] 1A to 1C are process diagrams illustrating an embodiment of a method for manufacturing an electronic component device. [Figure 4] 1A to 1C are process diagrams illustrating an embodiment of a method for manufacturing an electronic component device. [Diagram 5] 1A to 1C are process diagrams illustrating an embodiment of a method for manufacturing an electronic component device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, several embodiments of the present invention will be described in detail. However, the present invention is not limited to the following embodiments.

[0010] 1, 2, 3, 4, and 5 are process diagrams showing an embodiment of a method for manufacturing an electronic component device including a plurality of electronic components including an IC chip and a chip-type passive component. The method illustrated in Figs. 1 to 5 includes a step of preparing a sealing structure 50 (Figs. 1 and 2) including a sealing layer 5 having two opposing main surfaces, electronic components (IC chips 41A, 42A and chip-type passive components 31, 32) sealed in the sealing layer 5, and connection parts (bumps 41B, 42B and conductive patterns 21, 22) connected to the electronic components, the connection parts (bumps 41B, 42B and conductive patterns 21, 22) being exposed on a flat circuit surface CS which is one main surface of the sealing layer 5, and a step of forming a carrier including a rewiring portion 6 having two opposing main surfaces and a plurality of bumps 63 provided on one main surface 6S of the rewiring portion 6. The method mainly comprises the steps of preparing a rewiring structure 60 fixed on a substrate 1B (FIG. 3), bonding the sealing structure 50 and the rewiring structure 60 with an insulating adhesive layer 70 interposed therebetween with the circuit surface CS and the bumps 63 facing each other, thereby connecting the sealing structure 50 and the rewiring structure 60 (FIG. 4(i) and (j)), forming a conductive shielding film 23 that covers the portion of the outer surface of the sealing structure 50 connected to the rewiring structure 60 that is not in contact with the insulating adhesive layer 70 (FIG. 4(k)), and peeling off the carrier substrate 1B from the rewiring structure 60 connected to the sealing structure 50 (FIG. 5(l)).

[0011] 1 and 2 show an example of a process for preparing a sealing structure 50. In this example, first, a composite carrier substrate 1A shown in Fig. 1(a) is prepared. The composite carrier substrate 1A includes a support 11, a temporary fixing material layer 13, and a curable adhesive layer 15. The temporary fixing material layer 13 and the adhesive layer 15 are laminated in this order on the support 11.

[0012] The support 11 may have a strength and rigidity sufficient to support the electronic components, and the material is not particularly limited. For example, the support 11 may be a silicon wafer, a glass plate, or a stainless steel plate. The thickness of the support 11 is not particularly limited, and may be, for example, 200 to 2000 μm. An alignment mark 25 for positioning the electronic components may be provided on the surface of the temporary fixing material layer 13 on the adhesive layer 15 side, or on the surface of the support 11 on the temporary fixing material layer 13 side. The alignment mark 25 can be formed using any material such as metal or resin. When the alignment mark 25 is provided, the temporary fixing material layer 13 and / or the adhesive layer 15 may be transparent to such an extent that the alignment mark 25 can be visually recognized.

[0013] The adhesive layer 15 includes a curable adhesive that irreversibly adheres to an adherend after curing. The thickness of the adhesive layer 15 may be, for example, 1 to 50 μm. The curable adhesive forming the adhesive layer 15 may be selected from those known as adhesives for semiconductors (see, for example, International Publication No. 2017 / 073630 and Japanese Patent No. 3117971).

[0014] The curable adhesive forming the adhesive layer 15 contains, for example, a thermosetting resin and its curing agent. The thermosetting resin is a compound that can form a crosslinked structure by heating. The thermosetting resin may have a molecular weight of 10,000 or less. Examples of the thermosetting resin include epoxy resin and acrylic resin. The curing agent is a compound that reacts with the thermosetting resin to form a crosslinked structure together with the thermosetting resin. Examples of the curing agent include a phenol resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, a phosphine-based curing agent, an azo compound, and an organic peroxide. The curable adhesive may further contain other components such as a thermoplastic resin and a filler (e.g., silica).

[0015] The temporary fixing material layer 13 has releasability to such an extent that it can be peeled off from the adhesive layer 15 after curing. The thickness of the temporary fixing material layer 13 may be, for example, 1 to 100 μm. The material forming the temporary fixing material layer 13 can be selected from materials used for the purpose of temporary fixing or temporary adhesion in the manufacture of electronic component devices (see, for example, International Publication No. 2017 / 057355).

[0016] The composite carrier substrate 1A can be obtained, for example, by a method of sequentially forming a temporary fixing material layer 13 and an adhesive layer 15 on a support 11. The film-like temporary fixing material layer 13 and adhesive layer 15 (adhesive film) may be prepared separately and laminated in order by thermocompression. At this time, the film-like temporary fixing material layer 13 and adhesive layer 15 may be laminated under reduced pressure from the viewpoint of preventing entrapment of air bubbles. Alternatively, a laminate film having the temporary fixing material layer 13 and adhesive layer 15 may be prepared in advance and laminated on the composite carrier substrate 1A.

[0017] 1A shows a process of arranging conductor precursors 21a, 22a for forming a conductive pattern on the adhesive layer 15 of the prepared composite carrier substrate 1A. The patterns of the conductor precursors 21a, 22a include portions for forming connection parts to which passive components described below are connected. The conductor precursors 21a, 22a can be arranged on the adhesive layer 15 by a printing method such as screen printing.

[0018] The conductor precursors 21a, 22a may be ones that are cured by heating to form a conductor, and may be arbitrarily selected from conductor precursors commonly used by those skilled in the art. For example, the conductor precursors 21a, 22a may be a curable conductive paste containing conductive particles such as various metal particles or carbon particles. The conductive paste may be a transitional liquid phase sintering type metal adhesive containing metal particles capable of transitional liquid phase sintering. By sintering the transitional liquid phase sintering type metal adhesive, a plurality of metal particles are fused together, thereby forming a conductor including a metal sintered body. Here, "transient liquid phase sintering" is also called TLPS, and generally refers to sintering that proceeds by the transition to a liquid phase by heating at the particle interface of a low melting point metal, and the reactive diffusion of a high melting point metal into the formed liquid phase. According to the transitional liquid phase sintering, the melting point of the formed metal sintered body can exceed the heating temperature for sintering. When the electrical conductivity as a connection part is formed by heating at a low temperature, the temporary fixing material layer 13 tends to be particularly easily peeled off from the adhesive layer 15.

[0019] The plurality of metallic particles capable of transient liquid phase sintering may include a combination of a high melting point metal and a low melting point metal, the plurality of metallic particles may include separate first metallic particles including a high melting point metal particle and a second metallic particle including a low melting point metal, or the high melting point metal and the low melting point metal may be included in a single metallic particle.

[0020] When the conductor precursor contains multiple metal particles capable of transitional liquid phase sintering, the conductor precursor can be heated to a temperature equal to or higher than the liquid phase transition temperature of the multiple metal particles to form the conductive patterns 21, 22. The liquid phase transition temperature can be measured by DSC (Differential Scanning Calorimetry) under conditions of heating the multiple metal particles from 25°C to 300°C at a heating rate of 10°C / min under a nitrogen gas flow of 50 ml / min. When the metal particles contain multiple metals, the liquid phase transition temperature observed at the lowest temperature is considered to be the liquid phase transition temperature of the metal particles. For example, the liquid phase transition temperature of a Sn-3.0Ag-0.5Cu alloy is 217°C.

[0021] When the multiple metal particles capable of transient liquid phase sintering include a combination of first metal particles including a high melting point metal and second metal particles including a low melting point metal, the mass ratio of the first metal particles to the second metal particles may be 2.0 to 4.0, or 2.2 to 3.5.

[0022] Metal particles containing a metal with a high melting point and a metal with a low melting point can be obtained, for example, by forming a layer containing one metal on the surface of a metal particle containing the other metal by plating, vapor deposition, etc. Metal particles containing one metal and metal particles containing the other metal may be composited by collision or the like.

[0023] The high melting point metal may be at least one selected from the group consisting of Au, Cu, Ag, Co and Ni. The low melting point metal may be In, Sn or a combination thereof. Examples of combinations of high melting point metals and low melting point metals include a combination of Au and In, a combination of Cu and Sn, a combination of Ag and Sn, a combination of Co and Sn, and a combination of Ni and Sn.

[0024] The combination of Cu and Sn produces a copper-tin metal compound (Cu6Sn5) by sintering. This reaction proceeds at around 250°C, so a conductor precursor containing a combination of Cu and Sn can be sintered by heating using common equipment such as a reflow furnace. Sn can be contained in the metal particles as simple Sn metal or as an alloy containing Sn. An example of an alloy containing Sn is an Sn-3.0Ag-0.5Cu alloy. The Sn-3.0Ag-0.5Cu alloy contains 3.0% by mass of Ag and 0.5% by mass of Cu based on the mass of the alloy.

[0025] The content of the metal particles in the conductor precursor may be 80 mass % or more, 85 mass % or more, or 88 mass % or more, or 98 mass % or less, based on the mass of the conductor precursor. When the conductor precursor contains a solvent described below, the content here is a ratio based on the total mass of components other than the solvent.

[0026] The average particle size of the metal particles may be 0.5 μm to 80 μm, 1 μm to 50 μm, or 1 μm to 30 μm. The average particle size here refers to the volume average particle size measured by a laser diffraction particle size distribution analyzer (for example, Beckman Coulter, Inc., LS 13 320 type laser scattering diffraction particle size distribution analyzer).

[0027] The organic binder in the conductor precursor may contain a thermoplastic resin. The thermoplastic resin may have a softening point lower than the liquid phase transition temperature of the metal particles. The softening point of the thermoplastic resin refers to a value measured by thermomechanical analysis. The softening point measured by thermomechanical analysis is the temperature at which a displacement of 80 μm is observed when a 100 μm thick film obtained by forming a thermoplastic resin film is compressed in the thickness direction with a stress of 49 mN while being heated at a heating rate of 10° C. / min. As a measuring device, for example, a thermomechanical analyzer (TMA8320, manufactured by Rigaku Corporation, measuring probe: standard type for compression loading method) is used.

[0028] The softening point of the thermoplastic resin may be at least 5° C. lower, at least 10° C. lower, or at least 15° C. lower than the liquid phase transition temperature of the metal particles. The softening point of the thermoplastic resin may be at least 40° C., at least 50° C., or at least 60° C.

[0029] The thermoplastic resin may include at least one selected from the group consisting of polyamide resin, polyamideimide resin, polyimide resin, and polyurethane resin. The thermoplastic resin may include a polyoxyalkylene group or a polysiloxane group. The polyoxyalkylene group may be a polyoxyethylene group, a polyoxypropylene group, or a combination thereof.

[0030] The thermoplastic resin may be at least one resin selected from the group consisting of polyamide resins, polyamideimide resins, polyimide resins, and polyurethane resins, each of which contains a polyoxyalkylene chain or a polysiloxane chain. For example, a diamine compound having a polyoxyalkylene group or a polysiloxane group, or a diol compound having a polyoxyalkylene group or a polysiloxane group, can be used as a monomer to introduce a polyoxyalkylene group or a polysiloxane group into these resins.

[0031] The content of the thermoplastic resin in the conductor precursor may be 5 to 30 mass %, 6 to 28 mass %, or 8 to 25 mass % based on the mass of the conductor precursor, where, when the conductor precursor contains a solvent described below, the content is a ratio based on the total mass of components other than the solvent.

[0032] The organic binder may contain a solvent, or may contain a solvent and a thermoplastic resin. The solvent may be a polar solvent. The boiling point of the solvent may be 200°C or higher and 300°C or lower.

[0033] Examples of the solvent include alcohols such as terpineol, stearyl alcohol, tripropylene glycol methyl ether, diethylene glycol, diethylene glycol monoethyl ether (ethoxyethoxyethanol), diethylene glycol monohexyl ether, diethylene glycol monomethyl ether, dipropylene glycol-n-propyl ether, dipropylene glycol-n-butyl ether, tripropylene glycol-n-butyl ether, 1,3-butanediol, 1,4-butanediol, propylene glycol phenyl ether, and 2-(2-butoxyethoxy)ethanol; esters such as tributyl citrate, γ-butyrolactone, diethylene glycol monoethyl ether acetate, dipropylene glycol methyl ether acetate, diethylene glycol monobutyl ether acetate, and glycerin triacetate; ketones such as isophorone; lactams such as N-methyl-2-pyrrolidone; nitriles such as phenylacetonitrile; 4-methyl-1,3-dioxolan-2-one; and sulfolane. The solvents may be used alone or in combination of two or more.

[0034] The content of the solvent may be 0.1 to 10 mass %, 2 to 7 mass %, or 3 to 5 mass % based on the mass of the conductor precursor.

[0035] The organic binder in the conductor precursor may further contain other components such as a thermosetting resin, a rosin, an activator, a thixotropic agent, and the like.

[0036] Examples of the thermosetting resin include epoxy resin, oxazine resin, bismaleimide resin, phenol resin, unsaturated polyester resin and silicone resin. Examples of the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, naphthalene type epoxy resin, biphenol type epoxy resin, biphenyl novolac type epoxy resin and cyclic aliphatic epoxy resin.

[0037] Examples of rosins include dehydroabietic acid, dihydroabietic acid, neoabietic acid, dihydropimaric acid, pimaric acid, isopimaric acid, tetrahydroabietic acid, and palustric acid.

[0038] Examples of activators include aminodecanoic acid, pentane-1,5-dicarboxylic acid, triethanolamine, diphenylacetic acid, sebacic acid, phthalic acid, benzoic acid, dibromosalicylic acid, anisic acid, iodosalicylic acid, and picolinic acid.

[0039] Examples of thixotropic agents include 12-hydroxystearic acid, 12-hydroxystearic acid triglyceride, ethylene bisstearic acid amide, hexamethylene bisoleic acid amide, and N,N'-distearyl adipic acid amide.

[0040] The conductor precursor can be obtained by mixing metal particles with the components constituting the organic binder. The mixing device may be, for example, a three-roll mill, a planetary mixer, a planetary mixer, a rotation-revolution type agitator, a mortar mixer, a twin-screw kneader, or a thin-layer shear disperser.

[0041] 1(b) shows a process of mounting two types of chip-type passive components 31 and 32, which are electronic components, on the conductor precursors 21a and 22a, respectively. The passive components 31 and 32 are selected according to the design of the electronic device, and may be, for example, resistors, capacitors, or a combination of these. The passive components 31 and 32 can be mounted on the conductor precursors 21a and 22a using a normal chip mounting machine.

[0042] FIG. 1(c) shows a process of placing a chip component 41 having an IC chip 41A as an electronic component and a chip component 42 having an IC chip 42A as an electronic component on an adhesive layer 15. A plurality of bumps 41B or 42B are arranged on one main surface side of the IC chip 41A or IC chip 42A. The chip components 41 and 42 having the IC chips 41A and 42A and the bumps 41B and 42B are so-called face-down type chip components. The IC chips 41A and 42A are arranged on the adhesive layer 15 with the bumps 41B or 42B functioning as connecting parts facing the adhesive layer 15. The tips of the bumps 41B and 42B may be partially embedded in the adhesive layer 15. Usually, the chip components 41 and 42 are arranged on the adhesive layer 15 with the IC chips 41A and 42A and the adhesive layer 15 separated from each other. The chip components 41 and 42 can be placed on the adhesive layer 15 using, for example, a chip mounting machine having a stage and a mounting head. By adjusting the conditions of the temperature, pressure, and the like of the stage and the mounting head, it is possible to embed a part of the tip portions of the bumps 41B and 42B in the adhesive layer 15.

[0043] The order in which the passive components 31, 32 and the chip components 41, 42 are arranged on the adhesive layer 15 can be changed arbitrarily. After the passive components 31, 32 and the chip components 41, 42 are arranged on the adhesive layer 15, the adhesive layer 15 is cured. When the passive components 31, 32 and the chip components 41, 42 are arranged on the adhesive layer 15, the adhesive layer 15 may be in a B stage. The adhesive layer 15 is often cured by heating. The cured adhesive layer 15 firmly fixes the passive components 31, 32 and the IC chips 41A, 42A to the composite carrier substrate 1A. At the same time as or after the curing of the adhesive layer 15, the conductive precursors 21a, 22a on which the passive components 31, 32 are placed are heated to form the conductive patterns 21, 22, which are the cured bodies of the conductive precursors 21a. As a result, the passive components 31, 32 are fixed in place with the conductive patterns 21, 22 interposed between the passive components 31, 32 and the adhesive layer 15 as connection portions.

[0044] FIG. 2(d) shows a process of forming a sealing layer 5 for sealing the IC chips 41A, 42A and the passive components 31, 32 on the adhesive layer 15. The sealing layer 5 is formed so as to cover the entire IC chips 41A, 42A and the passive components 31, 32 and also fill the gap between these electronic components and the adhesive layer 15. However, the gap does not have to be completely filled. The sealing layer 5 can be formed in a mold, for example, by a compression or transfer molding machine. Alternatively, the sealing layer 5 may be formed using a film-like sealing material (see, for example, International Publication No. WO 2015 / 186744). In that case, the film-like sealing material may be laminated under reduced pressure from the viewpoint of preventing the entrapment of air bubbles.

[0045] FIG. 2(e) shows a process of obtaining a sealing structure 50 having the adhesive layer 15, the passive components 31 and 32, the IC chips 41A and 42A, and the sealing layer 5 by peeling the temporary fixing material layer 13 from the adhesive layer 15. The adhesive layer 15 is the top layer on one main surface of the sealing structure 50. The temporary fixing material layer 13 can be peeled off from the adhesive layer 15 by, for example, heating, light irradiation, or mechanical peeling. A part of the adhesive layer 15 may be separated and removed together with the temporary fixing material layer 13. In this way, when a composite electronic component device having a plurality of electronic components different in size and height is manufactured by forming the sealing layer 5 in a state in which a plurality of electronic components such as an IC chip and a passive component are temporarily fixed on the temporary fixing material layer 13, and then peeling off the temporary fixing material layer 13, it is expected that the so-called die shift, in which the electronic components move from a predetermined position, can be suppressed.

[0046] The width of the passive components 31, 32 may be 0.05 to 2 mm, 1 to 2 mm, 0.5 to 1 mm, or 0.1 to 0.5 mm. The width of the IC chips 41A, 42A may be 0.1 to 50 mm. The width here means the maximum width in the direction parallel to the circuit surface CS. According to the method of this embodiment, even if the passive components and the IC chip are small in size, these components can be fixed with sufficient strength.

[0047] 2(f) shows a process of grinding the sealing structure 50 from the adhesive layer 15 side to remove the adhesive layer 15, thereby forming a circuit surface CS in which the sealing layer 5 and the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) are exposed. Grinding the sealing structure 50 can be performed using a normal grinding device. Parts of the sealing layer 5, the conductive patterns 21, 22, and the bumps 41B, 42B may be ground.

[0048] Fig. 3 shows an example of a process for preparing a rewiring structure 60. In this example, first, a carrier substrate 1B shown in Fig. 3(g) is prepared. The carrier substrate 1B includes a support 11 and a temporary fixing material layer 13 provided on the support 11. The support 11 and the temporary fixing material layer 13 of the carrier substrate 1B can have the same configuration as the support 11 and the temporary fixing material layer 13 of the composite carrier substrate 1A.

[0049] A rewiring section 6 having two opposing main surfaces is formed on the prepared carrier base material 1B. The rewiring section 6 has rewirings 61 and an insulating layer 62 provided between the rewirings 61. The rewirings 61 include a multi-layer wiring layer 61a extending in a direction parallel to the main surface of the rewiring section 6, and a connecting section 61b extending in a direction perpendicular to the main surface of the rewiring section 6. The thickness of each wiring layer 61a is not particularly limited, but may be, for example, 1 to 30 μm. The rewiring section 6 can be formed by a normal method known to those skilled in the art. For a method of forming a rewiring section including rewirings, for example, Japanese Patent No. 5494766 can be referred to.

[0050] 3(h), a plurality of bumps 63 connected to the rewiring 61 are formed on the main surface 6S of the formed rewiring portion 6 opposite to the carrier substrate 1B. The bumps 63 have, for example, a columnar portion 63a in contact with the rewiring 61 and a hemispherical portion 63b provided on the columnar portion 63a. The columnar portion 63a may be formed of copper, and the hemispherical portion 63b may be formed of lead-free solder (for example, an alloy containing Sn and Ag). The size of the bumps 63 is adjusted within a range in which an appropriate connection with the rewiring 61 is ensured. For example, the width of the bumps 63 may be 5 to 100 μm, and the height of the bumps 63 may be 5 to 50 μm. The bumps 63 can be formed by a normal method.

[0051] The prepared rewiring structure 60 may be inspected. The inspection includes checking for abnormalities due to, for example, breaks or shorts in the rewirings 61 and the bumps 63. This inspection makes it possible to eliminate defective rewiring structures 60 before the rewiring structure 60 is connected to the encapsulation structure 50. As a result, it is possible to reduce the possibility that normal electronic components are rejected due to defects in the formation of rewirings, as compared to the case where rewirings are formed directly on electronic components encapsulated in an encapsulation layer.

[0052] 4 shows an example of a process in which the prepared sealing structure 50 and the rewiring structure 60 are connected with an insulating adhesive layer 70 interposed therebetween. In the case of the example shown in FIG. 4, the insulating adhesive layer 70 is first arranged on the circuit surface CS of the sealing structure 50. The insulating adhesive layer 70 can be the same as a semiconductor adhesive that is usually used to adhere a semiconductor chip or the like to a circuit board. The insulating adhesive layer 70 may contain a curable adhesive similar to the adhesive layer 15.

[0053] A laminate film having a support film and an insulating adhesive layer provided on the support film may be prepared, and the insulating adhesive layer may be laminated on the circuit surface CS. Examples of commercially available laminate films that can be used for this purpose include the NCF AK series manufactured by Hitachi Chemical Co., Ltd.

[0054] Next, the sealing structure 50 and the rewiring structure 60 are bonded together with the insulating adhesive layer 70 interposed therebetween, with the circuit surface CS facing the bumps 63. At this time, the sealing structure 50 and the rewiring structure 60 are aligned so that the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) are connected to some of the bumps 63. The sealing structure 50 and the rewiring structure 60 may be bonded together while being heated and pressurized in order to connect the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) to the bumps 63, to harden the insulating adhesive layer 70, or to both of these. The heating temperature may be, for example, 250 to 300°C, and the pressure may be 0.5 to 1 MPa. The sealing structure 50 and the rewiring structure 60 are connected together by connecting the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) to some of the bumps 63. In this specification, the term "connected" may mean "electrically connected."

[0055] The process of connecting the sealing structure 50 and the rewiring structure 60 may include a preliminary pressure bonding step of preliminarily connecting the sealing structure 50 and the rewiring structure 60 so that the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) and at least some of the bumps 63 are in contact with each other by heating the sealing structure 50 and the rewiring structure 60 at a temperature lower than the melting point of the bumps 63, and a main pressure bonding step of joining the connection parts (the conductive patterns 21, 22 and the bumps 41B, 42B) and at least some of the bumps 63 by heating the sealing structure 50 and the rewiring structure 60 at a temperature higher than the melting point of the bumps 63 and applying pressure thereto. In the case of such two-step thermocompression bonding, the sealing structure 50 and the rewiring structure 60 are electrically connected by the main pressure bonding. In the preliminary pressure bonding, for example, the heating temperature may be 80 to 130° C. and the pressure may be 0.5 to 1 MPa. In the final pressure bonding, for example, the heating temperature may be 250 to 300°C and the pressure may be 0.5 to 1 MPa. When the bump 63 is composed of two or more metal layers, the melting point of the bump 63 for determining the heating temperature for the temporary pressure bonding and the final pressure bonding may be the melting point of the metal layer in contact with the connection portion (semispherical portion 63b in the example of FIG. 3). The insulating adhesive layer 70 may be cured during the temporary pressure bonding, the final pressure bonding, or both.

[0056] When the above-mentioned two-stage thermocompression bonding is applied, the melt viscosity of the insulating adhesive layer 70 may be 7000 Pa·s or less, 6000 Pa·s or less, 5000 Pa·s or less, or 4000 Pa·s or less at the heating temperature of the temporary compression bonding. This can particularly effectively suppress the inclusion of voids. The melt viscosity of the insulating adhesive layer 70 may be 1000 Pa·s or more at the heating temperature of the temporary compression bonding. This makes it difficult for a part of the insulating adhesive layer 70 to creep up to the side surface of the sealing structure 50. The creeping up of the insulating adhesive layer may cause a decrease in productivity due to adhesion to the compression tool, etc. The melt viscosity of the insulating adhesive layer 70 can be measured, for example, using a rheometer (MCR301, manufactured by Anton Paar Japan Co., Ltd.). The melt viscosity can be measured using a disposable plate with a diameter of 8 mm and a disposable sample dish under the conditions of a sample thickness of 400 μm, a heating rate of 10 ° C. / min, and a frequency of 1 Hz.

[0057] The insulating adhesive layer 70 may contain a filler. By controlling the viscosity and physical properties after curing using the filler, it is possible to suppress the generation of voids and moisture absorption between the sealing structure 50 and the rewiring structure 60. The filler may be an inorganic filler, a resin filler, or a combination thereof. The content of the filler may be 30 to 90 mass% based on the mass of the insulating adhesive layer 70. When the content of the filler is 30 mass% or more, the heat dissipation property of the insulating adhesive layer 70 is improved, and the generation of voids and the moisture absorption rate can be further suppressed. When the content of the filler is 90 mass% or less, the biting (trapping) of the filler into the connection portion can be suppressed, so that the connection reliability tends to be further improved. From the same viewpoint, the content of the filler may be 40 to 80 mass%.

[0058] 4, the area of ​​the main surface of the rewiring portion 6 is larger than the area of ​​the main surface of the sealing layer 5, so that when the rewiring structure 60 is connected to the sealing structure 50, the rewiring portion 6 protrudes outward from the end 50E of the sealing structure 50. In addition, a bump 63 may be disposed on a portion of the main surface 6S of the rewiring portion 6 on the sealing structure 50 side that protrudes outward from the end 50E of the sealing structure 50.

[0059] 4(k), a conductive shielding film 23 is formed to cover a portion of the outer surface of the sealing structure 50 connected to the rewiring structure 60 that is not in contact with the insulating adhesive layer 70. Here, the shielding film 23 also covers a portion of the main surface 6S of the rewiring portion 6 that protrudes outward from the end 50E of the sealing structure 50. As a result, the shielding film 23 is connected to a bump 63 arranged outside the end 50E of the sealing structure 50.

[0060] The shielding film 23 is provided mainly for the purpose of electromagnetic wave shielding. The shielding film 23 may be a single-layer or multi-layer metal thin film, which may be formed by a method such as sputtering or vapor deposition. The shielding film 23 may be formed using the same conductive precursor as the conductive pattern 21.

[0061] 5(l) shows an example of a step of peeling the carrier substrate 1B from the rewiring structure 60 connected to the sealing structure 50. The temporary fixing material layer 13 of the carrier substrate 1B can be peeled from the rewiring portion 6 by, for example, heating, light irradiation, or mechanical peeling.

[0062] The carrier base 1B may be easily peeled off from the rewiring structure 60 after being heated to a temperature equal to or higher than the melting point of the bump 63 (for example, typically 250 ° C. or higher when the bump 63 contains lead-free solder) in order to connect the sealing structure 50 and the rewiring structure 60. For this purpose, the temporary fixing material layer may be peelable, for example, by light irradiation, and examples thereof include a temporary fixing material layer containing a polybenzoxazole resin or a polybenzimidazole resin (see, for example, JP 2018-22763 A), and a temporary fixing material layer containing a polyimide resin (see, for example, JP 2020-50734 A). Alternatively, the temporary fixing material layer may be mechanically peelable, and examples thereof include a single carbon layer (see, for example, JP 47544022 A), and a composite layer consisting of a carbon layer and a metal layer (see, for example, JP 4726855 A and JP 6546526 A).

[0063] After the carrier base 1B is peeled off, as shown in (m) of Fig. 5, solder balls 7 to be connected to the rewiring 61 may be provided on the main surface of the rewiring portion 6 opposite to the sealing structure 50. The solder balls 7 are used as connection terminals for secondary mounting. Reflow is performed as necessary.

[0064] The method exemplified above provides the electronic component device 100. The electronic component device 100 is mainly composed of the sealing structure 50, the rewiring structure 60, and the insulating adhesive layer 70 that is interposed between the sealing structure 50 and the rewiring structure 60 and bonds them together.

[0065] The method for manufacturing the electronic component device is not limited to the above-described example, and can be modified as necessary. For example, rewiring parts corresponding to a plurality of electronic component devices may be formed on one large-area carrier substrate, and a separately prepared sealing structure may be bonded thereto. In this case, a plurality of sealing structures may be formed on one composite carrier substrate, and the plurality of sealing structures and the plurality of rewiring parts may be connected together, and the resulting connection body may be divided into individual electronic component devices. EXAMPLES

[0066] Hereinafter, an example in which an electronic component device was manufactured by applying a method according to an embodiment of the present invention will be described, although the present invention is not limited to this example.

[0067] 1. Adhesive film 60 parts by mass of ethoxylated isocyanuric acid triacrylate (Shin-Nakamura Chemical Co., Ltd., A-9300), 15 parts by mass of silica filler (Admatechs Co., Ltd., SE2050, average particle size: 0.5 μm), 15 parts by mass of silica filler surface-treated with epoxysilane (Admatechs Co., Ltd., SE2050SEJ, average particle size: 0.5 μm), 30 parts by mass of methacrylic surface-treated nanosilica filler (Admatechs Co., Ltd., YA050CSM, average particle size: about 50 nm), and 10 parts by mass of resin filler (Rohm and Haas Japan Co., Ltd., EXL-2655: core-shell type organic fine particles) were added to methyl ethyl ketone as a solvent to obtain a mixture with a total concentration of components other than the solvent of 60% by mass. Beads were added to this mixture, and it was stirred for 30 minutes with a bead mill (Fritsch Japan Co., Ltd., planetary fine grinder P-7). Thereafter, 60 parts by mass of phenoxy resin (ZX1356, manufactured by Tohto Kasei Co., Ltd., Tg: about 71°C, weight average molecular weight: about 63000) was added to the mixture, and the mixture was stirred again for 30 minutes with a bead mill. Next, 2 parts by mass of dicumyl peroxide (Percumyl D, manufactured by NOF Corporation) was added, and the mixture was further stirred. The beads were removed from the stirred mixture by filtration to obtain a varnish. The obtained varnish was applied to a support film, and the coating was dried to form an adhesive film with a thickness of 20 μm.

[0068] 2. Fabrication of Encapsulation Structure A carrier substrate ("HRDP" manufactured by Mitsui Mining & Smelting Co., Ltd., width 12 inches, thickness 1.1 mm) having a glass plate as a support and a temporary fixing material layer (peeling layer) formed on the glass plate was prepared. A photosensitive resin film ("RD1215" manufactured by Hitachi Chemical Co., Ltd., thickness 15 μm) was laminated on the temporary fixing material layer of this carrier substrate, and this was exposed to light in a predetermined pattern and developed to form an alignment mark for aligning the passive components and the semiconductor chip. Next, the above-mentioned adhesive film was laminated on the temporary fixing material layer to form an adhesive layer. A conductive paste ("SP-1000" manufactured by Hitachi Chemical Co., Ltd.) was printed on the adhesive layer to form a pad as a precursor of a connection part for mounting a passive component with a thickness of 60 μm. On the pad, a 0Ω resistor component ("ERJXGN0R00Y" manufactured by Panasonic Corporation) having a size of W0.4mm×D0.2mm×H0.13mm and a 0Ω resistor component ("ERJ1GN0R00C" manufactured by Panasonic Corporation) having a size of W0.6mm×D0.3mm×H0.23mm were mounted as passive components. Next, 256 chip components ("CC80" manufactured by Waltz Corporation) having a size of W7.3mm×D7.3mm×H0.2mm and copper bumps with a height of 40μm as connecting parts were placed at predetermined positions on the adhesive layer. The obtained structure was heated in an oven at 175°C for 2 hours to harden the adhesive layer, and then heated in a refurbishment furnace at a maximum temperature of 265°C to harden the conductive paste and form the connecting parts. Next, a 0.5 mm thick sealing layer for sealing the passive components and chip components on the adhesive layer was formed by compression molding using a solid sealing material (Hitachi Chemical Co., Ltd.'s "CEL-400ZHF40-F1G"). The carrier substrate was peeled off from the adhesive layer, and the adhesive layer was ground until a circuit surface was formed on which the passive components and the connection parts of the semiconductor chip were exposed, to obtain a sealing structure. The die shift amount (deviation from the design value of the mounting position) in the obtained sealing structure was 2.7 μm in the X direction and 1.6 μm in the Y direction, on average for 256 chip components.

[0069] 3. Fabrication of Rewiring Structure A two-layer rewiring layer with a copper pad on the surface was formed on the temporary fixing material layer of the same carrier base material as that used to fabricate the sealing structure by a method including forming an insulating layer by exposure and development of a photosensitive insulating resin (Hitachi Chemical Co., Ltd. "AH3000"), and forming rewiring by copper sputtering and plating. A bump was formed by forming copper plating (height 10 μm) and tin-silver solder plating (height 15 μm) in that order on the copper pad of the rewiring layer.

[0070] 4. Connection between sealing structure and rewiring structure An insulating adhesive layer ("AK1220" manufactured by Hitachi Chemical Co., Ltd.) was laminated on the circuit surface of the sealing structure. The sealing structure was cut together with the insulating adhesive layer by a dicing saw to cut out a sealing structure having a size of 15.2 mm x 13.2 mm. This was preliminarily connected to a predetermined position of the rewiring structure by a flip chip bonder under conditions of a temperature of 120 ° C and a pressure time of 2 seconds. Thereafter, the connection parts of the electronic components and the semiconductor chip were bonded to the bumps of the rewiring structure by heating at 300 ° C and applying a pressure of 1.0 MPa using a laminator. A titanium layer having a thickness of 0.05 μm and then a copper layer having a thickness of 2 μm were formed by sputtering to form a shielding film covering the sealing layer of the sealing structure. Finally, the carrier substrate was peeled off from the rewiring structure connected to the sealing structure by mechanical peeling to obtain an electronic component device composed of the sealing structure and the rewiring structure. [Explanation of symbols]

[0071] 1A...composite carrier substrate, 1B...carrier substrate, 5...sealing layer, 6...rewiring portion, 6S...main surface of rewiring portion, 11...support, 13...temporary fixing material layer, 15...adhesive layer, 21, 22...conductive pattern (connection portion), 23...shielding film, 31, 32...passive components (electronic components), 41A, 42A...IC chip (electronic component), 41B, 42B...IC chip bump (connection portion), 50...sealing structure, 50E...end of sealing structure, 60...rewiring structure, 61...rewiring, 62...insulating layer, 63...bump, 70...insulating adhesive layer, 100...electronic component device, CS...circuit surface.

Claims

1. A step of preparing a sealing structure including a sealing layer having two opposing main surfaces, an electronic component sealed in the sealing layer, and a connection portion connected to the electronic component, the connection portion being exposed on a circuit surface which is one of the main surfaces of the sealing layer; A step of preparing a rewiring structure including a rewiring section having two opposing main surfaces and a plurality of bumps provided on one main surface of the rewiring section, the rewiring section including rewirings connected to the plurality of bumps, and an insulating layer; a step of adhering the sealing structure and the rewiring structure with an insulating adhesive layer interposed therebetween, with the circuit surface and the plurality of bumps facing each other, so that the connection portions and at least some of the plurality of bumps are connected to each other, thereby connecting the sealing structure and the rewiring structure; A method for manufacturing an electronic component device, comprising: providing the redistribution structure, Providing a carrier substrate having a support and a temporary fixing material layer provided on the support; forming the rewiring portion on the temporary fixing material layer; forming the plurality of bumps connected to the rewiring on a main surface of the rewiring portion opposite to the carrier substrate; Including, The method comprises: The method further comprises peeling the carrier substrate from the rewiring structure connected to the encapsulation structure.

2. The method of claim 1 , wherein the redistribution portion extends beyond an edge of the encapsulation structure when the redistribution structure is connected to the encapsulation structure.

3. The method according to claim 2 , wherein some of the plurality of bumps are disposed on the rewiring portion in a portion that protrudes outward beyond an end of the encapsulation structure when the rewiring structure is connected to the encapsulation structure.

4. The method according to any one of claims 1 to 3, further comprising a step of forming a conductive shielding film that covers a portion of an outer surface of the sealing structure connected to the rewiring structure that is not in contact with the insulating adhesive layer.

5. forming a conductive shielding film that covers a portion of the outer surface of the sealing structure connected to the rewiring structure that is not in contact with the insulating adhesive layer and a portion of the main surface of the rewiring portion facing the sealing structure that protrudes outward beyond an end of the sealing structure; The method according to claim 3 , wherein the conductive shielding film is connected to the bump disposed on the rewiring portion in a portion protruding outward beyond an end of the sealing structure.

6. The method according to any one of claims 1 to 5, wherein the sealing structure comprises a plurality of the electronic components, the plurality of electronic components including an IC chip and a chip-type passive component.

7. The step of connecting the sealing structure and the rewiring structure includes: preliminarily connecting the sealing structure and the rewiring structure with the insulating adhesive layer interposed therebetween, by heating and pressing the sealing structure and the rewiring structure to a temperature lower than the melting point of the bumps, so that the connection portions and at least some of the bumps are in contact with each other; the sealing structure and the rewiring structure are heated to a temperature higher than the melting point of the bumps while being pressurized, thereby bonding the connection portions to at least some of the bumps; The method according to any one of claims 1 to 6, comprising, in that order:

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