Converter Control Device

Abstract

Provided is a converter control device capable of appropriately adjusting a control gain even when there is an energization phase error. In a control device (10), a phase corrector (75) corrects an error in the phase of an AC power supply (1) detected by a phase detector (5). A current coordinate converter (74) converts detected values of three-phase currents of a converter 3 to d- and q-axis currents using the corrected phase. A current controller (72) computes a voltage command so as to match current commands of the converter (3) and the d- and q-axis currents. A voltage coordinate converter (73) converts the voltage command to three-phase voltage commands using the corrected phase. An estimator (76) estimates inductance of a reactor (2) using the voltage command and the d- and q-axis currents. The phase corrector (75) corrects the phase detection error using the voltage command, the d- and q-axis currents, and the impedance of the reactor (2). The current controller (72) updates a current control gain using the inductance estimated by the estimator (76).

Description

[Technical field]

[0001] The present disclosure relates to a control device for a converter. [Background technology]

[0002] Patent Document 1 discloses an example of current control of a three-phase motor. The control device for the three-phase motor identifies the inductance even when the inductance of the three-phase motor changes due to magnetic saturation, and adjusts the control gain according to the identified value, thereby improving the stability of current control. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2003-339183 Summary of the Invention [Problem to be solved by the invention]

[0004] Current control of a three-phase PWM converter (PWM: Pulse Width Modulation) and a three-phase motor can be performed in a similar manner. That is, the control method of Patent Document 1 can also be applied to a three-phase PWM converter. Meanwhile, in Patent Document 1, the inductance is calculated based on a voltage command. Therefore, when there is an error in the energized phase, an error occurs between the voltage command and the actual voltage, and an error also occurs in the calculated inductance. This may result in inappropriate adjustment of the control gain.

[0005] The present disclosure is directed to solving such problems, and provides a converter control device that can more appropriately adjust a control gain even when there is a conduction phase error. [Means for solving the problem]

[0006] A converter control device according to the present disclosure is a converter control device that receives an input of a multi-phase current from a multi-phase power supply and outputs a DC voltage, and includes a phase detector that detects the phase of the multi-phase power supply, a phase corrector that calculates a corrected phase by correcting a phase detection error of the phase detector based on a voltage equation of the converter, a current coordinate converter that converts a detection value of the multi-phase current of the converter into a DC current using the corrected phase, a current controller that controls a current command of the converter and the DC current to match each other and calculates a voltage command, a voltage coordinate converter that converts the voltage command into a multi-phase voltage command using the corrected phase, and an estimator that estimates an inductance of a reactor of the converter based on the voltage equation of the converter, wherein the phase corrector corrects the phase detection error using the voltage command, the DC current, and the impedance of the reactor, the estimator estimates the inductance using the voltage command and the DC current, and the current controller updates a current control gain using the inductance estimated by the estimator. Effect of the Invention

[0007] A converter control device according to the present disclosure can adjust the control gain more appropriately even when there is a current conduction phase error. [Brief description of the drawings]

[0008] [Figure 1] 1 is a configuration diagram of a converter and a control device thereof according to a first embodiment. [Diagram 2] 4 is a diagram showing the relationship between a current flowing through a reactor and an inductance in the converter according to the first embodiment. FIG. [Diagram 3] 5 is a diagram showing a change in a current control band due to a change in inductance of a reactor in the converter according to the first embodiment. FIG. [Figure 4] 2 is a block diagram showing a configuration of a current controller of the control device according to the first embodiment. FIG. [Diagram 5] 3 is a block diagram showing a configuration of an estimator of the control device according to the first embodiment. FIG. [Figure 6] 3 is a block diagram showing a configuration of a phase corrector of the control device according to the first embodiment. FIG. [Figure 7] 5 is a flowchart showing an example of the operation of the control device according to the first embodiment. [Figure 8] 5 is a diagram showing an example of a correspondence between an estimated value of inductance and a current control gain in the control device according to the first embodiment. FIG. [Figure 9] 5 is a diagram showing an example of a correspondence between an estimated value of inductance and a current control gain in the control device according to the first embodiment. FIG. [Figure 10] 2 is a hardware configuration diagram of a main part of a control device according to the first embodiment. FIG. [Figure 11] FIG. 11 is a block diagram showing a configuration of a current controller of the control device according to the second embodiment. [Figure 12] 10 is a flowchart showing an example of the operation of the control device according to the second embodiment. [Figure 13] FIG. 11 is a configuration diagram of a converter and a control device thereof according to a third embodiment. [Figure 14] FIG. 11 is a block diagram showing a configuration of a current controller of a phase corrector according to a third embodiment. [Figure 15] 11 is a flowchart showing an example of the operation of the control device according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The embodiments for carrying out the subject of the present disclosure will be described with reference to the accompanying drawings. In each drawing, the same or corresponding parts are given the same reference numerals, and duplicated descriptions are appropriately simplified or omitted. Note that the subject of the present disclosure is not limited to the following embodiments, and any component of the embodiment may be modified or omitted within the scope of the gist of the present disclosure.

[0010] Embodiment 1 FIG. 1 is a configuration diagram of a converter 3 and a control device 10 thereof according to the first embodiment.

[0011] The AC power source 1 is an example of a multi-phase power source. In this example, the AC power source 1 is a power source that supplies three-phase AC power. The AC power source 1 supplies AC power to a converter 3, which is a three-phase voltage-type PWM converter, via a reactor 2. The converter 3 is a device that converts the AC power input from the AC power source 1 into DC power and outputs it. The converter 3 supplies the converted DC power to a smoothing capacitor 4. The DC bus voltage V dc is supplied from the smoothing capacitor 4 to an inverter (not shown) and used to drive a load motor (not shown).

[0012] The control device 10 of the converter 3 includes a phase detector 5, a current sensor 6, and a control unit 7.

[0013] The phase detector 5 detects the phase φ of the AC power supply 1. Note that the phase detector 5 may have any configuration, regardless of whether it is hardware or software, as long as it can detect the phase of the AC power supply 1.

[0014] The current sensor 6 detects the phase current of the converter 3. In this example, the current sensor 6 detects I r and I s The current sensor 6 may be configured to detect three phases of the current in the converter 3.

[0015] The control unit 7 detects the phase φ of the AC power supply 1 detected by the phase detector 5 and the phase current I of the converter 3 detected by the current sensor 6. r and I s , DC bus voltage V dc Based on this, the voltage command V r , V s , and V t The control unit 7 includes a voltage controller 71, a current controller 72, a voltage coordinate converter 73, a current coordinate converter 74, a phase corrector 75, and an estimator 76.

[0016] The voltage controller 71 controls the DC bus voltage command value V dc *and the detection value V dc Using this, the q-axis current command I q * The voltage controller 71 can use various methods such as PID control (P: Proportional, I: Integral, D: Differential). d * is usually set to 0 to achieve a power factor of 1, but field weakening control may be implemented taking voltage saturation into account.

[0017] The current controller 72 outputs a command value I d * and I q * and detection value I d and I q Using these, the dq-axis voltage command value V d * and V q * Here, the d-axis and the q-axis may be expressed as dq-axis. The current controller 72 may use various methods such as PID control.

[0018] The voltage coordinate converter 73 converts the dq-axis voltage command value into a three-phase voltage command V r , V s , and V t to the converter 3 using a correction phase θ. Here, the correction phase θ is obtained by correcting the phase φ detected by the phase detector 5 with a phase corrector 75. Details of the phase corrector 75 will be described later. Although not shown in FIG. 1, the three-phase voltage commands are converted into PWM signals by carrier comparison and applied as gate signals to the switching elements of the converter 3.

[0019] The current coordinate converter 74 converts the phase current I r and I s , dq axis current I d and I q It should be noted that the current coordinate converter 74 is not limited to being one that receives two-phase currents as input, and may be one that receives three-phase currents as input.

[0020] The estimator 76 estimates the d-axis voltage command V d * and the detected value of the dq axis current I d and I q and estimate the inductance of the reactor 2. The inductance L^ estimated by the estimator 76 is output to the current controller 72. The current controller 72 updates the control gain using the input inductance estimate value L^. The estimator 76 will be described in detail later.

[0021] FIG. 2 is a diagram showing the relationship between the current flowing through reactor 2 and the inductance in converter 3 according to the first embodiment. 2 represents the magnitude of the current flowing through the reactor 2. The vertical axis of the graph shown in FIG.

[0022] Because reactor 2 is a coil, when voltage is applied, the current flowing through reactor 2 increases over time, and the magnetic flux density also rises. In other words, the greater the load connected to the DC bus, the greater the current flowing through reactor 2, and the higher the magnetic flux density. However, magnetic flux density does not increase infinitely, and when it exceeds the maximum magnetic flux density determined by the material and shape, it enters a state of magnetic saturation. When magnetic saturation occurs, the inductance of reactor 2 rapidly decreases. This state is shown in Figure 2.

[0023] FIG. 3 is a diagram showing a change in the current control band due to a change in inductance of the reactor 2 in the converter 3 according to the first embodiment.

[0024] Usually, in the current controller 72, the current control gain is designed using the design value of the inductance of the reactor 2. When the actual inductance of the reactor 2 and the design value of the inductance of the current controller 72 match, the open loop characteristic of the current control becomes as shown in FIG. 3B, and the current control band is ω BWhen the actual inductance of the reactor 2 is larger than the design value of the inductance of the current controller 72, the apparent current control band is lowered, and the open loop characteristic becomes as shown in A of FIG. 3. In this case, the current control band is smaller than the design band ω B Lower ω A On the other hand, when the actual inductance of the reactor 2 is smaller than the design value of the inductance of the current controller 72, the apparent current control band becomes higher, and the open loop characteristic becomes as shown in C of FIG. 3. In this case, the current control band is smaller than the design band ω B Higher ω C It becomes.

[0025] If this is associated with the relationship shown in Fig. 2, when the load connected to the DC bus of the converter 3 increases, the current flowing through the reactor 2 increases, and the inductance of the reactor 2 decreases due to the effect of magnetic saturation. At this time, the actual inductance of the reactor 2 becomes smaller than the design value of the inductance of the current controller 72, and the apparent current control band becomes higher. When the inductance decreases and the current control band becomes higher, an oscillatory response or oscillation may occur, which may deteriorate the controllability of the current. The current controller 72 of the present disclosure updates the control gain using the estimated value of the inductance, thereby enabling stable current control even when the inductance of the reactor 2 changes.

[0026] FIG. 4 is a block diagram showing a configuration of the current controller 72 of the control device 10 according to the first embodiment.

[0027] In order to suppress the influence of the inductance change of the reactor 2 on the stability of the current control described above, the current controller 72 updates the control gain using an estimated value of the changed inductance. The current controller 72 updates the control gain 721 of the current controller 72 using the inductance L^ of the reactor 2 estimated by the estimator 76. In general, the control gain 721 of the current controller 72 is set to a value ω I Using the inductance design value L of Reactor 2, ω IHere, in order to update the gain using the inductance L^ of the reactor 2 estimated by the estimator 76, the gain ω I L can be multiplied by L^ / L. In other words, the preset gain ω I The control gain is updated by multiplying L by the ratio between the estimated value L^ by the inductance estimator 76 and the designed value L.

[0028] 4 shows an example in which PI control is used for current control. The current controller 72 multiplies the dq-axis current deviation by a control gain 721, and multiplies the output by an integral time constant 722, and then performs integration using an integrator 723. The current controller 72 adds the output of the control gain 721, i.e., the proportional term, to the output of the integrator 723 to obtain the dq-axis voltage command value V d * and V q * In this way, by estimating the inductance of the reactor 2 in real time and adjusting the gain, stable current control is possible even if the inductance changes. Note that the current control configuration shown in Fig. 4 is only an example, and the current controller 72 can use various control methods such as PID control.

[0029] FIG. 5 is a block diagram showing a configuration of the estimator 76 of the control device 10 according to the first embodiment.

[0030] The estimator 76 estimates the d-axis voltage command V d * and the detected value of the dq axis current I d and I q Here, the d-axis voltage equation of the converter 3 is expressed by the following equation (1).

[0031]

number

[0032] Here, L is the inductance of the reactor 2, ω is the frequency of the AC power source 1, and s is the Laplace operator. If the inductance L in equation (1) is replaced with the estimated value L^, the estimated value V of the d-axis voltage is obtained. d ^ can be obtained as follows:

[0033]

number

[0034] Voltage difference e based on equations (1) and (2) Vd is expressed by the following equation (3).

[0035]

number

[0036] From equation (3), if the difference (LL^) between the inductance L of reactor 2 and its estimated value L^ becomes zero, the voltage difference e Vd Also becomes zero. Therefore, the estimator 76 estimates the inductance of the reactor 2 according to a control law expressed by the following equation (4).

[0037]

number

[0038] The estimator 76 estimates the actual voltage V d and the estimated voltage V d ^ Voltage error e Vd The estimated inductance value L^ is obtained by performing integral control so that V^ in equation (4) becomes zero. Here, K indicates the control gain of the estimator 76. If the control gain K is large, the estimated value converges quickly, but it is set to an appropriate value taking into consideration the stability of the calculation. d is the actual voltage of converter 3, while the voltage command value V d * corresponds to this, so in reality the voltage V d is the voltage command value V d* That is, the actual converter voltage V d and voltage command V d * In this example, the estimator 76 is shown focusing on the d-axis of the converter 3, but the same inductance estimation can be performed using the voltage equation of the q-axis. In addition, the detected value I d and I q is the command value I of the dq-axis current d * and I q * In Fig. 5, a block diagram of the inductance estimation based on equation (4) is shown.

[0039] FIG. 6 is a block diagram showing a configuration of the phase corrector 75 of the control device 10 according to the first embodiment.

[0040] The phase φ of the AC power supply 1 detected by the phase detector 5 may be subject to detection error due to, for example, the characteristics of the phase detection circuit or the method of calculating the phase. d * Therefore, if there is an error in the conduction phase, the voltage command V d * and the actual voltage Vd, which reduces the estimation accuracy of the estimator 76. The phase corrector 75 corrects the phase φ detected by the phase detector 5 so as to suppress such a reduction in the estimation accuracy.

[0041] Here, the extended induced voltage model of the motor is expressed as the following equations (5) and (6), where E is the induced voltage, R is the winding resistance, and Δθ is the phase detection error.

[0042]

number

[0043]

number

[0044] When this is applied to converter 3, E corresponds to the voltage of AC power supply 1. Δθ corresponds to the detection error of phase φ of AC power supply 1 detected by phase detector 5. In addition, in converter 3, winding resistance R is sufficiently small and can be considered to be zero. Since the current of converter 3 is considered to be in the opposite direction to the current of the motor, by inverting the sign of the current, an extended induced voltage model of converter 3 can be obtained as shown in the following equations (7) and (8).

[0045]

number

[0046]

number

[0047] From equations (7) and (8), the detection error of phase detector 5 can be obtained as shown in the following equation (9).

[0048]

number

[0049] In addition, equation (9) is the voltage V d and V q The command value V d * and V q * The current value I d and I q is the command value I d * and I q * According to the formula (9), the phase corrector 75 can calculate the voltage command V d * and V q * and the current I d and I qUsing the impedance ωL of the reactor 2, the phase detection error Δθ of the phase detector 5 can be calculated.

[0050] The phase corrector 75 may be configured to remove high-frequency components from the phase detection error calculated by equation (9) using a low-pass filter or other various filters. The phase corrector 75 calculates the phase error Δθ using equation (9) and obtains a phase correction value Δφ by PLL control (PLL: Phase Locked Loop) as follows, for example. The phase corrector 75 controls the difference between the phase detection error command=0 and the phase detection error=Δθ using a PI controller 752 to obtain a correction speed. The phase corrector 75 obtains the phase correction value Δφ by integrating the correction speed using an integrator 753. The phase corrector 75 adds the obtained phase correction value Δφ to the phase φ to calculate the correction phase θ. By configuring such a PLL control loop, the detection error of the phase φ of the AC power source 1 detected by the phase detector 5 can be corrected to optimize the energization phase, and the voltage command and the actual voltage can be matched. This suppresses a decrease in the accuracy of the inductance estimation by the estimator 76.

[0051] The phase corrector 75, which performs correction according to the formula (9), requires the inductance L of the reactor 2. For this reason, the case where a detection error of the phase detection value φ occurs is not distinguished from the case where the inductance L changes even if no detection error of the phase detection value φ occurs, and in either case, the calculation is performed assuming that a phase detection error Δθ occurs in the phase detector 5. Here, according to the relationship shown in FIG. 2, the inductance of the reactor 2 decreases due to the influence of magnetic saturation when the current flowing through the reactor 2 increases. On the other hand, the inductance of the reactor 2 does not change when the current flowing through the reactor 2 is small. The control unit 7 uses this relationship between the current and the inductance to switch the operation depending on the magnitude of the current, thereby suppressing the influence of the change in the inductance L being calculated as the phase detection error Δθ. When the current is smaller than the reference value, the phase corrector 75 performs correction or learning of the phase error. That is, the phase corrector 75 calculates a phase correction value based on the formula (9) and the like, and corrects the energized phase using the calculated phase correction value. At this time, the estimator 76 does not estimate the inductance. The estimator 76 may output, for example, a design value of the inductance, or may output the immediately preceding estimated value. On the other hand, when the current is equal to or greater than the reference value, the phase corrector 75 corrects the energized phase using the phase correction value calculated when the current is smaller than the reference value. At this time, the estimator 76 estimates the inductance using a voltage command and a current value calculated based on the corrected energized phase. The reference value is a current threshold value that is set in advance depending on, for example, the current value at which magnetic saturation occurs in the reactor 2. The current value to be compared with the reference value is, for example, the dq-axis current I d or I q And so on.

[0052] FIG. 7 is a flowchart showing an example of the operation of the control device 10 according to the first embodiment. An example of a process for phase correction and inductance estimation is shown in Fig. 7. The process in Fig. 7 is performed, for example, when control of the converter 3 is started.

[0053] In step S701, the phase corrector 75 corrects the phase detection error of the phase detector 5 using a configuration such as the block diagram shown in Fig. 6. After that, the process of the control device 10 proceeds to step S702.

[0054] In step S702, the control unit 7 determines whether the current value of the converter 3 is equal to or greater than a reference value. If the current value is equal to or greater than the reference value, it is determined that the inductance of the reactor 2 has changed, and the process of the control device 10 proceeds to step S703. On the other hand, if the current value is smaller than the reference value, it is determined that the inductance of the reactor 2 has not changed, and the process of the control device 10 proceeds to step S707 without the estimator 76 estimating the inductance.

[0055] In step S703, since the inductance has changed, the phase corrector 75 latches the correction value Δφ of the phase detection error. This prevents the correction value Δφ from fluctuating through equation (9) due to the change in inductance. The phase corrector 75 latches, for example, the output of the integrator 753 in FIG. 6. By latching the correction value Δφ, the phase detection error of the phase detector 5 is corrected without being affected by the change in inductance. After that, the process of the control device 10 proceeds to step S704.

[0056] In step S704, the estimator 76 estimates the inductance of the reactor 2, for example, by using a configuration such as the block diagram shown in Fig. 5. After that, the process of the control device 10 proceeds to step S705.

[0057] In step S705, the control unit 7 determines whether the current value of the converter 3 is smaller than a reference value. If the current value is equal to or greater than the reference value, the inductance of the reactor 2 is determined to change, and the process of the control device 10 proceeds to step S704 to continue estimating the inductance. On the other hand, if the current value is smaller than the reference value, the inductance of the reactor 2 is determined not to change, and the process of the control device 10 proceeds to step S706.

[0058] In step S706, the estimator 76 stops estimating the inductance of the reactor 2. At this time, since no change occurs in the inductance of the reactor 2, the output of the integrator 761 of the estimator 76 may be reset to an initial value, i.e., a design value. After that, the process of the control device 10 proceeds to step S707.

[0059] In step S707, the control unit 7 determines whether the control of the converter 3 has been stopped. If the control of the converter 3 has not been stopped, the process of the control device 10 proceeds to step S701 to correct the phase detection error. On the other hand, if the control of the converter 3 has been stopped, the process of the control device 10 ends.

[0060] 8 and 9 are diagrams showing examples of the correspondence between the estimated inductance value and the current control gain in the control device 10 according to the first embodiment. The horizontal axis of the upper graph and the lower graph shown in Figures 8 and 9 represents the passage of time. The vertical axis of the upper graph shown in Figures 8 and 9 represents the estimated value of the inductance of the reactor 2. The vertical axis of the lower graph shown in Figures 8 and 9 represents the current control gain set in the current controller 72 according to the estimated value of the inductance. Figures 8 and 9 show a situation in which the estimated value of the inductance decreases due to magnetic saturation.

[0061] 8 shows an example of a method for updating the current control gain stepwise according to the estimated inductance value. This method is adopted, for example, when the current control gain set in the current controller 72 is designed to have a margin for the stability of the control system.

[0062] 9 shows an example of a method for continuously updating the current control gain according to the estimated inductance value. This method is adopted, for example, when the current control gain set in the current controller 72 is designed with little margin for the stability of the control system, that is, when a high gain is designed to suppress current pulsation or bus voltage pulsation. By continuously changing the control gain, the stability of the control is further improved.

[0063] As described above, the control device 10 according to the first embodiment is a control device for the converter 3. The converter 3 receives an input of a three-phase current from the AC power source 1, and performs switching to output a DC voltage. The control device 10 includes a phase detector 5, a phase corrector 75, a current coordinate converter 74, a current controller 72, a voltage coordinate converter 73, and an estimator 76. The phase detector 5 detects the phase of the AC power source 1. The phase corrector 75 corrects a phase detection error of the phase detector 5 based on the voltage equation of the converter 3 to calculate a corrected phase. The current coordinate converter 74 converts the detection value of the three-phase current of the converter 3 into a dq-axis current using the corrected phase. The current controller 72 controls so that the current command of the converter 3 and the dq-axis current converted by the current coordinate converter 74 coincide with each other to calculate a voltage command. The voltage coordinate converter 73 converts the voltage command into a three-phase voltage command using the corrected phase. The estimator 76 estimates the inductance of the reactor 2 of the converter 3 based on the voltage equation of the converter 3. The phase corrector 75 corrects the phase detection error using the voltage command calculated by the current controller 72, the dq-axis currents converted by the current coordinate converter 74, and the impedance of the reactor 2 estimated by the estimator 76. The estimator 76 estimates the inductance using the voltage command calculated by the current controller 72 and the dq-axis currents converted by the current coordinate converter 74. The current controller 72 updates the current control gain using the inductance estimated by the estimator 76.

[0064] With this configuration, the inductance is estimated with the current-carrying phase error corrected. This improves the accuracy of the inductance estimation and optimizes the current control band, thereby improving the stability of the current control. Therefore, even if there is a current-carrying phase error, the control gain can be adjusted more appropriately.

[0065] Furthermore, when the dq-axis currents converted by the current coordinate converter 74 are smaller than a reference value, the estimator 76 stops estimating the inductance. When the dq-axis currents converted by the current coordinate converter 74 are equal to or greater than the reference value, the phase corrector 75 latches a correction value for the phase detection error. When the dq-axis currents converted by the current coordinate converter 74 are equal to or greater than the reference value, the estimator 76 estimates the inductance based on the voltage command calculated using the latched correction value and the converted dq-axis currents.

[0066] With this configuration, the energization phase is corrected under conditions where no inductance fluctuation occurs in the reactor 2. At this time, since the estimation of the inductance is stopped, the energization phase is effectively corrected. Furthermore, under conditions where the inductance fluctuation occurs in the reactor 2, the phase correction value is latched and the inductance estimation is performed, so that the inductance is estimated with high accuracy. In this way, the correction of the energization phase and the estimation of the inductance are switched according to conditions such as the presence or absence of the inductance fluctuation, so that a more stable current control system is provided even when the inductance fluctuation may occur.

[0067] Furthermore, the phase corrector 75 calculates a correction phase by performing feedback control so that the phase detection error of the phase detector 5 becomes 0. The phase detection error of the phase detector is calculated using the voltage command calculated by the current controller 72, the dq-axis currents converted by the current coordinate converter 74, and the impedance of the reactor 2.

[0068] Further, the estimator 76 estimates the inductance based on the voltage equation of the converter 3 by a state estimation observer that receives as input the voltage command calculated by the current controller 72 and the dq axis currents converted by the current coordinate converter 74 .

[0069] Furthermore, the current controller 72 may update the current control gain stepwise using the inductance estimated by the estimator 76. In this case, the process of updating the control gain according to the estimated value of the inductance becomes easier. Moreover, the current controller 72 may continuously update the current control gain using the inductance estimated by the estimator 76. By continuously changing the control gain, the stability of the control can be further improved.

[0070] Next, an example of the hardware configuration of the control device 10 will be described with reference to FIG. FIG. 10 is a hardware configuration diagram of a main part of the control device 10 according to the first embodiment.

[0071] Each function of the control device 10 may be realized by a processing circuit. The processing circuit includes at least one processor 100a and at least one memory 100b. The processing circuit may include at least one dedicated hardware 200 in addition to or in place of the processor 100a and the memory 100b.

[0072] When the processing circuit includes a processor 100a and a memory 100b, each function of the control device 10 is realized by software, firmware, or a combination of software and firmware. At least one of the software and firmware is written as a program. The program is stored in the memory 100b. The processor 100a realizes each function of the control device 10 by reading and executing the program stored in the memory 100b.

[0073] The processor 100a is also called a CPU (Central Processing Unit), a processing device, an arithmetic device, a microprocessor, a microcomputer, or a DSP. The memory 100b is composed of a non-volatile or volatile semiconductor memory such as a RAM, a ROM, a flash memory, an EPROM, or an EEPROM.

[0074] Where the processing circuitry comprises dedicated hardware 200, the processing circuitry may be implemented, for example, as a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination thereof.

[0075] Each function of the control device 10 can be realized by a processing circuit. Alternatively, each function of the control device 10 can be realized collectively by a processing circuit. Some of the functions of the control device 10 may be realized by dedicated hardware 200, and the other parts may be realized by software or firmware. In this way, the processing circuit realizes each function of the control device 10 by dedicated hardware 200, software, firmware, or a combination of these.

[0076] Embodiment 2 In the second embodiment, differences from the example disclosed in the first embodiment will be described in particular detail. For features not described in the second embodiment, any of the features of the example disclosed in the first embodiment may be adopted.

[0077] The control device 10 according to the first embodiment estimates the inductance of the reactor 2 and, based on the inductance, updates the gain of the current controller 72, thereby stabilizing the current control. In the second embodiment, an example of the control device 10 that can further improve the stability of the current controller 72 by monitoring the estimated value of the inductance is disclosed.

[0078] FIG. 11 is a block diagram showing a configuration of a current controller 72 of the control device 10 according to the second embodiment. The control device 10 according to the second embodiment is the same as the control device 10 according to the first embodiment, except for the configuration of the current controller 72. Compared to the current controller 72 of the control device 10 according to the first embodiment, the current controller 72 of the control device 10 according to the second embodiment further includes a determination unit 724.

[0079] The determination unit 724 is a part that has a function of monitoring the estimated value of the inductance of the reactor 2 estimated by the estimator 76 and determining whether or not the estimated value is abnormal. For example, the determination unit 724 determines whether or not the estimated value L^ of the inductance is outside a preset range. At this time, the determination unit 724 determines whether or not the estimated value L^ of the inductance is outside a preset maximum value L of the inductance. max and the minimum value L min The determination unit 724 determines whether the inductance L^ estimated by the estimator 76 is greater than or equal to L min <L^<L max Determine whether the condition is met. min <L^<L max If the above condition is satisfied, the judgment unit 724 judges that the estimated value of the inductance is normal. At this time, the current controller 72 updates the control gain 721 using the estimated value of the inductance judged to be normal. min <L^<L max If the above condition is not satisfied, the judgment unit 724 judges that the estimated value of the inductance is abnormal. At this time, the current controller 72 does not update the control gain 721. When the current controller 72 does not update the control gain 721, the current controller 72 may maintain the value of the control gain 721 that was last updated using the estimated value of the inductance that was judged to be normal.

[0080] The determination unit 724 may monitor the change over time of the estimated inductance value L^. For example, the determination unit 724 calculates the amount of change over time dL^ / dt of L^ for each current control period and compares it with a preset reference value. The determination unit 724 determines that the estimated inductance value is normal if the calculated amount of change over time does not exceed the reference value. At this time, the current controller 72 updates the control gain 721 using the estimated inductance value determined to be normal. On the other hand, the determination unit 724 determines that the estimated inductance value is abnormal if the calculated amount of change over time exceeds the reference value. At this time, the current controller 72 does not update the control gain 721.

[0081] Furthermore, since the inductance changes according to the current, the determination unit 724 may monitor the current change of the estimated inductance value L^. For example, the determination unit 724 calculates the amount of current change dL^ / dI of L^ for each current control period and compares it with a preset reference value. If the calculated amount of current change does not exceed the reference value, the determination unit 724 determines that the estimated inductance value is normal. At this time, the current controller 72 updates the control gain 721 using the estimated inductance value determined to be normal. On the other hand, if the calculated amount of current change exceeds the reference value, the determination unit 724 determines that the estimated inductance value is abnormal. At this time, the current controller 72 does not update the control gain 721.

[0082] FIG. 12 is a flowchart showing an example of the operation of the control device 10 according to the second embodiment. In FIG. 12, an example of a process for monitoring an estimate of an inductance is shown.

[0083] In step S1201, the determination unit 724 performs processing for determining whether the estimated value of inductance estimated by the estimator 76 is abnormal. The determination of whether the estimated value of inductance is abnormal is performed based on, for example, the magnitude of the estimated value itself, the magnitude of the amount of change in the estimated value over time, or the magnitude of the amount of change in the estimated value over current. At this time, the determination unit 724 performs processing such as reading the estimated value by the estimator 76, calculating the amount of change over time, or calculating the amount of change in current. Thereafter, the processing of the control device 10 proceeds to step S1202.

[0084] In step S1202, the determination unit 724 determines whether the estimated inductance value is abnormal. If it is determined that the estimated inductance value is abnormal, the process of the control device 10 proceeds to step S1203. On the other hand, if it is determined that the estimated inductance value is not abnormal, the process of the control device 10 proceeds to step S1204.

[0085] In step S1203, since the estimated value of the inductance of the current controller 72 is abnormal, the process of the control device 10 ends without updating the control gain 721. At this time, there is a possibility that the current or voltage, which is an input signal to the estimator 76, has an abnormal value. For this reason, the control device 10 may be configured to stop the control of the converter 3 itself when the estimated value of the inductance is abnormal.

[0086] In step S1204, since the estimated value of the inductance is normal, the current controller 72 uses the estimated value of the inductance to update the control gain 721. After that, the processing of the control device 10 ends.

[0087] As described above, in the control device 10 according to the second embodiment, the presence or absence of an abnormality is determined by monitoring the inductance estimated by the estimator 76. If it is determined that an abnormality exists, the current controller 72 does not update the current control gain.

[0088] With this configuration, the control gain is prevented from being updated to an abnormal value, and a more stable current control system is provided.

[0089] Embodiment 3 In the third embodiment, differences from the examples disclosed in the first or second embodiment will be described in particular detail. For features not described in the third embodiment, any of the features of the examples disclosed in the first or second embodiment may be adopted.

[0090] In the third embodiment, an example of the control device 10 that can further improve the stability of the current controller 72 by monitoring the phase correction value of the phase corrector 75 is provided.

[0091] FIG. 13 is a configuration diagram of a converter 3 and a control device 10 thereof according to the third embodiment.

[0092] In the control unit 7 of the control device 10 according to the third embodiment, a signal line from the phase corrector 75 to the estimator 76 is added, compared to the control device 10 according to the first embodiment. In the control device 10 of this example, the phase corrector 75 monitors the phase correction value, and notifies the estimator 76 of the possibility of estimating the inductance based on the monitoring result. The estimator 76 switches the operation based on the possibility of estimating the inductance notified from the phase corrector 75. When receiving a notification from the phase corrector 75 that the inductance can be estimated, the estimator 76 estimates the inductance. Note that in a situation where the inductance cannot be estimated regardless of the presence or absence of an abnormality, such as when the current of the converter 3 is small, the estimator 76 may not estimate the inductance regardless of the content of the notification from the phase corrector 75. When receiving a notification from the phase corrector 75 that the inductance cannot be estimated, the estimator 76 does not estimate the inductance.

[0093] FIG. 14 is a block diagram showing a configuration of the phase corrector 75 of the control device 10 according to the third embodiment. Compared to the phase corrector 75 of the control device 10 according to the first embodiment, the phase corrector 75 of the control device 10 according to the third embodiment further includes a determination unit 754 .

[0094] The determination unit 754 is a part that has a function of monitoring the phase correction value calculated by the phase corrector 75 and determining whether or not the phase correction value is abnormal. For example, the determination unit 754 determines whether or not the phase correction value Δφ is outside a preset range. At this time, the determination unit 754 performs a step of determining whether or not the phase correction value Δφ is outside a preset maximum value of the phase correction value Δφ. max and the minimum value Δφ min The determination unit 754 determines whether the phase correction value Δφ output from the integrator 753 is Δφ min <Δφ<Δφ max Determine whether the condition Δφ is satisfied. min <Δφ<Δφ max If the above condition is satisfied, the judgment unit 754 judges that the phase correction value is normal. At this time, the phase corrector 75 transmits a notification to the estimator 76 that the inductance can be estimated. On the other hand, Δφ min <Δφ<Δφ max If the above condition is not satisfied, the determining unit 754 determines that the phase correction value is abnormal. At this time, the phase corrector 75 transmits a notification to the estimator 76 that the inductance cannot be estimated.

[0095] The determination unit 754 may monitor the change over time of the phase correction value Δφ. For example, the determination unit 754 calculates the amount of change over time dΔφ / dt of Δφ for each current control period and compares it with a preset reference value. The determination unit 724 determines that the phase correction value is normal when the calculated amount of change over time does not exceed the reference value. At this time, the phase corrector 75 transmits a notification to the estimator 76 that the inductance can be estimated. On the other hand, the determination unit 754 determines that the phase correction value is abnormal when the calculated amount of change over time exceeds the reference value. At this time, the phase corrector 75 transmits a notification to the estimator 76 that the inductance cannot be estimated.

[0096] FIG. 15 is a flowchart showing an example of the operation of the control device 10 according to the third embodiment. FIG. 15 shows an example of a process for monitoring the phase correction value.

[0097] In step S1501, the determination unit 754 performs processing for determining whether the phase correction value calculated by the phase corrector 75 is abnormal. The determination of whether the phase correction value is abnormal is performed, for example, based on the magnitude of the phase correction value itself or the magnitude of the amount of change in the phase correction value over time. At this time, the determination unit 754 performs processing such as reading the calculated phase correction value or calculating the amount of change over time. Thereafter, the processing of the control device 10 proceeds to step S1502.

[0098] In step S1502, the determination unit 754 determines whether the phase correction value is abnormal. If it is determined that the phase correction value is abnormal, the process of the control device 10 proceeds to step S1503. On the other hand, if it is determined that the phase correction value is not abnormal, the process of the control device 10 proceeds to step S1505.

[0099] In step S1503, the phase corrector 75 does not correct the phase because the phase correction value is abnormal. After that, the process of the control device 10 proceeds to step S1504. When the phase correction value is abnormal, the current or voltage, which is an input signal to the phase corrector 75, may have an abnormal value. For this reason, the control device 10 may be configured to stop the control of the converter 3 itself when the phase correction value is abnormal.

[0100] In step S1504, the phase corrector 75 transmits a notification that the inductance cannot be estimated to the estimator 76. After that, the processing of the control device 10 ends.

[0101] In step S1505, since the phase correction value is normal, the phase corrector 75 corrects the phase using the correction value. After that, the process of the control device 10 proceeds to step S1506.

[0102] In step S1506, the phase corrector 75 transmits a notification that the inductance can be estimated to the estimator 76. After that, the processing of the control device 10 ends.

[0103] As described above, in the control device 10 according to the third embodiment, the presence or absence of an abnormality is determined by monitoring the correction value of the phase detection error calculated by the phase corrector 75. If it is determined that there is an abnormality, the phase corrector 75 does not correct the phase detected by the phase detector 5. At this time, the estimator 76 does not estimate the inductance.

[0104] With this configuration, the inductance is prevented from being estimated to an abnormal value, providing a more stable current control system. [Industrial Applicability]

[0105] The control device according to the present disclosure can be applied to control a converter. [Explanation of symbols]

[0106] REFERENCE SIGNS LIST 1 AC power supply, 2 Reactor, 3 Converter, 4 Smoothing capacitor, 5 Phase detector, 6 Current sensor, 7 Control unit, 10 Control device, 71 Voltage controller, 72 Current controller, 73 Voltage coordinate converter, 74 Current coordinate converter, 75 Phase corrector, 76 Estimator, 100a Processor, 100b Memory, 200 Dedicated hardware

Claims

1. A control device for a converter that receives a multi-phase current input from a multi-phase power supply and outputs a DC voltage, a phase detector for detecting a phase of the multi-phase power supply; a phase corrector that calculates a corrected phase by correcting a phase detection error of the phase detector based on a voltage equation of the converter; a current coordinate converter for converting detection values ​​of multi-phase currents of the converter into DC currents using the correction phases; a current controller that controls the converter so that the current command and the DC current coincide with each other to calculate a voltage command; a voltage coordinate converter that converts the voltage command into a multi-phase voltage command using the correction phase; an estimator for estimating an inductance of a reactor of the converter based on a voltage equation of the converter; Equipped with the phase corrector corrects the phase detection error by using the voltage command, the DC current, and an impedance of the reactor; The estimator estimates the inductance using the voltage command and the DC current; The current controller updates a current control gain using the inductance estimated by the estimator. Converter control device.

2. When the DC current is less than a reference value, the estimator stops estimating the inductance; When the DC current is equal to or greater than the reference value, the phase corrector latches a correction value for the phase detection error; When the DC current is equal to or greater than the reference value, the estimator estimates the inductance based on the voltage command and the DC current calculated using the latched correction value. The control device for a converter according to claim 1 .

3. the phase corrector calculates the correction phase by performing feedback control so that the phase detection error of the phase detector, which is calculated using the voltage command, the DC current, and the impedance of the reactor, becomes zero. The control device for a converter according to claim 1 or 2.

4. The estimator estimates the inductance by a state estimation observer that receives the voltage command and the DC current as inputs based on a voltage equation of the converter. The control device for a converter according to any one of claims 1 to 3.

5. The current controller gradually updates the current control gain by using the inductance estimated by the estimator. The control device for a converter according to any one of claims 1 to 4.

6. The current controller continuously updates the current control gain using the inductance estimated by the estimator. The control device for a converter according to any one of claims 1 to 4.

7. When an abnormality is determined by monitoring the inductance estimated by the estimator, the current controller does not update the current control gain. The control device for a converter according to any one of claims 1 to 6.

8. When an abnormality is determined by monitoring the correction value of the phase detection error calculated by the phase corrector, the phase corrector does not correct the phase detected by the phase detector, and the estimator does not estimate the inductance. The control device for a converter according to any one of claims 1 to 7.

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