Chip module, communication system, and port allocation method

Abstract

The present application provides a chip module, a communication system, and a port allocation method. The chip module has a plurality of first ports, at least some or all of which are first selected ports, and each first selected port can function as a read port or a write port. The chip module further includes a first control module. The first control module controls the first selected ports to switch between read and write ports based on the transmit / receive requirements of the chip module to match the transmit / receive requirements of the chip module. In the above technical solution, the first selected ports can selectively function as read or write ports, so that switching can be performed based on the operating state of the chip module, thereby increasing the read / write bandwidth of the chip module. In addition, the first control module controls the operating state of the first selected ports to flexibly adjust the number of read and write ports of the chip module.

Description

[Technical field]

[0001] The present application relates to the field of communication technology, and in particular to a chip module, a communication system, and a port allocation method. [Background technology]

[0002] In general computer and communication systems, high-speed read and write is achieved by using a parallel bus between the CPU and memory. In this way, nearly half of the CPU's IO port and a fairly large wiring area of ​​the printed circuit board need to be occupied. In addition, parallel transmission also brings about large crosstalk between signals, which limits the increase of bus signal speed and further significantly hinders the increase of read / write bandwidth between the printed circuit board and memory.

[0003] Therefore, serial high-speed signal transmission for memory read / write has been proposed as a new CPU memory bus method. SerDes (short for SERializer / DESerializer) differential signaling can better withstand the effects from crosstalk and greatly increase the signal transmission speed. However, the fixed unidirectional transmission method of traditional SerDes and IO resource allocation, with equal transmission and reception bandwidths, does not match the random allocation of memory read / write directions. Summary of the Invention [Means for solving the problem]

[0004] The present application provides a chip module, a communication system, and a port allocation method to improve the port flexibility of the communication system when communicating.

[0005] According to a first aspect, a chip module is provided. The chip module may be applied to a communication system and is configured to transmit read / write data. The chip module has a plurality of first ports. Among the plurality of first ports, each first selected port can function as a write port or a read port. The chip module further includes a first control module. The first control module controls the first selected port to switch to a read port or a write port based on the transmission / reception requirements of the chip module so as to match the transmission / reception requirements of the chip module. In the above technical solution, since the first selected port can selectively function as a read port or a write port, switching can be performed based on the operating state of the chip module, thereby increasing the read / write bandwidth of the chip module. In addition, the first control module controls the operating state of the first selected port so as to flexibly adjust the number of read ports and the number of write ports of the chip module.

[0006] In one optional embodiment, each of the plurality of first ports is a first selected port, and all ports can be switched to be a write port or a read port.

[0007] In one optional embodiment, among the multiple first ports, some are fixed read ports, some are fixed write ports, and others are first select ports, and only a small number of the first select ports need to be switched to ports with an adjustable ratio of read ports to write ports, thereby facilitating the switching.

[0008] In an optional embodiment, the first control module is further configured to obtain a required ratio of the write port to the read port as a target ratio according to the transmit / receive requirements of the chip module, determine a current ratio of the write port to the read port in the current chip module, and if the current ratio is different from the target ratio, control the first selected port to switch to the read port or the write port according to a result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the chip module matches the target ratio. This realizes the effect that the transmit / receive requirements of the chip module correspond to the ports, and the degree of freedom of matching is increased.

[0009] Optional In one embodiment The first control module is further configured to obtain a required number and positions of write ports and a required number and positions of read ports based on the transmit / receive requirements of the chip module, and compare the required number and positions of write ports and the required number and positions of read ports with the current number and positions of write ports and the current number and positions of read ports to determine a first selected port that needs to be switched to.

[0010] In an optional embodiment, the first control module is further configured to determine a first selected port that needs to be switched, switch the determined first selected port based on the transmit / receive requirements of the chip module, and adjust the transmit / receive state of the corresponding first selected port based on the transmit / receive requirements of the chip module.

[0011] In one optional embodiment, the first control module: If the current ratio is smaller than the target ratio, control at least some of the first selected ports functioning as read ports to be switched to write ports; or The control unit is further configured to control at least a part of the first selected ports functioning as write ports to be switched to read ports when the current ratio is greater than the target ratio, thereby realizing the adjustment of the number of write ports and the number of read ports.

[0012] In an optional embodiment, each first selection port includes a first connection port, a first receiving circuit, a first transmitting circuit, and a first selector switch, and the first connection port selects one of the first receiving circuit or the first transmitting circuit by using the first selector switch. Connected to When the first selected port functions as a read port, the receiving circuit is completely disconnected from the first connection port. Similarly, when the first selected port functions as a write port, the transmitting circuit is completely disconnected from the first connection port. In this way, the influence of the idle circuit on the first selected port is avoided, and the operation effect of the chip module is improved.

[0013] In an optional embodiment, the first control module is further configured to send a switching instruction message to a peer chip module paired with the chip module, and receive a switching completion instruction message fed back by the peer chip module, which realizes information interaction between the two chip modules.

[0014] In one optional embodiment, the first selector switch is: Nanoseconds A changeover switch with a level response. level is expensive.

[0015] In one optional embodiment, the first selector switch is a single-pole, double-throw switch. 1This realizes switching of the selected port to a write port or a read port.

[0016] In one optional embodiment, the first selector switch is a metal oxide semiconductor field effect transistor.

[0017] According to a second aspect, a chip module is provided. The chip module includes a plurality of second ports and a second control module, and at least some of the plurality of second ports are second selected ports. The second control module controls the second selected port to switch to a read port or a write port based on the transmission / reception requirements of a peer chip module paired with the chip module. In the above technical solution, the second selected port can selectively function as a read port or a write port, so that the switching can be performed based on the operating state of the chip module, thereby increasing the read / write bandwidth of the chip module.

[0018] In one optional embodiment, each of the plurality of second ports is a second selected port, and all ports can be switched to be a write port or a read port.

[0019] In an optional embodiment, among the multiple second ports, some are fixed read ports, some are fixed write ports, and others are second select ports, and only a small number of the second select ports need to be switched to ports with an adjustable ratio of read ports to write ports, thereby facilitating the switching.

[0020] In an optional embodiment, the second control module is configured to control the corresponding second selected port to switch to a read port or a write port after receiving the switching instruction message sent by the peer chip module, and after the switching is completed, the second control module is further configured to send a switching completion instruction message to the first control module, which realizes information exchange between the two chip modules.

[0021] In an optional embodiment, each second selection port includes a second connection port, a second receiving circuit, a second transmitting circuit, and a second selector switch. The second connection port is connected to one of the second receiving circuit and the second transmitting circuit by using the second selector switch, and the other circuit is disconnected from the second connection port. When the second receiving circuit is connected to the second connection port, the second selection port functions as a write port. When the second transmitting circuit is connected to the second connection port, the second selection port functions as a read port. In addition, when the second selection port functions as a read port, the receiving circuit is completely disconnected from the second connection port. Similarly, when the second selection port functions as a write port, the transmitting circuit is completely disconnected from the second connection port. In this way, the influence of an idle circuit on the second selection port is avoided, and the operation effect of the chip module is improved.

[0022] In one optional embodiment, the second selector switch is Nanoseconds A changeover switch with a level response. level is expensive.

[0023] In an optional embodiment, the second selector switch is a single-pole, double-throw switch, which realizes switching of the second select port to a write port or a read port.

[0024] In one optional embodiment, the second selector switch is a metal oxide semiconductor field effect transistor.

[0025] According to a third aspect, a communication system is provided. The communication system includes a first chip module and a second chip module. The first chip module is the chip module in any one of the above-mentioned embodiments. A first port of the first chip module and a second port of the second chip module are connected in a one-to-one correspondence. In the above-mentioned technical solution, the arranged first selection port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the first chip module, thereby increasing the read / write bandwidth of the communication system. In addition, 1. When the selected port functions as a read port, the receiving circuit is completely disconnected from the connection port. Similarly, when the first selected port functions as a write port, the transmitting circuit is completely disconnected from the connection port. In this way, 1. The effect of idle circuits on selected ports is avoided, improving the operating efficiency of the communication system.

[0026] In an optional embodiment, the second chip module is the chip module in any one of the previous embodiments, thereby increasing the read / write bandwidth of the communication system.

[0027] According to a fourth aspect, a communication system is provided, the communication system including a first chip module and a second chip module. The second chip module is the chip module in any one of the aforementioned embodiments. A first port of the first chip module and a second port of the second chip module are connected in a one-to-one correspondence. In the aforementioned technical solution, the arranged first selection port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the second chip module, thereby increasing the read / write bandwidth of the communication system. In addition, 1.When the selected port functions as a read port, the receiving circuit is completely disconnected from the connection port. Similarly, when the first selected port functions as a write port, the transmitting circuit is completely disconnected from the connection port. In this way, 1. The effect of idle circuits on selected ports is avoided, improving the operating efficiency of the communication system.

[0028] According to a fifth aspect, a port allocation method is provided. The allocation method includes: acquiring a transmit / receive requirement of a chip module; and switching a first selected port of the chip module to a read port or a write port based on the acquired transmit / receive requirement of the chip module. In the above technical solution, the first selected port can selectively function as a read port or a write port, so that switching can be performed based on the operating state of the chip module, thereby increasing the read / write bandwidth of the chip module. In addition, the first control module controls the operating state of the first selected port to flexibly adjust the number of read ports and the number of write ports of the chip module.

[0029] Optional In one embodiment The step of switching the first selected port to a read port or a write port based on the acquired transmission / reception requirements of the chip module specifically includes: Obtaining a required ratio of write ports to read ports as a target ratio based on the sending / receiving requirements of the chip module; determining a current ratio of write ports to read ports in the current chip module; and If the current ratio is different from the target ratio, controlling the first selected port to switch to a read port or a write port based on the result of the comparison between the target ratio and the current ratio until the ratio of the read ports to the write ports of the chip module matches the target ratio. This realizes the effect that the transmit / receive requirements of the chip module correspond to the ports, and the degree of matching is increased.

[0030] Optional In one embodiment The method further includes the steps of determining a first selected port that needs to be switched and switching the determined first selected port based on the transmit / receive requirements of the chip module, and adjusting the transmit / receive state of the corresponding first selected port based on the transmit / receive requirements of the chip module.

[0031] Optional In one embodiment The method further includes: sending a switching instruction message to a peer chip module paired with the chip module; and receiving a switching completion instruction message fed back by the peer chip module, which realizes information interaction between the two chip modules.

[0032] According to a sixth aspect, a port allocation method is provided. The method includes: obtaining a transmission / reception requirement of a peer chip module; and switching a second selected port of the chip module to a read port or a write port according to the transmission / reception requirement of the peer chip module. In the above technical solution, the second selected port can selectively function as a read port or a write port, so that the switching can be performed based on the working state of the chip module, thereby increasing the read / write bandwidth of the chip module.

[0033] Optional In one embodiment,The step of switching the second selected port of the chip module to a read port or a write port according to the sending / receiving requirements of the peer chip module specifically includes the steps of controlling the corresponding second selected port to switch to a read port or a write port after receiving a switching instruction message sent by the peer chip module, and sending a switching completion instruction message to the peer chip module after the switching is completed, which realizes the switching of the second selected port and realizes the information interaction between the two chip modules.

[0034] According to a seventh aspect, there is provided a port allocation method, the method comprising: Obtaining a transmission / reception requirement of a first chip module; Switching a first selected port of the first chip module to a read port or a write port according to a transmission / reception requirement of the first chip module; switching a second selected port of the paired second chip module to a read port or a write port based on the transmission / reception requirements of the first chip module; Includes.

[0035] In the above technical solution, the selection port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the first chip module, thereby increasing the read / write bandwidth of the communication system. In addition, based on the working state of the selection port, the number of read ports and the number of write ports of the chip module can be flexibly adjusted, thereby improving the flexibility of the entire communication system.

[0036] Optional In one embodiment The step of switching the first selected port to a read port or a write port based on the transmission / reception requirements of the first chip module specifically includes: Obtaining a required ratio of write ports to read ports as a target ratio based on the transmission / reception requirements of the first chip module; determining a current ratio of write ports to read ports in a current first chip module; and If the current ratio is different from the target ratio, controlling the first selected port to switch to a read port or a write port based on a result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the first chip module matches the target ratio. This realizes the effect that the transmit / receive requirements of the chip module correspond to the ports, and the degree of matching is increased.

[0037] Optional In one embodiment ,The method is sending a switch instruction message by the first chip module to the second chip module; After receiving the switching instruction message sent by the first chip module, controlling the second chip module to switch the corresponding second selected port to a read port or a write port; and after the switching is completed, sending a switching completion instruction message to the first chip module; receiving, by the first chip module, a switching completion indication message sent by the second chip module; It further includes a signal processing unit (10) for processing information between the two chip modules.

[0038] According to an eighth aspect, an embodiment of the present application provides a signal processing module. The signal processing module includes a processor configured to implement a method as described in the fifth aspect, the sixth aspect, or the seventh aspect. The signal processing module may further include a memory configured to store instructions and data. The memory is coupled to the processor. Upon executing program instructions stored in the memory, the processor implements the method as described in the fourth aspect. can beThe signal processing module may further include a communication interface, the communication interface comprising: Signal Processing Module and another device. For example, the communication interface may be a transceiver, a circuit, a bus, a module, or any type of communication interface, and the other device may be a network device, a terminal device, etc.

[0039] identification Fruit In an embodiment, the signal processing module includes a memory configured to store program instructions and a processor configured to invoke the instructions stored in the memory, such that Signal Processing Module is the fifth aspect of the present application or a possible embodiment of the fifth aspect Embodiment The method according to any one of the above, the sixth aspect of the present application or the possible method according to the sixth aspect of the present application. Embodiment or the seventh aspect of the present application or a possible method of the seventh aspect of the present application. Embodiment The method according to any one of the above items is carried out.

[0040] According to a ninth aspect, an embodiment of the present application further provides a computer readable storage medium comprising instructions, which when executed on a computer cause the computer to perform the fifth aspect of the present application or a possible embodiment of the fifth aspect. Embodiment The method according to any one of the above, the sixth aspect of the present application or the possible method according to the sixth aspect of the present application. Embodiment or the seventh aspect of the present application or a possible method of the seventh aspect of the present application. Embodiment It is possible to carry out the method according to any one of the above.

[0041] According to a tenth aspect, an embodiment of the present application further provides a computer program product comprising instructions, which when executed on a computer cause the computer to perform the fifth aspect of the present application or a possible embodiment of the fifth aspect. Embodiment The method according to any one of the above, the sixth aspect of the present application or the possible method according to the sixth aspect of the present application. Embodiment or the seventh aspect of the present application or a possible method of the seventh aspect of the present application. Embodiment It is possible to carry out the method according to any one of the above.

[0042] In addition, possible embodiments of the eighth to tenth aspects Embodiment Regarding the technical effect brought about by any one of the methods part Different Embodiment Please refer to the effect brought about by the above, and the details will not be described again here.

[0043] According to an eleventh aspect, a chip module is provided. The chip module includes a plurality of first ports and a first control module. At least some of the plurality of first ports are 1. is a selection port, 1. The selected port is each The first control module can function as a read port or a write port based on the sending / receiving requirements of the chip module or the received switching command. To match the transmit / receive requirements of the chip module, The first selected port can be switched to a read or write port. Limited In the above technical solution, the first selected port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the chip module, thereby increasing the read / write bandwidth of the chip module. In addition, the first control module controls the working state of the first selected port to flexibly adjust the number of read ports and the number of write ports of the chip module.

[0044] Optional In one embodiment The received switching command is from the peer chip module, which controls the chip module to perform port switching.

[0045] Optional In one embodiment After receiving the switching instruction message sent by the peer chip module, the first control module selects the corresponding 1.The first control module is further configured to control the selected port to switch to a read port or a write port, and after the switching is completed, the first control module is further configured to send a switching completion indication message to the first control module, which realizes information interaction.

[0046] Optional In one embodiment The first control module is further configured to obtain a required ratio of write ports to read ports as a target ratio based on the transmission / reception requirements of the chip module, determine a current ratio of write ports to read ports in the current chip module, and if the current ratio is different from the target ratio, control the first selected port to switch to a read port or a write port based on a result of a comparison between the target ratio and the current ratio until the ratio of read ports to write ports of the chip module matches the target ratio.

[0047] Optional In one embodiment , each first selection port includes a first connection port, a first receiving circuit, a first transmitting circuit, and a first selector switch. The first connection port is connected to one of the first receiving circuit and the first transmitting circuit by using the first selector switch. When the first receiving circuit is connected to the first connection port, the first selection port functions as a write port. When the first transmitting circuit is connected to the first connection port, the first selection port functions as a read port.

[0048] According to a twelfth aspect, a mobile terminal is provided. The mobile terminal includes the chip module in any one of the above embodiments and a peer chip module connected by using a signal. In the above technical solution, the arranged first selection port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the chip module, thereby increasing the read / write bandwidth of the communication system. In addition, 1.When the selected port functions as a read port, the receiving circuit is completely disconnected from the connection port. Similarly, when the first selected port functions as a write port, the transmitting circuit is completely disconnected from the connection port. In this way, 1. The effect of idle circuits on selected ports is avoided, improving the operating efficiency of the communication system. [Brief description of the drawings]

[0049] [Figure 1] FIG. 2 is a block diagram of communication between a first chip module and a second chip module according to an embodiment of the present application. [Diagram 2] FIG. 1 is a schematic diagram of CPU memory communication in the prior art. [Diagram 3] FIG. 1 is a block diagram of the structure of a communication system according to an embodiment of the present application. [Figure 4] FIG. 2 is a block diagram of the coordination between a select port of a first chip module and a select port of a second chip module according to an embodiment of the present application. [Diagram 5] FIG. 2 is a block diagram of the structure of a first chip module according to an embodiment of the present application. [Figure 6] FIG. 2 is a block diagram of the structure of a second chip module according to an embodiment of the present application. [Figure 7] 4 is a schematic flowchart of switching a selected port according to an embodiment of the present application; [Figure 8] 13 is another schematic flowchart of switching a selected port according to an embodiment of the present application; [Figure 9] 13 is another schematic flowchart of switching a selected port according to an embodiment of the present application; [Figure 10] 13 is another schematic flowchart of switching a selected port according to an embodiment of the present application; [Figure 11] FIG. 2 is a block diagram of the structure of another communication system according to an embodiment of the present application. [Figure 12] FIG. 2 is a block diagram of the structure of a signal processing module according to an embodiment of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0050] The following further describes the embodiments of the present application in detail with reference to the accompanying drawings.

[0051] The chip module provided in one embodiment of the present application is applied to a general computer system and a communication system. FIG. 1 is a block diagram of the communication between two chip modules. For ease of description, the two chip modules are named a first chip module and a second chip module, respectively. The second chip module is a peer chip of the first chip module, and the first chip module is a peer chip of the second chip module. The first chip module and the second chip module may be different devices. For example, the first chip module includes a central processing unit (CP), and the second chip module includes a central processing unit (CPU). U) The second chip module is the memory. S The I / O of the CPU is connected to the memory by using a parallel bus, and high-speed reading and writing is achieved by using a parallel bus. (Enter In addition, parallel transmission also brings about large crosstalk between signals, which limits the increase in bus signal speed and further significantly hinders the increase in read / write bandwidth between the CPU and memory. Therefore, serial high-speed signal transmission for memory read / write has also been proposed as a new CPU memory bus method.

[0052] Figure 2 shows the CPU memory bus system. Between the CPU and memory, a SerDes (SERialize r / DESerialize R (omitted) Communication is carried out by using differential signals, which are more tolerant of crosstalk and can significantly increase the signal transmission speed. However, equal send andReceive Bandwidth Conventional SerDes Differential Signaling and I / O Port Resource Allocation of The fixed unidirectional transmission method is random Memory Read / Write Direction The result n Tx(T teeth Transmit 、x cros s book n Rx (representing the R teeth Receive 、x cros s book The port number is used. but , if a Tx ports and b Rx ports are required between the CPU and memory, the existing n Tx ports cannot be matched with n Rx ports, where a, b, and n are positive integers; With another one Not equal.

[0053] Therefore, the memo Reread How to properly allocate IO ports to accommodate read / write behavior to increase CPU memory read / write bandwidth or other similar bus bandwidth For This has become a major research direction. In view of this, an embodiment of the present application provides a new communication system and a new port allocation method.

[0054] Books applicationThe communication system provided in this embodiment of the present invention may determine the transmission and reception operation requirements for a future period by using a first chip module (e.g., CPU), compare the transmission and reception operation requirements with the current transmission / reception state, and based on the comparison result, mark the location of the IO port whose state needs to be changed, and initiate the state switching of the designated IO port of the first chip module and the state switching of the designated IO port of the peer second chip module (e.g., memory) within the period by using a preset control mechanism to match the actual service data transmission / reception requirements for the next period, thereby increasing the effective service bandwidth. The first chip module and the second chip module in the system will be described separately below with reference to the accompanying drawings.

[0055] 3 is a schematic diagram of the system structure. The first chip module 100 and the second chip module 200 each have a number of IO ports. For ease of distinction, the IO port of the first chip module 100 is named as the first port 110, and the IO port of the second chip module 200 is named as the second port 210.

[0056] In an optional solution, the multiple first ports 110 may be classified into fixed ports 112 and selected ports based on functions. To distinguish from the ports of the second chip module 200, the selected ports of the first chip module 100 are named first selected ports 111. The fixed ports 112 are ports that can only realize read or write functions. For example, the fixed ports 112 may be classified into read ports (ports that can realize read functions) and write ports (ports that can realize write functions). The first selected ports 111 are ports that can be switched between read and write functions. The first selected ports 111 each have two operating states. In one operating state, the first selected ports 111 function as a write port. In the other operating state, the first selected ports 111 function as a read port.

[0057] In an optional solution, the multiple second ports 210 can also be classified into fixed ports 212 and selected ports based on their functions. In order to distinguish from the first selected ports 111, the selected ports of the second chip module 200 are named second selected ports 211. The fixed ports 212 may be classified into read ports (ports that can realize a read function) and write ports (ports that can realize a write function). The second selected ports 211 are ports that can be switched between a read function and a write function. The second selected ports 211 each have two operating states. In one operating state, the second selected ports 211 function as a write port. In the other operating state, the second selected ports 211 function as a read port. During a specific setting, some of the multiple first ports 110 may be selected as fixed read ports, some may be selected as fixed write ports, and the others are the first selected ports 111.

[0058] In an optional solution, the fixed port 112 and the fixed port 212 correspond to each other and are connected by using a parallel bus 300, and the first selected port 111 and the second selected port 211 also correspond to each other and are connected by using a parallel bus 300.

[0059] The read port and the write port of the first chip module 100 are paired with the write port and the read port of the second chip module 200. For example, one of the two ports connected to the same service lane of the parallel bus 300 is a read port and the other is a write port. For example, if the first port 110 connected to the service lane is a read port, the second port 210 connected to the service lane is a write port, and if the first port 110 connected to the service lane is a write port, the second port 210 connected to the service lane is a read port. During a particular configuration, among the multiple second ports 210, some may be selected as fixed read ports, some may be selected as fixed write ports, and the others are second selected ports.

[0060] The system shown in Fig. 3 is used as an example. The number of first ports 110 of the first chip module 100 is N. The N first ports 110 include K first selection ports 111, L read ports, and M write ports, where N, K, L, and M are all positive integers greater than 1, and N=K+L+M. The number of second ports 210 of the second chip module 200 is N. The N second ports 210 include K second selection ports 211, L write ports, and M read ports. Both the number of the first ports 110 and the function of each first port 110 of the first chip module 100 match the number of the second ports 210 and the function of each second port 210 of the second chip module 200, thereby realizing data transmission.

[0061] The arrow direction of the service lane in FIG. 3 indicates the data transmission direction. The M write ports and the M read ports are connected via service lanes R Lane 0 to R Lane M-1, and data can be transmitted from the first chip module 100 to the second chip module 200. The L read ports and the L write ports are connected via service lanes W Lane 0 to W Lane L-1, and data can be transmitted from the second chip module 200 to the first chip module 100. The K first selected ports 111 and the K second selected ports are connected via service lanes Lane 0 to Lane K-1, and data can be transmitted in both directions between the first chip module 100 and the second chip module 200. A specific transmission direction is determined by a specific function of the first selected port 111 and the second selected port 200. 211 For example, in a pair of the first select port 111 and the second select port 211, if the first select port 111 is a read port, the second select port 211 is a write port, and data may be transmitted from the first chip module 100 to the second chip module 200, and in a pair of the first select port 111 and the second select port 211, if the first select port 111 is a write port, the second select port 211 is a read port, and data may be transmitted from the second chip module 200 to the first chip module 100.

[0062] 4 is a schematic diagram of the cooperation between the first select port 111 of the first chip module and the second select port 211 of the second chip module. The first select port 111 and the second select port 211 are connected by using a service lane of the parallel bus 300. The service lane shown in FIG. 4 is a bidirectional service lane, which transmits data from the first chip module 100 to the second chip module 200 or from the second chip module 200 to the first chip module 100. can be .

[0063] FIG. 5 shows the first selection port of the first chip module of FIG. 4. The first selection port 111 includes a first connection port 1111, a first receiving circuit 1112, a first transmitting circuit 1113, and a first selector switch 1114. The first connection port 1111 serves as an external port of the first selection port 111 and is configured to connect to a service lane of the parallel bus. The first receiving circuit 1112 is configured to realize a write function of the first selection port 111. When the first receiving circuit 1112 is connected to the first connection port 1111, the first selection port 111 serves as a write port. The first transmitting circuit 1113 is configured to realize a read function of the first selection port 111. When the first transmitting circuit 1113 is connected to the first connection port 1111, the first selection port 111 serves as a read port.

[0064] The first connection port 1111 can be connected to the first receiving circuit 1112 and the first transmitting circuit 1113 by using the first selector switch 1114, and can be connected to either the first receiving circuit 1112 or the first transmitting circuit 1113 by using the first selector switch 1114. "Either ... or ..." above means selecting one of the first receiving circuit 1112 and the first transmitting circuit 1113 for connection. For example, the first connection port 1111 can be connected to the first receiving circuit 1112 by using the first selector switch 1114, or the first connection port 1111 can be connected to the first transmitting circuit 1113 by using the first selector switch 1114.

[0065] When the first connection port 1111 is connected to one of the first receiving circuit 1112 and the first transmitting circuit 1113, the first connection port 1111 is disconnected from the other circuit. For example, when the first connection port 1111 is connected to the first receiving circuit 1112, the first transmitting circuit 1113 is disconnected from the first connection port 1111, the first receiving circuit 1112 is in an operating state, and the first transmitting circuit 1113 is in a non-operating state. When the first connection port 1111 is connected to the first transmitting circuit 1113, the first receiving circuit 1112 is disconnected from the first connection port 1111, the first transmitting circuit 1113 is in an operating state, and the first receiving circuit 1112 is in a non-operating state. When the above-mentioned scheme is used, the circuits in an operating state are completely isolated from the circuits in a non-operating state by using the first selector switch 1114, thereby preventing the circuits in a non-operating state from having high parasitic capacitance and signal Residue Stay Formation and movement production times 111 is prevented from affecting the transmission or reception performance of the path, and the first selected port 111 is prevented from supporting high speed signals. moreover Improved. Supported by the first selection port 111 Possible Signal speed: 25Gbps s It can be increased to more than this.

[0066] In an optional embodiment, the first selector switch 1114 may be a low latency high speed switch. For example, the first selector switch 1114 may be Nanoseconds The first selector switch 1114 may be a level changeover switch. The response time of the first selector switch 1114 is 1 ns to 100 ns, for example, 1 ns, 5 ns, 10 ns, 20 ns, 50 ns, 100 ns, or another different response time. Therefore, by using the first selector switch 1114, high-speed switching can be performed between the first transmitting circuit 1113 and the first receiving circuit 1112, and no significant delay is caused in the state switching procedure of the first selection port 111.

[0067] The first selector switch 1114 may be a switch of different forms for switching between the first receiving circuit 1112 and the first transmitting circuit 1113. For example, the first selector switch 1114 is a single-pole double-throw switch, in which the movable end of the first selector switch 1114 is connected to the first connection port 1111, and the two non-movable ends are respectively connected to the first transmitting circuit 1113 and the first receiving circuit 1112 in a one-to-one correspondence. For example, the first selector switch 1114 may specifically be a metal oxide semiconductor field effect transistor, or another switch circuit that can realize switching between the first transmitting circuit 1113 and the first receiving circuit 1112.

[0068] FIG. 6 shows the second selection port of the second chip module of FIG. 4. The second selection port 211 includes a second connection port 2111, a second receiving circuit 2112, a second transmitting circuit 2113, and a second selector switch 2114. The second connection port 2111 serves as an external port of the second selection port 211 and is configured to connect to a service lane in the parallel bus. The second receiving circuit 2112 is configured to realize a write function of the second selection port 211. When the second receiving circuit 2112 is connected to the second connection port 2111, the second selection port 211 serves as a write port. The second transmitting circuit 2113 is configured to realize a read function of the second selection port 211. When the second transmitting circuit 2113 is connected to the second connection port 2111, the second selection port 211 serves as a read port.

[0069] The second connection port 2111 can be connected to the second receiving circuit 2112 and the second transmitting circuit 2113 by using the second selector switch 2114, and can be connected to either the second receiving circuit 2112 or the second transmitting circuit 2113 by using the second selector switch 2114. The above "either ... or ..." means to select one of the second receiving circuit 2112 and the second transmitting circuit 2113 for connection. For example, the second connection port 2111 can be connected to the second receiving circuit 2112 by using the second selector switch 2114, or the second connection port 2111 can be connected to the second transmitting circuit 2113 by using the second selector switch 2114. 3 is connected to.

[0070] When the second connection port 2111 is connected to one of the second receiving circuit 2112 and the second transmitting circuit 2113, the second connection port 2111 is disconnected from the other circuit. For example, when the second connection port 2111 is connected to the second receiving circuit 2112, the second transmitting circuit 2113 is disconnected from the second connection port 2111, the second receiving circuit 2112 is in an operating state, and the second transmitting circuit 2113 is in a non-operating state. When the second connection port 2111 is connected to the second transmitting circuit 2113, the second receiving circuit 2112 is disconnected from the second connection port 2111, the second transmitting circuit 2113 is in an operating state, and the second receiving circuit 2112 is in a non-operating state. When the above-mentioned scheme is used, the circuits in an operating state are completely isolated from the circuits in a non-operating state by using the second selector switch 2114, thereby preventing the circuits in a non-operating state from having high parasitic capacitance and signal Residue Stay Formation and movement production times 211 is prevented from affecting the transmission or reception performance of the path, and the second selected port 211 is prevented from supporting high speed signals. moreover Improved. Supported by second selection port 211 Possible Signal speed: 25Gbps s It can be increased to more than this.

[0071] In an optional embodiment, the second selector switch 2114 may be a low-latency high-speed switch. For example, the second selector switch 2114 may be a nanosecond-level changeover switch. The response time of the second selector switch 2114 is 1 ns to 100 ns, for example, 1 ns, 5 ns, 10 ns, 20 ns, 50 ns, 100 ns, or another different response time. Therefore, by using the second selector switch 2114, high-speed switching can be performed between the second transmitting circuit 2113 and the second receiving circuit 2112, and no significant delay is caused in the state switching procedure of the second selection port 211.

[0072] The second selector switch 2114 may be a switch of different forms for switching between the second receiving circuit 2112 and the second transmitting circuit 2113. For example, the second selector switch 2114 is a single-pole double-throw switch, in which the movable end of the second selector switch 2114 is connected to the second connection port 2111, and the two non-movable ends are connected to the second transmitting circuit 2113 and the second receiving circuit 2112 in a one-to-one correspondence. For example, the second selector switch 2114 is specifically a metal oxide semiconductor field effect transistor, or 2 The transmitter circuit and 2 Alternatively, the signal may be switched between the first and second receiving circuits.

[0073] The different working states of the first selection port 111 and the second selection port 211 during data transmission are described with reference to FIG. 4, FIG. 5 and FIG. 6. When data needs to be transmitted from the first chip module 100 to the second chip module 200, the first selection port 111 functions as a read port and the second selection port 211 functions as a write port. The first connection port 1111 is connected to the first transmission circuit 1113 by using the first selector switch 1114, so the first selection port 111 functions as a read port. The second connection port 2111 is connected to the second reception circuit 2112 by using the second selector switch 2114, so the second selection port 211 functions as a write port. When data needs to be transmitted from the second chip module 200 to the first chip module 100, the first selection port 111 functions as a write port and the second selection port 211 functions as a read port. The first connection port 1111 is connected to a first receiving circuit 1112 by using a first selector switch 1114, so that the first selected port 111 functions as a write port. The second connection port 2111 is connected to a second transmitting circuit 2113 by using a second selector switch 2114, so that the second selected port 211 functions as a read port.

[0074] When the first selected port 111 and the second selected port 211 are switched, the switching can be done based on the transmission / reception requirements of the first chip module. In this embodiment of the present application, the first chip module selects the first selected port 111 and the second selected port 211 as the transmission / reception requirements of the first chip module. for Determine transmit and receive operating requirements 、 The transmit and receive operational requirements are compared with the current transmit / receive state, and based on the comparison, the state must be changed. / Mark the location of the O port and the next period for Actual Service Data To match your sending / receiving requirements, By using preset control mechanisms, Switching the state of a specified I / O port of a first chip module and a peer second chip module (e.g., memory) ofSpecified I / The first chip module may be further configured to initiate a state switch of the O port. Due to Future Period for Determine sending and receiving operational requirements That is ,in particular, It is as follows. The upper layer chip or software of the communication system in which the first chip module is located indicates that the transmit / receive port of the first chip module does not meet the service requirements, and makes a specific adjustment. policy Alternatively, the first chip module makes adjustments based on a mismatch between the service requirements of the current information transmission and the port allocation. For example, if the first chip module finds that data to be received is queued at a port and there is an idle port for transmitting data, the port of the first chip module is adjusted based on the data to be received and transmitted.

[0075] The aforementioned preset control mechanism obtains the required number and positions of write ports and the required number and positions of read ports based on the transmission / reception requirements of the first chip module, and compares the required number and positions of write ports and the required number and positions of read ports with the current number and positions of write ports and the current number and positions of read ports to determine the first selected port that needs to be switched to. For example, the first chip module has N ports, and the N ports are respectively from the 0th port to the (N-1) The number of write ports and the number of read ports determined based on the transmission / reception requirements of the first chip module are M and L, respectively, where M+L=N. The 0th port to the Mth port are read ports, and the (M+1)th port to the (N-1) The first through third ports are write ports. Module Of the current N ports, the 0th port to the (Ma)th port are read ports, and the (M-(a+1))th port to (N-1)The first to Mth ports are write ports. During switching, it is determined that the (M-(a+1))th ports to the Mth ports need to be switched from write ports to read ports. The above N, M, L, and a are all positive integers greater than 1.

[0076] When the first selected port is controlled, the first chip module further includes a first control module 120, which controls the first selected port to switch to a write port or a read port by using the first selected port to match the transmission / reception requirements of the first chip module. Specifically, the first control module 120 controls the first selected port to switch to a write port or a read port according to the transmission / reception requirements of the first chip module (in the above example, the first selected port is a write port or a read port). for Based on the transmission and reception operation requirements, the first selector switch is set to select at least a part of the first selection ports as write ports. Should I switch? Alternatively, the first selected port may be controlled to switch at least a part of the first selected ports to read ports.

[0077] Transmission between first ports of a first chip module for targeted adjustment during a particular switch. port Reception port needs to be compared with the transmission / reception requirements of the first chip module. Therefore, the first control module 120 provided in this embodiment of the present application is further configured to obtain a required ratio of write ports to read ports as a target ratio based on the transmission / reception requirements of the first chip module, where the target ratio is the ratio of the number of write ports to the number of read ports.

[0078] The first control module 120 is further configured to determine a current ratio of write ports to read ports in the first chip module, the current ratio being a current ratio of the number of write ports to the number of read ports, the current number of write ports being the number of write ports among the fixed ports plus some or all of the number of the first selected ports functioning as write ports, and the current number of read ports being the number of read ports among the fixed ports plus some or all of the number of the first selected ports functioning as read ports.

[0079] When the first control module 120 controls the switching, several conditions are included:

[0080] (1) If the current ratio matches the target ratio, the first control module 120 does not control the first selected ports to switch their operating states, the first selector switches do not operate, and each first selected port still maintains its existing operating state.

[0081] (2) If the current ratio differs from the target ratio, the first control module 120 is configured to control the first selector switch to switch the first selected port based on the result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the first chip module matches the target ratio.

[0082] The following two cases may be specifically included: a. If the current ratio is smaller than the target ratio, the first control module controls at least some of the first selected ports functioning as read ports to switch to write ports until the ratio of the number of write ports to the number of read ports is equal to the target ratio; b. If the current ratio is larger than the target ratio, the first control module controls at least some of the first selected ports functioning as write ports to switch to read ports until the ratio of the number of write ports to the number of read ports is equal to the target ratio.

[0083] During a certain switchover, the first control module 120 is configured to obtain the required number and positions of write ports and the required number and positions of read ports based on the transmit / receive requirements of the first chip module, compare the required number and positions of write ports and the required number and positions of read ports with the current number and positions of write ports and the current number and positions of read ports to determine a first selected port 111 that needs to be switched, and switch the determined first selected port 111 based on the transmit / receive requirements of the first chip module 100. FIG. 3 is used as an example. The K first selected ports 111 are When classified Then, a specific first selected port 111 that needs to be switched is determined based on the transmission / reception requirements of the first chip module 100, and a position of the first selected port 111 that needs to be switched is determined. For example, if it is determined that the (K-1)-th first selected port 111 needs to be switched, the position of the (K-1)-th first selected port 111 is determined, and after the position is determined, 、 (K-1)th first selected port 111 So that you can switch between To be controlled.

[0084] When the first chip module 100 switches, the second selected port 211 of the corresponding second chip module 200 is also switched correspondingly. During a certain switching, the second control module 220 controls the second selected port 211 to switch to a read port or a write port based on the transmission / reception requirements of the first chip module 100, so as to match the transmission / reception requirements of the first chip module 100.

[0085] When the first chip module and the second chip module perform switching, the first chip module and the second chip module need to exchange information. In an optional solution, the first control module 120 is further configured to send a switching instruction message to the second chip module 200 and receive a switching completion instruction message fed back by the second chip module 200. After the second control module 220 receives the switching instruction message sent by the first chip module 100, the second control module 220 is further configured to control the corresponding second selection port 211 to switch to a read port or a write port. After the switching is completed, the second control module 220 is further configured to send a switching completion instruction message to the first control module. This realizes information interaction between the first chip module 100 and the second chip module 200, and ensures that the paired first selection port 111 and second selection port 211 can be switched correspondingly.

[0086] In order to facilitate understanding of the switching to a write port or a read port for the first port of the first chip module provided in this embodiment of the present application, a detailed description is provided below with reference to the flow chart shown in the accompanying drawings. To be described In the method steps, the primary device is a first chip module and the secondary device is a second chip module.

[0087] FIG. 7 illustrates a method step by which a first port of a first chip module can be dynamically allocated. , P Primary Device Used for receiving and transmitting services respectively It is assumed that the ratio of first ports is a:b (whereas the ratio of receive ports to transmit ports of the secondary device is b:a). Specifically, among the first ports of the primary device there are a*n Rx ports (write ports) and b*n Tx ports (read ports). In the secondary device , PPrimary Device Used for receiving and transmitting services respectively When the ratio of the first ports is a:b, the ratio of the receive ports to the transmit ports of the secondary device is b:a. Specifically, there are a*n Tx ports and b*n Rx ports among the second ports of the secondary device. Based on the port allocation method, the following steps are performed:

[0088] Step 001: Obtain the transmission / reception requirements of the primary device.

[0089] The primary device predicts the required receiving bandwidth or transmitting bandwidth for a future period based on the service requirement plan to obtain the number of required write ports and the number of required read ports. for It has existing functionality for determining transmit and receive operational requirements, and therefore will not be described in detail again here.

[0090] Step 002: Based on the sending / receiving requirements of the primary device , P The first selected port of the primary device is switched to a read port or a write port until the transmit / receive requirements of the primary device are matched.

[0091] Specifically, the primary device will for Determine whether the actual service transmission / reception requirements (target ratio) match the current conditions (current ratio) for the following period for If the actual service sending / receiving requirements match the current state, the following actions are not taken: for If the actual service transmission / reception requirements do not match the current state, a required ratio of write ports to read ports is obtained as a target ratio based on the transmission / reception requirements of the primary device. The details of the current transmission / reception state of the primary device are determined, and the current ratio of write ports to read ports in the current primary device is a:b. That isThe current service transmission / reception state is further compared with the actual requirement, and the target ratio of the service lanes is adjusted to a':b', which is also the target ratio of the write port to the read port between the first ports correspondingly.

[0092] If the current ratio is different from the target ratio, the first selected port is controlled to be switched to a read port or a write port based on the result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the primary device matches the target ratio. If the two ratios are different, |a'-a| first selected ports are marked and a state switching procedure is initiated. In addition, the state switching procedure is performed to switch the SerDesI of the peer secondary device to the target ratio. / O port ( That is , the second selected port).

[0093] Before the switching occurs, the first selected port that needs to be switched to is determined, and the determined first selected port is switched based on the transmit / receive requirements of the chip module. For example, the particular first selected port that remains in the current state is determined. and , Status The specific first selected port that needs to be switched and During the switchover, the state is The attitude is , only for the determined first selected port that needs to be switched Can be switched .

[0094] During a particular switchover, the first control module controls the first selector switch in the first selected port whose state needs to be switched to perform the switchover, and after the switchover procedure, the primary device: Self completes the state switching of the first port and begins to enter the service transmit / receive phase.

[0095] When the first selected port of the primary device is switched, the secondary device also completes the state switching of the second selected port of the secondary device and starts to enter the service transmission / reception phase, and the switching of the second selected port of the secondary device matches the switching of the first selected port of the primary device.

[0096] All Se r DesI / O port Once the switch completes, the system will In The effective bandwidth is reached, i.e., the ratio of the number of read service lanes to the number of write service lanes is a':b'.

[0097] In the above explanation, port switching between the primary and secondary devices is determined by using several mechanisms. can be Which device is the primary device and which device is the secondary device may be pre-configured and determined. Alternatively, for two peer devices: For a certain period of time, Which device is the primary device and which is the secondary device? , special In the switchover procedure described above, arbitration can be provided by the primary device or jointly by the peer devices via handshaking negotiation. Completed The primary device may be for It constantly monitors the actual service requirements and may make necessary adjustments in real time to the current transmission / reception conditions. These different water retainers are described in detail below.

[0098] FIG. 8 shows a specific method in which the primary device and the secondary device perform the port switching procedure through in-band management. An example in which the first selected port of the primary device is a read port and the second selected port of the secondary device is a write port is used for explanation. The following In the description,The Tx port may also be called the transmitter, and the Rx port may also be called the receiver.

[0099] It is assumed that on the service lane (e.g., differential link) in the current state, the primary device transmits data and the peer secondary device receives data, i.e., the corresponding first selected port of the primary device is a Tx port, and the corresponding second selected port of the peer secondary device is an Rx port.

[0100] The primary device monitors the transmit / receive state switch requirements, and if a service lane specifies that the peer side (second selected port) should be switched to a state where it transmits and the primary device (first selected port) receives, the primary device switches states. The necessity When it detects this, the Tx port stops sending service data packets (stops data transmission) , Pi A special command that requests the router to switch its Rx port to a Tx port. bit Send stream S1 to the secondary device. bit Stream S1 is the same as all other streams defined by the current system. bit Unlike a stream, it has a specific format and is sent by the secondary device. identification The specific transmission can be controlled by the first control module. In this case, the first control module transmits a switch instruction message ( bit The device is further configured to transmit a stream S1).

[0101] Switching instruction message ( bit Stream S1) was sent Then, the first selected port of the primary device is switched from the Tx port to the Rx port, and enters a receiving standby state after the switching is completed. The above switching is also controlled by using the first control module. That is, the first control module bitAfter controlling the first selector switch to transmit stream S1, the first control module sets the operating state of the first selected port to Switch The first selector switch is controlled so as to

[0102] The second selected port on the secondary device was originally in the Rx port state and received the bit After receiving stream S1, switch from Rx port to Tx port It becomes possible When the secondary device switches, the switching is controlled by using a second control module. After receiving a switching instruction message sent by the primary device paired with the secondary device, the second control module controls the second selected port to switch to a read port or a write port. In the procedure shown in FIG. 8, the second control module controls the second selected port to switch to a read port.

[0103] After completing the switchover, the secondary device (nine Lock Data Recovery) Rocking A special one used for bit Begin sending stream S2 to the primary device. bit Stream S2 is the same as all other streams defined by the current system. bit Unlike a stream, it has a specific format and is determined by the primary device. identification It can be done. bit Stream S2 may be used as a switch complete indication message. bit Stream S2 is also transmitted by using the second control module. After the second selected port is switched, the second control module bit Send stream S2 to the primary device.

[0104] Sent by the secondary device bit After receiving stream S2, the primary device continues to hold the CDR until it is complete. Start lockingSecondary Device By Bit Sending stream S2 but After a period T1 (≧0) after completion, the secondary device starts to transmit service data to the primary device. In this case, the first selected ports at both ends of the service lane To and the second selected port teeth, State Switching of completion Let , Service Communication of start do .

[0105] The hand shown in Figure 8 Priority I / It should be understood that this is one of the specific methods for realizing the state switching of the O port. bit In addition to handshaking using the stream, the primary and secondary devices may also communicate with each other using out-of-band control signals. communication and may make decisions.

[0106] 9 is a flow chart of communication and decision making by the primary device and the secondary device by using out-of-band control signals. Different from the procedure shown in FIG. 8, in the procedure shown in FIG. 9: Different devices have different bit Send stream S1 In Figure 8, the bit Stream S1 is , No. However, in FIG. bit The stream S1 is transmitted by out-of-band control. In this case, in addition to the included first and second control modules, the system further includes a third control module. The third control module functions as an out-of-band control module and is separately connected to the first control module of the primary device and the second control module of the secondary device. In use, the third control module transmits a switch instruction message ( bitThe first control module is configured to transmit the stream S1) to the secondary device paired with the primary device. In other words, the first control module is no longer bit The third control module does not transmit stream S1. bit Transmit stream S1. In this way, switching between the primary and secondary devices is also achieved. can be .

[0107] In the procedures shown in Figures 8 and 9, the state of the first selected port and the state of the second selected port are switched almost synchronously. However, in the system provided in this embodiment of the present application, the state of the first selected port and the state of the second selected port are switched almost synchronously. , non Synchronously , alternatively The state may be switched, i.e., one side notifies the peer side that the state switch is complete in an in-band or out-of-band manner, after which the other side initiates the state switch.

[0108] Figure 10 shows , No. 1 Select Port and 2 Select Port Asynchronous state switching by 10 is a schematic flowchart of the initial state of the primary device and the secondary device in FIG. 10 is the same as the initial state of the primary device and the secondary device in the flowchart shown in FIG. 9. bit By sending stream S1 (first switch instruction message), the secondary device switches to switch the second selected port to the sending port. After switching, the second selected port is set to the primary device. bit Transmit stream S1 (second switching instruction message). bit After receiving the stream S1, the primary device controls the first selected port to switch to the write port. bit The waiting time after sending the stream S1 is T2, and T2 (≧0) is the time when the secondary device requests the primary device to switch states and the CDR Rocking For bitAfter the waiting time T2, the secondary device bit Send stream S2 (switching completion message). Secondary device By Bit Sending stream S2 but After a period T1 (≧0) after completion, the secondary device starts to transmit service data to the primary device. In this case, the first selected ports at both ends of the service lane To and the second selected port teeth, State Switching of completion Let , Service Communication of start do .

[0109] In a system that corresponds to the procedure shown in FIG. bit The stream S1 may further be transmitted via an out-of-band control (third control module) set by the system. The third control module is configured to send a first switching instruction message to the second control module, and after receiving the second switching instruction message fed back by the second control module, send a second switching instruction message to the first control module. The first control module may send the second switching instruction message to the first control module. of Reception did Thereafter, it is further configured to control the changeover switch of the first selected port to perform the changeover.

[0110] Books The system provided in this embodiment of the application comprises: Can be dynamically allocated I / O port Use You may send or receive resources by This can be seen from the above explanation. The primary device in the system will for Monitor service send / receive requirements, compare service send / receive requirements with their current state, and based on the comparison, their state should be changed. / Mark the location of the O port and the next period forBy using a pre-configured control mechanism to match the actual service transmission / reception requirements, the specified I / O of the primary device is activated at the determined time. / O Port state switching and peer secondary device of Specified I / In the above process, the primary device continuously monitors the service lane. Look , the switching procedure may be repeatedly initiated if necessary. / Dynamic resource allocation of O ports is realized, and service data of Sending and Receiving When doing so The randomness of the chip is better matched, / Increased utilization of O ports reduces PCB design complexity.

[0111] In addition, I / At the O port, low delay Nobu( number Nanoseconds (at level) high-speed switch but, Between the transmitting circuit and the receiving circuit This is used to switch between ,There is a circuit Specific When operating in one state, a circuit in another state is switched Cut No adverse effects of parasitic capacitance and signal stubs on currently operating circuits due to interruptions, thereby / O port of The quality of the signal transmitted or received by the operating circuit is greatly improved and supported Possible High-speed signaling speeds will increase to 25Gbps or more. In addition, system delays Caused by Significant adverse effects Mona stomach.

[0112] 7, 8, 9 and 10, an embodiment of the present application provides a port allocation method for a primary device. The allocation method includes the following steps:

[0113] Step 001: Obtain the transmission / reception requirements of the primary device.

[0114] For more details, please refer to the relevant descriptions of Figures 7, 8, 9, and 10.

[0115] Step 002: Switch the first selected port of the primary device to a read port or a write port according to the obtained transmission / reception requirement of the primary device.

[0116] Specifically, a required ratio of write ports to read ports is obtained as a target ratio based on the transmission / reception requirements of the primary device.

[0117] The current ratio of write ports to read ports in the current primary device is determined.

[0118] If the current ratio differs from the target ratio, the first selected port is controlled to switch to a read port or a write port based on the result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the primary device matches the target ratio.

[0119] Before the switching is performed, a first selected port that needs to be switched is determined, and the determined first selected port is switched based on the transmission / reception requirements of the primary device. The transmission / reception status of the corresponding first selected port is adjusted based on the transmission / reception requirements of the primary device.

[0120] In the switching process, a switching instruction message is sent to a peer secondary device paired with the primary device, and a switching completion instruction message is received back by the secondary device. It should be understood that the switching instruction message can be sent before or after switching, which is not particularly limited in this embodiment of the present application.

[0121] In the above technical solution, the first selected port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the primary device, thereby increasing the read / write bandwidth of the primary device. In addition, the first control module controls the working state of the first selected port to flexibly adjust the number of read ports and the number of write ports of the primary device.

[0122] 7, 8, 9 and 10, an embodiment of the present application provides a port allocation method for a secondary device. The allocation method includes the following steps:

[0123] Step 001: Obtain the transmission / reception requirements of the primary device.

[0124] For more details, please refer to the relevant descriptions of Figures 7, 8, 9, and 10.

[0125] Step 002: Switch the second selected port of the secondary device to a read port or a write port based on the sending / receiving requirement of the primary device.

[0126] Specifically, after receiving the switching instruction message sent by the primary device, the corresponding second selected port is controlled to be switched to a read port or a write port, and after the switching is completed, a switching completion instruction message is sent to the primary device. For details of the switching and information interaction, please refer to the related descriptions of Figures 7, 8, 9 and 10.

[0127] 11 shows another communication system according to an embodiment of the present application. The first chip module 100 and the second chip module 200 shown in FIG. 11 differ from the first chip module 100 and the second chip module 200 shown in FIG. 3 in the number of first selected ports. In FIG. 11, each of the multiple first ports 110 is a first selected port. Every port can be switched to a write port or a read port. Similarly, each of the multiple second ports 210 is a second selected port. Every port can be switched to a write port or a read port. During switching, the transmit port and receive port and can be matched in any ratio. For the port switching method of the system shown in Figure 11, please refer to the port switching method of the system shown in Figure 2. The details will not be described again here.

[0128] Books In the port setting scheme of the communication system provided in this embodiment of the application, the ports of the first chip module 100 and the ports of the second chip module 200 may be arranged such that at least some or all of the ports of the plurality of first ports 110 are first selected ports, and at least some or all of the ports of the plurality of corresponding second ports 210 are second selected ports. From the above explanation, it can be seen that The system shown in FIG. port And write port This can be used when the ratios I and I need to be matched in any ratio. / Considering that the O port has high design complexity and high power, the solution shown in Fig. 2 also has some practical application scenarios. In service situation The specific data transmission service or data reception service is carried out through the unidirectional service lane, and the value of L or M may be determined according to the actual application scenario, and its state may be switched to achieve a larger effective bandwidth. can be A separate service lane is used for dynamic allocation. Therefore, different types of I / O ports can be adapted to different application scenarios. All ports are All MAY support state switching to accommodate random read / write scenarios in the service lane. Instead, ,Design complexity To some extent In order to reduce power consumption, the IO port bidirectional transmission is related to the actual situation. I / O port that and one-way transmission I / O port that Mixed with May .

[0129] In one variation, the communication system may further include only the first chip module described above, and the second chip module may include another Embodiment Alternatively, the communication system may further include only the second chip module mentioned above, and the first chip module is configured to flexibly adjust the read / write service lane in the communication system. can be Under the condition that Embodiment Use.

[0130] The present application further provides a chip module. The chip module includes a plurality of first ports and a first control module. At least some of the plurality of first ports are 1. is a selection port, 1. The selected port is each The first control module controls the first selected port to switch to a read port or a write port according to the transmit / receive requirements of the chip module or the received switching command, so as to match the transmit / receive requirements of the chip module. For the first port and the first selected port of the chip module, please refer to the first port and the first selected port of the first chip module described above. Details will not be described again here.

[0131] When the chip module controls port switching, the received switching command is from the peer chip module. Alternatively, the adjustment is made based on the sending / receiving requirements of the chip module. During switching, after receiving the switching instruction message sent by the peer chip module, the first control module 1. The first control module is further configured to control the selected port to switch to the read port or the write port, and after the switching is completed, the first control module is further configured to send a switching completion indication message to the first control module. The function of the first control module is described in the above-mentioned first chip module. In Please refer to the specific functions of the first control module, the details will not be described again here.

[0132] During a certain switching, the first control module is further configured to obtain a required ratio of the write port to the read port as a target ratio based on the transmission / reception requirements of the chip module, determine a current ratio of the write port to the read port in the current chip module, and if the current ratio is different from the target ratio, control the first selected port to switch to the read port or the write port based on the result of the comparison between the target ratio and the current ratio until the ratio of the read port to the write port of the chip module matches the target ratio. For details, please refer to the process of controlling port switching by the first control module of the first chip module mentioned above. Details will not be described again here.

[0133] The first selected ports are ports whose state can be switched, and each first selected port includes a first connection port, a first receiving circuit, a first transmitting circuit, and a first selector switch. The first connection port is connected to either the first receiving circuit or the first transmitting circuit by using the first selector switch. When the first receiving circuit is connected to the first connection port, the first selected port functions as a write port. When the first transmitting circuit is connected to the first connection port, the first selected port functions as a read port. For more information, see the First Chip Module. In Please refer to the first selection port. The details will not be explained again here.

[0134] An embodiment of the present application further provides a mobile terminal. The mobile terminal includes the chip module in any one of the above embodiments and a peer chip module connected by using a signal. The arranged first selection port can selectively function as a read port or a write port, so that switching can be performed based on the working state of the chip module, thereby increasing the read / write bandwidth of the communication system. In addition, 1. When the selected port functions as a read port, the receiving circuit is completely disconnected from the connection port. Similarly, when the first selected port functions as a write port, the transmitting circuit is completely disconnected from the connection port. In this way, 1. The effect of idle circuits on selected ports is avoided, improving the operating efficiency of the communication system.

[0135] As shown in Fig. 12, an embodiment of the present application further provides a signal processing module 1000 for realizing the function of the aforementioned method. The signal processing module 1000 may be a communication device or an apparatus in the communication device. The signal processing module 1000 includes at least one processor 1001 for realizing the function of the apparatus in the aforementioned method. For example, the processor 1001 may be configured to control the communication interface 1003 (first selection port) to perform state switching based on the acquired transmission / reception requirement of the first chip module. For details, please refer to the detailed description in the method. The details will not be described again here.

[0136] In some embodiments, the signal processing module 1000 may further include at least one memory 1002 for storing program instructions and / or data. The memory 1002 is coupled to the processor 1001. The coupling in the embodiments of the present application is an indirect coupling or communication connection between the devices, units, or modules for information exchange between the devices, units, or modules, and may be in an electrical, mechanical, or other form. In another embodiment, the memory 1002 may alternatively be located outside the signal processing module 1000. The processor 1001 may cooperate with the memory 1002. The processor 1001 may execute the program instructions stored in the memory 1002. At least one of the at least one memory may be included in the processor.

[0137] In some embodiments, the signal processing module 1000 includes a communication interface 1003 for communicating with another device by using a transmission medium, so that the apparatus in the signal processing module 1000 may communicate with another device. For example, the communication interface 1003 may be a transceiver, a circuit, a bus, a module, or any type of communication interface, and the other device may be a network device, another terminal device, etc. The processor 1001 is configured to transmit and receive data by using the communication interface 1003 and realize the method of the aforementioned embodiment. For example, the communication interface 1003 may be configured to transfer signals.

[0138] The connection medium between the communication interface 1003, the processor 1001, and the memory 1002 is not limited in this embodiment of the present application. For example, in this embodiment of the present application of FIG. 12, the memory 1002, the processor 1001, and the communication interface 1003 may be connected by using a bus, which may be classified into an address bus, a data bus, a control bus, etc.

[0139] In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array, or another programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor, or any conventional processor, etc. The steps of the methods disclosed with reference to the embodiments of the present application may be directly executed by a hardware processor, or may be performed by a combination of hardware and software modules in the processor.

[0140] In this embodiment of the present application, the memory is a hard disk drive (HDD) or solid state drive (S It may be a non-volatile memory such as SD) or may be a random access memory such as e.g. (R AM) and other volatile memories With The memory may be, but is not limited to, any other medium capable of carrying or storing expected program code in the form of instructions or data structures and accessible by a computer. The memory in the embodiments of the present application may alternatively be a circuit or any other device capable of implementing a storage function and configured to store program instructions and / or data.

[0141] All or part of the methods in the embodiments of the present application may be realized by using software, hardware, firmware, or any combination thereof. When software is used to realize the embodiments, all or part of the embodiments may be realized in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed in a computer, the present invention application The procedures or functions according to the embodiments of are generated in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, a network device, user equipment, or another programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wire (e.g., coaxial cable, optical fiber, or digital subscriber line). (DThe information may be transmitted by a computer, such as a mobile telephone, a mobile communication network (SMN), a mobile telephone, a mobile telephone network (MIS), a mobile telephone network (MSN ... (D The optical recording medium may be a semiconductor medium (e.g., SSD), etc.

[0142] Those skilled in the art will appreciate that Example It is apparent that various modifications and variations can be made to the present application without departing from the scope of the present invention. The present application is intended to cover these modifications and variations of the present application as long as they fall within the scope of protection defined by the following claims and their equivalent technologies. [Explanation of symbols]

[0143] 100 First Chip Module 110 First Port 111 First selected port 112 fixed port 120 First Control Module 200 Second Chip Module 210 Secondary Port 211 Second selected port 212 fixed port 220 Second Control Module 300 Parallel Bus 1000 Signal Processing Module 1001 Processor 1002 Memory 1003 Communication Interface 1111 First connection port 1112 First receiving circuit 1113 First transmitting circuit 1114 First selector switch 2111 Second connection port 2112 Second receiving circuit 2113 Second transmission circuit 2114 Second selector switch

Claims

1. A chip module, comprising: a first control module; At least a part of the plurality of first ports is a first selection port, and the first selection port functions as a read port or a write port; The first control module controls the first selected port to switch to a read port or a write port according to the transmit / receive requirements of the chip module so as to match the transmit / receive requirements of the chip module; The first control module obtains a required number of write ports and a required number of read ports based on the transmit / receive requirements of the chip module; Comparing the desired number of write ports and the desired number of read ports with the current number of write ports and the current number of read ports to determine a first selected port that needs to be switched to. The method further comprises: Each first selection port comprises a first connection port, a first receiving circuit, a first transmitting circuit, and a first selector switch, and the first connection port is connected to one of the first receiving circuit and the first transmitting circuit by using the first selector switch; When the first receiving circuit is connected to the first connection port, the first selection port functions as a write port; When the first transmitting circuit is connected to the first connection port, the first selected port functions as a read port. Chip module.

2. The first control module is further configured to obtain a required ratio of write ports to read ports as a target ratio based on the transmission / reception requirements of the chip module, and determine a current ratio of write ports to read ports in the current chip module; 2. The chip module of claim 1, wherein if the current ratio differs from the target ratio, the first control module is configured to control the first selected port to switch to a read port or a write port based on a result of a comparison between the target ratio and the current ratio until the ratio of read ports to write ports of the chip module matches the target ratio.

3. 3. The chip module of claim 2, wherein the first control module is further configured to determine the first selected port that needs to be switched and to switch the determined first selected port based on the transmission / reception requirements of the chip module.

4. The first control module is If the current ratio is smaller than the target ratio, control at least a part of the first selected ports functioning as read ports to be switched to write ports; or When the current ratio is greater than the target ratio, at least a part of the first selected ports functioning as write ports is controlled to be switched to read ports. The chip module of claim 3 further configured as follows:

5. The chip module of claim 1 , wherein the first control module is further configured to send a switching instruction message to a peer chip module paired with the chip module, and receive a switching completion instruction message fed back by the peer chip module.

6. 1. A communication system comprising: A first chip module and a second chip module, The first chip module is a chip module according to any one of claims 1 to 5, A communication system, wherein a first port of the first chip module and a second port of the second chip module are connected in a one-to-one correspondence.

7. the second chip module includes a plurality of second ports and a second control module; At least a portion of the plurality of second ports are second selected ports; The second control module controls the second selected port to switch to a read port or a write port based on a transmission / reception requirement of a peer chip module paired with the second chip module; 7. The communication system according to claim 6, wherein the first port of the first chip module and the second port of the second chip module are connected in a one-to-one correspondence.

8. at least, A first control module in a chip module obtains transmission / reception requirements of the chip module; The first control module switches the first selected port of the chip module to a read port or a write port based on the acquired transmission / reception requirements of the chip module; Including, the first control module obtains a required number of write ports and a required number of read ports based on the transmit / receive requirements of the chip module; Comparing the desired number of write ports and the desired number of read ports with the current number of write ports and the current number of read ports to determine a first selected port that needs to be switched to. It is configured as follows: Each first selection port comprises a first connection port, a first receiving circuit, a first transmitting circuit, and a first selector switch, and the first connection port is connected to one of the first receiving circuit and the first transmitting circuit by using the first selector switch; When the first receiving circuit is connected to the first connection port, the first selection port functions as a write port; When the first transmitting circuit is connected to the first connection port, the first selected port functions as a read port. The port allocation method.

9. The step of switching the first selected port of the chip module to a read port or a write port based on the acquired transmission / reception requirements of the chip module specifically includes: obtaining a required ratio of write ports to read ports as a target ratio based on the transmission / reception requirements of the chip module; determining a current ratio of write ports to read ports in the current chip module; and If the current ratio is different from the target ratio, controlling the first selected port to switch to a read port or a write port based on a result of a comparison between the target ratio and the current ratio until the ratio of read ports to write ports of the chip module matches the target ratio.

9. The port allocation method of claim 8, wherein:

10. determining the first selected port that needs to be switched and switching the determined first selected port based on the transmission / reception requirements of the chip module; The port allocation method of claim 9, further comprising:

11. sending a switch instruction message to a peer chip module paired with the chip module; receiving a switching completion indication message fed back by the peer chip module; The port allocation method of claim 10, further comprising:

12. A chip module according to any one of claims 1 to 5; a peer chip module connected to the chip module; A mobile terminal comprising:

Images