Computing system and method of operation thereof

Abstract

To provide a computing system and a method for enabling high-performance searching, comparing, and / or sorting.SOLUTION: A 3D search engine receives searches for application to word lines WL9010 of a nonvolatile memory array, uses two word lines per bit of information of the searches and two memory devices per bit of stored feature to search against, optionally enabling don't care and / or wildcard encoding, and uses respective bit lines of the nonvolatile memory array as respective matching lines for searching. Respective memory strings of the nonvolatile memory array are usable to store respective data words, e.g., corresponding to features to search for. Respective pluralities of the memory strings are coupled in parallel to respective shared bit lines. Various encodings of features and searches enable exact, approximate, and range matching.SELECTED DRAWING: Figure 1A

Description

[Technical field]

[0001] The present disclosure relates to 3D in-memory search (IMS), which can be implemented using 3D-NAND memory and is applicable to big data and / or artificial intelligence (AI) processing. [Background technology]

[0002] The growth of big data and AI (e.g., AI hardware accelerators) increases the importance of searching, comparing, and / or sorting data. Traditional systems implement concurrent searches using ternary content addressable memory (TCAM) technology.

[0003] Conventional TCAM technology can be implemented using static random access memory (SRAM) techniques and therefore has a relatively low memory density (such as 16 transistors to form a single TCAM cell) and relatively high power usage.

[0004] Recently proposed TCAM technologies can be implemented using non-volatile memory technologies such as those based on two transistor two register (2T2R) and two ferroelectric field effect transistor (2FeFET) technologies. However, non-volatile implementation TCAM technologies require paired memory for a single TCAM cell (or paired memory cells to implement one search bit or one data bit), thus limiting the efficiency of search and data storage.

[0005] Exemplary techniques using NAND flash-based IMS features enabled to perform exact match and approximate match operations are described in PHTseng et al., "In-Memory-Searching Architecture Based on 3D-NAND Technology with Ultra-high Parallelism," 2020 IEDM; and PHTseng et al., "In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories," 2022 VLSI.

[0006] Therefore, there is a need for techniques that enable high performance searching, comparison, and / or sorting, for example, with respect to big data and / or AI processing. Summary of the Invention

[0007] One or more computer systems can be configured to perform particular operations or actions by having software, firmware, hardware, or a combination thereof installed on the system that causes the system to perform actions during operation. One or more computer programs can be configured to perform particular operations or actions by containing instructions that, when executed by a data processing device, cause the device to perform the actions.

[0008] A first aspect includes a computing system having a plurality of memories, each of which optionally has a respective match line coupled to a respective sense amplifier, a respective source line, and a respective plurality of memory strings each coupled to (a) the respective match line and (b) the respective source line, each memory string including a respective plurality of series-connected floating gate transistors each having and responsive to (c) a respective configured state and (d) a respective control input. The engine also includes a plurality of word lines each coupled to a respective one of the respective control inputs of each of the series-connected floating gate transistors; and a search encoder enabled to receive a search and drive the word lines in accordance with a search encoding; where (e) each memory string is enabled to couple the respective match and source lines to which the respective memory string is coupled via a match-finding impedance in response to the configured state of the memory string that closely matches the control inputs of the series-connected floating gate transistors of the memory string; and (f) each sense amplifier is enabled to couple the respective match and source lines to which it is coupled via a match-finding impedance in response to the configured state of the memory string that closely matches the control inputs of the series-connected floating gate transistors of the memory string; (g) each memory string is further enabled to couple the respective match and source lines to which the memory string is coupled through a no-match-finding impedance in response to the configured state of the memory string not closely matching the control input of the series-connected floating gate transistors of the memory string, and (h) each sense amplifier is further enabled to generate a respective indication of whether the match line to which it is coupled is coupled to the source line through the no-match-finding impedance.

[0009] Other embodiments of the first aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the method.

[0010] Some computing systems optionally include one or more of the following features: The word lines operate in pairs according to the search encoding, and the configured states are managed in pairs according to a feature encoding. Each configured state corresponds to a respective threshold voltage. Each of the respective control inputs is coupled to a respective gate of another one of the series-connected floating gate transistors. The threshold voltage is settable via one or more programming operations. Each of the memory strings optionally includes a respective memory string enabling device in response to a respective memory string enabling control input selectively enabling or disabling the respective memory string independent of the word line. Implementations of the described techniques optionally include hardware, methods or processes, or computer software on a computer-accessible medium.

[0011] A second aspect includes receiving one or more search parameters; encoding the search parameters according to a particular search encoding of a plurality of search encodings to generate a pair of word line voltages, the particular search encoding enabling a search for a match with a feature stored in a pair of floating gate transistors according to a particular feature encoding of a plurality of feature encodings, where the particular search encoding and the particular feature encoding enable representation of ones, zeros, and either ones or zeros; driving pairs of word lines of a plurality of series-connected instances of the pair of floating gate transistors according to the generated word line voltages, the series-connected The stored instances are organized as a respective plurality of memory strings operable in parallel to affect a plurality of shared match lines, each shared match line coupled to two or more of the memory strings, each pair of word lines coupled to at least two of the instances of the pair of floating gate transistors; sensing voltage changes on the shared match lines to determine which of the shared match lines have a voltage change above a predetermined sensing threshold; and providing a result of the determining as an indication of a relative match between the search parameters and the stored features. Other embodiments of the second aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the method.

[0012] Some methods optionally include one or more of the following features: A method, wherein at least one of the plurality of search codings or at least one of the plurality of feature codings is according to at least one of an extended coding and a one-hot coding. At least one of the plurality of search codings or at least one of the plurality of feature codings is according to an inverse extended coding. At least one of the stored features corresponds to a range stored using one-hot coding. At least one of the pairs of word line voltages is according to a range coded as one-hot coding. At least one of the plurality of search codings or at least one of the plurality of feature codings is according to a low-efficiency coding. Implementations of the described techniques optionally include hardware, a method or process, or computer software on a computer-accessible medium.

[0013] A third aspect includes a computing system comprising: an interface circuit enabling a host agent to provide a search and receive one or more results of the search; a plurality of blocks of memory strings, each block optionally having a respective plurality of memory strings each receiving the same set of word lines having voltages determinable in response to the search; a plurality of sense amplifiers each coupled to a corresponding one of the memory strings from each of the blocks; and a priority encoder circuit enabled to receive a match indication from the sense amplifier; wherein the sense amplifier is enabled to determine, with respect to a match between (1) characteristic information stored in the memory strings coupled to the sense amplifier and (2) the word lines received by the memory strings coupled to the sense amplifier, (3) that there is no match, and (4) that there is at least one match; and the priority encoder circuit enabled to indicate at least a portion of the results as a highest priority match of any matches identified by the sense amplifier based on the determination of the sense amplifier. Some computing systems include corresponding computer systems, devices, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods.

[0014] An implementation optionally includes one or more of the following features: The computing system optionally includes the host agent. The priority encoder circuit is enabled to indicate at least a portion of the results as a second highest priority match among any matches identified by the sense amplifier based on the determination of the sense amplifier. The feature information is stored in the memory string by configuring threshold voltages of floating gate transistors of the memory string. Two or more of the blocks are operable simultaneously. A feature encoding is used to encode at least a portion of the feature information and a search encoding is used to encode at least a portion of the search. The feature encoding is at least one of an extension encoding, a reverse extension encoding, a one-hot encoding, and a low-cost encoding. The computing system is part of a system-on-chip (SOC). An implementation of the described techniques optionally includes hardware, a method or process, or computer software on a computer-accessible medium. [Brief description of the drawings]

[0015] [Figure 1A] FIG. 1 shows a schematic diagram of an exemplary 3D (search) engine. [Figure 1B] 1B illustrates several aspects of the example 3D (search) engine of FIG. 1A in different details. [Figure 1C] FIG. 1B illustrates some aspects of the example 3D (search) engine of FIG. 1A in greater detail.

[0016] [Figure 1D] FIG. 1 illustrates an exemplary 2D (search) engine and its use.

[0017] [Figure 1E] FIG. 13 illustrates an example of the use of extended coding in a 2D (search) engine in a 3D (search) engine.

[0018] [Figure 1F]FIG. 1 illustrates an example of one-hot coding usage in a 2D (search) engine in a 3D (search) engine.

[0019] [Diagram 2] FIG. 1 illustrates an example extension encoding for a 3D (search) engine.

[0020] [Diagram 3] FIG. 1 illustrates an example one-hot coding for a 3D (search) engine.

[0021] [Figure 4A] FIG. 2 illustrates an example extended coding and a corresponding example low-efficiency coding.

[0022] [Figure 4B] FIG. 1 illustrates an example extended encoding along with the Hamming distance compared to an input of 1.

[0023] [Figure 4C] FIG. 13 illustrates example threshold voltages and word line voltages that enable comparison of 1's, 0's, and don't cares.

[0024] [Figure 4D] FIG. 13 shows icons for high and low gate overdrive for high and low cell current capabilities.

[0025] [Figure 4E] FIG. 13 illustrates floating gate transistor impedance as a function of search information versus stored data.

[0026] [Figure 5A] FIG. 1 illustrates an example inverse expansion encoding for a search input of a 3D (search) engine.

[0027] [Figure 5B] FIG. 13 graphically illustrates an example Hamming distance as a function of stored data values ​​and search input values ​​for inverse extended encoding.

[0028] [Figure 6] FIG. 13 graphically illustrates an example Hamming distance as a function of stored data values ​​and search input values ​​for an extended encoding.

[0029] [Figure 7A] FIG. 1 illustrates an example of one-hot coding with memory ranges.

[0030] [Figure 7B] FIG. 13 illustrates one-hot encoding for an example input range.

[0031] [Figure 8] FIG. 1 illustrates an example operational flow for a 3D (search) engine.

[0032] [Figure 9] FIG. 1 illustrates an example 3D engine appliance comprising an example 3D engine device.

[0033] [Figure 10] FIG. 1 illustrates an exemplary hardware system having a 3D (search) engine. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] A detailed description of a technique relating to an architecture for a 3D search engine is provided with reference to FIGS. 1A-10.

[0035] One or more flow diagrams are described herein. The processes described by the flow diagrams can be implemented and / or instructed using a processor programmed using a computer program stored in a memory accessible to a computer system, can be executed by a processor using dedicated logic hardware (including field programmable integrated circuits), and various combinations thereof. Various actions can be combined, performed in parallel, and / or performed in different sequences without affecting the processing performed. In some cases, rearrangement of actions achieves the same result only if certain other changes are also made. In other cases, rearrangement of actions achieves the same result only if certain conditions are met. Moreover, for clarity, some of the flow diagrams herein omit some actions that are not necessary to understand the disclosed techniques. Various additional actions can be performed before, after, and / or between the actions shown.

[0036] Examples of selected acronyms, mnemonics, and abbreviations used in the description are as follows: [Table 1]

[0037] An example of a memory string is multiple memory devices connected in series. An example of a memory device is an element enabled to store information indicative of one of at least two mutually exclusive states of the memory device. The states are settable via programming the memory device and readable via activating a control input of the memory device. In some types of memory devices, programming is via configuring the threshold voltage of the memory device. Configuring is sometimes referred to as programming the memory device (e.g., to a 1 or 0). Configuring is sometimes referred to simply as storing a value (e.g., a 1 or 0). 3D (search) engine concept

[0038] Disclosed herein is a novel 3D search engine architecture that can be implemented using 3D-NAND memory to enable high performance searching, comparison, and / or sorting, for example, for big data and / or AI processing. The architecture enables low latency, high resolution, high content density, multi-block capability, and robust reliability. The architecture is applicable to various fields such as big data search, AI hardware accelerators and / or classifiers, approximate computing, associative memory, few-shot learning, SSD data management, DNA matching, data filtering, hyper-dimensional computing, and other applications that benefit from an IMS enabled for long search terms and large data capacity. Since the architecture enables high performance comparison and sorting, as well as searching, the term "search" is inserted in parentheses as in "3D (search) engine" and "2D (search) engine".

[0039] A novel 3D (search) engine receives a search for application to a word line of a non-volatile memory array. The 3D (search) engine uses two word lines for each bit of information in the search. The 3D (search) engine uses each bit line of the non-volatile memory array as a respective match line for the search. Each memory string (e.g., a NAND memory string) of the non-volatile memory array can be used to store a respective data word, e.g., corresponding to a feature to be searched. Each of the multiple memory strings is coupled in parallel to a respective shared bit line.

[0040] In some usage scenarios, the read latency of a 3D (search) engine is reduced (potentially at the expense of larger current transients) by operating multiple blocks simultaneously via switching multiple activation controls, e.g., multiple string select lines (SSLs).

[0041] In some usage scenarios, a 3D (search) engine is used, for example with extended coding and / or one-hot coding, to facilitate optional range search capabilities.

[0042] The 3D (search) engine has particular applicability to big data and / or AI, for example, for various search, comparison and / or sorting operations. A host agent directs the storage of features in the 3D (search) engine and then submits searches to the 3D (search) engine to determine matches to the stored features. An indication of a match is returned to the host agent.

[0043] A 3D (search) engine uses multiple 2D (search) engines to simultaneously perform operations across the 2D (search) engines and may be referred to as a "search cube" or simply a "cube." The 3D (search) engine is enabled to simultaneously perform multiple searches using multiple search parameters across multiple stored features. In some usage contexts, the concurrent searches are per 2D (search) engine. For example, each 2D (search) engine is responsible for a unique search operation. In some usage contexts, the concurrent searches are within a particular 2D (search) engine. For example, different parts of a particular 2D (search) engine are responsible for a unique search operation. In some usage contexts, the concurrent searches are parallelized across multiple 2D (search) engines and within one or more of the 2D (search) engines. An indication of a match between the search parameters and the stored features is provided by the 2D (search) engine for processing. Processing may include, for example, determining an overall similarity between the search parameters and the stored features, and / or identifying one or more stored features that similarly compare against the search parameters, for example via one or more of a buffer, cache, and / or priority encoding (circuitry).

[0044] Each 2D (search) engine used by the 3D (search) engine includes a plurality of memory devices to detect whether there is a match between search information provided to the 2D (search) engine as determined from the search parameters and features stored in the 2D (search) engine. The 2D (search) engine generates a match indication in response to the detection and provides the match indication for buffering, caching, priority encoding, and output for use in the system. The features are stored according to a feature storage encoding. The search information is encoded according to a search encoding. Examples of storage and feature encoding include expansion encoding, one-hot encoding, low-cost encoding, and reverse expansion encoding. The 3D (search) engine is enabled to selectively perform exact and approximate matching, for example, according to the storage and / or feature encoding. An exact match corresponds to a full bit match, for example, every bit of the search parameters matches every bit of the value stored in the memory string. An approximate match corresponds to a match of less than all of the bits, for example a match of all but one bit, a match of all but two bits, or alternatively a match of a percentage of the bits, for example 90% match (e.g., a match of 9 out of 10 bits).

[0045] A control agent of the 3D (search) engine selectively operates the 2D (search) engines simultaneously. The simultaneous operation enables simultaneous match determination for the same set of search information provided to the simultaneously operating 2D (search) engines. Each 2D (search) engine generates match indications according to the search information and features stored in the 2D (search) engine. A priority encoder of the 3D (search) engine processes the match indications to determine relative matches between and / or within one or more of the 2D (search) engines.

[0046] The 2D (search) engine has multiple memory strings operable simultaneously. The memory strings of the 2D (search) engine are coupled in parallel between the match line and the source line of the 2D (search) engine. Each of the memory strings can be used to store a respective feature, each feature having a number of bits and stored according to a selected one of the feature encodings. Each of the memory strings can be used to compare a (encoded) search input with the (encoded) features stored in the memory string. Prior to a search, the control agent performs pair-wise programming of the features into the memory devices according to the selected feature encoding. The pair-wise programming follows the use of serially connected pairs of memory devices for each bit of the feature. For a search, the control agent drives the control inputs in pairs according to the search information and according to the selected search encoding. The search information includes a search pattern and optional mask and / or range information for use in the encoding to enable searching according to a range. The results of the search are provided as a number of match indications, which are then optionally buffered, cached, and / or priority encoded. Example implementation of a 3D (search) engine

[0047] An exemplary 3D (search) engine implementation uses floating gate transistors as memory devices. The floating gate transistors are instantiated in NAND serially coupled memory strings. Therefore, the 3D (search) engine is sometimes referred to as a 3D NAND search engine, or more broadly as a search system, or alternatively as a computing system. The memory strings are then instantiated in parallel between shared bit lines and shared source lines. The memory strings coupled to the shared bit lines are sometimes referred to as a 2D (search) engine, or more broadly as a memory.

[0048] The floating gate transistor is programmed to store a bit of a characteristic according to at least two mutually exclusive states. The programming configures a threshold voltage of the floating gate transistor. The programmed floating gate transistor conditionally responds (e.g., via a change in impedance) to indicating a match between the stored characteristic and a search provided on a word line coupled to the control gate of the floating gate transistor.

[0049] The word lines are operable to provide one or more search inputs to be searched among the stored characteristics programmed into the floating gate devices of the memory strings, and each memory string is operable to compare a search value provided via a word line coupled to the memory string with the stored characteristics programmed into the memory string.

[0050] Each shared bit line can be used as a match line to indicate zero, one, or more matches between one or more search inputs provided to each memory string coupled to the shared bit line, respectively, and the stored characteristics of the respective memory strings.

[0051] The match indications provided by the shared bitline are priority coded (e.g., according to a predefined priority scheme) and one or more match results are indicated to one or more other agents in the system. Thus, multiple 2D (search) results are combined into one or more 3D (search) results.

[0052] 1A-1C collectively illustrate various aspects of an example 3D (search) engine, such as a NAND-based 3D (search) engine as 3D engine 9000.

[0053] FIG. 1A shows a schematic of an example 3D (search) engine, FIG. 1B shows some aspects of the example 3D (search) engine of FIG. 1A in different details, and FIG. 1C shows some aspects of the example 3D (search) engine of FIG. 1A in more detail.

[0054] Returning to FIG. 1A, the diagram has been simplified for clarity.

[0055] The 3D engine 9000 comprises a plurality (e.g., 128K) of identical (or alternatively, substantially similar) 2D (search) engines as the 2D engine 9050. For clarity, all details of all but one of the 2D (search) engines are omitted.

[0056] Each of the 2D (search) engines of the 2D engine 9050 has a number of memory strings, conceptually represented by memory strings 9030, for storing feature information provided to the 3D engine 9000. The stored features are conceptually represented by stored features 9900. The memory strings 9030 are also used to determine matches between the stored feature information and the search information provided to the 3D engine 9000 by conditionally affecting a respective match line of match lines 9040. For example, conditionally affecting includes discharging a pre-charged value of a match line based on a match between a portion of the search input and a portion of the stored features.

[0057] The feature encoder 9003 receives features 9001 provided to the 3D engine 9000 (e.g., sourced by a host agent). In response, the feature encoder 9003 generates, via a selected feature encoding, a feature input 9004 suitable for application to a memory string of a 2D (search) engine for storage as part of the stored features 9900. Each memory string of each 2D (search) engine is enabled to store a unique feature, and therefore the feature input 9004 is represented as having a unique binding to each of the 2D (search) engines of the 2D engine 9050. The unique binding can be implemented via a separate signal to each of the 2D (search) engines, a shared time-multiplexed set of shared signals (e.g., a bus), or any other suitable communication mechanism that enables each of the memory strings of each of the 2D (search) engines to store a unique feature.

[0058] The search encoder 9005 receives a search 9002 provided to the 3D engine 9000 (e.g., sourced by a host agent). In response, the search encoder 9005 generates, via a selected search encoding, a search input 9006 suitable for application to the memory string of the 2D engine 9050 to determine a match (if any) between the search input 9006 and the stored features 9900. Each 2D (search) engine receives the same search information, and therefore the search input 9006 is represented as having parallel couplings to each of the 2D (search) engines. This is in contrast to the unique couplings used for distribution of feature information. The parallel couplings can be implemented via separately buffered signals to each of the 2D (search) engines, a single set of coupling signals (e.g., a bus), or any other suitable communication mechanism that enables each of the 2D (search) engines to receive the same search information. Each memory device of each memory string of a particular 2D (search) engine receives a unique word line (as provided via search input 9006), as conceptually shown in FIG. 1A as a sampling of word lines shown as WL 9010. While each 2D (search) engine receives the same search information, each of the memory strings within a 2D (search) engine receives unique search information.

[0059] In response to the search input 9006, and based on the stored characteristics 9900 of each of the 2D (search) engines, each 2D (search) engine bit line (e.g., each of the match lines 9040) provides respective match information to a respective sense amplifier of the SA 9007 to determine a match indication for each of the 2D (search) engines. The match indication is then processed by the page buffer, cache, priority encoder 9008 and provided as an output match result 9009, for example, communicated to the host agent as result 9099.

[0060]

[0023] Referring now to Figure 1B, some aspects of the example 3D (search) engine of Figure 1A are shown in more detail. Elements in Figure 1B and Figure 1A that have the same element identifiers are the same elements. As with Figure 1A, Figure 1B has been simplified for clarity.

[0061] Three 2D (search) engines (2D (search) engine_0 150, 2D (search) engine_128K-2 158, and 2D (search) engine_128K-1 159) are shown with their respective simultaneously operable memory strings. As summarized with respect to FIG. 1A, the 3D engine 9000 comprises sense amplifier circuitry. There is one sense amplifier (collectively SA 9007) per 2D (search) engine. For clarity, three sense amplifiers are shown, each coupled to a respective one of the 2D (search) engines shown. The 3D engine 9000 further comprises post-detection circuitry (collectively page buffer, cache, priority encoder 9008) that processes the output of each of the sense amplifiers of the SA 9007 to generate the result of the match search as an output match result 9009.

[0062] Each of the 2D (search) engines is shown in the X and Z dimensions. In some variations constructed as integrated circuits based on planar processes, the layers of the integrated circuit are stacked in the Z dimension. The 2D (search) engines are arranged in the Y dimension.

[0063]

[0023] Referring now to Figure 1C, some aspects of the example 3D (search) engine of Figures 1A and 1B are shown in more detail. Elements in Figures 1C, 1B and 1A that have identical element identifiers are identical elements. As with Figures 1A and 1B, Figure 1C has been simplified for clarity.

[0064] Each of the 2D (search) engines includes a respective bit line. In particular, 2D (search) engine_0 150, 2D (search) engine_128K-2 158, and 2D (search) engine_128K-1 159 include BL_0 140, BL_128K-2 148, and BL_128K-1 149, respectively. Note that in FIG. 1A, the bit lines are collectively referred to as match lines 9040 because each bit line can be used to indicate a match between the search information and the stored information. Each 2D (search) engine includes multiple memory strings (e.g., 512 memory strings). For clarity, four memory strings are shown. Each memory string is selectively coupled to the bit line of the 2D (search) engine via a transistor controlled by a respective SSL input. The transistors and the SSL inputs collectively enable selectively enabling (disabling) blocks of memory strings based on the activation (deactivation) of the SSL inputs. Each SSL input is coupled to a respective memory string of the 2D (search) engine. Thus, each SSL input enables selectively enabling (disabling) blocks of memory strings based on the activation (deactivation) of the SSL inputs.

[0065] For example, SSL0 170 is enabled to selectively couple a first memory string of 2D (search) engine_0 150 to BL_0 140, a first memory string of 2D (search) engine_128K-2 158 to BL_128K-2 148, and a first memory string of 2D (search) engine_128K-1 159 to BL_128K-1 149, each via a respective transistor. SSL0 170 is also enabled to selectively couple a first memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to bitlines therein via respective transistors.

[0066] In another case, the SSL 511 179 is enabled to selectively couple the 512th memory string of the 2D (search) engine_0 150 to the BL_0 140, the 512th memory string of the 2D (search) engine_128K-2 158 to the BL_128K-2 148, and the 512th memory string of the 2D (search) engine_128K-1 159 to the BL_128K-1 149, each via a respective transistor. The SSL 511 179 is also enabled to selectively couple the 512th memory string (not shown) of the 2D (search) engine 128K-3 between the 2D (search) engine_0 150 and the 2D (search) engine_128K-2 158 to the bit lines therein via respective transistors.

[0067] Similar to the bit lines, each of the 2D (search) engines includes a respective source line (shown but not identified for clarity). Each memory string is selectively coupled to the 2D (search) engine's source line via a transistor controlled by a respective GSL input.

[0068] Again, similar to the bit lines, for example, GSL0 160 is enabled to selectively couple the first memory string of 2D (search) engine_0 150 to the source line of 2D (search) engine_0 150, the first memory string of 2D (search) engine_128K-2 158 to the source line of 2D (search) engine_128K-2 158, and the first memory string of 2D (search) engine_128K-1 159 to the source line of 2D (search) engine_128K-1 159, each via a respective transistor. GSL0 160 is also enabled to selectively couple the first memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to the source line therein via a respective transistor. The source lines are all connected to ground.

[0069] Again, similar to the bit lines, in another case, GSL511 169 is enabled to selectively couple the 512th memory string of 2D (search) engine_0 150 to the source line of 2D (search) engine_0 150, the 512th memory string of 2D (search) engine_128K-2 158 to the source line of 2D (search) engine_128K-2 158, and the 512th memory string of 2D (search) engine_128K-1 159 to the source line of 2D (search) engine_128K-1 159, each via a respective transistor. GSL511 169 is also enabled to selectively couple a 512th memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to the source lines therein via respective transistors.

[0070] The SSL and GSL inputs are coupled in parallel to corresponding transistors in each of the corresponding memory strings in each of the 2D (search) engines. Since there are 512 memory strings in each of the 2D (search) engines, there are 512 SSL inputs and 512 GSL inputs. Note that in FIG. 1C, a dotted extension of GSL0 160 is shown, but the couplings between the transistors of GSL0 160 and 2D (search) engine_128K-1 159 have been omitted for clarity.

[0071] In the 3D Engine 9000, each of the memory strings is the same length of 128 floating gate transistors (excluding the transistors that couple each memory string to the bit lines and source lines). In a planar integrated circuit process implementation of the 3D Engine 9000, a certain number of layers are used to implement the memory strings. As the length of the memory string increases, the number of layers used to implement the memory string also increases. Therefore, doubling the length of the memory string also doubles the layers used to implement the memory string.

[0072] Referring now to word lines, conceptually, each 2D (search) engine is coupled to the same 2D array of word lines. In the X dimension, there are 512 columns of word lines, one-to-one with each of the 512 memory strings. In the Z dimension, there are 128 rows of word lines, one-to-one with the floating gate transistors of each of the memory strings. Therefore, the 2D array of word lines is 512 columns by 128 rows or 512*128 individual word lines. Each word line couples to a single floating gate transistor of a single memory string in each of the 2D (search) engines. Note that in FIG. 1C, a dotted extension of WL0_0 100 is shown, but the coupling between WL0_0 100 and the floating gate transistors of 2D (search) engine_128K-1 159 has been omitted for clarity.

[0073] For example, WL0_0 100 couples to the floating gate transistors of the first memory string of 2D (search) engine_0 150, the floating gate transistors of the first memory string of 2D (search) engine_128K-2 158, and the floating gate transistors of the first memory string of 2D (search) engine_128K-1 159. WL0_0 100 also couples to the floating gate transistors in each of the first memory strings (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158.

[0074] In another case, WL0_511 109 couples to the floating gate transistor of the 512th memory string of 2D (search) engine_0 150, the floating gate transistor of the 512th memory string of 2D (search) engine_128K-2 158, and the floating gate transistor of the 512th memory string of 2D (search) engine_128K-1 159. WL0_511 109 also couples to the floating gate transistor in each of the 512th memory strings (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158.

[0075] In this description, word lines are sometimes referred to by block numbers and layer numbers in a 2D context. Conceptually, blocks exist in the Y and Z dimensions, and layers exist in the X and Y dimensions. Conceptually, block numbers correspond to column numbers, and layer numbers correspond to row numbers.

[0076] The blocks correspond to memory strings from each of the 2D (search) engines. As a specific example, the memory string bound between GSL511 169 and SSL511 179 corresponds to block number 511. As another specific example, the memory string bound between GSL0 160 and SSL0 170 corresponds to block number 0.

[0077] A layer corresponds to a floating gate transistor from each of the memory strings of all 2D (search) engines. As a specific example, the floating gate transistors coupled to WL0_511 109 and WL0_0 100 are part of layer number 0. As another specific example, the floating gate transistor coupled to WL1_511 119 is part of layer number 1. Similarly, the floating gate transistors coupled to WL2_511 129, WL126_0 180, and WL127_0 190, respectively, are part of layer numbers 2, 3, 126, and 127, respectively. Although a layer of floating gate transistors corresponds to one or more planar integrated circuit process layers, a layer also corresponds to a layer with respect to the planar integrated circuit process.

[0078] Thus, the word lines can be identified as "WL", "<layer number>" and "<block number>" in the Z and X dimensions, respectively. Thus, WL0_0 100 is layer number 0 and block number 0. WL0_511 109 is layer number 0 and block number 511.

[0079] FIG. 1D shows 2D(search)engine_0 150 in the context of portions of FIG. 1A and FIG. 1B. A number of word lines are illustrated and identified in the "WL", "<layer number>" and "<block number>" scheme described above, as indicated by the icon near WL6_511. 2D(search)engine_0 150 comprises 512 memory strings. For clarity, four memory strings are shown (MemStr0 130, MemStr1 131, MemStr510 138, and MemStr511 139). The floating gate transistors of each of the memory strings are arranged and operated in pairs. An example of one of the pairs is IMS data bit 134. Another example is IMS data bit 135. Conceptually, each of the even-numbered layer-numbered word lines is coupled to one of the floating gate transistors of the pair. For example, WL0_0, WL0_1...WL0_510, and WL0_511 of layer 0 are each coupled to a respective one of the pairs, such as WL2_0...WL2_511 of layer 2, to WL126_0...WL126_511 of layer 126. Additionally, each of the odd-numbered layer numbered word lines is coupled to the other one of the floating gate transistors of the pair. For example, WL1_0, WL1_1...WL1_510, and WL1_511 of layer 1 are each coupled to the other floating gate transistor of the pair to which WL0_0, WL0_1...WL0_510, and WL0_511 of layer 0 are respectively coupled.

[0080] FIG. 1D also illustrates a specific use case for a 2D (search) engine.

[0081] Each memory string can be used to store a feature. Therefore, the 512 memory strings of 2D(Search)Engine_0 150 can be used collectively to store up to 512 features. For clarity, one of the features is shown as Feature0 1133. Each pair of floating gate transistors can be used to store a single bit of one of the features. There are 64 pairs of floating gate transistors in each of the memory strings. Therefore, each of the memory strings can be used to store up to 64 bits of a feature.

[0082] Each memory string can be used to compare a feature stored therein to a search input provided via a word line coupled to the memory string. Each floating gate transistor of the memory string responds to a word line voltage (e.g., a threshold voltage of the floating gate transistor configured by programming) according to the feature bit stored by the floating gate transistor. For example, when operated in pairs, the pair of floating gate transistors indicates a match to a search input provided to the pair of floating gate transistors via the pair of word lines via a match-finding impedance (e.g., a relatively low impedance). The pair indicates a lack of match via a no-match impedance (e.g., a relatively high impedance). Thus, in response to every pair of stored feature bits of floating gate transistors matching a multi-bit search input as provided via a corresponding pair of word lines across the entire memory string, the entire memory string exhibits a corresponding memory string match-finding impedance. In response to a match of less than all pairs, the entire memory string exhibits a corresponding memory string impedance higher than the memory string match-finding impedance. In response to no matching pairs, the entire memory string exhibits a corresponding memory string no-match impedance. Between the limits of full bit match and no bit match, the memory string exhibits a corresponding memory string impedance that monotonically decreases (increases) as the stored feature bits correspondingly become more (less) bit-for-bit matched compared to the applied word line input. String current 136D shows the current in the memory string as based on the shown memory string impedance.

[0083] For example, MemStr0 130 is coupled to BL_0 140 via activation of SSL0 and to CSL 145 via activation of GSL0. The feature 0 1133 stored in MemStr0 130 is programmed to all 0 bits except for a single 1 bit in the floating gate transistor pairs of IMS data bits 135.

[0084] Consider the first operating scenario for an example where all word line pairs (WL0_0, WL1_0...WL126_0, and WL127_0) coupled to MemStr0 130 indicate a search for all 0 bits in the pairs. In response, all floating gate transistor pairs of MemStr0 130, except for the pair of IMS data bits 135, exhibit a match-finding impedance. The pair of IMS data bits 135 exhibit a no-match-finding impedance (because there is no match between the word line search input and the stored feature bit). Therefore, MemStr0 130 overall exhibits an impedance higher than the memory string match-finding impedance. SA 143 detects that the impedance is higher than the memory string match-finding impedance and indicates via sense output 144 that there is no match between the word line pair and feature0 1133.

[0085] Consider a second operating scenario for an example where the word line pair (WL2_0 and WL3_0) coupled to IMS data bit 135 indicates a search for a 1 bit, while the remainder of the word line pairs coupled to MemStr0 130 (WL0_0, WL1_0, WL4_0, WL5_0...WL126_0, and WL127_0) indicate a search for a 0 bit in the pair. In response, all floating gate transistor pairs in MemStr0 130 that include the pair of IMS data bit 135 exhibit a match-finding impedance. Therefore, MemStr0 130 collectively exhibits an impedance equal to the memory string match-finding impedance. SA 143 detects that the impedance is the memory string match-finding impedance and indicates via sense output 144 that there is a match between the word line pair and feature 0 1133.

[0086] SA 143 performs sensing and generates a sensing output 144, for example, by detecting a voltage change on BL_0 140 above (or below) a predefined sensing threshold within a sensing time interval. In some variations, the voltage change is due to MemStr0 130 discharging a precharged value on BL_0 140 according to the indicated memory string impedance. In response to a first operating scenario in which the impedance is higher than the memory string match-finding impedance, BL_0 140 is discharged by MemStr0 130 at a slower rate compared to a second operating scenario in which the impedance is equal to the memory string match-finding impedance. The sensing threshold and / or sensing time interval are set to enable distinguishing between match-finding impedance and non-match-finding impedance based on sensing speed (e.g., engine bandwidth and / or latency) and noise immunity (e.g., engine resilience).

[0087] 1A, 1B, and 1C, the sense output 144, along with corresponding sense amplifier information of other 2D engines, is provided to a page buffer, cache, priority encoder 9008 which buffers, caches, and / or priority encodes the sense output 144 in the overall context of the 2D engine sense outputs.

[0088] In some applications, the controller activates multiple blocks of the 2D (search) engine to enable searching multiple blocks simultaneously, for example, multiple SSL inputs are activated in the same search operation to search multiple blocks during the same search operation.

[0089] For example, the controller activates SSL_511 and SSL_510 in the same search operation to enable searching two blocks simultaneously in each of the 128K 2D (search) engines, 2D (search) engine_0 150...2D (search) engine_128K-2 158 and 2D (search) engine_128K-1 159. Thus, the controller enables the 3D engine 9000 to search 2*128K blocks simultaneously. Alternatively, the controller activates any two SSL inputs in the same search operation to enable searching any two blocks simultaneously. In other cases, the controller activates any four, six, eight, 32, 64, 128, 256, or 512 SSL inputs in the same search operation to enable searching corresponding multiple blocks simultaneously. For example, the controller activates all 512 SSL inputs in the same search operation. Therefore, the controller enables the 3D engine 9000 to simultaneously search 512 blocks containing 512*128K memory strings. Optionally, the controller responds to a control register that specifies whether and how many blocks are searched simultaneously.

[0090] 1A, 1B, and 1C show an example 3D (search) engine as having a particular number of 2D (search) engines, each of which has a particular number of memory strings, each of which has a particular number of IMS data bits (each as a respective pair of floating gate transistors). In particular, the 3D engine 9000 has 128K 2D (search) engines (2D (search) engine_0 150...2D (search) engine_128K-1 159), although some variations have fewer or more 2D (search) engines. Each 2D (search) engine has 512 memory strings (e.g., MemStr0 130...MemStr511 139), although some variations have fewer or more memory strings. Each memory string has 64 IMS data bits (eg, coupled to word line pairs WL0_1 and WL1_0...WL126_0 and WL127_0), although some variations have fewer or more IMS data bits per memory string.

[0091] Some variations of the 2D (search) engine and associated sense amplifier circuitry enable single bit sense amplifier resolution (e.g., match / no match). Some variations enable multiple bits of sense amplifier resolution (e.g., to encode no match, one match, or two or more matches). Some variations enable sense amplifier indications that are analog rather than digital. For example, the sense amplifier output is a monotonically increasing function based on the memory string current, which is a monotonically increasing (or decreasing) indicator of the similarity between the search input and the stored features.

[0092] Some variations of the 3D (search) engine enable identifying at most one feature (stored in a single memory string) as a match for a search. Some variations enable identifying at most multiple features (stored in multiple memory strings) simultaneously as a match for a search. Some variations enable identifying at most one 2D (search) engine simultaneously as having one or more features stored therein as a match for a search. Some variations enable identifying multiple 2D (search) engines simultaneously as each having one or more features stored therein as a match for a search.

[0093] Some variations of the 3D (search) engine enable priority encoding of the match indication according to a given 2D (search) engine priority (e.g., a given 2D (search) engine is the lowest priority and another given 2D (search) engine is the highest priority). Thus, a match indication from a given highest priority 2D (search) engine corresponds to a highest priority match. Furthermore, a match indication from a given second highest priority 2D (search) engine corresponds to a second highest priority match. Some variations enable priority encoding according to the number of stored feature bits in the memory string that match the respective search input bits (e.g., 0 matches, 1 match, 2 matches, or 3 or more matches). Thus, the highest priority match corresponds to the highest number of stored feature bits in the memory string that match the respective search input bits, and the second highest priority match corresponds to the second highest number of stored feature bits in the memory string that match the respective search input bits. Some variations enable priority encoding according to the number of matches a memory string has in a particular 2D (search) engine (e.g., 0 matches, 1 match, 2 matches, or 3 or more matches). Thus, the highest priority match corresponds to the highest number of matching memory strings in a particular 2D (search) engine, and the second highest priority match corresponds to the second highest number of matching memory strings in a particular 2D (search) engine.

[0094] Some variations enable the priority encoding to identify a single matching stored feature. Some variations enable the priority encoding to identify multiple matching stored features. Some variations enable the priority encoding to identify a single "best matching" stored feature, e.g., having the highest number of stored feature bits that match the search, the highest number being less than a maximum stored feature length. Some variations enable the priority encoding to identify multiple "best matching" stored features, e.g., ranked according to the number of stored feature bits that match the search for each of the multiple stored features.

[0095] In different usage scenarios (e.g., due to features programmed into the 2D (search) engine, the provided search information, and / or the encoding thereof), different numbers of 2D (search) engines of the 3D (search) engine detect a match between one or more features stored in one or more of the memory strings of the 2D (search) engine and the search information provided to the 2D (search) engine of the 3D (search) engine.

[0096] In some usage scenarios, zero, one, or more memory strings of the 2D (search) engine detect a match, and the sense amplifier circuitry encodes the match result as multiple bits. For example, the sense amplifier circuitry encodes zero memory string matches, one memory string matches, two memory string matches, and more than two memory string matches as four mutually exclusive encodings. Some variations enable priority encoding according to one or more factors, such as 2D (search) engine priority, number of matching stored feature bits, number of memory strings (e.g., features), etc.

[0097] For example, in response to no matches from any of 2D(search)engine_0 150...2D(search)engine_128K-1 159, SA 9007 provides a vector of all zeros to page buffer, cache, priority encoder 9008. In response, page buffer, cache, priority encoder 9008 priority encodes this all-zero vector into a binary value indicating zero matches and provides that binary value via output match results 9009.

[0098] Continuing with the example, in response to the single memory string of 2D(search)engine_0 150 finding a match, SA 9007 provides a vector with the LSB corresponding to 2D(search)engine_0 150 as 1 and all other bits as 0. In response, page buffer, cache, priority encoder 9008 encodes this vector into a non-zero binary value that identifies 2D(search)engine_0 150 as having a matching memory string.

[0099] Continuing with the example, in response to multiple memory strings of 2D(search)engine_0 150 finding a match and a single memory string of 2D(search)engine_128K-2 158 finding a match, SA9007 provides a vector having a bit corresponding to 2D(search)engine_0 150 as 1, another bit corresponding to 2D(search)engine_128K-2 158 as 1, and all other bits as 0. In response, page buffer, cache, priority encoder 9008 encodes this vector into a non-zero binary value that identifies 2D(search)engine_128K-2 158 as having a matching memory string with the highest priority. 3D (search) engine coding

[0100] The searching, comparison and / or sorting as performed by the 3D (search) engine is subject to a selected feature encoding (for feature storage in the memory string of the 3D (search) engine) and a selected search encoding (for the search performed by the memory string). The feature and search encodings are selected in combination with each other since the matching performed by the memory string is in the context of the encoding selected for feature storage.

[0101] Exemplary encodings that can be used in a 3D (search) engine to store features and / or perform searches include extended encoding, one-hot encoding, low-effect encoding (conceptually a variation of extended encoding that enables reduced pattern and substrate effects), and inverse extended encoding.

[0102] As a brief introduction, Figures 1E and 1F respectively show, in a format similar to Figure 1D, examples of extended coding and one-hot coding usage in the context of 2D (search) engine_0 150. Accordingly, Figures 2 and 3 respectively show extended coding and one-hot coding examples. 3D (search) engine extension coding

[0103] Referring first to the extended encoding, an N-bit binary value (either feature or search) is encoded in a 2^N bit field. The encoding produces two successive fields of bits. Each of the successive fields is either a repeat of 1 or 0. Hence, 2^N-1 is encoded as a single leading 0 and the rest all 1's. The number of 1's is equal to the value being encoded. As a special case, 0 is encoded as all zeros. Thus, the most significant bit is always 0. Thus, in some variants, the most significant bit is not implemented.

[0104] FIG. 2 shows an example extended encoding for a 3D (search) engine. There are two columns in the table. The first column, Value 251, is a 6-bit binary value to be encoded according to the extended encoding. The second column, Extended Encoding 252, is a 64-bit binary extended encoding of the corresponding binary value from the first column. For readability, the 64-bit values ​​are separated every 4 bits by an underscore ("_") character. For brevity, the table omits some values.

[0105] Figure 1E illustrates an example of an extended encoding use of a 2D (search) engine in a 3D (search) engine, specifically 2D (search) engine_0 150 of Figure 1D. Elements in Figures 1E and 1D that have the same element identifier are the same elements.

[0106] Four exemplary features encoded according to the extension encoding of FIG. 2 are summarized in the table in the left portion of FIG. 1E. In particular, MemStr0 130 is programmed to store feature 0 1000E with an extension encoding of 1 (a single 1 bit and 63 0 bits). Each feature bit is stored in a serial pair of memory devices. The feature extension encoding is performed by feature encoder 9003 of FIG. 1A. MemStr1 131 is programmed to store feature 1 1001E with an extension encoding of 4 (four 1 bits and 60 0 bits). Feature 2-509 are programmed to store various values ​​of extension encodings not specifically discussed. MemStr510 138 is programmed to store feature 510 1510E with an extension encoding of 5 (five 1 bits (four of which are shown) and 59 0 bits). MemStr 511 139 is programmed to store feature 511 1511E in an extended encoding of 63 (63 1-bits and a single 0-bit).

[0107] In the illustrated usage scenario, the search is also encoded according to the extension encoding of FIG. 2. The search extension encoding is performed by the search encoder 9005 of FIG. 1A. A search for a value 1 is encoded on a pair of word lines as a search for a single 1 bit and 63 0 bits. Assuming the search is in block 0, the pairs of word lines used for the search are WL0_0, WL1_0...WL126_0, and WL127_0. In response to the extension encoding of 63 being presented on the word lines of block 0, MemStr0 130 enables a current as shown by string current 136E. When the current is sensed by SA 143, it indicates a match and is presented on sense output 144 for further processing.

[0108] In response to none of the stored features matching any of the corresponding search inputs, a current is detected by SA 143 indicating no match and is presented on detection output 144 for further processing.

[0109] The extended coding can be used for approximate matches between search and stored features. The best match (e.g., high similarity) has the highest memory string current (e.g., lowest impedance). The worst match (e.g., low similarity) has the lowest memory string current (e.g., highest impedance). The number of matched (or mismatched) bits can be determined by measuring the memory string current and / or impedance.

[0110] Exemplary search extension coding resolutions include 4 bits implemented using 32 3D-NAND layers, 5 bits using 64 3D-NAND layers, 6 bits using 128 3D-NAND layers, 7 bits using 256 3D-NAND layers, and 8 bits using 512 3D-NAND layers. Thus, the resolution increases by 1 bit when the number of 3D-NAND layers is doubled. 3D (search) engine one-hot coding

[0111] Turning now to one-hot encoding, an N-bit binary value (either a feature or a search) is encoded in a 2^N field. The encoding produces a single 1 bit with all other bits being 0. The single 1 bit is in the bit position that corresponds to the value being encoded.

[0112] FIG. 3 shows an example one-hot encoding for a 3D (search) engine as a table. There are two columns in the table. The first column, Value 351, is a 6-bit binary value to be encoded according to the one-hot encoding. The second column, One-Hot Encoding 352, is a 64-bit binary one-hot encoding of the corresponding binary value from the first column. For readability, the 64-bit values ​​are separated every 4 bits by an underscore ("_") character. For brevity, the table omits some values.

[0113] Figure 1F illustrates an example of one-hot encoding usage for a 2D (search) engine of a 3D (search) engine, specifically 2D (search) engine_0 150 of Figure 1D. Elements in Figure 1F and Figure 1D that have the same element identifier are the same element.

[0114] Four example features encoded according to the one-hot encoding of FIG. 3 are summarized in the table in the left portion of FIG. 1F. In particular, MemStr0 130 is programmed to store feature 0 1000F with a one-hot encoding of 1 (a single 1 bit in bit position 1 and 63 0 bits elsewhere). Each feature bit is stored in a serial pair of memory devices. The feature one-hot encoding is performed by feature encoder 9003 of FIG. 1A. MemStr1 131 is programmed to store feature 1 1001F with a one-hot encoding of 3 (a single 1 bit in bit position 3 and 63 0 bits elsewhere). Feature 2-509 is programmed to store one-hot encodings of various values ​​not specifically discussed. MemStr510 138 is programmed to store feature 510 1510F with a one-hot encoding of 4 (a single 1 bit in bit position 4 and 63 0 bits elsewhere). MemStr 511 139 is programmed to store feature 511 1511F with a one-hot encoding of 63 (a single 1 bit (the most significant bit) in bit position 63 and 63 0 bits elsewhere).

[0115] In the illustrated usage scenario, the search is also encoded according to the one-hot encoding of FIG. 3. The search one-hot encoding is performed by the search encoder 9005 of FIG. 1A. A search for a value 1 is encoded on a pair of word lines as a search for a single 1 bit in bit position 1 and 63 0 bits. Assuming the search is in block 0, the pair of word lines used for the search are WL0_0, WL1_0...WL126_0, and WL127_0. In response to the one-hot encoding of 1 presented on the word lines of block 0, MemStr0 130 enables a current as shown by string current 136F. When the current is sensed by SA 143, it indicates a match and is presented on sense output 144 for further processing.

[0116] In response to none of the stored features matching any of the corresponding search inputs, a current is detected by SA 143 indicating no match and is presented on detection output 144 for further processing. 3D (search) engine low-performance coding

[0117] Referring now to the low-effect coding, the coding is a variation on the extended coding that enables reduced pattern effects and reduced substrate effects of the floating gate transistors in the memory string. Conceptually, the floating gate transistors and corresponding word lines are rearranged such that floating gate transistors that are programmed at the same threshold voltage tend to be adjacent to each other within the memory string. This is accomplished by modifying the extended coding, rather than actually moving the transistors.

[0118] 4A shows an example expanded coding and a corresponding example reduced efficiency coding. For simplicity, the example relates to a memory string of 16 floating gate transistors, and correspondingly 16 word lines.

[0119] There are three columns arranged in a tabular format. The first column, Value 461, is the binary value to be encoded. The second column, Extended Encoding 462, is an 8-bit extended encoding of the value from the first column. The third column, Low-Efficiency Encoding 463, is the equivalent 8-bit low-efficiency encoding of the value from the first column.

[0120] The table has three sections of rows. The first section, search input 404, is a single row representing a respective encoding of three identical search values. The second section, stored features 464, has nine rows, each representing a respective stored feature value according to one of an extended encoding or a reduced efficiency encoding. The third section, memory strings 430, shows memory strings proceeding from left to right, each starting at a bit line "BL", through a string select line "SSL", through a number of word lines "WL...WL", through a ground select line "GSL", and terminating at a current source line "CSL".

[0121] The "HL" entries in the extended coding 462 correspond to a 1 data bit and the "LH" entries correspond to a 0 data bit. Each "H" or "L" letter corresponds to a threshold voltage of a floating gate transistor. The "H" entries in the stored characteristics 464 correspond to a "high" threshold voltage and the "L" entries correspond to a "low" threshold voltage. The H2 and H1 entries in the search input 404 correspond to two respective word line voltages. The particular search input is shown as 3. The underlining in the extended coding 462 and the low effect coding 463 serves to indicate a conceptual rearrangement of the floating gate transistors and corresponding word lines.

[0122] FIG. 4B shows an example extended encoding along with the Hamming distance compared to an input of 1. The input of 1 corresponds to a search input of 1 and is shown encoded according to the extended encoding as input 450. The example encoding is that of FIG. 2. There are three columns in the table. The first column, Value 451, is the 6-bit binary value to be encoded according to the extended encoding. The second column, Extended Encoding 452, is the 64-bit binary extended encoding of the corresponding binary value from the first column. The third column, HD 453, is the Hamming distance between each extended encoding and the extended encoding of the search input of 1 (input 450). The Hamming distance is minimum (0) if the input matches the stored value. The Hamming distance is maximum (62) if the input mismatches nearly every bit of the stored value. For readability, the 64-bit values ​​are separated every 4 bits by an underscore ("_") character. For brevity, the table omits some values.

[0123] 4C illustrates example threshold voltages and word line voltages that enable 1, 0, and don't care comparisons. The left portion of the diagram represents memory state "1" cells as memory state "1" 471. The right portion of the diagram represents memory state "0" cells as memory state "0" 470. This diagram illustrates two sets of relationships between threshold voltages and word line voltages for storing features in the floating gate transistors and driving search information on the word lines to the control gates of the floating gate transistors. Either set can be used depending on the usage scenario.

[0124] The first set corresponds to a first word line voltage VH1 having a value of V2 473 and a second word line voltage VH2 having a value of V3 474. Therefore, for floating gate transistors programmed to be in memory state "1" 471, application of either VH1 (having a value V2 473) or VH2 (having a value V3 474) results in high gate overdrive. For floating gate transistors programmed to be in memory state "0" 470, application of VH2 (having a value V3 474) results in high gate overdrive. However, application of VH1 (having a value V2 473) results in low gate overdrive for those floating gate transistors.

[0125] The second set corresponds to a first word line voltage VL having a value of V1 472 and a second word line voltage VH having a value of V3 474. Therefore, for a floating gate transistor programmed to be in memory state "1" 471, application of VL (having a value of V1 472) results in high gate overdrive. Furthermore, for a floating gate transistor programmed to be in memory state "0" 470, application of VL (having a value of V1 472) results in no gate overdrive. For a floating gate transistor programmed to be in either memory state "1" 471 or memory state "0" 470, application of VH having a value of V3 474 results in high gate overdrive.

[0126] 4D illustrates icons for high and low gate overdrive for low and high floating gate transistors and cell impedances, which conceptually correspond to high and low cell current capabilities, respectively. High gate overdrive 483 represents high gate overdrive with a relatively thick arrow. Low gate overdrive 484 represents low gate overdrive with a relatively thin arrow. High cell current 485 represents a relatively high cell current capability (e.g., a relatively low impedance) with two relatively thick arrows. Low cell current 486 and low cell current 487 represent a relatively low cell current capability (e.g., a relatively high impedance) with one relatively thick arrow and one relatively thin arrow.

[0127] FIG. 4E illustrates floating gate transistor current capability (e.g., impedance) as a function of search information versus stored data. Stored data values ​​499 have four columns: Store 0 490, Store 1 491, Store don't care 492, and Store invalid 493. Input search information 489 has three rows: Search 0 480, Search 1 481, and Wildcard 482. Each cell in the table represents the impedance of each floating gate transistor according to the icon shown in FIG. 4D, as well as the effective impedance of the pair of floating gate transistors shown in each cell, also according to the icon shown in FIG. 4D. Cells 4900, 4902, 4911, 4912, 4920, 4921, 4922, and 4932 represent gate overdrive of both floating gate transistors in the pair, resulting in a relatively low impedance. Cells 4901, 4910, 4930, and 4931 represent gate overdrive of only one floating gate transistor in the pair, resulting in a relatively high impedance. A relatively low impedance represents a match between the search and the data, and a relatively high impedance represents an error.

[0128] As a specific example, consider cell 4900 in a usage scenario of a first set of relationships between threshold voltages and word line voltages VH1 (having value V2 473) and VH2 (having value V3 474). Vy is equal to VH2 and Vx is equal to VH1. Therefore, the upper floating gate transistor controlled by Vy (equal to VH2) has a high current capability corresponding to a high gate overdrive and therefore a low impedance. The lower floating gate transistor controlled by Vx (equal to VH1) also has a high current capability corresponding to a high gate overdrive and therefore a low impedance. Thus, overall, cell 4900 has a high current capability corresponding to a low impedance.

[0129] As another specific example, consider cell 4900 in a usage scenario with a second set of relationships between threshold voltages and word line voltage VL (having a value V1 472) and a second word line voltage VH (having a value V3 474). Vy is equal to VH and Vx is equal to VL. Therefore, the upper floating gate transistor controlled by Vy (equal to VH) has a high current capability corresponding to a high gate overdrive and therefore a low impedance. The lower floating gate transistor controlled by Vx (equal to VL) also has a high current capability corresponding to a high gate overdrive and therefore a low impedance. Thus, overall, cell 4900 has a high current capability corresponding to a low impedance. 3D (search) engine reverse extension encoding

[0130] Turning now to inverse extension encoding, which is conceptually the logical inverse of the extension encoding, but is applied only to search inputs rather than features. Inverse extension encoding is applicable to approximate matches.

[0131] FIG. 5A illustrates, as a table, an example inverse expansion encoding for a search input of a 3D (search) engine in combination with an example (non-inverse) expansion encoding for stored features.

[0132] The table is organized into three sections: the top section describes the inverse extended encoding as applied to a search value to generate a search input for application to a word line, the middle section describes an example input as inverse extended encoded, and the bottom section describes the extended encoding and Hamming distance of a stored value to an example input.

[0133] The first column in the upper section, Search Value 555, is a 6-bit binary search value to be encoded according to the inverse extended encoding. The second column, Inverse Extended Encoding 554, is a 64-bit binary inverse extended encoding of the corresponding binary value from the first column. Note that, as with the extended encoding, in the inverse extended encoding for a 64-bit binary value, the most significant bit is always 1. Thus, in some variations, the most significant bit is not implemented.

[0134] The center section is a reverse expanded encoding of search value 1 as example search value 550.

[0135] The first column in the lower section, stored value 551, is a 6-bit binary feature to be encoded according to the extended encoding for storage into the memory string. The second column, extended encoding 552, is a 64-bit binary extended encoding of the corresponding binary value from the first column. The third column, HD 553, is the Hamming distance between the stored value with its respective extended encoding and a search input of 1 (example search value 550) in the reverse extended encoding. Recall that in a 64-bit binary extended encoding, the most significant bit is always 0, and in a 64-bit binary reverse extended encoding, the most significant bit is always 1. Thus, comparing a particular value encoded according to a 64-bit binary extended encoding with a particular value encoded according to a 64-bit binary reverse extended encoding will always mismatch in the most significant bit. Thus, HD 533 ignores the most significant bit. The Hamming distance is smallest (1) when the stored value is closest to the search input in the reverse extended encoding (ignoring the most significant bit). The Hamming distance is the maximum (64) when the stored value is furthest from the search input in the inverse extended encoding (ignoring the most significant bits).

[0136] For readability, the 64-bit values ​​in the table are separated into 4-bit chunks by an underscore ("_") character. For brevity, the table omits some values.

[0137] FIG. 5B graphically illustrates an example Hamming distance (HD 599) as a function of stored data values ​​(stored data values ​​590) and search input values ​​(search input values ​​506) for the inverse extended encoding.

[0138] Figure 6 graphically illustrates an example Hamming distance (HD 699) as a function of stored data value (stored data value 690) and search input value (search input value 606) for the extended encoding. Figure 6 illustrates how the inverse extended encoding is the "inverse" to the extended encoding, when compared against Figure 5B.

[0139] 5B and 6, a relatively low HD is shown in a relatively light shading compared to a relatively high HD which is shown in a relatively dark shading. The lowest HD is 0 (indicating equality) and is shown in the lightest shading. The highest HD is 63 (indicating a 63-bit mismatch) and is shown in the darkest shading.

[0140] In FIG. 5B (inverse extended coding), HD is 0 along the diagonal. In contrast, in FIG. 6 (extended coding), HD is 63 along the diagonal. Furthermore, in FIG. 5B (inverse extended coding), HD is 63 at the bottom left and top right corners. In contrast, in FIG. 6 (extended coding), HD is 0 at the bottom left and top right corners. Hence, the HD in FIG. 5B is the "inverse" of the HD in FIG. 6.

[0141] Inverse expansion coding can be used for approximate matches between search and stored features. The best match (e.g., high similarity) has the lowest memory string current (e.g., highest impedance). The worst match (e.g., low similarity) has the highest memory string current (e.g., lowest impedance). The number of matched (or mismatched) bits can be determined by measuring the memory string current and / or impedance. 3D (search) engine One-hot coding of stored and input ranges

[0142] 7A shows an example of one-hot encoding with stored ranges as a multi-part table. The table is organized into two sections. The top section describes an example input (value 2) as one-hot encoded as input 750. The bottom section describes the one-hot encoded stored ranges and match information for the example input.

[0143] The first column in the lower section, Value Range 751, is a list of each range of 6-bit features to be encoded and stored as features against which the search input is to be matched. For example, 0 to 2 specifies stored features from 0 to 2 (0, 1, or 2) against which the search input is to be matched. The second column, One-Hot Encoding with Range 752, is a 64-bit binary one-hot encoding for the ranges from the first column. The letter "X" indicates that the corresponding pair of floating gate devices is configured to match either a 1 or a 0, e.g., a don't care search input. The third column, Match? 753, is whether the two example inputs (One-Hot Encoding with Range 752) match the corresponding stored range of features. The two example inputs match the first three one-hot encoded ranges in the table. Note that a one-hot encoding without ranges (e.g., Extended Encoding 352 in FIG. 3) will only match the two example inputs with the two stored feature values.

[0144] For readability, the 64-bit values ​​in the table are separated into 4-bit chunks by an underscore ("_") character. For brevity, the table omits some values.

[0145] FIG. 7B illustrates the one-hot encoding for an example input range as a multi-part table. The table is organized into two sections. The top section describes an example input range (0-4) one-hot encoded as a one-hot encoding 760 for the example input range. The character "X" indicates that the corresponding search input is a wildcard to match any corresponding stored feature bit. The bottom section describes the one-hot encoded stored values ​​and match information for the example input range.

[0146] The first column in the lower section, Value 761, is a 6-bit binary value to be encoded according to one-hot encoding. The second column, One-Hot Encoding 752, is a 64-bit binary one-hot encoding of the corresponding binary value from the first column. The third column, Match? 763, is whether the example input range of 0 to 4 matches the corresponding stored feature. The example input range of 0 to 4 matches the first three one-hot encoded features in the table.

[0147] For readability, 64-bit values ​​are separated into 4-bit chunks by underscore ("_") characters. For brevity, the table omits some values.

[0148] One-hot encoding can be used for exact matching between search and stored features. One-hot encoding with stored ranges can be used for approximate match searches. Programming the stored features with more don't cares increases the range of search inputs that the stored features will match. One-hot encoding of input ranges can be used for approximate match searches. Changing which bits are wildcards shifts the range of search inputs that will match. For example, a stored feature of XX1XX000...00 will match search inputs from 0 to 4, and a stored feature of 0XX1XX000...00 will match search inputs from 1 to 5. 3D (search) engine operation

[0149] FIG. 8 illustrates an example operational flow for a 3D (search) engine (such as 3D engine 9000 of FIG. 1A) as engine flow 800. The flow starts at "Select feature and search encoding" 801. In some usage scenarios, the same encoding is used for the feature and the search. In some usage scenarios, e.g., reverse extension encoding, a different encoding is used for the feature pair search. The flow then proceeds to "Program the feature" 802. The feature to be searched against is programmed according to the selected feature encoding. The flow then proceeds to "Encode the search" 803. The search is encoded according to the selected search encoding. In some applications, the search is performed based on one or more parameters, optionally including mask and / or range information. The flow then proceeds to "Drive the word lines" 804. The word lines are driven according to the search encoding. The flow then proceeds to "Sense the bit lines" 805. The bit line sensing is performed by a sense amplifier. The flow then proceeds to "Priority Encode the Match" 806. The match indications as provided by the sense amplifiers are processed to determine prioritized match information (e.g., as performed by page buffer, cache, priority encoder 9008 of FIG. 1A). Flow then proceeds to "Provide Results" 807. The results are provided, for example, to a host agent (e.g., as output match results 9009 of FIG. 1A). Flow then optionally proceeds back to encode the next search ("Encode Search" 803). 3D (search) engine devices and appliances

[0150] FIG. 9 illustrates an example 3D engine appliance with example 3D engine devices as 3D engine appliance 940 and 3D engine device 950, respectively.

[0151] The 3D engine appliance 940 comprises one or more instances of a 3D engine device, shown for clarity as a single device, 3D engine device 950, and an appliance interface 941.

[0152] The 3D engine device 950 comprises a 3D engine 9000 (e.g., as shown and described with respect to FIGS. 1A-1C). The 3D engine device 950 further comprises a controller 951, an engine interface 953, and an analog source 954. Conceptually, elements of the 3D engine device 950 and / or the 3D engine appliance 940 (other than the 3D engine 9000) function to provide features 9001 and searches 9002 from the host to the 3D engine 9000, and to return results 9099 to the host.

[0153] The controller 951 is enabled to provide overall control of and between the operation of various hardware circuit blocks of the 3D engine device 950. For example, the controller 951 coordinates the operation of the engine interface 953 with the 3D engine 9000. In another example, the controller 951 coordinates the operation of the analog source 954 with respect to configuration information. In another example, the controller 951 optionally coordinates feature and / or search encoding and feature programming as directed via the engine interface 953 and applicable to the 3D engine 9000. In another example, the controller 951 is enabled to perform operations related to any one or more of the operations 801-807 of FIG. 8 in various configurations.

[0154] The engine interface 953 is enabled to interface with agents external to the 3D engine device 950 (such as a host via the appliance interface 941 and the host / bus coupling 942) to use the 3D engine 9000. An example use is to receive commands and data and return status regarding feature and / or search encoding, feature programming, and / or search requests.

[0155] Analog sources 954 are enabled to generate and / or provide one or more analog outputs, for example to a memory array, bit line circuits, sense amplifier circuits, and / or word line circuits of a 3D (search) engine memory array. The analog outputs comprise zero or more voltage and / or current sources (such as reference sources), for example, as generated by one or more bias circuits.

[0156] During operation, the host provides commands for, for example, feature and / or search encoding selection via the host / bus coupling 942 and the appliance interface 941. The appliance interface 941 then provides the commands to the engine interface 953, which are processed by the 3D engine 9000 as directed by the controller 951. Examples of other similarly processed commands include feature programming according to a selected feature encoding, and performing a search according to a selected search encoding. Status or results of commands processed and searches are returned to the host via the host / bus coupling 942 and the appliance interface 941 as provided by the controller 951 and / or the 3D engine 9000 via the engine interface 953. In some variations of the 3D engine device 950, the controller 951 is enabled to operate one or more 2D (search) engines of the 3D engine 9000 simultaneously.

[0157] During operation, a host external to the 3D engine appliance 940 provides feature information for the 3D engine device 950 for programming into the 3D engine 9000. The host then provides one or more search parameters to the 3D engine appliance 940 via the appliance interface 941.

[0158] 9 illustrates a 3D engine 9000 used in a 3D engine device 950, and thus in a 3D engine appliance 940, other usage scenarios are possible. For example, various elements (e.g., an integrated circuit, one or more dies of a system-on-chip, and / or a packaged die) may include one or more 3D engine elements identical to, substantially similar to, or based on 3D engine 9000.

[0159] Other compartmentalizations of elements, connections between elements, and capabilities and / or capacities of the elements shown in the figures, as well as additional elements, are contemplated according to usage requirements. 3D (search) engine system

[0160] 10 illustrates an example hardware system having a 3D (search) engine as a 3D engine system 1000. The system includes hardware blocks CPU 1010, GPU 1020, RAM 1030, 3D engine appliance 940 (of FIG. 9), SSD 1050, HDD 1060, and I / O 1070, which are coupled by a hardware block bus / interface 1080.

[0161] CPU 1010 comprises one or more processing units, microprocessors, signal processors, AI processors, etc., such as any combination of hardware units enabled to execute programmed instructions.

[0162] GPU 1020 comprises one or more processing units, such as any combination of units enabled to accelerate processing for operations that are subject to relatively high parallel processing, such as graphics processing, signal processing, and / or AI processing.

[0163] The RAM 1030 comprises one or more memory elements for storing instructions and / or data in a larger amount than the internal storage of the CPU 1010 and / or GPU 1020. The RAM 1030 can be implemented via volatile memory elements such as, for example, DRAM and / or SRAM.

[0164] SSD 1050 optionally comprises one or more storage elements, such as flash-based storage elements, for storage of instructions and / or data accessible with reduced latency compared to HDD 1060.

[0165] HDD 1060 comprises one or more storage elements, such as rotating-based magnetic and / or optical non-volatile storage elements (e.g., disks), for storage of larger amounts of instructions and / or data than SSD 1050, which is optionally enabled to store.

[0166] The I / O 1070 comprises elements that interface any combination of the CPU 1010, GPU 1020, RAM 1030, 3D engine appliance 940, SSD 1050, and / or HDD 1060 to elements external to the 3D engine system 1000. Exemplary external elements include mass storage devices, local and wide area networks (such as the Internet), human interface components (such as a keyboard, mouse, and / or monitor), and other elements that provide capabilities to extend and / or expand capabilities not otherwise provided by the 3D engine system 1000. The I / O 1070 variously comprises one or more serial and / or parallel communication channels, as well as optional protocol conversion and / or adaptation capabilities to facilitate communication between elements coupled thereto.

[0167] The bus / interface 1080 enables communication between the elements coupled thereto (e.g., the CPU 1010, the GPU 1020, the RAM 1030, the 3D engine appliance 940, the SSD 1050, the HDD 1060, and / or the I / O 1070). The bus / interface 1080 may comprise one or more serial and / or parallel communication channels, as well as optional protocol conversion and / or adaptation capabilities to facilitate communication between the elements coupled thereto.

[0168] Other compartmentalizations of elements, connections between elements, and capabilities and / or capacities of the elements shown in the figures, as well as additional elements, are contemplated according to usage requirements.

[0169] In some circumstances, the 3D engine appliance 940 enables reducing the processing load (e.g., on the CPU 1010 and / or GPU 1020) and / or reducing traffic on the bus interface 1080 by performing processing locally.

[0170] For example, searching within a large database using one-hot encoding (e.g., of stored features and / or search input ranges) to enable range matching is accomplished entirely within the 3D engine appliance 940 once the features are programmed. For another example, comparison within a large AI data set using inverse extension encoding to enable approximate matching is accomplished entirely within the 3D engine appliance 940 once the features are programmed. For another example, sorting a large data set using extension and / or one-hot encoding is accomplished entirely within the 3D engine appliance 940 once the features are programmed. Additional information on 3D (search) engines

[0171] Exemplary memory technologies applicable to the memory array of a 3D (search) engine as disclosed herein include floating gate, split gate, SONOS, floating dot, DRAM, DRAM-like (e.g., 2T0C), FeFET, and any memory technology compatible with searching via word lines and bit lines. Exemplary SONOS memory technology (sometimes referred to as charge trapping memory) uses an insulating layer (e.g., of silicon nitride) with traps to capture and hold charge when injected from the channel. Exemplary floating dot memory technology conceptually replaces the floating gate with a floating silicon nanodot or embeds floating silicon nanodots within a polysilicon gate. Exemplary 2T0C memory technology uses the parasitic capacitance of the lead transistor to store charge rather than an explicit storage capacitor. Exemplary FeFET memory technology uses the permanent electric field polarization of a ferroelectric material embedded between the gate and source-gate conducting regions to store information. Exemplary memory structures applicable to the memory array of the 3D (search) engine include 2D structures (e.g., 2D flash structures) and 3D structures (e.g., 3D flash structures). Exemplary array architectures applicable to the memory array of the 3D (search) engine include NOR / OR type array architectures and AND / NAND type array architectures.

[0172] It is understood that the foregoing disclosure presents implementations, variations, embodiments, and examples in an intended illustrative sense, and not a limiting sense. Modifications and combinations that are within the spirit of the disclosure and the scope of the following claims are contemplated as being appreciable.

Claims

1. Multiple memories, each of which: a respective match line coupled to each sense amplifier; Each source line, and (a) a respective plurality of memory strings each coupled to the respective match line and (b) the respective source line, each memory string including a respective plurality of series connected floating gate transistors each having and responsive to (c) a respective configured state and (d) a respective control input. and a plurality of word lines each coupled to a respective one of the respective control inputs of each of the plurality of series connected floating gate transistors, the plurality of memories comprising a first memory and a second memory, a first word line of the plurality of word lines coupling a first series connected floating gate transistor of a first memory string of the first memory to a first series connected floating gate transistor of a first memory string of the second memory by an inter-memory connection; and a search encoder enabled to receive a search and drive the plurality of word lines in accordance with a search encoding; With wherein (e) each memory string is enabled to couple the respective match and source lines to which the respective memory string is coupled via a match-finding impedance responsive to the configured state of the memory string that closely matches the control input of the plurality of series connected floating gate transistors of the memory string, and (f) each sense amplifier is enabled to generate a respective indication of whether the match line to which it is coupled is coupled to the source line via the match-finding impedance; (g) each memory string is further enabled to couple the respective match and source lines to which the memory string is coupled via a no match-finding impedance in response to the configured state of the memory string not closely matching the control inputs of the plurality of series-connected floating gate transistors of the memory string, and (h) each sense amplifier is further enabled to generate a respective indication of whether the match line to which it is coupled is coupled to the source line via the no match-finding impedance.

2. The computing system of claim 1 , wherein the plurality of word lines operate in pairs according to the search encoding, and the configured states are managed in pairs according to a feature encoding.

3. The computing system of claim 1 , wherein each of the configured states corresponds to a respective threshold voltage.

4. 4. The computing system of claim 3, wherein each of the respective control inputs is coupled to a respective gate of one or more of the plurality of series-connected floating gate transistors.

5. The computing system of claim 3 , wherein the threshold voltage is configurable via one or more programming operations.

6. 2. The computing system of claim 1, wherein each of the memory strings includes a respective memory string enable device responsive to a control input enabling the respective memory string to selectively enable or disable the respective memory string independent of the plurality of word lines.

7. receiving one or more search parameters; encoding the search parameters according to a particular search encoding of a plurality of search encodings to generate pairs of word line voltages, the particular search encoding enabling a search for a match with a feature stored in a pair of floating gate transistors according to a particular feature encoding of a plurality of feature encodings, where the particular search encoding and the particular feature encoding enable representation of 1, 0, and either 1 or 0; driving pairs of word lines of a plurality of series-connected instances of the pair of floating gate transistors according to the generated word line voltage, the plurality of series-connected instances being organized as a respective plurality of memory strings operable in parallel to affect a plurality of shared match lines, each shared match line being coupled to two or more of the plurality of memory strings, each pair of word lines being coupled to at least two of the instances of the pair of floating gate transistors, two of the plurality of memory strings being included in a first memory and a second memory, respectively, a first word line of the plurality of word lines coupling a first series-connected floating gate transistor of one of the plurality of memory strings of the first memory to a first series-connected floating gate transistor of another one of the plurality of memory strings of the second memory by an inter-memory connection; sensing a voltage change on the plurality of shared match lines to determine which of the plurality of shared match lines have a voltage change above a predetermined sensing threshold; and providing a result of the determining step as an indication of a relative match between the search parameters and the stored features. A computing method comprising:

8. The method of claim 7 , wherein at least one of the plurality of search codings or at least one of the plurality of feature codings is according to at least one of an extended coding and a one-hot coding.

9. The method of claim 7 , wherein at least one of the plurality of search encodings or at least one of the plurality of feature encodings is subject to an inverse extension encoding.

10. The method of computing according to claim 7 , wherein at least one of the stored features corresponds to a range stored using one-hot encoding.

11. The method of computing of claim 7 , wherein at least one of the pairs of word line voltages is according to a range coded as one-hot coding.

12. The method of claim 7 , wherein at least one of the plurality of search codings or at least one of the plurality of feature codings is subject to low-performance coding.

13. an interface circuit that enables the host agent to provide a search and to receive one or more results of said search; a plurality of blocks of memory strings, each block having a respective plurality of memory strings each receiving the same set of word lines having voltages determinable in response to said search; a plurality of sense amplifiers, each coupled to a corresponding one of the memory strings from each of the plurality of blocks; and a priority encoder circuit enabled to receive a match indication from the sense amplifier; With wherein the sense amplifier is enabled to determine, with respect to a match between (1) the characteristic information stored in the memory string coupled to the sense amplifier and (2) the word line received by the memory string coupled to the sense amplifier, (3) that there is no match, and (4) that there is at least one match; The priority encoder circuit is enabled to indicate at least a portion of the result as a highest priority match among any matches identified by the sense amplifier based on the determination of the sense amplifier.

14. The computing system of claim 13 further comprising the host agent.

15. 14. The computing system of claim 13, wherein the priority encoder circuit is enabled to indicate at least a portion of the result as a second highest priority match of any matches identified by the sense amplifier based on the determination of the sense amplifier.

16. 14. The computing system of claim 13, wherein the characteristic information is stored in the memory string by configuring a threshold voltage of a floating gate transistor of the memory string.

17. The computing system of claim 13 , wherein two or more of the plurality of blocks are operable simultaneously.

18. 14. The computing system of claim 13, wherein feature coding is used to code at least a portion of the feature information and search coding is used to code at least a portion of the search.

19. 20. The computing system of claim 18, wherein the feature coding is at least one of an extension coding, an inverse extension coding, a one-hot coding, and a low-performance coding.

20. The computing system of claim 13 , wherein the computing system is part of a system on a chip (SOC).

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