Method for manufacturing epitaxial wafer

Abstract

To provide an epitaxial wafer manufacturing method for efficiently performing epitaxial growth on a semiconductor substrate (especially a {110} plane orientation silicon single crystal wafer) while suppressing the deterioration of the haze level.SOLUTION: A method for manufacturing an epitaxial wafer 13 by vapor-phase epitaxial growth of an epitaxial layer on the surface of a semiconductor substrate includes a first growth step of growing a first epitaxial layer 11 of a semiconductor material on the surface of a semiconductor substrate W at a first growth temperature and a first growth rate, and a second growth step of growing a second epitaxial layer 12 of a semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and a second growth rate lower than the first growth rate.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for producing an epitaxial wafer. [Background technology]

[0002] Silicon epitaxial wafers, in which an epitaxial layer is formed on the surface of a silicon single crystal substrate by vapor phase growth, are widely used in electronic devices (Patent Documents 1-6). In recent years, with the miniaturization of electronic devices, the requirements for surface quality in epitaxial wafers have become stricter. One of the surface qualities is the haze level. Haze is a minute unevenness that occurs on the surface of an epitaxial wafer, and when the surface of the epitaxial layer is observed in a darkroom using a condensing lamp or the like, it appears white and cloudy due to diffuse reflection of light. The haze level can be evaluated by measuring the scattered light of the haze using, for example, a particle counter SP3 (light scattering measuring device) manufactured by KLA Corporation.

[0003] The haze level is closely related to the epitaxial growth conditions (especially the growth temperature and growth rate). The haze level is also related to the surface orientation of the silicon single crystal substrate, and tends to be worse in the (110) surface orientation than in the (100) surface orientation. In recent years, there has been a shift from the (100) surface orientation to single crystal substrates with the (110) surface orientation in order to improve the performance of electronic devices. Thus, there is a need to improve the haze level (especially in the (110) surface orientation). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2003-505317 [Patent Document 2] JP 2011-44692 A [Patent Document 3] JP 2015-213102 A [Patent Document 4] JP 2020-107729 A [Patent Document 5] JP 2020-107730 A [Patent Document 6] JP 2005-294711 A Summary of the Invention [Problem to be solved by the invention]

[0005] The present invention has been made to solve the above-mentioned problems, and has an object to provide a method for efficiently performing epitaxial growth on a semiconductor substrate (particularly a silicon single crystal wafer with a {110} surface orientation) while suppressing deterioration of the haze level. [Means for solving the problem]

[0006] In order to achieve the above object, the present invention provides a method for producing an epitaxial wafer by vapor-phase growing an epitaxial layer on a surface of a semiconductor substrate, comprising the steps of: a first growth step of growing a first epitaxial layer of semiconductor material on a surface of the semiconductor substrate at a first growth temperature and a first growth rate; a second growth step of growing a second epitaxial layer of semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and at a second growth rate lower than the first growth rate; The present invention provides a method for producing an epitaxial wafer, comprising the steps of:

[0007] The epitaxial wafer manufacturing method of the present invention makes it possible to perform epitaxial growth on the surface of a semiconductor substrate while suppressing deterioration of the haze level, and thus makes it possible to efficiently manufacture epitaxial wafers with reduced haze levels with high productivity. This is particularly effective when growing an epitaxial layer in vapor phase on a semiconductor substrate that is prone to deterioration of the haze level, such as a silicon single crystal wafer with a {110} surface orientation.

[0008] In this case, when the total thickness of the first epitaxial layer and the second epitaxial layer is taken as 100, The second epitaxial layer grown in the second growth step may have a thickness of 2.5 μm or more.

[0009] By growing the second epitaxial layer having such a thickness on the first epitaxial layer, it is possible to more reliably improve the haze level in the first epitaxial layer and obtain a high-quality epitaxial wafer.

[0010] Furthermore, the second epitaxial layer grown in the second growth step may have a thickness of 10 nm or more.

[0011] This makes it possible to further suppress the deterioration of the haze level.

[0012] The semiconductor substrate may be a substrate having a {110} surface orientation.

[0013] Since the haze level tends to be worse in the {110} plane orientation than in the {100} plane orientation, the present invention, which has the effect of suppressing the haze level, is more effective.

[0014] The semiconductor substrate may be a silicon single crystal wafer.

[0015] Silicon single crystal wafers are often used as semiconductor substrates for growing epitaxial layers, and are in high demand. Effect of the Invention

[0016] The epitaxial wafer manufacturing method of the present invention makes it possible to manufacture high-quality epitaxial wafers with reduced haze levels with high productivity. This method is particularly effective when forming an epitaxial layer on a silicon single crystal wafer with a {110} crystal orientation. [Brief description of the drawings]

[0017] [Figure 1] 1A to 1C are explanatory diagrams showing an example of a method for producing an epitaxial wafer according to the present invention. [Diagram 2] 1 is a graph showing a temperature profile of a wafer during vapor phase growth. [Diagram 3] FIG. 1 is a schematic diagram showing an example of the configuration of a single-wafer vapor phase growth apparatus. [Figure 4] 1 is an explanatory diagram showing a method for producing an epitaxial wafer in Comparative Example 1. FIG. [Diagram 5] 1 is a graph showing a temperature profile of a wafer in Comparative Example 1. [Figure 6] 1 is a graph showing the evaluation results of haze levels in Examples 1-4 and Comparative Examples 1-2. BEST MODE FOR CARRYING OUT THEINVENTION

[0018] Hereinafter, an embodiment of the present invention will be described with reference to the drawings, but the present invention is not limited thereto. As described above, there has been a demand for a method for manufacturing an epitaxial wafer with a reduced haze level by forming an epitaxial layer on a semiconductor substrate (such as a silicon single crystal wafer with a {110} surface orientation) that is particularly prone to a deterioration in haze level. As a result of intensive research, the present inventor has found that a good epitaxial wafer with a low haze level can be obtained with high productivity by manufacturing an epitaxial wafer under conditions including a first growth step (growing a first epitaxial layer at a first growth temperature and a first growth rate) and a second growth step (growing a second epitaxial layer at a second growth temperature and a second growth rate), in which the second growth temperature is equal to the first growth temperature and the second growth rate is lower than the first growth rate, and thus the present invention has been completed.

[0019] In the following, a silicon single crystal wafer (silicon single crystal substrate) with a {110} plane orientation will be used as the semiconductor substrate, and a silicon single crystal film will be used as the first and second epitaxial layers of the semiconductor material. There is a high demand for silicon single crystal wafers and silicon single crystal films. In addition, the haze level of the epitaxial layer surface tends to deteriorate in substrates whose main surface is a {110} plane, and the present invention, which can improve the haze level, is particularly effective. However, the present invention is not limited to this, and an epitaxial layer of a desired semiconductor material can be grown using a semiconductor substrate with a desired plane orientation.

[0020] First, the configuration of a single-wafer type vapor phase growth apparatus will be described as a suitable example of a vapor phase growth apparatus used in the epitaxial wafer manufacturing method of the present invention. Fig. 3 shows an outline of a single-wafer type vapor phase growth apparatus. As shown in FIG. 3, the vapor phase growth apparatus 1 includes a reaction vessel 2 and a susceptor 3 that is provided inside the reaction vessel 2 and supports a silicon single crystal substrate W on its upper surface. The reaction vessel 2 is provided with a vapor growth gas introduction pipe 4 that introduces a vapor growth gas containing a source gas (e.g., trichlorosilane) and a carrier gas (e.g., hydrogen) into the reaction vessel 2 to an area above the susceptor 3 and supplies the gas onto the main surface of the silicon single crystal substrate W on the susceptor 3. In addition, on the same side of the reaction vessel 2 as the side on which the vapor growth gas introduction pipe 4 is provided, a purge gas introduction pipe 5 that introduces a purge gas (e.g., hydrogen) into the reaction vessel 2 to an area below the susceptor 3 is provided. Furthermore, on the side of the reaction vessel 2 opposite to the side where the vapor growth gas inlet pipe 4 and the purge gas inlet pipe 5 are provided, an exhaust pipe 6 is provided through which gases (vapor growth gas and purge gas) within the reaction vessel 2 are exhausted.

[0021] Moreover, heating devices 7a and 7b for heating the reaction vessel 2 from above and below are provided outside the reaction vessel 2. Examples of the heating devices 7a and 7b include halogen lamps. The susceptor 3 is made of, for example, graphite coated with silicon carbide. The susceptor 3 is formed, for example, in a substantially circular plate shape, and a counterbore 3a, which is a recess having a substantially circular shape in a plan view, is formed on the upper surface of the susceptor 3 for positioning the silicon single crystal substrate W on the upper surface. Further, a susceptor support member 8 that supports the susceptor 3 from the back surface is provided on the lower surface of the susceptor 3. This susceptor support member 8 is movable in the vertical direction indicated by the arrow A and is rotatable in the direction indicated by the arrow B.

[0022] Next, a method for manufacturing an epitaxial wafer according to the present invention will be described. Fig. 1 is an explanatory diagram of a method for manufacturing a silicon epitaxial wafer by chemical vapor deposition (CVD). Specifically, it shows an example of the structure of a wafer in each process until a silicon epitaxial wafer is manufactured. FIG. 2 shows the temperature profile of the wafer during vapor phase growth.

[0023] <Preparation of semiconductor substrate> 1, as an example of a semiconductor substrate, a silicon single crystal substrate W (hereinafter, sometimes simply referred to as a wafer) is prepared. The properties of the semiconductor substrate W (conductivity type, resistivity, surface orientation, diameter, etc.) may be appropriately set depending on the intended use of the silicon epitaxial wafer to be manufactured. Here, a silicon single crystal substrate with a {110} surface orientation is used. The main surface is not limited to one that is exactly {110}, but may be one that is inclined at an off angle (for example, more than 0 degrees and less than 0.5 degrees) from the {110} surface. In this way, it is possible to obtain a silicon epitaxial wafer having a higher carrier mobility than one with a {100} surface orientation, and a reduced haze level can be obtained later.

[0024] First, the principal axis orientation is determined by a known method such as the floating zone (FZ) method or the Czochralski (CZ) method. <110> The silicon single crystal ingot thus obtained is cut off at its head and tail, and then the periphery of the ingot is rotated and scraped to give it an accurate diameter and to make the ingot into a perfect cylindrical block. The cylindrical block thus finished is sliced ​​using a slicer such as an inner diameter blade cutter so that the main surfaces are exactly aligned with the {110} planes.

[0025] After slicing, the outer peripheral edges of both surfaces of the silicon single crystal substrate are beveled to form chamfers. After chamfering, the silicon single crystal substrate is double-sided lapped with free abrasive grains to produce a lapped wafer, or double-sided ground with fixed abrasive grains to produce a ground wafer. Next, the lapped or ground wafer is immersed in an etching solution to perform a chemical etching process on both sides of the wafer in order to remove the damaged layer that has been generated on the surface of the silicon single crystal substrate by lapping or grinding. After this chemical etching process, the front surface or the front and back surfaces are mirror-polished by mechanochemical polishing, and then a final cleaning is performed.

[0026] In this manner, a silicon single crystal substrate having a principal surface of the {110} plane (i.e., a plane orientation of {110}) is prepared, which has a higher carrier mobility than a silicon single crystal substrate having a principal surface of the {100} plane.

[0027] <Removal of native oxide film> Next, in order to cause vapor phase growth of a first epitaxial layer 11 (here, a silicon single crystal film) on the surface of the prepared wafer W, the native oxide film on the surface of the wafer W is removed. Specifically, the wafer W is placed in a reaction chamber 2 of a single-wafer vapor phase growth apparatus 1 as shown in FIG. Thereafter, the wafer W is heated to a predetermined heat treatment temperature T0 (here, temperature T A 2, this heat treatment temperature T0 is shown as being the same as the first growth temperature T1 (the temperature at "Depo1" in FIG. 2) in the first epitaxial layer 11 described later, but it may be different from the first growth temperature T1. This heat treatment temperature T0 can be set to, for example, a temperature near 1100°C, specifically, for example, 1100°C±60°C. Then, as shown in the "Bake" section, the temperature of the wafer W is raised to the heat treatment temperature T0 (temperature T A ) for a predetermined time, hydrogen is introduced into the reaction vessel 2 via the vapor phase growth gas introduction pipe 4 and the purge gas introduction pipe 5, and a heat treatment (bake) is performed in a hydrogen atmosphere to remove a natural oxide film formed on the surface of the wafer W. It is also possible to introduce hydrogen into the reaction vessel 2 before the wafer W is introduced, and then heat the reaction vessel 2 after the wafer W is introduced.

[0028] <Vapor phase growth of the first epitaxial layer (first growth step)> Thereafter, as shown in the middle of FIG. 1, a first epitaxial layer 11 is grown on the surface of the wafer W from which the native oxide film has been removed at a first growth temperature T1 and a first growth rate GR1. As shown in the "Depo1" portion of FIG. 2, the temperature of the wafer W is increased to a first growth temperature T1 (here, the same as the heat treatment temperature T0 used for removing the native oxide film, which is the temperature T A ), a vapor growth gas containing a source gas (specifically, a silane gas such as trichlorosilane (TCS)) that is the source of the silicon single crystal film, a carrier gas (e.g., hydrogen) for diluting the source gas, and a dopant gas (e.g., a gas containing boron or phosphorus) for imparting a conductivity type to the silicon single crystal film is flowed into the reaction vessel 2. Then, a first epitaxial layer 11 (silicon single crystal film) of a semiconductor material is grown on the surface of the wafer W by this vapor growth gas.

[0029] The characteristics (film thickness, resistivity, conductivity type, etc.) of the first epitaxial layer 11 may be appropriately set depending on the intended use of the silicon epitaxial wafer to be manufactured. Then, the growth conditions of the first growth step (first growth temperature T1, first growth rate GR1, first growth time, etc.) are set so as to obtain the first epitaxial layer 11 having the desired characteristics. Specifically, the first growth time may be set so that the first epitaxial layer 11 has a desired film thickness. Moreover, the first growth temperature T1 and the first growth rate GR1 are preferably set to a growth temperature and growth rate that can shorten the film formation time, taking into consideration the productivity of the first epitaxial layer 11, for example. For example, they can be set to about 1100°C (in the range of 1100°C±60°C). Furthermore, the first growth rate GR1 can be set to, for example, a region where the growth rate is high (for example, a region of 2.5 μm / min or more). The growth rate can be adjusted by increasing the growth temperature, the flow rate of the source gas introduced into the reaction vessel, or the concentration of the source gas in the vapor phase growth gas (including the source gas and carrier gas). After the first epitaxial layer has been grown in this manner, the introduction of the vapor growth gas into the reaction chamber is stopped to temporarily halt the growth of the epitaxial layer.

[0030] <Vapor growth of the second epitaxial layer (second growth step)> Next, as shown in the lower part of Fig. 1, a second epitaxial layer 12 (silicon single crystal film) is grown on the first epitaxial layer 11 at a second growth temperature T2 and a second growth rate GR2 ("Depo2" in Fig. 2) to manufacture an epitaxial wafer 13 (silicon epitaxial wafer). At this time, in order to reduce the haze level (surface unevenness) of the epitaxial layer, the growth conditions of the epitaxial layer are switched from the growth conditions of the first growth step described above to the growth conditions of a predetermined second growth step (second growth temperature T2, second growth rate GR2, second growth time, etc.), and then the second epitaxial layer 12 (silicon single crystal film) is vapor-phase grown on the first epitaxial layer 11 as shown in the lower part of Fig. 1.

[0031] At this time, the second growth temperature T2 is set equal to the first growth temperature T1, and the second growth rate GR2 is set lower than the first growth rate GR1, and the second epitaxial layer 12 is grown by vapor phase growth. That is, the first growth temperature T1 (in the case of FIG. 2, temperature T A ) is set to, for example, 1100° C., the second growth temperature T2 is also kept at 1100° C. Furthermore, when the first growth rate GR1 is set to, for example, 2.5 μm / min, the second growth rate GR2 is set to a growth rate lower than 2.5 μm / min (for example, 2.0 μm / min, 1.5 μm / min, 1.0 μm / min, etc.) In this case, the growth rate can be adjusted by adjusting the flow rate and concentration of the source gas, similarly to the first growth step.

[0032] By performing vapor phase growth while setting the growth conditions of the first growth step and the second growth step to satisfy the above-mentioned relationship, it is possible to reduce the haze level on the surface of the finally obtained epitaxial wafer 13 (the surface of the second epitaxial layer 12) compared to the case where a single epitaxial layer is grown under the growth conditions of the first growth step (the case where only the first epitaxial layer is grown). For example, when the main surface is evaluated in a DWO channel (Dark Field Wide Oblique) using a light scattering measuring instrument (SP3) manufactured by KLA Corporation, an excellent haze level of 2.0 ppm or even less can be obtained. Furthermore, by dividing the growth into two stages, a first growth step and a second growth step having a slower growth rate, epitaxial growth can be performed more efficiently than when a single epitaxial layer is grown under the growth conditions of the second growth step having a slower growth rate (when only the second epitaxial layer is grown), thereby improving productivity.

[0033] The second growth time may be set so that the second epitaxial layer 12 has a desired film thickness. However, in the relationship between the thickness of the second epitaxial layer 12 and the thickness of the first epitaxial layer 11, when the total thickness of these layers is 100, it is preferable to set the thickness of the second epitaxial layer to, for example, 2.5 or more (proportion of the thickness of the second epitaxial layer to the total thickness: 2.5% or more). In this way, the improvement of the haze level can be more reliably achieved. More preferably, the thickness of the second epitaxial layer can be set to 10 or more (10% or more). In addition, the upper limit of the thickness of the second epitaxial layer is not particularly limited as long as it is less than 100, but for example, 25 (25%) is preferable because it can improve the haze level very sufficiently and does not significantly impair productivity. EXAMPLES

[0034] The present invention will be described in more detail below with reference to examples and comparative examples of the present invention, but the present invention is not limited to these. Example 1 A number of (3) P-type silicon single crystal wafers with a diameter of 300 mm and a (110) surface orientation were prepared, and epitaxial wafers were manufactured by removing the native oxide film on the surface of each silicon single crystal wafer using a single-wafer vapor phase growth apparatus (Centura, manufactured by Applied Materials) with the same configuration as vapor phase growth apparatus 1 shown in Fig. 3. Two layers of silicon single crystal films were then formed on the surfaces under different growth conditions. Specifically, the following growth conditions were used. <Conditions for removing native oxide film> Heat treatment in a hydrogen atmosphere (heat treatment temperature: 1100℃) <Growth conditions for the first epitaxial layer (first layer)> Growth temperature: 1100℃ Growth rate: 2.5μm / min Film thickness: 1.95μm <Growth conditions for the second epitaxial layer (2nd layer)> Growth temperature: 1100℃ Growth rate: 1.5μm / min Film thickness: 0.05μm <Proportion of the thickness of the second epitaxial layer to the total thickness> 2.5%

[0035] During vapor phase growth, trichlorosilane was used as the source gas and hydrogen was used as the carrier gas. The supply amount of the source gas was about 12 slm for the first layer and about 6 slm for the second layer. The supply amount of the carrier gas was 90 slm. Hydrogen was also selected as the purge gas, and the supply amount was 25 slm.

[0036] After that, the haze on the surface of the grown epitaxial layer was evaluated. The haze level was evaluated using a light scattering measuring instrument (SP3) manufactured by KLA Corporation in the DWO channel. The evaluation result was 2.0 ppm. This evaluation value is the average value of the haze levels obtained by manufacturing multiple epitaxial wafers (the three mentioned above) under the same conditions as described above and evaluating those epitaxial wafers.

[0037] Comparative Example 1 The same number of silicon single crystal wafers as in Example 1 were prepared, and after removing the native oxide film as in Example 1 using the same apparatus as in Example 1, an epitaxial wafer was manufactured by growing a single epitaxial layer (silicon single crystal film) having a thickness of 2 μm at the same growth temperature and growth rate (1100° C., 2.5 μm / min) as in the first layer of Example 1. This epitaxial layer is composed only of the first epitaxial layer as in Example 1, so the <proportion of the film thickness of the second epitaxial layer to the total film thickness> is 0%. FIG. 4 shows an explanatory diagram of the epitaxial wafer manufacturing method of Comparative Example 1, and FIG. 5 shows the temperature profile of the wafer during vapor phase growth. Thereafter, the haze level of the surface of the grown epitaxial layer was evaluated in the same manner as in Example 1, and was found to be 2.4 ppm.

[0038] (Comparative Example 2, Examples 2 to 4) The total film thickness was 2 μm, and the ratio of the film thickness of the second epitaxial layer to the total film thickness was 0% in Comparative Example 1 and 2.5% in Example 1, but the ratio was further changed to 5%, 10%, 25%, and 100% to form the epitaxial layer (Examples 2 to 4, Comparative Example 2, respectively). Note that the epitaxial layer in Comparative Example 2 is composed only of the second epitaxial layer as referred to in Example 1.

[0039] The haze levels were measured in the same manner as in Example 1, and were found to be 1.8 ppm, 1.6 ppm, 1.5 ppm, and 1.4 ppm, respectively, which indicated that the haze levels were improved. FIG. 6 shows the evaluation results of the haze levels of Examples 1-4 and Comparative Examples 1-2. As shown in FIG. 6, when the ratio of the film thickness of the second epitaxial layer to the total film thickness was 2.5% or more, the haze level could be improved to 2.0 ppm or less. However, in Comparative Example 2, although the suppression of the haze level was more reliable, the productivity was deteriorated by 33% compared to Example 4 due to the low growth rate, so it cannot be said to be an effective manufacturing method. In consideration of the productivity, the thickness of the second epitaxial layer is more preferably 2.5% or more and 25% or less, and further preferably 10% or more and 25% or less.

[0040] The present invention is not limited to the above-described embodiment. The above-described embodiment is merely an example, and any configuration that is substantially the same as the technical idea described in the claims of the present invention and that provides similar effects is included in the technical scope of the present invention. [Explanation of symbols]

[0041] 1... single-wafer vapor phase growth apparatus; 2... reaction vessel; 3... susceptor; 3a...spot facing, 4...vapor phase growth gas inlet pipe, 5...purge gas inlet pipe, 6...exhaust pipe; 7a, 7b...heating device; 8...susceptor support member; W: silicon single crystal substrate, 11...first epitaxial layer (silicon single crystal film), 12...second epitaxial layer (silicon single crystal film), 13...Epitaxial wafer (silicon epitaxial wafer).

Claims

1. A method for manufacturing an epitaxial wafer by vapor-growth of an epitaxial layer on a surface of a semiconductor substrate, comprising the steps of: a first growth step of growing a first epitaxial layer of semiconductor material on a surface of the semiconductor substrate at a first growth temperature and a first growth rate; a second growth step of growing a second epitaxial layer of semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and at a second growth rate lower than the first growth rate; Including, When the total thickness of the first epitaxial layer and the second epitaxial layer is 100, 4. A method for producing an epitaxial wafer, comprising the steps of: growing the second epitaxial layer in the second growth step to a thickness of 2.5 μm or more;

2. 2. The method for producing an epitaxial wafer according to claim 1, wherein the second epitaxial layer grown in the second growth step has a thickness of 10 nm or more.

3. 3. The method for producing an epitaxial wafer according to claim 1, wherein a substrate having a {110} surface orientation is used as the semiconductor substrate.

4. 4. The method for producing an epitaxial wafer according to claim 1, wherein a silicon single crystal wafer is used as the semiconductor substrate.

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