Overcurrent detection device for semiconductor module, semiconductor module using same, and method for detecting overcurrent in semiconductor module

JP7632883B2Active Publication Date: 2025-02-19MINEBEA POWER SEMICON DEVICE INC
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Patent Information

Application Number
JP2021152179
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-09-17
Publication Date
2025-02-19
Estimated Expiration
2041-09-17

AI Technical Summary

Benefits of technology

【0020】 本発明によれば、複数のインバータ回路を並列接続して構成する半導体モジュールにおいて、比較的シンプルな回路構成で、パワー半導体素子の短絡電流を高精度に検出可能な半導体モジュールの過電流検出装置とそれを用いた半導体モジュール、及び半導体モジュールの過電流検出方法を実現することができる。

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Abstract

To provide an overcurrent detection device and method, and a semiconductor module, which are capable of highly accurately detecting short-circuit current of a power semiconductor element.SOLUTION: Provided is an overcurrent detection device 1 for a semiconductor module that includes a first inverter circuit 10a and a second inverter circuit 10b connected in parallel with the first inverter circuit. The first inverter circuit has a first output terminal between an emitter of a first upper arm and a collector of a first lower arm, and the second inverter circuit has a second output terminal between an emitter of a second upper arm and a collector of a second lower arm. The first output terminal and the second output terminal are connected via a wire, and an output wire to the outside is attached at a middle point c between the first output terminal and the second output terminal. A wire inductance 3a between the first output terminal and the middle point is substantially equal to a wire inductance 3b between the second output terminal and the middle point. A potential difference between the first output terminal and the second output terminal is detected, and, if the detected potential difference exceeds a predetermined threshold, it is determined that an overcurrent has occurred.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a semiconductor module configuration and an overcurrent detection method, and more particularly to a technique that is effective when applied to a large-capacity semiconductor module configured by connecting a plurality of semiconductor modules in parallel. [Background technology]

[0002] In recent years, there has been a demand for higher output from inverter devices as power conversion devices. One possible means for achieving higher output is to operate a plurality of power semiconductor elements connected in parallel to output a large current.

[0003] The power conversion device has a function of converting DC power supplied from a DC power source into AC power for supply to an AC electrical load such as a rotating electric machine, or a function of converting AC power generated by a rotating electric machine into DC power for supply to a DC power source.

[0004] To perform the power conversion function, the power conversion device has a configuration in which inverter circuits having a plurality of power semiconductor elements are connected in parallel, and the power semiconductor elements perform power conversion from DC power to AC power or from AC power to DC power by repeatedly conducting and blocking operations.

[0005] In order to obtain high output, a semiconductor module constituting an inverter circuit is configured by connecting a plurality of mounted power semiconductor elements in parallel, for example, by connecting the plurality of power semiconductor elements with a common bus bar wiring.

[0006] An example of a power semiconductor element is an insulated gate bipolar transistor (hereinafter, referred to as IGBT).

[0007] In an inverter circuit, two IGBTs as power semiconductor elements are connected in series to a DC power supply. The IGBT connected to the positive side of the DC power supply is called the upper arm, and the IGBT connected to the negative side of the DC power supply is called the lower arm. The connection terminal between the upper arm IGBT and the lower arm IGBT is called the output terminal.

[0008] By alternately turning on and off the IGBTs in the upper and lower arms, it is possible to extract AC power from the output terminals. By connecting multiple inverter circuits with IGBTs mounted on the upper and lower arms in parallel, it is possible to convert DC power to AC power or AC power to DC power with greater output power.

[0009] In an inverter circuit composed of parallel-connected power semiconductor elements, if one of the parallel-connected power semiconductor elements is destroyed during operation due to gate noise or element lifespan, an excessive short-circuit current flows from the positive pole of the DC power supply to the destroyed element. This short-circuit current may destroy normal power semiconductor elements or the entire inverter circuit system. To prevent this, a short-circuit detection circuit is provided that detects this short-circuit current and generates a protection signal to turn off normal power semiconductor elements.

[0010] One method of detecting a short circuit is to compare the gate signal of an IGBT, which is a power semiconductor element, with the collector voltage of the IGBT. When the gate voltage of the IGBT is on, the collector voltage drops to the on voltage of the IGBT in normal operation, but when a short circuit occurs, the collector voltage rises to the power supply voltage. The method using the collector voltage detects when this collector voltage has risen to a specified voltage, determines that the IGBT has shorted, and outputs a protection signal.

[0011] However, in parallel-connected IGBTs, if one IGBT is destroyed, the short-circuit current is shared by the parallel-connected IGBT on the opposite arm, and the collector voltage does not rise immediately, which may result in failure to detect the short circuit.

[0012] Another method for detecting a short circuit is to detect the voltage across a shunt resistor or parasitic inductance for each of the parallel-connected IGBTs, and if the voltage value exceeds a predetermined voltage, it is determined that a short circuit has occurred and a protection signal is generated.

[0013] However, in the case of IGBTs connected in parallel, it is necessary to provide a detection circuit for each IGBT individually, which makes the configuration of the protection circuit complex.

[0014] As a conventional technique for detecting a short circuit in power semiconductor elements connected in parallel, for example, Patent Document 1 is known. According to Patent Document 1, a separate current detection circuit is installed in each wiring that carries a drive signal between a drive circuit and each semiconductor switch element, and the polarity of each current detected by the current detection circuit is detected separately by a polarity detection circuit. It is described that when the detected current polarities do not match, or when any current exceeds a predetermined value and the detected polarities of each current do not match, it is determined that an overcurrent has occurred in one of the parallel semiconductor switch elements. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] Japanese Patent Application Publication No. 10-42546 Summary of the Invention [Problem to be solved by the invention]

[0016] However, in the detection method disclosed in Patent Document 1, the detection current depends on the wiring impedance of the drive signal. When the wiring impedance of the drive signal is large, the detection current becomes small and the detection signal becomes weak, which may result in the detection not being detected.

[0017] Therefore, an object of the present invention is to provide an overcurrent detection device for a semiconductor module that is capable of detecting a short-circuit current of a power semiconductor element with high accuracy using a relatively simple circuit configuration in a semiconductor module composed of a plurality of inverter circuits connected in parallel, a semiconductor module using the same, and an overcurrent detection method for a semiconductor module. [Means for solving the problem]

[0018] In order to solve the above-mentioned problems, the present invention provides an overcurrent detection device for a semiconductor module, which detects an overcurrent in a semiconductor module having a parallel connection configuration, the semiconductor module having a first inverter circuit equipped with a first upper arm and a first lower arm, and a second inverter circuit connected in parallel to the first inverter circuit and equipped with a second upper arm and a second lower arm, wherein the first inverter circuit has a first output terminal between the emitter of the first upper arm and the collector of the first lower arm, and the second inverter circuit has a second output terminal between the emitter of the second upper arm and the collector of the second lower arm, the first output terminal and the second output terminal are connected by wiring, and a voltage is output to the outside at a midpoint between the first output terminal and the second output terminal. To extract AC power an output wiring is attached, a wiring inductance between the first output terminal and the midpoint is approximately equal to a wiring inductance between the second output terminal and the midpoint, a potential difference is detected between the first output terminal and the second output terminal, and if the detected potential difference exceeds a predetermined threshold value, it is determined that an overcurrent has occurred.

[0019] In addition, the present invention provides a power supply circuit in which a plurality of inverter circuits are connected in parallel and the output terminals of each inverter circuit are connected to each other. To extract AC power to the outside An overcurrent detection method for a semiconductor module that detects an overcurrent in a semiconductor module configured to be connected to a common external output terminal, wherein wiring inductances of the wirings connecting the output terminals of each inverter circuit and the common external output terminal are approximately equal, a potential difference between the output terminals of each inverter circuit is detected, and if the detected potential difference exceeds a predetermined threshold value, it is determined that an overcurrent has occurred. Effect of the Invention

[0020] According to the present invention, in a semiconductor module configured by connecting multiple inverter circuits in parallel, it is possible to realize an overcurrent detection device for a semiconductor module capable of detecting a short-circuit current of a power semiconductor element with high accuracy using a relatively simple circuit configuration, a semiconductor module using the same, and an overcurrent detection method for a semiconductor module.

[0021] This improves the reliability of the semiconductor module and the inverter device in which it is mounted.

[0022] Problems, configurations and effects other than those described above will become apparent from the following description of the embodiments. [Brief description of the drawings]

[0023] [Figure 1] 1 is a diagram showing a circuit configuration of a semiconductor module and an overcurrent detection circuit according to a first embodiment of the present invention. [Diagram 2] FIG. 11 is a diagram showing an example of current and voltage waveforms when a short circuit current occurs according to the second embodiment of the present invention. [Diagram 3] FIG. 11 is a top view of inverter circuits connected in parallel according to a third embodiment of the present invention. [Figure 4] FIG. 11 is a diagram showing a circuit configuration of a semiconductor module and an overcurrent detection circuit according to a fourth embodiment of the present invention. [Diagram 5] FIG. 11 is a top view of a semiconductor module according to a fifth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping parts will be omitted. EXAMPLES

[0025] An overcurrent detection circuit for a semiconductor module and an overcurrent detection method according to a first embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a diagram showing the circuit configuration of the semiconductor module and the overcurrent detection circuit of this embodiment.

[0026] 1, the semiconductor module of this embodiment includes a first inverter circuit 10a having an upper arm and a lower arm, and a second inverter circuit 10b also having an upper arm and a lower arm. The first inverter circuit 10a and the second inverter circuit 10b are connected in parallel to a DC power source 2.

[0027] An IGBT element Q1 is arranged as a power semiconductor element on the upper arm of first inverter circuit 10a, and an IGBT element Q2 is arranged as a power semiconductor element on the lower arm.

[0028] In addition, an IGBT element Q3 is arranged as a power semiconductor element in the upper arm of second inverter circuit 10b, and an IGBT element Q4 is arranged as a power semiconductor element in the lower arm.

[0029] The collector (C) sides of the IGBT elements Q1, Q3 in the upper arms of each of the first inverter circuit 10a and the second inverter circuit 10b are connected to the positive terminal P of the DC power supply 2, and the emitter (E) sides of the IGBT elements Q2, Q4 in the lower arms of each of the first inverter circuit 10a and the second inverter circuit 10b are connected to the negative terminal N of the DC power supply 2.

[0030] In addition, the emitter (E) of the upper arm IGBT element Q1 and the collector (C) of the lower arm IGBT element Q2 of the first inverter circuit 10a are connected to the first wiring inductance 3a at node a (first output terminal), and the emitter (E) of the upper arm IGBT element Q3 and the collector (C) of the lower arm IGBT element Q4 of the second inverter circuit 10b are connected to the second wiring inductance 3b at node b (second output terminal).

[0031] Furthermore, the first wiring inductance 3a and the second wiring inductance 3b are connected at a midpoint c between the nodes a and b, and the midpoint c is connected to an output terminal AC via an output wiring to the outside of the parallel-connected inverter circuit. Here, the first wiring inductance 3a and the second wiring inductance 3b are configured to be approximately equal. The first wiring inductance 3a and the second wiring inductance 3b are configured using wiring such as a conductive plate (bus bar).

[0032] The first inverter circuit 10a and the second inverter circuit 10b are connected in parallel and operate in response to drive commands from a common control circuit 20. The drive commands from the control circuit 20 are divided into upper arm drive commands and lower arm drive commands, with the upper arm drive commands being transmitted to an upper arm drive circuit 21 and the lower arm drive commands being transmitted to a lower arm drive circuit 22.

[0033] In response to an upper arm drive command, the upper arm drive circuit 21 controls the parallel-connected upper arm IGBT elements Q1 and Q3 via an upper arm positive gate control terminal 30 connected to the gates G of the upper arm IGBT elements Q1 and Q3 and an upper arm negative gate control terminal 31 connected to the emitters E of the upper arm IGBT elements Q1 and Q3.

[0034] In addition, in response to a lower arm drive command, the lower arm drive circuit 22 controls the parallel-connected lower arm IGBT elements Q2 and Q4 via a lower arm positive gate control terminal 32 connected to the gates G of the lower arm IGBT elements Q2 and Q4 and a lower arm negative gate control terminal 33 connected to the emitters E of the lower arm IGBT elements Q2 and Q4.

[0035] In normal operation, a dead time is provided for the upper arm drive command and the lower arm drive command so that they are not turned on simultaneously, and the upper arm and the lower arm of the parallel-connected inverter circuits 10a, 10b are not turned on simultaneously.

[0036] However, due to gate noise, element life, and the like, it occasionally happens that the IGBT element constituting the lower arm is on during a period in which the IGBT element constituting the upper arm is on.

[0037] FIG. 1 shows a case where IGBT element Q2 in the lower arm breaks down and becomes short-circuited when IGBT elements Q1 and Q3 constituting the upper arm are on and currents 4a and 4b are flowing.

[0038] In this case, the currents 4a and 4b flowing in the upper arms suddenly increase, and the current 4a flows directly via node a to IGBT element Q2, while the current 4b flows via nodes b and a, from the second wiring inductance 3b to the first wiring inductance 3a, and finally merges with the current 4a and flows to the IGBT element Q2.

[0039] When the current 4b flows from the second wiring inductance 3b to the first wiring inductance 3a in this order, a potential difference Vba occurs between the node a and the node b.

[0040] In this embodiment, an overcurrent is detected based on this potential difference Vba by the overcurrent detection circuit 1, and all the IGBT elements are controlled. The overcurrent detection circuit 1 includes a differential voltage measurement unit 5, an absolute value calculation unit 6, a threshold comparison unit 7, and a shutdown signal generation unit 8.

[0041] The overcurrent detection circuit 1 measures the above-mentioned potential difference Vba using the differential voltage measurement unit 5, calculates its absolute value using the absolute value calculation unit 6, and when the potential difference Vba exceeds a predetermined threshold voltage using the threshold comparison unit 7, determines that an overcurrent has flowed in the inverter circuit, generates a shutdown signal command using the shutdown signal generation unit 8, and sends a shutdown command to the upper arm drive circuit 21 and the lower arm drive circuit 22, and controls the upper arm drive circuit 21 and the lower arm drive circuit 22 to turn off all of the IGBT elements.

[0042] When no short circuit occurs, the magnitude of the current flowing from contact a to midpoint c is equal to the magnitude of the current flowing from contact b to midpoint c. Here, since the first wiring inductance 3a and the second wiring inductance 3b are configured to be approximately equal, when no short circuit occurs, the potentials of node a and node b are equal, and the potential difference Vba is approximately zero.

[0043] Furthermore, since the short circuit is detected by detecting the potential difference Vba, it is possible to detect the short circuit even if the first wiring inductance 3a and the second wiring inductance 3b are large.

[0044] As described above, the overcurrent detection circuit 1 detects a short circuit that has occurred within the semiconductor module and quickly shuts down the operation of all IGBT elements, thereby preventing normal power semiconductor elements from being destroyed and preventing damage to the entire semiconductor module and malfunction of the inverter device in which it is mounted.

[0045] The overcurrent detection circuit 1 may be housed in the same module housing as the first inverter circuit 10a and the second inverter circuit 10b, or may be provided externally separately from the first inverter circuit 10a and the second inverter circuit 10b. EXAMPLES

[0046] Second embodiment A method for detecting an overcurrent in a semiconductor module according to the present invention will be described with reference to Fig. 2. Fig. 2 is a diagram showing examples of current and voltage waveforms when a short circuit current occurs. The horizontal axis of each graph in Fig. 2 indicates time t, and Iab and Vab on the vertical axis indicate the current between nodes a and b and the voltage between nodes a and b, respectively. Also, SC indicates the occurrence of a short circuit.

[0047] Fig. 2(a-1) shows the short-circuit current when the IGBT element Q2 or Q3 of the parallel-connected inverter circuit shown in Fig. 1 is broken down and short-circuited, and Fig. 2(b-1) shows the voltage change at that time. Fig. 2(a-2) shows the short-circuit current when the IGBT element Q1 or Q4 of the parallel-connected inverter circuit shown in Fig. 1 is broken down and short-circuited, and Fig. 2(b-2) shows the voltage change at that time.

[0048] 1, when the IGBT element Q2 of the parallel-connected inverter circuit 10a breaks down and shorts out, a current flows from node b to node a, and a potential difference Vba occurs between node b and node a, as described in the first embodiment. If the direction of the current flowing from node b to node a is positive, the potential difference Vba has a positive value.

[0049] In the first embodiment (FIG. 1), IGBT element Q2 is short-circuited, but even if IGBT element Q3 is broken down and short-circuited, a short-circuit current similarly flows from node b to node a. In this case, potential difference Vba is similarly positive.

[0050] On the other hand, if IGBT element Q1 or IGBT element Q4 in Figure 1 breaks down and a short-circuit current occurs, the current between nodes a and b will reverse (become negative) as shown in (a-2) in Figure 2, and the potential difference Vba between nodes a and b will also become negative.

[0051] Therefore, for example, when the threshold comparator 7 of the overcurrent detection circuit 1 determines whether the potential difference Vba has exceeded a predetermined detection threshold voltage (Vth), it is possible to estimate which IGBT element is short-circuited by detecting whether the value of the potential difference Vba is positive or negative. EXAMPLES

[0052] Third Embodiment An overcurrent detection circuit for a semiconductor module according to a third embodiment of the present invention will be described with reference to Fig. 3. Fig. 3 is a top view of inverter circuits connected in parallel according to the third embodiment.

[0053] 3 shows an example in which the first inverter circuit 10a and the second inverter circuit 10b described in the first embodiment (FIG. 1) are housed in separate packages (inside a module housing). The IGBT elements of the upper and lower arms of the first inverter circuit 10a are housed in the same package. The same is true for the second inverter circuit 10b.

[0054] The first inverter circuit 10a and the second inverter circuit 10b shown in FIG. 3 each include a positive terminal P, a negative terminal N, and an output terminal AC, which are connected by a common wiring bus bar.

[0055] The output terminal AC is drawn out at a midpoint c in order to equalize the output wiring inductances of the first inverter circuit 10a and the second inverter circuit 10b.

[0056] The overcurrent detection circuit 1 of this embodiment detects a potential difference Vba between the node a of the first inverter circuit 10a and the node b of the second inverter circuit 10b.

[0057] As in the first and second embodiments, it is determined whether or not an overcurrent occurs based on the detected potential difference Vba and in accordance with a predetermined detection threshold voltage (Vth). EXAMPLES

[0058] An overcurrent detection circuit and an overcurrent detection method for a semiconductor module according to a fourth embodiment of the present invention will be described with reference to Fig. 4. Fig. 4 is a diagram showing the circuit configuration of a semiconductor module and an overcurrent detection circuit of this embodiment, and shows an example in which four inverter circuits are connected in parallel.

[0059] As shown in FIG. 4, the semiconductor module of this embodiment is configured by connecting a first inverter circuit 10a, a second inverter circuit 10b, a third inverter circuit 10c, and a fourth inverter circuit 10d in parallel.

[0060] The node at the connection between the upper arm and the lower arm of the first inverter circuit 10a is denoted as a, the node at the connection between the upper arm and the lower arm of the second inverter circuit 10b is denoted as b, the node at the connection between the upper arm and the lower arm of the third inverter circuit 10c is denoted as c, and the node at the connection between the upper arm and the lower arm of the fourth inverter circuit 10d is denoted as d. Each of the nodes a, b, c, and d is connected to a common external output terminal AC at node e.

[0061] The first inverter circuit 10a has an IGBT element Q1 mounted on the upper arm and an IGBT element Q2 mounted on the lower arm. The second inverter circuit 10b has an IGBT element Q3 mounted on the upper arm and an IGBT element Q4 mounted on the lower arm. The third inverter circuit 10c has an IGBT element Q5 mounted on the upper arm and an IGBT element Q6 mounted on the lower arm. The fourth inverter circuit 10d has an IGBT element Q7 mounted on the upper arm and an IGBT element Q8 mounted on the lower arm.

[0062] The overcurrent detection circuit 1 of this embodiment has wiring terminals for measuring voltages Vba, Vcb, and Vdc at nodes a, b, c, and d between the upper and lower arms of each inverter circuit.

[0063] Consider the case where lower-arm IGBT element Q2 of first inverter circuit 10a breaks down and shorts out in the embodiment shown in Fig. 4. When IGBT element Q2 breaks down and shorts out, short-circuit currents 4a, 4b, 4c, and 4d flow from upper-arm IGBT elements Q1, Q3, Q5, and Q7 connected in parallel to IGBT element Q2, respectively.

[0064] Between each of the nodes a, b, c, and d of the inverter circuit and a contact point e with the output terminal AC, there are wiring inductances 3a, 3b, 3c, and 3d.

[0065] Short-circuit current 4a flows directly to IGBT element Q2 via node a. On the other hand, short-circuit currents 4b, 4c, and 4d flow via wiring inductances 3b, 3c, and 3d, respectively, and then join wiring inductance 3a, and finally flow to IGBT element Q2.

[0066] The overcurrent detection circuit 1 monitors the voltages of the nodes a, b, c, and d, and measures the differential voltages Vba, Vcb, and Vdc shown in Fig. 4. The differential voltages rise when short-circuit currents 4b, 4c, and 4d flow through the wiring inductances 3a, 3b, 3c, and 3d. When at least one of the differential voltages Vba, Vcb, and Vdc exceeds a predetermined detection threshold voltage (Vth), the overcurrent detection circuit 1 determines that a short circuit has occurred in the parallel-connected inverter circuits, and outputs a signal command to turn off each IGBT element.

[0067] It is preferable that the wiring inductances 3a, 3b, 3c, and 3d are made approximately equal in inductance value by equal length wiring or tournament wiring.

[0068] In this embodiment, an example in which four inverter circuits are connected in parallel has been described, but the present invention is also applicable to cases in which three inverter circuits are connected in parallel or five or more inverter circuits are connected in parallel.

[0069] In a parallel inverter circuit configuration where the number of parallel connections N is two or more, there are N nodes between the upper and lower arms of each inverter circuit, and N wiring inductances connected to the output terminal AC. The overcurrent detection circuit 1 has N voltage monitor terminals and detects (N-1) differential voltages. EXAMPLES

[0070] Fifth embodiment A semiconductor module according to a fifth embodiment of the present invention will be described with reference to Fig. 5. Fig. 5 is a top view of the semiconductor module of the fifth embodiment.

[0071] In the semiconductor module shown in FIG. 5, a plurality of insulating substrates, each having an IGBT element mounted thereon, are mounted on a base substrate 100.

[0072] The first insulating substrate 60a and the second insulating substrate 60b are electrically connected in parallel to form an upper arm, and the third insulating substrate 70a and the fourth insulating substrate 70b are electrically connected in parallel to form a lower arm.

[0073] An equivalent circuit diagram of the semiconductor module in this embodiment can be considered to be equivalent to that shown in Fig. 1, where the IGBT element mounted on the first insulating substrate 60a can be replaced with Q1, the IGBT element mounted on the second insulating substrate 60b with Q3, the IGBT element mounted on the third insulating substrate 70a with Q2, and the IGBT element mounted on the fourth insulating substrate 70b with Q4. Therefore, the semiconductor module shown in Fig. 5 can also be said to have a configuration in which the first inverter circuit 10a and the second inverter circuit 10b are housed in the same module housing.

[0074] A positive terminal P is connected to the collector side of the insulating substrates 60a, 60b of the upper arm, and a negative terminal N is connected to the emitter side of the insulating substrates 70a, 70b of the lower arm. An output terminal AC to the outside is connected between the emitter side of the insulating substrates 60a, 60b of the upper arm and the collector side of the insulating substrates 70a, 70b of the lower arm.

[0075] A connection is made to an output terminal AC at a midpoint c between node a, which connects the emitter side of the first insulating substrate 60a of the upper arm and the collector side of the third insulating substrate 70a of the lower arm, and node b, which connects the emitter side of the second insulating substrate 60b of the upper arm and the collector side of the fourth insulating substrate 70b of the lower arm.

[0076] The overcurrent detection circuit 1 of this embodiment, as in FIG. 1, measures the voltage difference between node a and node b, and if the voltage difference exceeds a predetermined detection threshold voltage (Vth), it determines that the IGBT element on the insulating substrate mounted on this semiconductor module has been short-circuited, and outputs a command to shut off the IGBT element.

[0077] The present invention is not limited to the above-described embodiments, and includes various modified examples. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the configurations described. It is also possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace a part of the configuration of each embodiment with another configuration. [Explanation of symbols]

[0078] 1. Overcurrent detection circuit 2…DC power supply 3a, 3b, 3c, 3d...(Output terminal) wiring inductance 4a,4b,4c,4d…(short circuit) current 5…Differential voltage measurement section 6...Absolute value calculation section 7...Threshold comparison section 8...Shutdown signal generator 10a, 10b, 10c, 10d...Inverter circuits 20...Control circuit 21...Upper arm drive circuit 22...Lower arm drive circuit 30…Upper arm positive gate control terminal 31...Upper arm negative gate control terminal 32…Lower arm positive gate control terminal 33...Lower arm negative gate control terminal 60a, 60b...(upper arm) insulating substrate 70a, 70b...(lower arm) insulating substrate 100...Base board Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8...IGBT elements C...Collector E…Emitter G…Gate P...Positive terminal N...Negative terminal AC…(external) output terminal SC: Short circuit occurs Iab (Iba)…Current between nodes a and b Vab (Vba)…Voltage between nodes a and b Vth: Detection threshold voltage

Claims

1. a first inverter circuit including a first upper arm and a first lower arm; a second inverter circuit connected in parallel with the first inverter circuit and including a second upper arm and a second lower arm; the first inverter circuit has a first output terminal between the emitter of the first upper arm and the collector of the first lower arm; the second inverter circuit has a second output terminal between the emitter of the second upper arm and the collector of the second lower arm; the first output terminal and the second output terminal are connected by a wiring, and an output wiring is attached to a midpoint between the first output terminal and the second output terminal for extracting AC power to an outside; a wiring inductance between the first output terminal and the midpoint is approximately equal to a wiring inductance between the second output terminal and the midpoint, An overcurrent detection device for a semiconductor module, characterized in that it detects a potential difference between the first output terminal and the second output terminal, and determines that an overcurrent is occurring if the detected potential difference exceeds a predetermined threshold value.

2. 2. The semiconductor module overcurrent detection device according to claim 1, 2. An overcurrent detection device for a semiconductor module, wherein the first inverter circuit and the second inverter circuit are housed in the same module housing.

3. 2. The semiconductor module overcurrent detection device according to claim 1, 2. An overcurrent detection device for a semiconductor module, wherein the first inverter circuit and the second inverter circuit are housed in separate module housings.

4. 2. The semiconductor module overcurrent detection device according to claim 1, An overcurrent detection device for a semiconductor module, characterized in that it identifies short-circuited locations in the first inverter circuit and the second inverter circuit based on the positive and negative polarity of the potential difference between the first output terminal and the second output terminal.

5. 2. The semiconductor module overcurrent detection device according to claim 1, an output of a shutoff signal command for turning off all power semiconductor elements of the first inverter circuit and the second inverter circuit when a potential difference between the first output terminal and the second output terminal exceeds a predetermined threshold voltage.

6. 2. The semiconductor module overcurrent detection device according to claim 1, the semiconductor module includes a third inverter circuit connected in parallel with the first inverter circuit and the second inverter circuit, the third inverter circuit including a third upper arm and a third lower arm; a fourth inverter circuit connected in parallel with the third inverter circuit and including a fourth upper arm and a fourth lower arm; the third inverter circuit has a third output terminal between the emitter of the third upper arm and the collector of the third lower arm; the fourth inverter circuit has a fourth output terminal between the emitter of the fourth upper arm and the collector of the fourth lower arm; the first output terminal, the second output terminal, the third output terminal, and the fourth output terminal are connected by wiring, and output wiring is attached to a midpoint between the first output terminal, the second output terminal, the third output terminal, and the fourth output terminal for extracting AC power to the outside; a wiring inductance between the first output terminal and the midpoint, a wiring inductance between the second output terminal and the midpoint, a wiring inductance between the third output terminal and the midpoint, and a wiring inductance between the fourth output terminal and the midpoint are approximately equal to each other; An overcurrent detection device for a semiconductor module, characterized in that it detects a potential difference between the first output terminal and the second output terminal, a potential difference between the second output terminal and the third output terminal, and a potential difference between the third output terminal and the fourth output terminal, and determines that an overcurrent has occurred when at least one of the detected potential differences exceeds a predetermined threshold value.

7. A semiconductor module comprising the semiconductor module overcurrent detection device according to claim 1 .

8. 1. A method for detecting an overcurrent in a semiconductor module, comprising: a plurality of inverter circuits connected in parallel; and an output terminal of each inverter circuit being connected to a common external output terminal for extracting AC power to an external device; the wiring inductances of the wirings connecting the output terminals of the inverter circuits and the common external output terminal are substantially equal; Detecting a potential difference between the output terminals of each of the inverter circuits; A method for detecting an overcurrent in a semiconductor module, comprising: determining that an overcurrent is occurring when the detected potential difference exceeds a predetermined threshold value.

9. 9. A method for detecting an overcurrent in a semiconductor module according to claim 8, comprising: A method for detecting overcurrent in a semiconductor module, characterized in that a short-circuit location of the multiple inverter circuits is identified based on the positive / negative polarity of the potential difference between the output terminals of each inverter circuit or the potential difference between the output terminal of each inverter circuit and the common external output terminal.

10. 9. A method for detecting an overcurrent in a semiconductor module according to claim 8, comprising: A method for detecting overcurrent in a semiconductor module, characterized in that, when a potential difference between the output terminals of each of the inverter circuits or a potential difference between the output terminal of each of the inverter circuits and the common external output terminal exceeds a predetermined threshold voltage, a shutdown signal command is output to turn off all of the power semiconductor elements of the plurality of inverter circuits.

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