A printed circuit board to dielectric layer transition with controlled impedance and reduced and / or mitigated crosstalk for quantum applications

Abstract

The present invention provides a transition between a printed circuit board and a dielectric layer with controlled impedance and reduced and / or mitigated crosstalk for quantum applications. The quantum device can include a printed circuit board with a microwave quantum circuit on a dielectric substrate and a via with a transmission line. A wire bond between the transmission line of the printed circuit board and the transmission line of the microwave quantum circuit operably couples the microwave quantum circuit to the printed circuit board. The via has a defined characteristic impedance. The wire bond provides a microwave signal connection between the printed circuit board and the microwave quantum circuit.

Description

[Background technology]

[0001] Crosstalk in electronic devices can occur when a signal transmitted on a first circuit or channel of a transmission line (or system) creates an unintended material impact in a second circuit or channel. Crosstalk can result from an electric or magnetic field of a first communication signal affecting a second communication signal in one or more adjacent circuits. For supercomputing devices (e.g., where crosstalk immunity is sensitive), the impact of crosstalk can significantly increase the risk of corrupted signals and / or lead to unpredictable and / or defective circuit behavior.

[0002] When utilizing supercomputing technology devices, several specific sections of potential crosstalk impacts can be observed. These sections can include the device package such as the printed circuit board (PCB), the quantum chip dielectric layer on the dielectric substrate (die), and / or the wire bonds connecting the package to the quantum chip dielectric layer. Wire bonds can be in close physical proximity to neighboring wire bonds and therefore can increase distortion and / or crosstalk of the neighboring wire bond signals due to electromagnetic interference and / or electrical leakage.

[0003] A problem with quantum (e.g., superconducting) applications is that wire bonds are utilized to connect printed circuit board lines to chip components on a dielectric layer, transmission lines on a dielectric substrate, or transmission lines on a different dielectric substrate, or a combination thereof. Furthermore, as the number of qubits increases, there is a corresponding increase in the number of connections (e.g., wire bonds) required in close proximity to each other. This can introduce undesirable cross communication (e.g., crosstalk or x-talk) between nearby wire bonds. Furthermore, the transitions from the printed circuit board to the components and / or transmission lines on the dielectric layer do not maintain characteristic impedance continuity. Summary of the Invention

[0004] The following presents a summary in order to provide a basic understanding of one or more embodiments of the invention. This summary is not intended to identify key or critical elements or to delineate the scope of any particular embodiments or any of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments, described herein are devices, systems, methods, computer-implemented methods, apparatus, and / or computer program products that facilitate a transition from a printed circuit board to a dielectric layer with controlled impedance and reduced and / or mitigated crosstalk for quantum applications.

[0005] According to one embodiment, a quantum device can comprise a microwave quantum circuit on a dielectric substrate and a printed circuit board comprising a via with a transmission line. A wire bond between the transmission line of the printed circuit board and the transmission line of the microwave quantum circuit can operatively couple the microwave quantum circuit to the printed circuit board. Furthermore, the via can have a defined characteristic impedance. An advantage of such a quantum device is that the via can be designed to a defined impedance, thereby maintaining continuity of the characteristic impedance.

[0006] In some examples, the dielectric substrate can be formed on top of the printed circuit board. In other examples, the dielectric substrate can be formed at least partially inside the printed circuit board. In yet other examples, the device can include a cover that supports the printed circuit board and the dielectric substrate. An advantage of such quantum devices is that the length of the wire bonds is based on the distance between the vias and the dielectric substrate, which results in shorter wire bonds and therefore reduced and / or mitigated crosstalk, since crosstalk is proportional to the length of the wire bonds.

[0007] According to one embodiment, a method is provided that can include filling a via in a printed circuit board with a transmission line. The via can have a defined characteristic impedance. The method can further include operatively coupling the printed circuit board to a microwave quantum circuit on a dielectric substrate via a wire bond between the transmission line of the printed circuit board and the transmission line of the microwave quantum circuit. An advantage of such a method is that the via can be designed to a defined characteristic impedance, thereby maintaining continuity of the characteristic impedance.

[0008] In some examples, operably coupling the printed circuit board to the microwave quantum circuit can include attaching a length of wire bonds to the printed circuit board and the microwave quantum circuit. The length can be determined according to the first location of the via and the second location of the microwave quantum circuit. The advantage of such a method is that signal crosstalk is directly related to the length of the wire bonds. Thus, controlling the placement of the first and second locations can shorten the length of the wire bonds, thus reducing and / or mitigating crosstalk.

[0009] According to one embodiment, an integrated circuit is provided that may comprise a microwave quantum circuit on a dielectric substrate and a printed circuit board that comprises a via with a transmission line. The printed circuit board may be operatively coupled to the microwave quantum circuit via a wire bond between the transmission line of the printed circuit board and the transmission line of the microwave quantum circuit. Furthermore, the via may have a defined characteristic impedance. An advantage of such an integrated circuit is that the via can be designed to a defined characteristic impedance, thereby maintaining the continuity of the characteristic impedance.

[0010] According to a further embodiment, a device package is provided that may comprise a printed circuit board comprising a first via with a first transmission line and a second via with a second transmission line. The first via may comprise a first defined characteristic impedance and the second via may comprise a second defined characteristic impedance. The device package may also comprise a microwave quantum circuit on a dielectric substrate formed on the printed circuit board. The microwave quantum circuit may be operably attached to the printed circuit board via a first wire bond between the first transmission line of the printed circuit board and the first transmission line of the microwave quantum circuit, and via a second wire bond between the second transmission line of the printed circuit board and the second transmission line of the microwave quantum circuit. An advantage of such a device package is that the vias can be designed to a defined impedance, thereby maintaining a continuity of the characteristic impedance.

[0011] According to another embodiment, a device package is provided that may comprise a printed circuit board comprising a first via with a first transmission line and a second via with a second transmission line. The first via may comprise a first defined characteristic impedance and the second via may comprise a second defined characteristic impedance. The device package may also comprise a microwave quantum circuit on a dielectric substrate formed at least partially inside the printed circuit board. The microwave quantum circuit may be operatively coupled to the printed circuit board via a first wire bond between the first transmission line of the printed circuit board and the first transmission line of the microwave quantum circuit, and a second wire bond between the second transmission line of the printed circuit board and the microwave quantum circuit. An advantage of such a device package is that the vias can be designed to a defined impedance, thereby maintaining a continuity of the characteristic impedance. A further advantage of such device packages is that the length of the wire bonds is based on the distance between the vias and the dielectric substrate, which results in shorter wire bonds and therefore reduced and / or mitigated crosstalk, since crosstalk is proportional to the length of the wire bonds. [Brief description of the drawings]

[0012] [Figure 1A] FIG. 2 illustrates a quantum chip circuit with wire bonds according to one or more embodiments described herein. [Figure 1B] FIG. 2 illustrates a detailed example of a portion of a quantum chip circuit according to one or more embodiments described herein. [Figure 1C] FIG. 1 illustrates a transition from a printed circuit board line to a transmission line on a dielectric layer that does not maintain continuity of the characteristic impedance in accordance with one or more embodiments described herein. [Diagram 2] FIG. 2 is a non-limiting side view of an example portion of a quantum device in accordance with one or more embodiments described herein. [Diagram 3]FIG. 2 is a non-limiting side view of an illustrative portion of a quantum computing device in accordance with one or more embodiments described herein. [Figure 4] FIG. 2 is a non-limiting side view of an illustrative portion of another quantum computing device, according to one or more embodiments described herein. [Diagram 5] FIG. 2 is a non-limiting side view of an illustrative portion of yet another quantum computing device in accordance with one or more embodiments described herein. [Figure 6] FIG. 2 is a non-limiting side view of an illustrative portion of another quantum computing device, according to one or more embodiments described herein. [Figure 7] FIG. 2 illustrates an example non-limiting printed circuit board utilized in a simulation, according to one or more embodiments described herein. [Figure 8] 8 is a non-limiting graph of example results of simulated time domain reflectometry of the printed circuit board of FIG. 7 in accordance with one or more embodiments described herein. [Figure 9] 8 is a non-limiting graph of example scattering parameter results of a simulation of the printed circuit board of FIG. 7 in accordance with one or more embodiments described herein. [Figure 10] FIG. 2 illustrates a portion of a quantum device that utilizes a magnetic shielding wall, according to one or more embodiments described herein. [Figure 11A] 1A-1C illustrate alternative embodiments of a shielding wall according to one or more embodiments described herein. [Figure 11B] 1A-1C illustrate alternative embodiments of a shielding wall according to one or more embodiments described herein. [Figure 12] FIG. 2 illustrates an example non-limiting implementation of a multi-layer printed circuit board according to one or more embodiments described herein. [Figure 13] A diagram showing example non-limiting via dimensions according to one or more embodiments described herein. [Figure 14]1 is a flow diagram of an example non-limiting method for fabricating integrated circuits in accordance with one or more embodiments described herein. [Figure 15] FIG. 1 is a block diagram of an example non-limiting operating environment capable of facilitating one or more embodiments described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] The following detailed description is illustrative only and is not intended to limit the embodiments or the application and / or uses of the embodiments, and further, is not intended to be bound by any expressed or implied information presented in the previous Background or Summary sections or in the Detailed Description section.

[0014] One or more embodiments are now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. Nevertheless, it will be apparent that in various cases one or more embodiments may be practiced without these specific details.

[0015] As with circuits, and more specifically, quantum circuits, wire bonds are utilized to connect transmission lines of a printed circuit board (PCB) to components of a dielectric substrate (die). For illustration, FIG. 1A shows a quantum chip circuit with wire bonds shown within circle 102 (denoted as [1]) according to one or more embodiments described herein. Wire bonds are transition connection wires between dielectric layer lines and printed circuit board lines. For example, when there is a quantum processor or quantum device, the processor or device can be connected through tiny wire bonds (e.g., tiny wires made from aluminum or another material) that connect both the ground plane of the printed circuit board (surrounding the quantum processor) and the components on the dielectric layer. Additionally or alternatively, wire bonds can be used to connect transmission lines of a printed circuit board to transmission lines of the quantum processor itself, as shown in FIG. 1B, which shows a detailed example of a portion of a quantum chip circuit according to one or more embodiments described herein.

[0016] A challenge that can arise with quantum devices is that the wire bonds can be very close to each other between transmission lines, and the number of qubits or other components on the quantum processor increases, and the number of wire bonds can increase, and become closer to one another. The closer the wire bonds are, the more connections or crosstalk is created between them. This means that when a signal is sent through the first wire bond 104, some parts of the signal can leak to other wire bonds (e.g., the second wire bond 106) that are close to the first wire bond 104, and based on their electromagnetic coupling. As shown in FIG. 1B, the first wire bond 104 and the second wire bond 106 are separated by a distance of approximately 1.5 millimeters (mm), but other distances can be used to separate the wire bonds. As the number of qubits increases, the number of connections (e.g., wire bonds) that are in close proximity to each other increases. This close proximity can introduce undesirable cross-communication (e.g., crosstalk or x-talk) between nearby wirebonds (e.g., first wirebond 104 and second wirebond 106). When controlling a first qubit through signaling, the status of the second qubit (or the status of other qubits) must not inadvertently change based on crosstalk received from signals controlling the first qubit, and crosstalk situations must be avoided.

[0017] Furthermore, as shown in FIG. 1C, the transition from the printed circuit board line to the transmission line on the dielectric layer (e.g., through one or more wire bonds as shown at 108) does not maintain continuity of characteristic impedance. For example, in conventional devices, the transmission from the printed circuit board to the transmission line on the dielectric layer is not matched in terms of characteristic impedance. As shown, the printed circuit board and the dielectric layer can be designed to a first impedance (e.g., 50 ohms), but the transition (at 108) can be a second impedance (e.g., around 70 ohms). This means that some of the signal may be reflected back as it passes through the wire bond. The input line is typically 50 ohms (which may be standard for microwave components), and one designs the same on a quantum device for the transmission line, but unfortunately the wire bond itself cannot be perfectly controlled to be 50 ohms. As shown, the transition is often around 70 ohms, which can introduce some noise or problems into the design.

[0018] The problem addressed by the disclosed embodiments is to reduce and / or mitigate the negative impact of "crosstalk" in superconductor devices. Superconducting qubits can operate in narrow bandwidths (e.g., 100 MHz) approaching the 5 GHz range, and further components for control of the qubits can operate between about 6 GHz and approximately 10 GHz. Simulations discussed in the following figures plot the results of crosstalk in the range between 1 GHz and 20 GHz (as shown in Figures 7, 8, and 9). Crosstalk has become a significant destructive cause of performance degradation and signal integrity issues in the design of high speed printed circuit boards, and is worse at higher frequencies. Since transmission lines must typically be in close proximity to allow for a high density of interconnects in superconducting devices, the risk of corrupting one signal from a neighboring line becomes very likely. A common symptom of crosstalk is retransmission, which can cause significant random slowdowns leading to unpredictable results and potential failure of the circuit.

[0019] Several attempts have been made to mitigate crosstalk. Concepts such as various proposed signal routing topologies have been applied to reduce and / or mitigate crosstalk between adjacent lines, but this increases the required footprint on the printed circuit board. Additionally, other attempts such as driver sizing, wire spacing, defined wire bond placement, optical specific techniques, along with simultaneous buffering and routing, have been developed to reduce and / or mitigate crosstalk noise. Nevertheless, such attempts do not address the problem of reducing and / or mitigate crosstalk while maintaining the continuity of characteristic impedance, as discussed in more detail below.

[0020] Furthermore, these existing solutions do not achieve crosstalk reduction and / or mitigation approaching minus fifty decibels (-50 dB), since -30 dB is considered a good enough signal for traditional applications in the semiconductor industry. Some of these potential solutions can be implemented after circuit design. Nevertheless, it is an objective of the disclosed embodiments to design in circuit mitigation features prior to fabrication.

[0021] 2 illustrates a non-limiting side view of an example portion of a quantum device 200 in accordance with one or more embodiments described herein. As illustrated, quantum device 200 includes a bottom cover 202, which may be formed from copper or another material. Quantum device 200 may also include a printed circuit board 206, which is shown to include a dielectric layer (e.g., a dielectric substrate 204), as well as a first layer 2061 and a second layer 2062 overlying first layer 2061. Quantum device 200 also includes a top cover 208, which may be formed from copper or another material.

[0022] To create a transition from the printed circuit board 206 to the microwave quantum circuit 210 on the dielectric substrate 204, one or more portions of the printed circuit board 206 can be cut. For example, a portion of the second layer 2062 can be cut as shown at 212 and 214. Thus, the first layer 2061 and the second layer 2062 are not substantially the same length, and the second layer 2062 is cut to accommodate one or more wire bonds. The first wire bonds 216 can extend from the first cut portion 212 of the printed circuit board 206 (e.g., the second layer 2062) to one or more components (e.g., the microwave quantum circuit 210) on the dielectric substrate 204. Additionally, second wire bonds 218 may extend from the second cut portion 214 of the printed circuit board 206 (e.g., the second layer 2062) to one or more components (e.g., the microwave quantum circuit 210, one or more transmission lines) on the dielectric substrate 204.

[0023] The cuts in the printed circuit board 206 (e.g., second layer 2062) shown at 212 and 214 are the reason why the transitions do not match 50 ohms, which is another problem with conventional quantum devices. When the cuts are made, the transitions do not match 50 ohms because there is no way to precisely control the characteristic impedance. Furthermore, the length of the wire bonds (e.g., first wire bond 216, second wire bond 218) from the top of the printed circuit board (e.g., at 212 and 214) to the dielectric substrate 204 can increase the inaccuracy of the characteristic impedance of the transitions. To overcome these problems, embodiments of the disclosure provide quantum devices with one or more vias designed to a defined impedance, which can maintain the continuity of the characteristic impedance.

[0024] Furthermore, the quantum device of FIG. 2 does not provide the level of isolation between wire bonds required for quantum applications because less than minus fifty decibels (-50 dB) isolation is required to separate two qubits from one another. Although the device of FIG. 2 is used to isolate wire bonds that are near each other, the design of the device does not take into account the lack of continuity of characteristic impedance at the transition as discussed for FIG. 1C. Even if the device of FIG. 2 could reduce and / or mitigate crosstalk, the crosstalk still would not improve upon the 50 ohm condition as provided in the disclosed embodiments.

[0025] 3 illustrates a non-limiting side view of an example portion of a quantum computing device 300 according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity. Quantum computing device 300 (like other quantum devices discussed herein) can be a superconducting device and can be implemented on a printed circuit board, in an integrated circuit, or in a superconductor package, or a combination thereof.

[0026] As shown, quantum computing device 300 can include a printed circuit board 302, which can be a single layer printed circuit board. As discussed with respect to FIG. 2, a problem with conventional quantum devices (e.g., quantum device 200) is that the printed circuit board (e.g., printed circuit board 206, second layer 2062) must be cut as shown at 212 and 214 in FIG. 2 to create connection or contact points for wire bonds. The solution provided by the quantum devices discussed herein is that one or more vias can be formed inside printed circuit board 302, eliminating the need to cut out a portion of the printed circuit board. The one or more vias can be formed using a via formation process. The vias of quantum computing device 300 are shown as first via 304 and second via 306.

[0027] A transmission line can be formed in one or more vias (e.g., first via 304, second via 306). For example, first via 304 can comprise a first transmission line and second via 306 can comprise a second transmission line. First wirebond 308 can connect first via 304 to a dielectric layer (e.g., dielectric substrate 310) or to one or more components on dielectric substrate 310 (e.g., microwave quantum circuit 312, one or more transmission lines, second transmission line), or both. Second wirebond 314 can connect second via 306 to dielectric substrate 310 or to one or more components on dielectric substrate 310 (e.g., one or more transmission lines, such as microwave quantum circuit 312, second transmission line), or both.

[0028] The first wirebond 308 and the second wirebond 314 can provide a microwave signal connection between the printed circuit board 302 and the microwave quantum circuit 312. According to some implementations, the first wirebond 308 and the second wirebond 314 can provide a microwave signal connection between the printed circuit board 302 and a chip component on a dielectric layer (die), a line on a dielectric layer (die), or another dielectric substrate (die), or a combination thereof.

[0029] The first length of the first wire bond 308 can be based on a first distance between a first location 316 of the first via 304 and a second location 318 of the dielectric substrate 310, or to a microwave quantum circuit 312 on the dielectric substrate 310, or a combination thereof. The second length of the second wire bond 314 can be based on a second distance between a third location 320 of the second via 306 and a fourth location 322 of the dielectric substrate 310, or to a microwave quantum circuit 312 on the dielectric substrate 310, or a combination thereof. Additionally, the first length of the first wire bond 308 and the second length of the second wire bond 314 may be less than 2 millimeters (mm) according to some implementations.

[0030] The wirebonds (e.g., first wirebond 308, second wirebond 314) can include, for example, aluminum and / or niobium. Furthermore, the wirebonds (e.g., first wirebond 308, second wirebond 314) can have a diameter in a range between approximately 15 micrometers (μm) and several hundred micrometers, with the upper end of the range being utilized for high power applications. Furthermore, a cover 324 can be placed over the printed circuit board 302, the dielectric substrate 310, the microwave quantum circuit 312, the first wirebond 308, and the second wirebond 314.

[0031] Another problem with conventional quantum devices (e.g., quantum device 200) is that the characteristic impedance of the transmission lines in the printed circuit board cannot be controlled by cutting out portions of the printed circuit board (e.g., as shown at 212 and 214 in FIG. 2). The solution provided by the disclosed aspects is that the transmission lines (e.g., first transmission line, second transmission line) are inside the printed circuit board 302, and therefore there is no need to cut the printed circuit board 302 to make connections with wire bonds. Furthermore, the vias and / or transmission lines can be designed to be approximately 50 ohms, or another desired impedance. For example, the first via 304 can have a first defined characteristic impedance and the second via 306 can have a second defined characteristic impedance. According to some implementations, the first defined characteristic impedance and the second defined characteristic impedance can be different characteristic impedances. In some implementations, the first defined characteristic impedance and the second defined characteristic impedance can be the same characteristic impedance, or similar characteristic impedances.

[0032] The quantum computing device 300 may include one or more small copper vias under the printed circuit board 302. For example, the one or more small copper vias are shown as a first small via 324, a second small via 326, a third small via 328, and a fourth small via 330. The small vias (e.g., the first small via 324, the second small via 326, the third small via 328, and the fourth small via 330) may connect to another copper 332 under the dielectric substrate 310. The copper 332 may be utilized to improve thermalization of the chip since the quantum computing device 300 does not have a bottom cover that touches the dielectric substrate 310. Note that copper is utilized because copper is a good thermal conductor, but the printed circuit board 302 and the dielectric substrate 310 are not good thermal conductors. Thus, the small copper vias (e.g., first small via 324, second small via 326, third small via 328, and fourth small via 330) can thermalize the dielectric substrate 310. Furthermore, because crosstalk can be proportional to wirebond length, as discussed herein, having shorter wirebonds (e.g., reduced length due to location of vias and / or dielectric layers) can provide a corresponding reduction and / or mitigation of crosstalk.

[0033] In view of the above problems with prior art superconducting devices, various aspects provided herein may be implemented to produce solutions to one or more of these problems in the form of superconducting devices, superconducting circuits, and methods of fabricating the same. Such systems, devices, circuits, methods, computer-implemented methods, or computer program products, or combinations thereof, implementing such superconducting devices may have advantages over conventional techniques in terms of reduced and / or mitigated crosstalk and / or maintaining continuity of characteristic impedance.

[0034] The quantum computing device 300 in Figure 3 is shown with a dielectric substrate on top of a printed circuit board 302. For example, in Figure 3, a dielectric substrate 310 can be formed on top of the printed circuit board 302 and operatively attached to the printed circuit board 302 via a first wirebond 308 between a first transmission line (e.g., a first via 304) and the dielectric substrate 310, and via a second wirebond 314 between a second transmission line (e.g., a second via 306) and the dielectric substrate 310.

[0035] 4 illustrates a non-limiting side view of an example portion of another quantum computing device 400 according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity. As shown, the dielectric substrate 310 of the quantum computing device 400 can be at least partially inserted inside the printed circuit board 302. In this embodiment, since the top of the dielectric substrate 310 is closer to the printed circuit board 302, the first length of the first wire bond 308 and the second length of the second wire bond 314 can be slightly shorter in length than the wire bonds utilized in the quantum computing device 300 of FIG.

[0036] 5 illustrates a non-limiting side view of a portion of yet another example quantum computing device 500 according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity. As shown, the top of the dielectric substrate 310 of the quantum computing device 500 may be substantially flush with the top of the printed circuit board 302.

[0037] 5, a bottom cover 502 may be utilized to support both the dielectric substrate 310 and the printed circuit board 302. For example, the bottom of the printed circuit board 302 and the bottom of the dielectric substrate 310 may be supported on the bottom cover 502.

[0038] 6 illustrates a non-limiting side view of an example portion of another quantum computing device 600 according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity.

[0039] As shown, the heights of the dielectric substrate 310 and the printed circuit board 302 may differ. Due to the height difference between the dielectric substrate 310 and the printed circuit board 302, one or more pillars or other support structures may be utilized to support the dielectric substrate on the bottom cover 502. For example, as shown, a first pillar 602 and a second pillar 604 may support the dielectric substrate 310. Nevertheless, it should be noted that in some cases, a single pillar may be utilized to support the dielectric substrate 310, or three or more pillars may be utilized to support the dielectric substrate 310, or both.

[0040] There are several advantages of quantum computing device 300, quantum computing device 400, quantum computing device 500, or quantum computing device 600, or combinations thereof, compared to conventional quantum devices, including quantum device 200 of FIG. 2. First, one or more vias (e.g., first via 304, second via 306) inside printed circuit board 302 can be designed to be approximately 50 ohms. For example, the diameter of the via can be selected such that the via is 50 ohms. Thus, the 50 ohm transition from printed circuit board 302 to dielectric substrate 310 can be improved with the disclosed embodiments.

[0041] Another advantage is that with the dielectric substrate 310 in close proximity to the vias (e.g., first via 304, second via 306), the wire bonds (e.g., first wire bond 308, second wire bond 314) can be shorter compared to the first wire bond 216 and second wire bond 218 of Figure 2. By being shorter, the wire bonds can be 50 ohm transitions because the length of the wire bond is linearly related to the inductance of the transition. Thus, the shorter the wires, the better the approximation of 50 ohms can be.

[0042] Another benefit is that shorter wire bonds have lower mutual inductance between nearby wire bonds, which may enable reduced and / or mitigated crosstalk below the minus fifty decibels (-50 dB) threshold utilized for quantum applications.

[0043] Various embodiments provide a transition from a printed circuit board (e.g., printed circuit board 302) to a dielectric substrate (e.g., dielectric substrate 310 and / or microwave quantum circuit 312) with easy to make vias (e.g., first via 304, second via 306), controlled impedance, and reduced and / or mitigated crosstalk. Additionally, the disclosed embodiments can utilize a non-superconducting printed circuit board (e.g., printed circuit board 302) to improve thermalization (as superconductors are poor thermal conductors). For example, a superconductor is a material that exhibits certain properties when cooled down to a certain temperature. When such a material reaches a certain temperature, the material approaches an ideal electrical conductor with a resistance of approximately zero ohms. Thus, electrical current in a superconductor can flow with little, if any, loss. Additionally, superconductors are highly susceptible to noise and possible corruption (e.g., crosstalk) of the transmitted signal, which can be important for implementing applications.

[0044] The disclosed embodiments are disclosed in conjunction with the disclosed embodiments to mitigate such negative impacts by introducing potentially destructive forms of interference into the circuitry that can impact the data integrity of the superconductor and impair its functionality. Additionally, the various embodiments provided herein are easier to implement than conventional devices and tend to utilize only non-superconducting materials for packing to improve thermal conductivity.

[0045] 7 illustrates an example non-limiting printed circuit board 700 utilized in a simulation according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity.

[0046] For example, there may be two transmission lines (e.g., a first transmission line 702 and a second transmission line 704) embedded in the printed circuit board 700. Additionally, there may be four vias (e.g., a first via 706, a second via 708, a third via 710, and a fourth via 712) that can be utilized to implement transitions using wirebonds (e.g., a first wirebond 714, a second wirebond 716, a third wirebond 718, and a fourth wirebond 720). The first transmission line 702 may be between a first port 722 (P1) and a second port 724 (P2). The second transmission line 704 may be between a third port 726 (P3) and a fourth port 728 (P4). In an example, a wire bond may connect a first transmission line 702 to an attenuator, and another wire bond may connect the attenuator to a second transmission line 704.

[0047] As shown, the transmission lines (e.g., first transmission line 702, second transmission line 704) in the printed circuit board 700 were purposely designed to be approximately 47 ohms so that it could be determined how much the wire bonds and vias would impact the quality of the 50 ohm transition of the overall design if there was a shift from 47 ohms. The distance between the two components, i.e., first component 730 and second component 732 (e.g., one or more components), is approximately 1.5 mm, which is very close or similar to the dimensions utilized in practical applications.

[0048] 8 illustrates a non-limiting graph 800 of example time domain reflectometry results of a simulation of the printed circuit board 700 of FIG. 7 in accordance with one or more embodiments described herein. Time is shown on the horizontal axis 802 in nanoseconds (ns) and ohms is shown on the vertical axis 804.

[0049] Time domain reflectometry (TDR) provides values ​​of characteristic impedance along the lines (e.g., first transmission line 702 and second transmission line 704). The impedance of the first line (e.g., TDRZ(1)) is shown by a first line 806, and the impedance of the second line (e.g., TDRZ(2)) is shown by a second line 808.

[0050] A first transmission line 702 (e.g., a 47 ohm line) of the printed circuit board 700 was intentionally used as well as a 50 ohm stripline on a silicon (Si) dielectric substrate. As shown, the results spike at 810 in the graph 800, nearly three times ohms above 50 ohms. The spike is called an inductive overshoot and is caused by the wirebond. Shortening the wirebond may improve the inductive overshoot. Yet, the disclosed embodiments already improve this overshoot compared to the 70 ohm or higher spike with the conventional design. After the overshoot, at 802, the results return to 47 ohms, which was the value used in the simulation for FIG. 7.

[0051] 9 illustrates a non-limiting graph 900 of example scattering parameter results of a simulation of the printed circuit board 700 of FIG. 7 in accordance with one or more embodiments described herein. Frequency is shown on the horizontal axis 902 in gigahertz (GHz) and decibels (dB) on the vertical axis 904. Note that frequencies are shown between 0 GHz and 20 GHz, although 20 GHz may be above what is needed for quantum applications.

[0052] The first line 906 represents dB(S(1,1)) and is the reflected portion, which shows that when energy is pumped into the first port 722, only a small amount of energy is returned to the source. For example, the reflection is less than negative ten dB (<-10 dB). The second line 908 represents dB(S(1,2)) and shows the energy flowing unattenuated from port 1 (e.g., the first port 722) to port 2 (e.g., the second port 724).

[0053] A third line 910 represents dB(S(1,4)) and represents crosstalk between the first port 722 and the third port 726 (e.g., energy leaking from the first port 722 to the third port 726). A fourth line 912 represents dB(S(1,3)) and represents crosstalk between the first port 722 and the fourth port 728 (e.g., energy leaking from the first port 722 to the fourth port 728).

[0054] As shown, the crosstalk is less than minus 50 dB (<-50 dB) up to 20 GHz. Considering quantum applications, this is more than sufficient since superconducting qubits typically function at 5 GHz or even less than 10 GHz. Thus, graph 900 shows that the disclosed embodiments are effective at higher frequencies. Simulations also demonstrate that with a printed circuit board having one or more vias and one or more wire bonds, transitions as discussed herein can improve the characteristic impedance and crosstalk of the design.

[0055] According to some implementations, copper (Cu) walls can be used to further reduce and / or mitigate crosstalk. For example, Figure 10 illustrates a portion of a quantum device 1000 that utilizes magnetic shielding walls according to one or more embodiments described herein.

[0056] The first shielding wall 1002 and the second shielding wall 1004 may be on either side of the wire bond 1006. Thus, the first shielding wall 1002 and the second shielding wall 1004 may insulate the wire bond 1006. The shielding walls are shown for the second shielding wall 1004 and may have dimensions (A (width), B (height), and C (length)) like the insulated wire bond shown.

[0057] The thickness (A) of the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can be greater than the skin depth when using a non-superconducting material such as copper. If the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) are made of a type I superconductor material (e.g., aluminum), the thickness can be limited by the London penetration (London penetration depth defines the thickness at which supercurrents flow to block external magnetic fields).

[0058] In at least one non-limiting embodiment, the length (C) of the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can be at least five times the length of the extension of the wire bond 1006. Additionally, the height (B) of the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can be at least two times the height of the wire bond 1006.

[0059] According to some implementations, the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can be constructed as part of the fabrication of the circuit. In alternative implementations, the shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can be soldered in place after fabrication of the circuit. It should be understood that the dimensional ratios may vary in the embodiments depending on various parameters and conditions.

[0060] 11A and 11B show an alternative embodiment of a shielding wall according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for the sake of brevity.

[0061] As shown, the magnetic shielding walls (e.g., first shielding wall 1002, second shielding wall 1004) can include a ceiling portion and / or a surrounding portion 1102, 1104. The ceiling or surrounding portion 1102, 1104 can be flat (as shown in FIG. 11A), curved (as shown in FIG. 11B), solid, or non-solid as desired to facilitate mitigation of crosstalk across the respective wire bonds. It should be appreciated that any suitable magnetic shielding material, as well as wall thickness, height, and depth, can be utilized in conjunction with mitigating crosstalk levels to below -50 dB depending on the desired range for the superconducting quantum circuit application.

[0062] 12 illustrates an example non-limiting implementation 1200 for a multi-layer printed circuit board according to one or more embodiments described herein. A multi-layer printed circuit board may be a stacked printed circuit board. Possible dimensions for different layers (e.g., substrate, dielectric layers, metal thickness of transmission lines, etc.) are shown. Note that these values ​​and / or materials are for illustrative purposes only and aspects of the disclosure are not intended to be limited to the implementation 1200 illustrated in FIG.

[0063] FIG. 13 illustrates example, non-limiting via dimensions 1300 according to one or more embodiments described herein. The via dimensions 1300 can be selected to achieve a 50 ohm transition. It is noted that these values ​​are for illustrative purposes only and that the disclosed aspects are not intended to be limited to the via dimensions 1300 shown. It is further noted that FIGS. 12 and 13 are provided to demonstrate that various software programs can be utilized to determine whether a particular design can achieve a 50 ohm result in accordance with various aspects provided herein.

[0064] 14 illustrates a flow diagram of an example non-limiting method 1400 for fabricating an integrated circuit according to one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity.

[0065] The method 1400 begins at 1402, when vias (e.g., first via 304, second via 306) in a printed circuit board (e.g., printed circuit board 302) are filled with transmission lines. The vias can have a defined characteristic impedance. Further, at 1404, the printed circuit board can be operatively coupled to a microwave quantum circuit (e.g., microwave quantum circuit 312, one or more transmission lines) via wire bonds (e.g., first wire bonds 308, second wire bonds 314) between the transmission lines of the printed circuit board and the transmission lines of the microwave quantum circuit. The wire bonds can be configured to carry microwave signals between the printed circuit board and the microwave quantum circuit.

[0066] According to some implementations, the method 1400 may include, at 1406, attaching a wire bond of a length determined based on a first location of the via (e.g., first location 316, third location 320) and a second location of the dielectric substrate (e.g., second location 318, fourth location 322).

[0067] In some implementations, the dielectric substrate can be formed on a printed circuit board, while in other implementations, the dielectric substrate can be formed at least partially inside the printed circuit board.

[0068] In some implementations, the method 1400 may also include forming a shielding wall (e.g., the first shielding wall 1002, the second shielding wall 1004) between the wire bond and another wire bond at 1408. For example, the first shielding wall may be disposed on a first side of the wire bond and the second shielding wall may be disposed on a second side of the wire bond. The first shielding wall and the second shielding wall may insulate the wire bond from other neighboring wire bonds.

[0069] As discussed herein, a method is provided for a printed circuit board to dielectric substrate transition with controlled impedance and reduced and / or mitigated crosstalk. The printed circuit board can be designed to reduce and / or mitigate crosstalk between adjacent lines (e.g., wire bonds). One or more vias with a desired characteristic impedance can be inserted inside the printed circuit board. Additionally, short wire bonds (e.g., <2 mm) can provide microwave signal connections from the vias in the printed circuit board to the transmission lines on the dielectric substrate (die). Additionally, in optional implementations, metal walls can be used to further reduce and / or mitigate crosstalk between wire bonds. In alternative or additional implementations, additional ground vias can be used to reduce and / or mitigate crosstalk between vias. The method can be used, but is not limited to, interconnection of quantum devices and integrated components (e.g., superconductor packages) for cryogenic applications (such as attenuators, high electron mobility transistors (HEMTs), low noise amplifiers (LNAs), etc.).

[0070] For ease of explanation, the methods and / or computer-implemented methods are depicted and described as a series of acts. It is understood and appreciated that the subject innovation is not limited by the acts shown and / or by the order of the acts, e.g., acts may occur in various orders, simultaneously, and / or with other acts not shown or described herein. Moreover, not all shown acts may be required to implement a computer-implemented method in accordance with the disclosed subject matter. Moreover, those skilled in the art will understand and appreciate that a computer-implemented method can alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it is further appreciated that the computer-implemented methods disclosed hereinafter and throughout this specification can be stored in an article of manufacture to facilitate the transportation and transfer of such computer-implemented methods to a computer. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage medium.

[0071] To provide background for various aspects of the disclosed subject matter, FIG. 15 and the following discussion are intended to provide a general description of a suitable environment in which various aspects of the disclosed subject matter may be implemented. FIG. 15 illustrates a block diagram of an illustrative non-limiting operating environment that may facilitate one or more embodiments described herein. Repeated descriptions of similar elements used in other embodiments described herein are omitted for brevity. Referring to FIG. 15, a suitable operating environment 1500 for implementing various aspects of the disclosure may include a computer 1512. The computer 1512 may also include a processing unit 1514, a system memory 1516, and a system bus 1518. The system bus 1518 couples system components, including but not limited to the system memory 1516, to the processing unit 1514. The processing unit 1514 may be any of a variety of available processors. Dual microprocessors and other multi-processor architectures may also be employed as the processing unit 1514. The system bus 1518 may be any of several types of bus structures including a memory bus or memory controller, a peripheral bus or external bus, and / or a local bus using any of a variety of available bus architectures including, but not limited to, Industrial Standard Architecture (ISA), MicroChannel Architecture (MSA), Enhanced ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (IEEE 1394), and Small Computer System Interface (SCSI). The system memory 1516 may also include a volatile memory 1520 and a nonvolatile memory 1522. The basic input / output system (BIOS), containing the basic routines for transferring information between elements within the computer 1512, such as during start-up, is stored in the nonvolatile memory 1522.By way of example, and not limitation, the non-volatile memory 1522 may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). The volatile memory 1520 may also include random access memory (RAM) acting as external cache memory. By way of example, and not limitation, RAM is available in many forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM.

[0072] The computer 1512 may also include removable / non-removable volatile / non-volatile computer storage media. FIG. 15 shows, for example, disk storage 1524. Disk storage 1524 may include, but is not limited to, devices such as a magnetic disk drive, a floppy disk drive, a tape drive, a Jaz drive, a Zip drive, an LS-100 drive, a flash memory card, or a memory stick. Disk storage 1524 may also include storage media separately or in combination with other storage media, including, but not limited to, an optical disk drive, such as a compact disk ROM device (CD-ROM), a CD-writable drive (CD-R drive), a CD-rewriteable drive (CD-RW drive), or a digital versatile disk ROM drive (DVD-ROM). To facilitate connection of the disk storage 1524 to the system bus 1518, a removable or non-removable interface, such as interface 1526, is typically used. FIG. 15 also depicts software that acts as an intermediary between a user and the basic computer resources described in suitable operating environment 1500. Such software may include, for example, an operating system 1528. The operating system 1528 may be stored on disk storage 1524 and functions to control and allocate resources of the computer 1512. System applications 1530 take advantage of the management of resources by the operating system 1528 through program modules 1532 and program data 1534 stored, for example, in system memory 1516 or on disk storage 1524. It should be appreciated that the present disclosure may be implemented with various operating systems or combinations of operating systems. A user enters commands or information into the computer 1512 through input devices 1536.The input devices 1536 include, but are not limited to, pointing devices such as a mouse, a trackball, a stylus, a touch pad, a keyboard, a microphone, a joystick, a game pad, a satellite dish, a scanner, a TV tuner card, a digital camera, a digital video camera, a web camera, and the like. These and other input devices connect to the processing unit 1514 through the system bus 1518 via interface ports 1538. The interface ports 1538 include, for example, serial ports, parallel ports, game ports, and a universal serial bus (USB). The output devices 1540 use some of the same types of ports as the input devices 1536. Thus, for example, a USB port can be used to provide input to the computer 1512 and to output information from the computer 1512 to the output devices 1540. An output adapter 1542 is provided to illustrate that there are some output devices 1540, such as monitors, speakers, and printers, among other output devices 1540, that require special adapters. Output adapters 1542 include, by way of example and not limitation, video and sound cards that provide a method of connection between output device 1540 and the system bus 1518. It should be noted that other devices and / or systems of devices provide both input and output capabilities, such as remote computer 1544.

[0073] The computer 1512 can operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 1544. The remote computer 1544 may be a computer, a server, a router, a network PC, a workstation, a microprocessor-based appliance, a peer device or other common network node, and typically includes many or all of the elements described with respect to the computer 1512. For simplicity, only a memory storage device 1546 is shown with the remote computer 1544. The remote computer 1544 is logically connected to the computer 1512 through a network interface 1548, which is in turn physically connected via a communication connection 1550. The network interface 1548 encompasses wired and / or wireless communication networks, such as a local area network (LAN), a wide area network (WAN), a cellular network, and the like. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet, Token Ring, and the like. WAN technologies include, but are not limited to, point-to-point links, circuit-switched networks such as Integrated Services Digital Networks (ISDN) and variations thereon, packet-switched networks, and Digital Subscriber Lines (DSL). Communications connection 1550 refers to the hardware / software used to connect network interface 1548 to system bus 1518. Communications connection 1550 is shown inside computer 1512 for clarity of illustration, but may be external to computer 1512. Hardware / software for connection to network interface 1548 may also include, for illustrative purposes only, internal and external technologies such as modems, including ordinary telephone grade modems, cable modems and DSL modems, ISDN adapters, and Ethernet cards.

[0074] The present invention may be a system, method, apparatus, or computer program product, or combination thereof, at any possible level of technical detail of integration. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions for causing a processor to execute aspects of the present invention. The computer readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer readable storage media may include portable computer diskettes, hard disks, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or ridge-in-groove structures having instructions recorded thereon, and any suitable combination of the foregoing. Computer readable storage media, as used herein, should not be construed as being inherently ephemeral signals such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals transmitted through wires.

[0075] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network may comprise copper transmission cables, optical transmission fiber, wireless transmission, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing / processing device. The computer readable program instructions for carrying out the operations of the present invention may be assembler instructions, instruction set architecture (ISA) instructions, machine language instructions, machine dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuit devices, or source or object code written in any combination of one or more programming languages ​​including object oriented programming languages ​​such as Smalltalk®, C++, or the like, and procedural programming languages ​​such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server.In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit device, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer readable program instructions by utilizing state information of the computer readable program instructions to individualize the electronic circuitry to implement aspects of the present invention.

[0076] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via a processor of the computer or other programmable data processing apparatus, produce a method for implementing the functions / acts specified in one or more blocks of the flowchart illustrations and / or block diagrams. These computer-readable program instructions can also be stored in a computer-readable storage medium, such that the computer-readable storage medium having the instructions stored thereon comprises an article of manufacture including instructions that implement aspects of the functions / acts specified in one or more blocks of the flowchart illustrations and / or block diagrams, and can direct a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner. The computer readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device to perform a sequence of operations on the computer, other programmable apparatus, or other device to produce computer-executed processes, such that the instructions execute on the computer, other programmable apparatus, or other device to implement the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.

[0077] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, and may include one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may in fact be executed substantially simultaneously, or the blocks may sometimes be executed in the reverse order depending on the functionality involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be realized by special-purpose hardware-based systems that perform the specified functions or acts, or a combination of special-purpose hardware and computer instructions.

[0078] Although the subject matter has been described above in the general context of computer-executable instructions for computer program products running on one or more computers, or both, those skilled in the art will recognize that the present disclosure may also be implemented in combination with other program modules. Generally, program modules include routines, programs, components, data structures, etc., that perform particular tasks and / or implement particular abstract data types. Moreover, those skilled in the art will appreciate that the computer-implemented methods of the present invention may be practiced with other computer system configurations, including single-processor or multi-processor computer systems, mini-computing devices, mainframe computers, and computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronic devices, and the like. The illustrated embodiments may also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. Nevertheless, some, if not all, embodiments of the present disclosure may be practiced on stand-alone computers. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0079] As used in this application, the terms "component," "system," "platform," "interface," and the like, can refer to and / or include computer-related entities or entities associated with an operating machine having one or more particular functions. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, or a computer, or combinations thereof. By way of illustration, an application running on a server and the server may be a component. One or more components may reside within a process, or a thread of execution, or both, and a component may be localized on one computer or distributed between two or more computers, or both. In another example, each component may execute from various computer-readable media having various data structures stored thereon. A component may communicate through local and / or remote processes, such as by signals having one or more data packets (e.g., data from one component interacting with a local system, another component in a distributed system, or with other systems via signals across a network such as the Internet). As another example, a component may be a device having a particular function provided by mechanical parts operated by electrical or electronic circuitry operated by a software or firmware application executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware application.As yet another example, a component may be a device that provides a particular functionality through electronic components without mechanical parts, where the electronic components may include a processor or other means for executing software or firmware that at least partially confers the functionality of the electronic components. In one aspect, a component may emulate an electronic component via, for example, a virtual machine in a cloud computing system.

[0080] Furthermore, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X uses A or B" is intended to mean any of the natural inclusive permutations. That is, if X uses A, X uses B, or X uses both A and B, then "X uses A or B" is satisfied under any of the aforementioned cases. Moreover, the articles "a" and "an" as used in the subject specification and the accompanying drawings should generally be construed to mean "one or more" unless otherwise specified or clear from the context to be directed to the singular form. As used herein, the terms "example" and / or "exemplary" are utilized to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Moreover, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, and is not intended to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0081] As used in the subject specification, the term "processor" may refer to virtually any computational processing unit or device, including, but not limited to, a single core processor, a single processor with software multithreaded execution capability, a multicore processor, a multicore processor with software multithreaded execution capability, a multicore processor with hardware multithreading technology, a parallel platform, and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an application specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. Additionally, a processor may utilize nano-scale architectures, such as, but not limited to, molecular and quantum dot based transistors, switches, and gates, to optimize space usage or enhance the performance of user equipment. A processor may also be implemented as a combination of computational processing units. In this disclosure, terms such as "store," "storage," "data store," "data storage," "database," and substantially any other information storage component related to the operation and functionality of a component are utilized to refer to a "memory component," an entity contained in a "memory," or a component that comprises a memory. It should be recognized that the memory and / or memory components described herein may be volatile or non-volatile memory, or may include both volatile and non-volatile memory.By way of example, and not limitation, non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory may include RAM, which may act as external cache memory, for example. By way of example, and not limitation, RAM is available in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Additionally, memory components of the systems or computer-implemented methods disclosed herein are intended to include, without being limited to, these and any other suitable types of memory.

[0082] What has been described above includes merely examples of systems and computer-implemented methods. Of course, it is not possible to describe every conceivable combination of components or computer-implemented methods to describe the present disclosure, but one of ordinary skill in the art can recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that the terms "includes," "has," "possesses," and the like are used in the detailed description, claims, appendices, and drawings, such terms are intended to be as comprehensive as the term "comprising," since when used as transitional terms in the claims, they are interpreted as "comprising." The description of various embodiments has been presented for illustrative purposes, but is not intended to be exhaustive or to be limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been selected to best explain the principles of the embodiments, practical applications, or technical improvements to the technology found in the marketplace, or to enable one of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A quantum device, comprising: a microwave quantum circuit on a dielectric substrate; a printed circuit board having a via with a first transmission line; a wire bond between the first transmission line of the printed circuit board and a second transmission line of the microwave quantum circuit, one of the wire bonds being connected to the via at the location of the via, and a shielding wall between the wire bond and another wire bond; the wirebond operatively couples the microwave quantum circuit to the printed circuit board, the via having a defined characteristic impedance such that dimensions of the via maintain continuity of characteristic impedance at the transition between the first transmission line and the second transmission line through the wirebond; The shielding wall is a type I superconductor material. Quantum devices.

2. 10. The quantum device of claim 1, wherein a length of the wire bond is based on the location of the via and a second location of the dielectric substrate.

3. The quantum device of claim 1 , wherein the dielectric substrate is formed over the printed circuit board.

4. The quantum device of claim 1 , wherein the dielectric substrate is formed at least partially inside the printed circuit board.

5. A cover supporting the printed circuit board and the dielectric board The quantum device of claim 1 further comprising:

6. The quantum device of claim 1 further comprising a cover over said printed circuit board and said dielectric substrate.

7. The quantum device of claim 1 , wherein the length of the shielding wall is at least five times the length of the extension portion of the wire bond.

8. The quantum device of claim 1 , wherein the height of the shielding walls is at least twice the height of the wire bonds.

9. 10. The quantum device of claim 1, wherein the printed circuit board comprises a ground via that reduces crosstalk between the via and another via.

10. The quantum device of claim 1, which is a superconducting quantum computing device.

11. 1. A method comprising: filling a via in a printed circuit board with a first transmission line, the via having a defined characteristic impedance due to a dimension of the via; operatively coupling the printed circuit board to a microwave quantum circuit on a dielectric substrate via a wire bond between the first transmission line of the printed circuit board and a second transmission line of the microwave quantum circuit, one of the wire bonds being connected to the via at the location of the via, the defined characteristic impedance maintaining continuity of characteristic impedance at a transition between the first transmission line and the second transmission line through the wire bond; forming a shielding wall between the wire bond and another wire bond; Including, The shielding wall is a type I superconductor material. method.

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