Amplification equipment

Abstract

To provide an amplification device capable of stabilizing a common-mode voltage of an auto-zero amplifier.SOLUTION: A common-mode detection amplifier 2 outputs a common-mode output voltage such that the common-mode voltage of two common-mode inputs becomes a reference common-mode voltage Vcm. A common-mode control amplifier 361 amplifies the input and outputs an output signal that controls the common-mode voltage of a transconductance amplifier 34. Common-mode detection capacitors C21 and C22 are connected between the output of transconductance amplifier 34 and the input of the common-mode control amplifier 361. A switch S6 controls the connection between the input of the common-mode control amplifier 361 and the common-mode output of the common-mode detection amplifier 2. Second switches S51 and S52 control the connection between the output of the transconductance amplifier 34 and the common-mode input of the common-mode detection amplifier 2.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an amplifier device. [Background technology]

[0002] Amplifiers are widely used to amplify sensor signals, etc., but in some applications, it is required that the offset component and low-frequency noise component inside the amplifier be very small. Since the offset component and low-frequency noise component of conventional amplifiers cannot meet this requirement, there are many methods for reducing the offset component and low-frequency noise component.

[0003] An auto-zero amplifier is known as a method for reducing offset components and low-frequency noise components (Patent Document 1, Non-Patent Document 1). The auto-zero amplifier is a method for reducing the offset components and low-frequency noise components of an amplifier by using a built-in calibration circuit. In general, an auto-zero amplifier alternates between a calibration mode and an amplification mode. In the calibration mode, the inverting input and the non-inverting input of the amplifier built in the auto-zero amplifier are shorted, and the output is connected to a sampling capacitance. This causes a calibration voltage for reducing the offset components and low-frequency noise components to be sampled in the sampling capacitance. In the amplification mode, an input signal is input to the amplifier built in the auto-zero amplifier, and the amplifier amplifies the input signal to output an output signal. In the amplification mode, the offset components and low-frequency noise components included in the output signal are reduced by the sampled calibration voltage.

[0004] As a result, a single auto-zero amplifier cannot amplify the input signal in the calibration mode, so a Ping-Pong auto-zero amplifier is used, which has two auto-zero amplifiers so that when one auto-zero amplifier is in the calibration mode, the other is in the amplification mode and amplifies the input signal.

[0005] In some cases, a common mode feedback circuit is provided for this auto-zero amplifier. Conventionally, a common mode feedback circuit is provided for each of the two auto-zero amplifiers. However, since each common mode feedback circuit has an offset component, the common mode voltage of the output fluctuates every time the auto-zero amplifier is switched. This fluctuation in the common mode voltage generates sawtooth-shaped differential noise. Since the differential noise contains a DC component, it causes a residual offset voltage in the amplifier device, so it is necessary to reduce this differential noise.

[0006] Therefore, a method has been proposed in which two auto-zero amplifiers share one common-mode feedback circuit. According to this method, a common-mode feedback circuit is connected to an auto-zero amplifier in calibration mode. At this time, the output voltage of the common-mode feedback circuit is sampled by a sampling capacitor. As a result, even if the mode is switched to amplification mode and the common-mode feedback circuit is disconnected from the auto-zero amplifier, the output voltage of the common-mode feedback circuit sampled by the sampling capacitor can continue to be input to the auto-zero amplifier.

[0007] However, the output voltage of the common-mode feedback circuit sampled by the sampling capacitor corresponds to the common-mode voltage of the auto-zero amplifier in the calibration mode, and does not correspond to the common-mode voltage of the current auto-zero amplifier, which causes a problem that the common-mode voltage of the auto-zero amplifier becomes unstable. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] U.S. Patent No. 6,476,671 [Non-patent literature]

[0009] [Non-Patent Document 1] Ion E. Opris and Gregory TA Kovacs, “A Rail-to-Rail Ping-Pong Op-Amp”, IEEE J. Solid-State Circuits, vol. 31, no 9, pp. 1320-1324, Sep. 1996. Summary of the Invention [Problem to be solved by the invention]

[0010] The present invention has been made in consideration of the above-mentioned circumstances, and an object of the present invention is to provide an amplifier device capable of stabilizing the common-mode voltage of an auto-zero amplifier. [Means for solving the problem]

[0011] In order to achieve the above-mentioned object, an amplifier according to the present invention has the following features [1] to

[10] . [1] An amplifier; a calibration circuit including a sampling capacitance; an amplifier device having a plurality of auto-zero amplifiers and a first changeover switch for switching between a calibration mode in which a calibration voltage for calibrating an offset component and a low-frequency noise component of the amplifier is sampled in the sampling capacitor and an amplification mode in which an input signal is amplified by the amplifier in which the offset component and the low-frequency noise component are reduced by the calibration voltage, and an output signal is output; a common-mode detection amplifier for outputting a common-mode output voltage such that the common-mode voltage of two common-mode inputs is a reference common-mode voltage; The plurality of auto-zero amplifiers include a common-mode control amplifier for amplifying an input and outputting an output signal for controlling the common-mode voltage of said amplifier; a common mode detection capacitance connected between the output of the amplifier and the input of the common mode control amplifier; a first switch for controlling a connection between an input of the common-mode control amplifier and a common-mode output of the common-mode detection amplifier; a second switch that controls the connection of the output of the amplifier to the common mode input of the common mode detection amplifier.death , the amplifiers of the plurality of auto-zero amplifiers are connected in parallel with each other; The common-mode detection amplifier has one of the two common-mode inputs receiving a voltage from a positive output of the amplifier and the other of the two common-mode inputs receiving a voltage from a negative output of the amplifier; The output signal of the common-mode control amplifier is output to a path through which the output of the amplifier is output. It is an amplification device. [2] In the amplifier according to [1], The first control unit controls the first changeover switch so that the auto-zero amplifier is alternately switched between the calibration mode and the amplification mode, and at least one of the auto-zero amplifiers operates in the amplification mode and another of the auto-zero amplifiers operates in the amplification mode. 1 controlling the first changeover switch so that the auto-zero amplifier operates in the calibration mode; It is an amplification device. [3] In the amplifier according to [1], The auto-zero amplifier is provided in three pieces, Each of the three auto-zero amplifiers includes a first input path and a second input path to which the input signal is respectively input; a first output path and a second output path through which the output signal is output, the first changeover switch has a path changeover switch that switches between a first path mode in which the amplifier is connected to the first input path and the first output path and a second path mode in which the amplifier is connected to the second input path and the second output path in the amplification mode; It is an amplification device. [4] In the amplifier according to [3], A first control unit that controls the first changeover switch, The first control unit controls the first changeover switch so that the auto-zero amplifier alternately switches between the calibration mode and the amplification mode, and controls the first changeover switch so that one of the three auto-zero amplifiers operates in the calibration mode and the remaining auto-zero amplifiers operate in the first path mode or the second path mode. It is an amplification device. [5] In the amplifier according to [1], a first control unit that controls the first changeover switch, the first switch, and the second switch; The first control unit is controlling the first changeover switch so as to alternately operate between the calibration mode and the amplification mode; turning on the first switch and the second switch of the auto-zero amplifier in the calibration mode; controlling to turn off the first switch and the second switch of the auto-zero amplifier in the amplification mode; It is an amplification device. [6] In the amplifier according to [1], a first control unit that controls the first changeover switch, the first switch, and the second switch; The first control unit is controlling the first changeover switch so as to alternately operate between the calibration mode and the amplification mode; turning on the first switch and the second switch of the auto-zero amplifier that has been switched from the amplification mode to the calibration mode; controlling the first switch and the second switch to be off while the auto-zero amplifier is in the calibration mode; maintaining the first switch and the second switch of the auto-zero amplifier in the amplifying mode off; It is an amplification device. [7] [1] to [6] The amplifier according to any one of the above, the common-mode detection capacitance includes a first common-mode detection capacitance connected between the positive output of the amplifier and the input of the common-mode control amplifier, a second common-mode detection capacitance connected between the negative output of the amplifier and the input of the common-mode control amplifier, and a third common-mode detection capacitance and a fourth common-mode detection capacitance, one end of which is connected to the input of the common-mode control amplifier; the auto-zero amplifier has a second changeover switch that switches the connection destination of the other ends of the third common-mode detection capacitance and the fourth common-mode detection capacitance to a positive output of the amplifier or a negative output of the amplifier. It is an amplification device. [8] [7], wherein the amplifier comprises: A second control unit that controls the second changeover switch, The second control unit switches the second changeover switch at a timing when the auto-zero amplifier switches from the calibration mode to the amplification mode or from the amplification mode to the calibration mode. It is an amplification device. [9] [1] to [6] The amplifier according to any one of the above, the common-mode detection amplifier includes an auxiliary capacitance connected in parallel to the common-mode detection capacitance when the first switch and the second switch are turned on, and a third changeover switch configured to switch between a charge mode in which the auxiliary capacitance is charged with the reference common-mode voltage and a common-mode output mode in which the common-mode output voltage is output. It is an amplification device.

[10] [9], wherein the amplifier comprises: A third control unit that controls the third changeover switch, the third control unit controls the third changeover switch so that the third changeover switch is switched to the common-mode output mode when the first switch and the second switch are turned on, and is switched to the charging mode when the first switch and the second switch are turned off. It is an amplification device. Effect of the Invention

[0012] According to the present invention, it is possible to provide an amplifier device capable of stabilizing the common-mode voltage of an auto-zero amplifier.

[0013] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the following description of the preferred embodiment of the present invention (hereinafter, referred to as "embodiment") with reference to the accompanying drawings. [Brief description of the drawings]

[0014] [Figure 1] FIG. 1 is a block diagram showing the configuration of a Ping-Pong auto-zero amplifier as an amplifying device according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing an example of a transistor configuration of the common-mode detection amplifier shown in FIG. [Diagram 3] FIG. 3 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in a first state of the calibration mode. [Figure 4] FIG. 4 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in a second state of the calibration mode. [Diagram 5] FIG. 5 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in an amplification mode. [Figure 6] FIG. 6 is a diagram illustrating an example of a transistor configuration of the common-mode control amplifier illustrated in FIG. [Figure 7] FIG. 7 is a diagram showing an example of a transistor configuration of the transconductance amplifier shown in FIGS. [Figure 8] FIG. 8 is a time chart of the clocks supplied to the switches of the auto-zero amplifier shown in FIGS. [Figure 9] FIG. 9 is a modified example of the time chart of the clocks supplied to the switches of the auto-zero amplifier shown in FIGS. [Figure 10] FIG. 10 is a block diagram showing the configuration of a phase inversion auto-zero amplifier as an amplifying device according to the second embodiment of the present invention. [Figure 11] FIG. 11 is a block diagram showing a configuration of an amplifier sharing auto-zero amplifier as an amplifying device according to the third embodiment of the present invention. [Figure 12]FIG. 12 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the first state of the calibration mode. [Figure 13] FIG. 13 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the second state of the calibration mode. [Figure 14] FIG. 14 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the first path mode of the amplification mode. [Figure 15] FIG. 15 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the second path mode of the amplification mode. [Figure 16] FIG. 16 is a time chart of the clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. [Figure 17] FIG. 17 is a time chart of the operation modes of the three auto-zero amplifiers that make up the amplifier sharing auto-zero amplifier shown in FIG. [Figure 18] FIG. 18 is a modified example of the time chart of the clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. [Figure 19] FIG. 19 is a configuration diagram of the in-phase feedback section in the third state shown in FIGS. 3 to 4 or FIGS. 12 to 15 in the fourth embodiment. [Figure 20] FIG. 20 is a configuration diagram of the in-phase feedback section in the fourth embodiment in the fourth state shown in FIGS. 3 to 4 or FIGS. 12 to 15. In FIG. [Figure 21] FIG. 21 is a configuration diagram of the auto-zero amplifier in the second state of the calibration mode in the fifth embodiment. [Figure 22] FIG. 22 is a configuration diagram of an auto-zero amplifier in the first state of the calibration mode in the fifth embodiment. [Figure 23] FIG. 23 is a diagram showing a transistor configuration of a common-mode detection amplifier that constitutes the auto-zero amplifier shown in FIG. [Figure 24] FIG. 24 is a diagram showing a transistor configuration of a common-mode detection amplifier that constitutes the auto-zero amplifier shown in FIG. [Diagram 25]FIG. 25 is a time chart showing the operation modes of the Ping-Pong auto-zero amplifier in the fifth embodiment and the on / off timing of the switches that constitute the auto-zero amplifier. [Figure 26] FIG. 26 is a circuit diagram showing an amplifying device including the Ping-Pong auto-zero amplifier shown in the first embodiment in the sixth embodiment. [Figure 27] FIG. 27 is a circuit diagram showing a chopper-stabilized amplifier including the Ping-Pong auto-zero amplifier shown in the first embodiment or the phase-inversion auto-zero amplifier shown in the second embodiment in the seventh embodiment. [Figure 28] FIG. 28 is a circuit diagram showing an example of the chopper output circuit shown in FIG. [Figure 29] FIG. 29 is a circuit diagram showing an example of the chopper output circuit shown in FIG. [Diagram 30] FIG. 20 is a characteristic diagram showing an example of time waveforms and frequency characteristics of a signal component, a noise component, and an offset component by the amplifying device of the seventh embodiment. [Diagram 31] FIG. 31 is a circuit diagram showing a modification of the amplifier that constitutes the chopper stabilized amplifier shown in FIG. [Diagram 32] FIG. 32 is a circuit diagram showing an example in which the amplifier sharing auto-zero amplifier of the third embodiment is used in the chopper output circuit shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Specific embodiments of the present invention will be described below with reference to the accompanying drawings.

[0016] (First embodiment) Fig. 1 is a block diagram showing the configuration of a Ping-Pong auto-zero amplifier, which is an example of an amplifier device of the present invention. As shown in the figure, the Ping-Pong auto-zero amplifier 1A includes one common-mode detection amplifier 2 and two auto-zero amplifiers 31 and 32. The common-mode detection amplifier 2 is an amplifier that outputs a common-mode output voltage such that the median value (=common-mode voltage) of the voltages of two common-mode inputs becomes a reference common-mode voltage Vcm. The two auto-zero amplifiers 31 and 32 have a common-mode detection path for inputting two common-mode input voltages to the common-mode detection amplifier 2, and a common-mode feedback path for inputting the common-mode output voltage output from the common-mode detection amplifier 2.

[0017] An example of the common-mode detection amplifier 2 will be described with reference to FIG. 2. As shown in the figure, the common-mode detection amplifier 2 has two current sources I1 and I2, four MOS transistors M11 to M14, and a current mirror circuit 21. The MOS transistors M11 to M14 are configured as P-type MOS transistors. The sources of the MOS transistors M11 and M12 are connected to each other and connected to the current source I1. The sources of the MOS transistors M13 and M14 are connected to each other and connected to the current source I2. One of the common-mode inputs is input to the gate of the MOS transistor M11, and the other of the common-mode inputs is input to the gate of the MOS transistor M14. The drains of the MOS transistors M11 and M14 are connected to each other and connected to the input side of the current mirror circuit 21. The gates of the MOS transistors M12 and M13 are connected to each other and a reference common-mode voltage Vcm is input thereto. The drains of the MOS transistors M12 and M13 are connected to each other and connected to the output side of the current mirror circuit 21. The connection point between the drain of the MOS transistor M13 and the output side of the current mirror circuit 21 becomes an in-phase output.

[0018] The auto-zero amplifiers 31 and 32 are connected in parallel with each other. That is, the positive input and output of the Ping-Pong auto-zero amplifier 1A are connected to the positive input and output of the auto-zero amplifiers 31 and 32, and the negative input and output of the Ping-Pong auto-zero amplifier 1A are connected to the negative input and output of the auto-zero amplifiers 31 and 32. Since the auto-zero amplifiers 31 and 32 have the same configuration, the auto-zero amplifier 31 will be described here as a representative.

[0019] As shown in Fig. 3 to Fig. 5, the auto-zero amplifier 31 includes a transconductance amplifier 34 (amplifier), a calibration circuit 35, and a common-mode feedback section 36. The transconductance amplifier 34 inverts and amplifies an input signal Vin supplied to an input terminal, and outputs the result as an output signal Vout from an output terminal. The calibration circuit 35 is a circuit that reduces the offset component and low-frequency noise component of the transconductance amplifier 34 contained in the input signal Vin. The calibration circuit 35 includes switches S1, S2, S31, S32, S41, and S42 (first changeover switches), a transconductance amplifier 351, and sampling capacitors C11 and C12.

[0020] The switch S1 is connected between the positive input terminal and the inverting input of the transconductance amplifier 34. The switch S2 is connected between the inverting input and the non-inverting input of the transconductance amplifier 34. The switches S31 and S32 are connected between the two outputs of the transconductance amplifier 34 and the two output terminals, respectively.

[0021] The switches S41 and S42 are connected between the two outputs of the transconductance amplifier 34 and one end of the sampling capacitors C11 and C12, respectively. One ends of the sampling capacitors C11 and C12 are connected to the input of the transconductance amplifier 351. The output of the transconductance amplifier 351 is connected to the output of the transconductance amplifier 34. The other ends of the sampling capacitors C11 and C12 are connected to ground.

[0022] The auto-zero amplifier 31 has two operation modes, a calibration mode and an amplification mode, due to the calibration circuit 35. The calibration mode is a mode in which a calibration voltage for reducing the offset component and low-frequency noise component of the transconductance amplifier 34 is sampled to the sampling capacitors C11 and C12.

[0023] 3 and 4, in the calibration mode, the switches S1, S31, and S32 are turned off, and the switches S2, S41, and S42 are turned on, and the output and input of the transconductance amplifier 34 are disconnected from the output terminal and input terminal. Also, the inverting input and non-inverting input of the transconductance amplifier 34 are shorted, and an offset component and a low-frequency noise component are output from the transconductance amplifier 34. Also, the output of the transconductance amplifier 34 is connected to the sampling capacitors C11 and C12. This allows the offset component and the low-frequency noise component output from the transconductance amplifier 34 to be sampled as a calibration voltage by the sampling capacitors C11 and C12.

[0024] The amplification mode is a mode in which an input signal Vin is input to the transconductance amplifier 34, and an output signal Vout obtained by amplifying the input signal Vin is output from the transconductance amplifier 34. In addition, in the amplification mode, the offset component and low-frequency noise component included in the output signal Vout are reduced by the sampled calibration voltage.

[0025] 5, in the amplification mode, the switches S2, S41, and S42 are turned off, and the switches S1, S31, and S32 are turned on. As a result, the transconductance amplifier 34 is connected to the input terminal and the output terminal, and the input signal Vin is amplified by the transconductance amplifier 34 and an output signal Vout is output from the output terminal. In addition, the calibration voltages sampled by the sampling capacitors C11 and C12 are applied to the output of the transconductance amplifier 34 via the transconductance amplifier 351, and the offset components and low-frequency noise components included in the output signal Vout are reduced.

[0026] The common-mode feedback section 36 has switches S51, S52, and S6, a common-mode control amplifier 361, and common-mode detection capacitors C21 and C22. The switches S51 and S52 (second switches) are connected between the two outputs of the transconductance amplifier 34 and the two common-mode inputs of the common-mode detection amplifier 2. That is, the switches S51 and S52 are provided on the common-mode detection path. The switch S6 (first switch) is connected between the input of the common-mode control amplifier 361 and the common-mode output of the common-mode detection amplifier 2. That is, the switch S6 is provided on the common-mode feedback path.

[0027] The in-phase output of the in-phase detection amplifier 2 is connected to the non-inverting input of the in-phase control amplifier 361 via the switch S6. The in-phase control amplifier 361 amplifies the input signal and outputs an output signal that controls the common-mode voltage of the transconductance amplifier 34. The two outputs of the in-phase control amplifier 361 are connected to the two outputs of the transconductance amplifier 34, respectively.

[0028] 6 shows an example of the transistor configuration of the in-phase control amplifier 361. As shown in the figure, the in-phase control amplifier 361 is composed of eight MOS transistors M21, M22, M31, M32, M41, M42, M51, and M52. The MOS transistors M21 and M22 are composed of P-type MOS transistors and are cascode-connected. The MOS transistors M31 and M32 are composed of P-type MOS transistors and are cascode-connected. The MOS transistors M41 and M42 are composed of N-type MOS transistors and are cascode-connected. The MOS transistors M51 and M52 are composed of N-type MOS transistors and are cascode-connected. In addition, the cascode-connected MOS transistors M21 and M22 and the MOS transistors M41 and M42 are connected in series, and the MOS transistors M31 and M32 and the MOS transistors M51 and M52 are connected in series.

[0029] The gates of the MOS transistors M21 and M31 are connected to each other and supplied with a reference voltage Vb1. The gates of the MOS transistors M22 and M32 are connected to each other and supplied with a reference voltage Vb2. The gates of the MOS transistors M41 and M51 are connected to each other and supplied with a reference voltage Vb3. The gates of the MOS transistors M42 and M52 are connected to each other and supplied with the common-mode output voltage of the common-mode detection amplifier 2 via a switch S6. In addition, the connection point of the MOS transistors M22 and M41 and the connection point of the MOS transistors M32 and M51 serve as outputs and are connected to the switches S51 and S52.

[0030] 3, 6, etc., one end of the common-mode detection capacitors C21 and C22 is commonly connected to the input of the common-mode control amplifier 361, and the other end is connected to each of the two outputs of the common-mode control amplifier 361. The above-mentioned common-mode feedback unit 36 ​​and the common-mode detection amplifier 2 form a common-mode feedback circuit.

[0031] 7, the outputs of the transconductance amplifiers 34 and 351 are connected to an input terminal in1, which is a connection point of the MOS transistors M41 and M42 constituting the in-phase control amplifier 361, and an input terminal in2, which is a connection point of the MOS transistors M51 and M52. The transconductance amplifiers 34 and 351 include current sources I3 and I4, and P-type MOS transistors M61, M62, M71 and M72. The sources of the MOS transistors M61, M62, M71 and M72 are connected to the current sources I3 and I4, and the gates of the MOS transistors M61, M62, M71 and M72 are inputs. The drains of the MOS transistors M61, M62, M71 and M72 are outputs, and are connected to the input terminals in1 and in2, respectively.

[0032] The auto-zero amplifier 31 has a first state and a second state due to the common-mode feedback unit 36. In the first state, as shown in FIG. 3, the switches S51, S52, and S6 are turned on. As a result, the output of the transconductance amplifier 34 is connected to the common-mode input of the common-mode detection amplifier 2, and a common-mode output voltage is output from the common-mode detection amplifier 2. Also, the common-mode output voltage of the common-mode detection amplifier 2 is connected to the input of the common-mode control amplifier 361. The common-mode control amplifier 361 amplifies the common-mode output voltage and feeds it back to the output of the transconductance amplifier 34, and sets the common-mode voltage to the reference common-mode voltage Vcm. Also, at this time, a voltage corresponding to the common-mode output voltage of the common-mode detection amplifier 2 is sampled in the common-mode detection capacitances C21 and C22.

[0033] 4 and 5, in the second state, the switches S51, S52, and S6 are turned off. This disconnects the output of the transconductance amplifier 34 from the in-phase input of the in-phase detection amplifier 2, and disconnects the in-phase output of the in-phase detection amplifier 2 from the input of the in-phase control amplifier 361. At this time, the input of the in-phase control amplifier 361 can be held at the in-phase output voltage in the first state by the voltage sampled by the in-phase detection capacitors C21 and C22.

[0034] The other ends of the common-mode detection capacitances C21 and C22 are respectively connected to the two outputs of the transconductance amplifier 34. One end of the common-mode detection capacitances C21 and C22, which are connected to each other, fluctuates according to fluctuations in the common-mode voltage of the transconductance amplifier 34. Therefore, a common-mode output voltage that matches the current common-mode voltage of the transconductance amplifier 34 can be input to the common-mode control amplifier 361, and the common-mode voltage of the auto-zero amplifier 31 can be stabilized. In addition, since the common-mode detection capacitances C21 and C22 also function as Miller compensation capacitances, oscillation of the common-mode feedback circuit formed by the common-mode detection amplifier 2 and the common-mode feedback unit 36 ​​can be prevented.

[0035] Next, the operation of the Ping-Pong auto-zero amplifier 1A having the above-mentioned configuration will be described with reference to the time chart shown in FIG. 8. A clock CLK1 is supplied to the switches S1, S31, and S32 of the auto-zero amplifier 31, a clock CLK2 is supplied to the switches S2, S41, and S42, and a clock CLK3 is supplied to the switches S51, S52, and S6. The clocks CLK1 and CLK2 switch the operation mode of the auto-zero amplifier 31 alternately between the calibration mode (FIGS. 3 and 4) and the amplification mode (FIG. 5). The clock CLK3 also switches the auto-zero amplifier 31 to a first state (FIG. 3) when the amplification mode is switched to the calibration mode, to a second state (FIG. 4) while in the calibration mode, and to the second state during the amplification mode (FIG. 5). A circuit (not shown) that supplies the clocks CLK1 to CLK3 constitutes a first control unit.

[0036] The clocks CLK1 to CLK3 supplied to the auto-zero amplifiers 31 and 32 are out of phase with each other by 180 degrees. As a result, when the auto-zero amplifier 31 is in the calibration mode, the auto-zero amplifier 32 is in the amplification mode. Also, when the auto-zero amplifier 31 is in the amplification mode, the auto-zero amplifier 32 is in the calibration mode. As a result, the Ping-Pong auto-zero amplifier 1A can always output the output signal Vout obtained by amplifying the input signal Vin.

[0037] However, if the switches S51, S52, and S6 are turned off and the common-mode detection amplifier 2 is disconnected at the same time as switching from the calibration mode to the amplification mode, the calibration voltages of the sampling capacitors C21 and C22 fluctuate due to charging injection of the switches S51, S52, and S6. As a result, the offset components and low-frequency noise components cannot be removed accurately. According to the first embodiment described above, the calibration mode is switched to the second state in which the common-mode detection amplifier 2 is disconnected during the calibration mode, and then the amplification mode is switched to. Therefore, the auto-zero amplifier 31 is in the calibration mode even after the switches S51, S52, and S6 are turned off and the calibration voltages of the sampling capacitors C21 and C22 fluctuate, so that the calibration voltages of the sampling capacitors C21 and C22 can be returned to their original values, and the offset components and low-frequency noise components can be removed accurately.

[0038] In the first embodiment described above, the first state is switched to the second state during the calibration mode, but the present invention is not limited to this. For example, the first state may be switched to the second state at the same time as the calibration mode is switched to the amplification mode. In this case, the clocks CLK1 to CLK3 shown in FIG. 9 are supplied to the switches S1, S2, S31, S32, S41, S42, S51, S52, and S6 of the auto-zero amplifier 31. According to the clocks CLK1 to CLK3 shown in FIG. 9, the clocks CLK2 and CLK3 are the same clock. Therefore, the control circuits of the auto-zero amplifiers 31 and 32 can be configured with a simple clock generator.

[0039] In the first embodiment described above, the state is switched to the first state in the calibration mode and the state is switched to the second state in the amplification mode, but this is not limited to this. The state may be switched to the first state in the amplification mode and the state is switched to the second state in the calibration mode.

[0040] Second embodiment Next, a second embodiment will be described. As shown in Fig. 10, a phase inversion auto-zero amplifier 1B as an amplifying device of the second embodiment includes the common-mode detection amplifier 2 described in the first embodiment and two auto-zero amplifiers 31 and 32. The difference between the first embodiment and the second embodiment is that the input terminals of the two auto-zero amplifiers 31 and 32 are inverted. That is, the positive input terminal of one of the two auto-zero amplifiers 31 and 32 is connected to the negative input terminal of the other, and the negative input terminal of one is connected to the positive input terminal of the other.

[0041] In the phase-inverting auto-zero amplifier 1B, like the Ping-Pong auto-zero amplifier 1A, when one of the two auto-zero amplifiers 31 and 32 is switched to the calibration mode, the other is switched to the amplification mode. When one of the two auto-zero amplifiers 31 and 32 is switched to the amplification mode, the other is switched to the calibration mode. As a result, the phase-inverting auto-zero amplifier 1B always outputs an output signal Vout in which the offset component and low-frequency component are reduced, and the output signal Vout is inverted every time the amplifier mode is switched from the amplification mode to the calibration mode.

[0042] Third embodiment Next, a third embodiment will be described. As shown in FIG. 11, an amplifier sharing auto-zero amplifier 1C as an amplifying device of the third embodiment has a first path mode in which an input is input from a first input path and an output is output from a first output path, and a second path mode in which an input is input from a second input path and an output is output from a second output path. The amplifier sharing auto-zero amplifier 1C includes the common-mode detection amplifier 2 described in the first embodiment and three auto-zero amplifiers 31C, 32C, and 33C. The common-mode detection amplifier 2 is the same as the common-mode detection amplifier 2 described in the first embodiment, and therefore a detailed description thereof will be omitted here.

[0043] The auto-zero amplifiers 31C, 32C, and 33C are connected in parallel with each other. The auto-zero amplifiers 31C, 32C, and 33C have the same configuration, so the auto-zero amplifier 31C will be described here as a representative. The auto-zero amplifier 31C has an in-phase detection path and an in-phase feedback path, similar to the first embodiment. The auto-zero amplifier 31C also has two first and second input paths for inputting an input signal Vin, and two first and second output paths for outputting an output signal Vout. As shown in FIGS. 12 to 15, the auto-zero amplifier 31C includes two mutual conductance amplifiers 341 and 342 (amplifiers), a calibration circuit 35C, and an in-phase feedback section 36.

[0044] The calibration circuit 35C includes switches S11 to S14, S21 to S24, and S31 to S34 as first changeover switches and path changeover switches, S41 and S42 as first changeover switches, a transconductance amplifier 351, and sampling capacitors C11 and C12. The switches S11 and S12 are connected between the first input path and the input of the transconductance amplifier 341. The switches S13 and S14 are connected between the second input path and the input of the transconductance amplifier 342. The switches S21 and S22 are connected between the reference common-mode voltage Vcm and the input of the transconductance amplifier 341. The switches S23 and S24 are connected between the input of the transconductance amplifier 341 and the input of the transconductance amplifier 342.

[0045] The outputs of the transconductance amplifiers 341 and 342 are connected to each other. The switches S31 and S32 are connected between the outputs of the transconductance amplifiers 341 and 342, which are connected to each other, and the first output path. The switches S33 and S34 are connected between the outputs of the transconductance amplifiers 341 and 342, which are connected to each other, and the second output path. The switches S41 and S42 are connected between the outputs of the transconductance amplifiers 341 and 342, which are connected to each other, and one end of the sampling capacitors C11 and C12. The other ends of the sampling capacitors C11 and C12 are connected to ground. The output of the transconductance amplifier 351 is connected to the outputs of the transconductance amplifiers 341 and 342.

[0046] The common-mode feedback section 36 is connected to the outputs of the two transconductance amplifiers 341 and 342. The common-mode feedback section 36 is similar to that in the first embodiment, and therefore a detailed description thereof will be omitted here.

[0047] The auto-zero amplifier 31C has a calibration mode and a first path mode and a second path mode of the amplification mode. In the calibration mode, as shown in Fig. 12 and Fig. 13, the switches S11 to S14 and S31 to S34 are turned off, and the switches S21 to S24, S41, and S42 are turned on. This causes the inputs and outputs of the transconductance amplifiers 341 and 342 to be disconnected from the first and second input paths and the first and second output paths. In addition, the inputs of the transconductance amplifiers 341 and 342 are shorted, and the offset components and low-frequency noise components are output from the transconductance amplifiers 341 and 342. In addition, the offset components and low-frequency noise components output from the transconductance amplifiers 341 and 342 are sampled as calibration voltages by the sampling capacitors C11 and C12.

[0048] 14, in the first path mode, the switches S11, S12, S23, S24, S31, and S32 are turned on, and the switches S13, S14, S21, S22, S33, S34, S41, and S42 are turned off. As a result, the inputs and outputs of the transconductance amplifiers 341 and 342 are connected to the first input path and the first output path. As a result, the transconductance amplifiers 341 and 342 amplify the input signal Vin input from the first input path, and output it as the output signal Vout from the first output path.

[0049] 15, in the second path mode, the switches S13, S14, S21, S22, S33, and S34 are turned on, and the switches S11, S12, S23, S24, S31, and S32 are turned off. As a result, the input and output of the transconductance amplifier 342 are connected to the second input path and the second output path. Also, the inverting input and non-inverting input of the transconductance amplifier 341 are shorted. As a result, the transconductance amplifier 342 amplifies the input signal Vin input from the second input path, and outputs it as the output signal Vout from the second output path.

[0050] 12, in the first state, the switches S51, S52, and S6 are turned on, the in-phase detection amplifier 2 is connected to the in-phase feedback section 6, and a voltage corresponding to the in-phase output voltage is sampled in the in-phase detection capacitors C21 and C22. In the second state, as shown in FIGS. 13 to 15, the switches S51, S52, and S6 are turned off, and the in-phase detection amplifier 2 is disconnected from the in-phase feedback section 6. In addition, the input of the in-phase control amplifier 361 is held at the in-phase output voltage output by the in-phase detection amplifier 2 due to the voltage sampled by the in-phase detection capacitors C21 and C22.

[0051] Next, the operation of the amplifier sharing auto-zero amplifier 1C configured as described above will be described with reference to the time chart shown in Fig. 16. A clock CLK1 is supplied to the switches S11, S12, S31, and S32 of the auto-zero amplifier 31C, a clock CLK2 is supplied to the switches S13, S14, S33, and S34, and a clock CLK3 is supplied to the switches S23 and S24. A clock CLK4 is supplied to the switches S21 and S22, a clock CLK5 is supplied to the switches S41 and S42, and a clock CLK6 is supplied to the switches S51, S52, and S6.

[0052] Using these clocks CLK1 to CLK6, the auto-zero amplifier 31C switches its operating mode in the order of calibration mode (FIGS. 12 and 13), first path mode of amplification mode (FIG. 14), calibration mode, and second path mode of amplification mode (FIG. 15), and repeats this switching.

[0053] The clocks CLK1 to CLK6 supplied to the auto-zero amplifiers 31C, 32C, and 33C are out of phase with each other by 120 degrees. As a result, as shown in FIG. 17, when one of the auto-zero amplifiers 31C, 32C, and 33C is in the calibration mode, the other two are in the first path mode or the second path mode. Also, the auto-zero amplifiers 31C, 32C, and 33C are sequentially in the calibration mode. As a result, the amplifier sharing auto-zero amplifier 1C can always output the output signal Vout obtained by amplifying the input signal Vin from one or both of the first output path and the second output path.

[0054] In the above-mentioned third embodiment, the state is switched from the first state to the second state during the calibration mode, but the present invention is not limited to this. For example, the state may be switched from the first state to the second state at the same time as the calibration mode is switched to the amplification mode. In this case, the clocks CLK1 to CLK6 shown in FIG. 18 are supplied to the switches S11 to S14, S21 to S24, S31 to S34, S41, S42, S51, S52, and S6 of the auto-zero amplifier 31C. According to the clocks CLK1 to CLK6 shown in FIG. 18, the clocks CLK5 and CLK6 are the same clock. Therefore, the control circuits of the auto-zero amplifiers 31C, 32C, and 33C can be configured by a simple clock generator.

[0055] (Fourth embodiment) In the first to third embodiments, in the amplification mode, the common-mode detection capacitances C21 and C22 are charged with the differential voltages output from the mutual conductance amplifiers 34, 341, and 342. When switching to the calibration mode in this state, it is necessary to discharge the differential voltages accumulated in the common-mode detection capacitances C21 and C22, and therefore the time required for the transient response of the voltages of the common-mode detection capacitances C21 and C22 to converge becomes longer.

[0056] Therefore, in the fourth embodiment, instead of the in-phase feedback section 36 described in the first to third embodiments, a in-phase feedback section 36D as shown in Figures 19 and 20 is used. The in-phase feedback section 36D has switches S51, S52, S6, an in-phase control amplifier 361, in-phase detection capacitors C21 to C24, and switches S71 to S74 (second changeover switches). The switches S51, S52, S6, and the in-phase control amplifier 361 are similar to those already described in the first to third embodiments, so detailed description thereof will be omitted here.

[0057] The in-phase detection capacitance C21 (first in-phase detection capacitance) is connected between one of the two outputs of the in-phase control amplifier 361 that is connected to the positive output of the transconductance amplifiers 34, 341, 342 (hereinafter abbreviated as "+ output") and the input of the in-phase control amplifier 361. The in-phase detection capacitance C22 (second in-phase detection capacitance) is connected between one of the outputs of the in-phase control amplifier 361 that is connected to the negative output of the transconductance amplifiers 34, 341, 342 (hereinafter abbreviated as "- output") and the input of the in-phase control amplifier 361. The in-phase detection capacitance C23 (third in-phase detection capacitance) has one end connected to the input of the in-phase control amplifier 361 and the other end connected to the + output via the switch S71 and to the - output via the switch S72. One end of the in-phase detection capacitor C24 (fourth in-phase detection capacitor) is connected to the input of the in-phase control amplifier 361, and the other end is connected to the negative output via switch S73 and to the positive output via switch S74. That is, the switches S71 to S74 switch the connection destination of the in-phase detection capacitors C23 and C24 to the positive output or the negative output.

[0058] Thereby, the in-phase feedback section 36D can be switched between a third state shown in FIG. 19 and a fourth state shown in FIG. 20. In the third state, as shown in FIG. 19, the switches S71 and S73 are turned on, and the switches S72 and S74 are turned off. As a result, the in-phase detection capacitances C21 and C23 are connected in parallel between the + output and the input of the in-phase control amplifier 361. Also, the in-phase detection capacitances C22 and C24 are connected in parallel between the - output and the input of the in-phase control amplifier 361. In the fourth state, as shown in FIG. 20, the switches S72 and S74 are turned on, and the switches S71 and S73 are turned off. As a result, the in-phase detection capacitances C21 and C24 are connected in parallel between the + output and the input of the in-phase control amplifier 361. Also, the in-phase detection capacitances C22 and C23 are connected in parallel between the - output and the input of the in-phase control amplifier 361. A circuit (not shown) that outputs a clock for controlling the on / off of these switches S71 to S74 constitutes a second control section.

[0059] Next, the operation of the in-phase feedback section 36D in the fourth embodiment will be described. If the in-phase feedback section 36D is in the third state in the amplification mode, it switches from the third state to the fourth state at the timing of switching from the amplification mode to the calibration mode. If the in-phase feedback section 36D is in the third state in the amplification mode, the voltage of the other end of the in-phase detection capacitances C21 and C23 connected to the + output becomes higher than the voltage of the other end of the in-phase detection capacitances C22 and C24 connected to the - output. After that, when it switches to the fourth state at the timing of switching to the calibration mode, the in-phase detection capacitances C21 and C24 are connected in parallel, and the in-phase detection capacitances C22 and C23 are connected in parallel. Therefore, charge transfer occurs from the in-phase detection capacitance C21 to the in-phase detection capacitance C24 and from the in-phase detection capacitance C23 to the in-phase detection capacitance C22, and the differential voltage is quickly canceled, and the convergence of the transient response of the voltage of the in-phase detection capacitances C21 to C24 becomes faster.

[0060] Furthermore, if the common-mode feedback unit 36D is in the fourth state in the amplification mode, when the amplification mode is switched to the calibration mode, it switches from the fourth state to the third state. For the same reason, the convergence of the transient response of the voltages of the common-mode detection capacitances C21 to C24 when the amplification mode is switched to the calibration mode is accelerated.

[0061] According to the fourth embodiment described above, the state is switched from the third state to the fourth state or from the fourth state to the third state at the timing when the amplification mode is switched to the calibration mode, but this is not limited to this. The state may be switched from the third state to the fourth state or from the fourth state to the third state at the timing when the calibration mode is switched to the amplification mode.

[0062] Fifth embodiment Next, a fifth embodiment will be described. In order to speed up the convergence of the above-mentioned transient response, an auto-zero amplifier 31 shown in the fifth embodiment uses a common-mode detection amplifier 2E as shown in Figs. 21 to 24 instead of the common-mode detection amplifier 2 described in the first to third embodiments.

[0063] 23 and 24, the common-mode detection amplifier 2E has two current sources I1 and I2, four MOS transistors M11 to M14, a current mirror circuit 21, auxiliary capacitances C31 and C32, and switches S81, S82, and S83 (third changeover switches). The current sources I1 and I2, the four MOS transistors M11 to M14, and the current mirror circuit 21 have already been described in the first embodiment, so detailed description thereof will be omitted here.

[0064] As shown in Fig. 21 and Fig. 22, the auxiliary capacitances C31 and C32 are connected between the common-mode input and the common-mode output of the common-mode detection amplifier 2E so that they are connected in parallel to the common-mode detection capacitances C21 and C22 when the switches S51, S52, and S6 are turned on. As shown in Fig. 23 and Fig. 24, the switch S81 is connected between one end of the common-mode input side of the auxiliary capacitance C31 and the reference common-mode voltage Vcm. The switch S82 is connected between one end of the common-mode input side of the auxiliary capacitance C32 and the reference common-mode voltage Vcm. The switch S83 is connected between the gate and drain of the transistor on the output side of the current mirror circuit 21. When the switches S81 and S82 are turned on, the reference common-mode voltage Vcm is supplied to one end of the auxiliary capacitances C31 and C32. When the switch S83 is turned on, the output side transistor of the current mirror circuit 21 is diode-connected, the impedance between the other end of the auxiliary capacitances C31 and C32 and ground is reduced, and the auxiliary capacitances C31 and C32 are charged to the reference common-mode voltage Vcm.

[0065] That is, the common-mode detection amplifier 2E is switched between a charging mode in which the auxiliary capacitances C31 and C32 are charged to the reference common-mode voltage Vcm and a common-mode output mode in which a common-mode output voltage is output by turning on and off the switches S81 to S83. A circuit (not shown) that outputs a clock to control the on and off of the switches S81 to S83 constitutes a third control unit.

[0066] Next, the operation of the fifth embodiment described above will be described. While the switches S51, S52, and S6 are turned off and the common-mode feedback unit 36 ​​and the common-mode detection amplifier 2E are disconnected, the switches S81 to S83 are turned on. As a result, the auxiliary capacitances C31 and C32 are charged to the reference common-mode voltage Vcm. After that, the switches S51, S52, and S6 are turned on and the common-mode feedback unit 36 ​​and the common-mode detection amplifier 2E are connected, and the switches S81 to S83 are turned off. When the switches S51, S52, and S6 are turned on, the auxiliary capacitance C31 is connected in parallel to the common-mode detection capacitance C21, and the auxiliary capacitance C32 is connected in parallel to the common-mode detection capacitance C22. The auxiliary capacitances C31 and C32 can cancel the differential voltage of the common-mode detection capacitances C21 and C22 to quickly approach the reference common-mode voltage Vcm, and the convergence of the transient response can be accelerated. By making the capacitance of the auxiliary capacitances C31, C32 larger than that of the common-mode detection capacitances C21, 22, the voltages across the common-mode detection capacitances C21, C22 can be brought closer to the reference common-mode voltage Vcm more quickly, and the convergence of the transient response can be further accelerated. Since the phase compensation capacitance of the common-mode feedback circuit is determined to be the sum of the common-mode detection capacitances C21, C22 and the auxiliary capacitances C31, C32, the common-mode detection capacitances C21, C22 on the auto-zero amplifiers 31, 32 can be designed to be small from the standpoint of stability, and the circuit area can also be reduced.

[0067] Next, the operation when the above-mentioned common-mode detection amplifier 2E is applied to the auto-zero amplifiers 31 and 32 constituting the Ping-Pong auto-zero amplifier 1A of the first embodiment will be described with reference to Fig. 25. As shown in the figure, the switches S81 to S83 are turned off when either the auto-zero amplifiers 31 and 32 are connected to the common-mode detection amplifier 2E. Also, the switches S81 to 83 are turned on when both the auto-zero amplifiers 31 and 32 are disconnected from the common-mode detection amplifier 2E.

[0068] Sixth embodiment Next, a sixth embodiment will be described. As shown in FIG. 26, in the sixth embodiment, an amplifying device 100 having two or more stages of amplifiers is configured using the Ping-Pong auto-zero amplifier 1A described in the first embodiment. The amplifying device 100 includes the Ping-Pong auto-zero amplifier 1A as an input stage, and an amplifier 101 that amplifies the output of the Ping-Pong auto-zero amplifier 1A. The input signal Vin input to the Ping-Pong auto-zero amplifier 1A is amplified by the Ping-Pong auto-zero amplifier 1A and the amplifier 101, and is output as an output signal Vout. This configuration allows the amplifying device 100 to have high accuracy.

[0069] Seventh embodiment Next, the seventh embodiment will be described. As shown in Fig. 27, in the seventh embodiment, a chopper stabilized amplifier 102 having three or more stages is configured using the Ping-Pong auto-zero amplifier 1A described in the first embodiment or the phase inversion auto-zero amplifier 1B described in the second embodiment. The chopper stabilized amplifier 102 includes a chopper modulator 103, a transconductance amplifier 104, a chopper output circuit 105, an amplifier 106, and a transconductance amplifier 107.

[0070] The chopper modulator 103 modulates the signal Vin to a high frequency band. The transconductance amplifier 104 amplifies the signal modulated by the chopper modulator 103 and outputs the amplified signal. The chopper output circuit 105 is configured, for example, as shown in FIG. 28. As shown in the figure, the chopper output circuit 105 has a chopper modulator 108 and a noise reduction loop circuit 109. The chopper modulator 108 demodulates the signal component of the output of the transconductance amplifier 104 to a low frequency band, and modulates the offset component and low frequency noise component to a high frequency band and outputs the modulated signal.

[0071] The noise reduction loop circuit 109 extracts the offset component of the transconductance amplifier 104 and negatively feeds back the extracted offset component to the output of the transconductance amplifier 104. This noise reduction loop circuit 109 reduces the offset component and low-frequency noise component generated in the transconductance amplifier 104, thereby making it possible to reduce the ripple noise included in the output of the chopper output circuit 105 (see FIGS. 30(B) and 30(C)).

[0072] In the example shown in FIG. 28, the noise reduction loop circuit 109 includes the Ping-Pong auto-zero amplifier 1A described in the first embodiment for amplifying the input of the noise reduction loop circuit 109, a filter circuit 110 for reducing high-frequency signal components in the output of the Ping-Pong auto-zero amplifier 1A, and a transconductance amplifier 111 for amplifying the output of the filter circuit 110. The output of the transconductance amplifier 104 is input to the Ping-Pong auto-zero amplifier 1A. The filter circuit 110 has a function of amplifying low-frequency signal components and reducing high-frequency signal components in the output of the Ping-Pong auto-zero amplifier 1A. The filter circuit 110 can reduce high-frequency signal components and feed back the offset components of the amplifier.

[0073] Also, the chopper output circuit 105 may be configured, for example, as shown in Fig. 29. As shown in the figure, the chopper output circuit 105 has a chopper modulator 112 and a ripple calibration circuit 113. The chopper modulator 112 is similar to the chopper modulator 108 shown in Fig. 28.

[0074] The input of the ripple calibration circuit 113 is connected to the output of the chopper modulator 112, and the output is connected to the input of the chopper modulator 112. The ripple calibration circuit 113 is a circuit that extracts high-frequency noise components (ripple noise) from the output of the chopper modulator 112, modulates the extracted ripple noise to an offset component, and negatively feeds back the modulated offset component to the output of the transconductance amplifier 104. The ripple calibration circuit 113 reduces the offset component included in the output of the transconductance amplifier 104, and can reduce the ripple noise included in the output of the chopper modulator 112 (see Figures 30(B) and 30(C)).

[0075] In this embodiment, the ripple calibration circuit 113 includes a high-pass filter 114 that reduces low-frequency noise components input to the ripple calibration circuit 113 and detects ripple noise, a phase-inverting auto-zero amplifier 1B that demodulates the ripple noise of the output of the high-pass filter 114 into low-frequency components and modulates it into an offset component, a filter circuit 115 that reduces high-frequency components of the output of the phase-inverting auto-zero amplifier 1B, and a mutual conductance amplifier 118 that amplifies the output of the filter circuit 115.

[0076] 27, amplifier 106 amplifies the signal component output from chopper output circuit 105. In this embodiment, the output of amplifier 106 becomes the output terminal of chopper stabilized amplifier 102, and an output signal Vout is output. Amplifier 106 has transconductance amplifier 117, amplifier 118, and phase compensation circuit 119 that performs phase compensation for amplifiers 117 and 118. The input of amplifier 118 is connected to the output of transconductance amplifier 117, and the output of amplifier 118 becomes the output of amplifier 106, i.e., the output terminal of chopper stabilized amplifier 102.

[0077] The phase compensation circuit 119 is composed of capacitances Cc1 to Cc3. The capacitance Cc1 is connected between the input and output of the amplifier 118. The capacitance Cc2 is connected between the inverting input of the transconductance amplifier 117 and the output of the amplifier 118. The capacitance Cc3 is connected between the non-inverting input of the transconductance amplifier 117 and ground.

[0078] The transconductance amplifier 107 is connected between the input terminal and the input of the amplifier 118, and functions as a feed-forward amplifier. In this way, by using the Ping-Pong auto-zero amplifier 1A described in the first embodiment and the phase inversion auto-zero amplifier 1B described in the second embodiment, the precision of the three or more stage chopper stabilized amplifier 102 can be improved.

[0079] The present invention is not limited to the above-described embodiment, and can be appropriately modified, improved, etc. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiment are arbitrary as long as the present invention can be achieved, and are not limited.

[0080] For example, the output stage amplifier 106 shown in the seventh embodiment is composed of a transconductance amplifier 117 and an amplifier 118, but is not limited to this. For example, as shown in FIG. 31, two transconductance amplifiers 120 and 121 may be provided instead of the transconductance amplifier 117. In the example shown in FIG. 31, the phase compensation circuit 122 is composed of two capacitances Cc4 and Cc5. The capacitance Cc4 is connected between the inverting input and the positive output of the transconductance amplifier 121. The capacitance Cc5 is connected between the non-inverting input and the negative output of the transconductance amplifier 121.

[0081] Moreover, the noise reduction loop circuit 109 shown in FIG. 28 and described in the seventh embodiment may be configured as shown in FIG. 32. In the example shown in FIG. 32, instead of the Ping-Pong auto-zero amplifier 1A shown in FIG. 28 and the amplifier 102 connected to the output of the chopper modulator 106, the transconductance amplifiers 341 and 342 of the amplifier sharing auto-zero amplifier 1C described in the third embodiment are used. As shown in the figure, the output of the chopper modulator 106 is connected to the first input path of the amplifier sharing auto-zero amplifier 1C, and the first output path becomes the output terminal. In addition, the output of the transconductance amplifier 104 is connected to the second input path, and the filter circuit 110 is connected to the second output path. [Explanation of symbols]

[0082] 1A Ping-Pong Auto-Zero Amplifier 1B Phase inversion auto-zero amplifier (amplifier) 1C Amp sharing auto-zero amplifier (amplifier) 2, 2E Common Mode Detect Amplifier 31, 32 Auto-zero amplifier 31C, 32C, 33C Auto-Zero Amplifiers 34 Transconductance amplifier (amplifier) 35 Calibration circuit 35C calibration circuit 100 Amplification device 341, 342 Transconductance amplifier (amplifier) 361 Common-mode control amplifier C11, C12 sampling capacity C21 Common-mode detection capacitance (first common-mode detection capacitance) C22 Common-mode detection capacitance (second common-mode detection capacitance) C23 Common-mode detection capacitance (third common-mode detection capacitance) C24 Common-mode detection capacitance (fourth common-mode detection capacitance) C31, C32 Auxiliary capacity S1 Switch (First Changeover Switch) S2 Switch (First Changeover Switch) S11~S14 (first changeover switch, path changeover switch) S21~S24 (first changeover switch, route changeover switch) S31 to S34 (first changeover switch, route changeover switch) S41, S42 switch (first changeover switch) S51, S52 switch (second switch) S6 Switch (1st Switch) S71~S74 Switch (second changeover switch) S81~S83 Switch (3rd changeover switch)

Claims

1. An amplifier; a calibration circuit including a sampling capacitance; an amplifier device having a plurality of auto-zero amplifiers and a first changeover switch for switching between a calibration mode in which a calibration voltage for calibrating offset components and low-frequency noise components of the amplifiers is sampled in the sampling capacitor and an amplification mode in which an input signal is amplified by the amplifier in which the offset components and the low-frequency noise components are reduced by the calibration voltage, and an output signal is output; a common-mode detection amplifier for outputting a common-mode output voltage such that the common-mode voltage of two common-mode inputs is a reference common-mode voltage; The plurality of auto-zero amplifiers include a common-mode control amplifier for amplifying an input and outputting an output signal for controlling the common-mode voltage of said amplifier; a common mode detection capacitance connected between the output of the amplifier and the input of the common mode control amplifier; a first switch for controlling a connection between an input of the common mode control amplifier and a common mode output of the common mode detection amplifier; a second switch for controlling a connection between the output of the amplifier and a common mode input of the common mode detection amplifier; the amplifiers of the plurality of auto-zero amplifiers are connected in parallel with each other; The common-mode detection amplifier has two common-mode inputs, one of which receives a voltage from a positive output of the amplifier and the other of which receives a voltage from a negative output of the amplifier; The output signal of the common-mode control amplifier is output to a path through which the output of the amplifier is output. Amplification device.

2. 2. The amplifier according to claim 1, A first control unit that controls the first changeover switch, The first control unit controls the first changeover switch so that the auto-zero amplifier is alternately switched between the calibration mode and the amplification mode, and controls the first changeover switch so that at least one of the auto-zero amplifiers operates in the amplification mode and another of the auto-zero amplifiers operates in the calibration mode. Amplification device.

3. 2. The amplifier according to claim 1, The auto-zero amplifier is provided in three pieces, Each of the three auto-zero amplifiers includes a first input path and a second input path to which the input signal is respectively input; a first output path and a second output path through which the output signals are output, the first changeover switch includes a path changeover switch that switches between a first path mode in which the amplifier is connected to the first input path and the first output path and a second path mode in which the amplifier is connected to the second input path and the second output path in the amplification mode; Amplification device.

4. 4. The amplifier according to claim 3, A first control unit that controls the first changeover switch, The first control unit controls the first changeover switch so that the auto-zero amplifiers are alternately switched between the calibration mode and the amplification mode, and controls the first changeover switch so that one of the three auto-zero amplifiers operates in the calibration mode and the remaining auto-zero amplifiers operate in the first path mode or the second path mode. Amplification device.

5. 2. The amplifier according to claim 1, a first control unit that controls the first changeover switch, the first switch, and the second switch; The first control unit is controlling the first changeover switch so as to alternately operate between the calibration mode and the amplification mode; turning on the first switch and the second switch of the auto-zero amplifier in the calibration mode; controlling to turn off the first switch and the second switch of the auto-zero amplifier in the amplification mode; Amplification device.

6. 2. The amplifier according to claim 1, a first control unit that controls the first changeover switch, the first switch, and the second switch; The first control unit is controlling the first changeover switch so as to alternately operate between the calibration mode and the amplification mode; turning on the first switch and the second switch of the auto-zero amplifier that has been switched from the amplification mode to the calibration mode; controlling the first switch and the second switch to be off while the auto-zero amplifier is in the calibration mode; maintaining the first switch and the second switch of the auto-zero amplifier in the amplifying mode off; Amplification device.

7. In the amplifier according to any one of claims 1 to 6, the common-mode detection capacitance includes a first common-mode detection capacitance connected between the positive output of the amplifier and the input of the common-mode control amplifier, a second common-mode detection capacitance connected between the negative output of the amplifier and the input of the common-mode control amplifier, and a third common-mode detection capacitance and a fourth common-mode detection capacitance, one end of which is connected to the input of the common-mode control amplifier; the auto-zero amplifier has a second changeover switch that switches a connection destination of the other ends of the third common-mode detection capacitance and the fourth common-mode detection capacitance to a positive output of the amplifier or a negative output of the amplifier. Amplification device.

8. 8. The amplifier according to claim 7, A second control unit that controls the second changeover switch, The second control unit switches the second changeover switch at a timing when the auto-zero amplifier switches from the calibration mode to the amplification mode or from the amplification mode to the calibration mode. Amplification device.

9. In the amplifier according to any one of claims 1 to 6, the common-mode detection amplifier includes an auxiliary capacitance connected in parallel to the common-mode detection capacitance when the first switch and the second switch are turned on, and a third changeover switch configured to switch between a charge mode in which the auxiliary capacitance is charged with the reference common-mode voltage and a common-mode output mode in which the common-mode output voltage is output. Amplification device.

10. 10. The amplifier according to claim 9, a third control unit that controls the third changeover switch; the third control unit controls the third changeover switch so that the third changeover switch is switched to the common-mode output mode when the first switch and the second switch are turned on, and is switched to the charging mode when the first switch and the second switch are turned off. Amplification device.

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