Electron trapping device, quantum computer, and electron trapping method

Abstract

This electron-trapping device 1 comprises a low-temperature device 1, a superconducting circuit 10, and a hot bath 60. The superconducting circuit 10 and the hot bath 60 are arranged in the low-temperature device 40. This makes it possible for the superconducting circuit 10 to operate and keeps the hot bath 60 at a given low temperature (e.g., about 20 mK). The superconducting circuit 10 is provided with a cooling resonator 20, a microwave resonator 22, and an electron-trapping region 50. The superconducting circuit 10 has a microstructure in which electrodes that face each other are disposed at positions having line symmetry about a center line passing through the electron-trapping region and are surrounded by a superconductor so that the electron-trapping region 50 is configured from a plurality of facing electrodes.

Description

[Technical field]

[0001] The present invention relates to an electron trapping device, a quantum computer, a method for manufacturing a flip chip structure, and an electron trapping method.

[0002] This application claims priority to U.S. Provisional Application No. 63246977, filed September 22, 2021, the entire specification of which is incorporated herein by reference. [Background technology]

[0003] In recent years, microwave electron trapping has been proposed as a technique for trapping (capturing) electrons at room temperature (for example, Non-Patent Document 1). [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] “Trapping Electrons in a Room-Temperature Microwave Paul Trap” Clemens Matthiesen,Qian Yu,Jinen Guo,Alberto M Alonso,and Hartmut Haffner,Phys.Rev.X 11,011019,Published 29 January 2021 Summary of the Invention [Problem to be solved by the invention]

[0005] In order to trap electrons, it is necessary to apply high-power, high-frequency electromagnetic waves. Furthermore, electrons cannot be cooled using laser cooling. For this reason, the technology described in Non-Patent Document 1 cannot trap electrons cooled to the ground state as isolated particles suspended in space.

[0006] The present invention has been made in view of these problems, and has as its object to provide a technique for trapping electrons cooled to the ground state as isolated particles in a state where they are suspended in space. [Means for solving the problem]

[0007] In order to solve the above problems, an electron trapping device according to one embodiment of the present invention comprises a superconducting circuit having a cooling resonator, a microwave resonator, and an electron trapping region, a cryogenic device for operating the superconducting circuit, and a heat bath for cooling electrons. The superconducting circuit has a microstructure surrounded by a superconductor, in which the electron trapping region is composed of a plurality of opposing electrodes, the opposing electrodes being arranged in line symmetry with respect to a center line passing through the electron trapping region.

[0008] According to this embodiment, electrons cooled to the ground state can be captured as isolated particles in a state of being suspended in space.

[0009] In one embodiment, the microstructures may have a side length of 1 mm or less.

[0010] In one embodiment, the microstructure may be a flip chip structure.

[0011] In one embodiment, the electron trapping region may be comprised of at least two cooling electrodes and at least two microwave electrodes.

[0012] In one embodiment, the superconducting circuit may include a circuit of Josephson junctions for increasing the oscillation frequency of the electrons before they are exposed to the heat bath.

[0013] In one embodiment, the Josephson device circuit may be a cooled qubit device.

[0014] In an embodiment, the electron trapping device may comprise a resonator for converting the vibrational state of the electrons into microwave photons at microwave frequencies.

[0015] In an embodiment, the electron trapping device may comprise a microwave photon readout for reading out the properties of the converted microwave photons.

[0016] In some embodiments, the electron trapping device may include a qubit element for exciting a qubit based on the vibrational state of the electron.

[0017] In an embodiment, the electron trapping device may comprise a magnetic field gradient generator for generating a magnetic field gradient in the electron trapping region.

[0018] In an embodiment, the electron trap device may include a spin readout unit that reads out information of the observed electron spins based on a magnetic field gradient.

[0019] In an embodiment, the electron trapping device may include a quantum entanglement generating unit that generates quantum entanglement based on information of electron spin.

[0020] In an embodiment, the electron trapping device may include a controller for controlling the cooling of the electrons, the excitation of the qubits, and the readout of the properties of the converted microwave photons.

[0021] Another aspect of the present invention is a quantum computer, which is constructed by connecting the above-mentioned electron trap devices to each other.

[0022] Yet another aspect of the present invention is a method for manufacturing a flip-chip structure of an electron trapping device, which may include the steps of supporting both ends of a lower chip and an upper chip with a metal that does not superconduct even at low temperatures and supporting a center portion with a metal that superconducts at low temperatures, pressing the upper chip from above in this state and heating it to bond it to the lower chip, and applying silver paste to the metal that does not superconduct to achieve thermal contact and fixation.

[0023] In some embodiments, the non-superconducting metal may have a higher hardness than the superconducting metal.

[0024] In one embodiment, the non-superconducting metal may be AgCu, Cu or Pt, and the superconducting metal may be Pb or In.

[0025] Yet another aspect of the present invention is an electron trapping method, comprising the steps of: trapping electrons in an electron trapping region using a superconducting circuit including a cooling resonator, a microwave resonator, and an electron trapping region; and cooling the trapped electrons using a heat bath. The superconducting circuit has a microstructure surrounded by a superconductor, such that the electron trapping region is composed of a plurality of opposing electrodes, the opposing electrodes being arranged in line symmetry with respect to a center line passing through the electron trapping region.

[0026] According to this embodiment, electrons cooled to the ground state can be captured as isolated particles in a state of being suspended in space.

[0027] Yet another aspect of the present invention is an electron trap device that simultaneously traps electrons and ions and cools the electrons to a ground state using the trapped ions. The electron trap device includes a trap circuit including an ion cooler, a microwave resonator, an RF resonator, and an electron-ion trapping region. The trap circuit includes an upper chip and a lower chip. The upper chip and the lower chip include a DC electrode, a microwave electrode for trapping electrons, and an RF electrode for trapping ions. The microwave electrode and the RF electrode of the upper chip and the lower chip extend in the axial direction, sandwiched between the DC electrodes. The upper chip and the lower chip form a flip structure, so that the DC electrode of the upper chip faces the DC electrode of the lower chip, the microwave electrode of the upper chip faces the RF electrode of the lower chip, and the RF electrode of the upper chip faces the microwave electrode of the lower chip.

[0028] According to this embodiment, electrons and ions are trapped simultaneously, the trapped ions are cooled by an ion cooler, and the electrons and ions are subjected to Coulomb interaction with each other, thereby cooling the electrons to the ground state at room temperature.

[0029] Any combination of the above components, and conversion of the present disclosure into a method, device, system, recording medium, computer program, etc. are also valid aspects of the present disclosure. Effect of the Invention

[0030] According to the present invention, electrons cooled to the ground state can be captured as isolated particles suspended in space. [Brief description of the drawings]

[0031] [Figure 1] FIG. 2 is a schematic diagram showing a state in which electrons are trapped in an electron trapping region on a superconducting circuit. [Diagram 2] FIG. 2 is a schematic diagram showing the principle of electronic cooling using the superconducting circuit of FIG. 1. [Diagram 3] FIG. 1 is a schematic diagram showing a superconducting circuit with a cooled quantum bit device. [Figure 4] 1 is a schematic diagram showing the configuration of a superconducting circuit according to the prior art. The top diagram shows a schematic configuration with an electron trapping region on a planar chip. The middle and bottom diagrams are a distribution map and a graph, respectively, of the effective potential near the electron trapping region formed by this configuration. [Diagram 5] 1 is a schematic diagram showing the configuration of a superconducting circuit according to an embodiment of the present invention, in which the upper part shows a schematic diagram of a superconducting circuit having a flip-chip structure, and the middle and lower parts show a distribution map and a graph, respectively, of the effective potential near an electron trap region formed by this configuration. [Figure 6] 1 is a functional block diagram of an electron trap device according to a first embodiment. [Figure 7] 2 is a photograph of the superconducting circuit of the electron trap device of FIG. 1. [Figure 8]1 is a schematic diagram showing how an upper chip is inverted and placed on top of a lower chip for flip-chip mounting. FIG. [Figure 9] FIG. 1 is a cross-sectional view in the yz plane including an electron trap region of a superconducting circuit having a flip-chip structure. [Figure 10] FIG. 11 is a functional block diagram of an electron trap device according to a second embodiment. [Figure 11] 13A and 13B are schematic diagrams illustrating the principle of an electron trap device according to a third embodiment. [Figure 12] 13A and 13B are schematic diagrams illustrating the principle of an electron trap device according to a fourth embodiment. [Figure 13] 13A and 13B are schematic diagrams illustrating the principle of an electron trap device according to a fifth embodiment. [Figure 14] FIG. 13 is a schematic diagram showing another example of the electron trap device according to the fifth embodiment. [Figure 15] FIG. 13 is a schematic diagram showing a quantum computer according to a sixth embodiment. [Figure 16] 1 is a schematic diagram showing a system in which electrons trapped in an electron trap device and ions trapped in an ion trap device are coupled by Coulomb interaction. [Figure 17] FIG. 13 is a top view diagrammatically illustrating an upper chip for realizing an electron-ion simultaneous trap chip according to a seventh embodiment. [Figure 18] FIG. 13 is a top view diagrammatically illustrating a lower chip for realizing an electron-ion simultaneous trap chip according to a seventh embodiment. [Figure 19] 19 is a cross-sectional view taken along the line AA' in FIGS. 17 and 18 when the upper chip and the lower chip are flip-chip mounted. FIG. [Figure 20] FIG. 13 is a diagram showing a trap cross-sectional potential for electrons that is formed when an upper chip and a lower chip are flip-chip mounted. [Figure 21] FIG. 13 is a diagram showing a trap cross-sectional potential for beryllium ions formed when the upper chip and the lower chip are flip-chip mounted. [Figure 22]1 shows the axial potential distribution of electrons and beryllium ions formed by flip-chip mounting the upper and lower chips. [Diagram 23] FIG. 13 is a functional block diagram of an electron trap device according to a seventh embodiment. [Figure 24] 9 is a photograph showing an alignment method when flip-chip mounting the lower chip and the upper chip of FIG. 8. [Diagram 25] 13 is a schematic diagram and a photograph showing the inclination of an upper chip when the upper chip is placed on a lower chip without any action. [Figure 26] 13 is a graph showing simulation results of the spatial distribution of the effective potential when the inclination of the upper tip is 0 degrees and 2.45 degrees. [Figure 27] 13A and 13B are schematic diagrams and photographs showing a flip chip mounting produced by a method according to an eighth embodiment. [Figure 28] 28 is a photograph and a table showing the differences (height, width, length) between the origin and four points P1, P2, P3, and P4 on the chip in FIG. 27. [Figure 29] 13 is a flowchart showing a process of an electron trapping method according to a ninth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] The present invention will be described below with reference to the drawings based on preferred embodiments. The embodiments are illustrative and do not limit the invention. All features and combinations described in the embodiments are not necessarily essential to the invention. The same or equivalent components, members, and processes shown in each drawing are given the same reference numerals, and duplicated descriptions are omitted as appropriate. In addition, the scale and shape of each part shown in each drawing are set for convenience to facilitate explanation, and should not be interpreted as being limiting unless otherwise specified. When terms such as "first" and "second" are used in this specification or claims, unless otherwise specified, these terms do not indicate any order or importance, but are only intended to distinguish one configuration from another. In addition, some of the members that are not important in explaining the embodiment in each drawing are omitted.

[0033] Before describing specific embodiments, basic knowledge will first be described. There are several methods to realize quantum bits for quantum computers, including those using superconducting quantum bits and those using ion traps. Ion traps preserve the quantum state of ions for a long time by levitating ionized atoms and isolating them from external matter. Currently popular ion traps include the Penning trap, which combines an electrostatic field with a static magnetic field, and the Paul trap, which combines an RF electric field with a static electric field. In ion traps, atoms strongly interact with light, so ionized atoms can be cooled and trapped using laser cooling. Therefore, in ion traps, a method has been established to cool ionized atoms down to a quantum ground state where only quantum fluctuations remain.

[0034] To realize a quantum computer with few errors, it is necessary to prevent the diffusion of information in the quantum chip, that is, to prevent decoherence. To achieve this, it is desirable to be able to trap electrons in the ground state as isolated particles suspended in space. However, electrons have a smaller mass than ions, and therefore have the property of vibrating at high frequencies (for example, 600 MHz or higher, or microwave frequencies). To trap such electrons, it is necessary to apply electromagnetic waves with high power and high frequency. For example, RF waves can be used for ions, which have a larger mass than electrons, but high-power microwaves, for example 5 W, are required for electrons. Furthermore, unlike ions, electrons cannot be laser-cooled, so in order to cool them, they must be brought into contact with a heat bath at an extremely low temperature (for example, 20 mK) (placed in an extremely low temperature environment). At this time, the temperature of an extremely low temperature environment rises even with slight heating, so there is a limit to the strength of the electromagnetic waves that can be applied. Thus, in order to cool electrons to the ground state required for quantum computers and trap them, it is necessary to keep the output of the electromagnetic waves (for example, microwaves) applied to the electrons in an extremely low temperature environment low. However, to date, no satisfactory method has been achieved to realize quantum bits using electron traps.

[0035] The inventors of the present invention have conducted extensive research into the above-mentioned problem, and have come to the following findings. First, electrons are trapped in an electron trapping region formed on a superconducting circuit. It has been found that the trapped electrons can be cooled by electrically contacting the heat bath. That is, the trapped and levitated electrons do not directly contact the heat bath, but the electron oscillations are converted into an oscillating current in the circuit through electrical interaction. This causes the oscillating current to contact the heat bath via a resistor. In this way, the trapped electrons can be cooled. This idea is completely original, devised by the inventors of the present invention for the first time in the world. Here, the electron trapping region is inside a well-shaped electrostatic potential.

[0036] FIG. 1 shows a schematic diagram of electrons trapped in an electron trapping region on a superconducting circuit. FIG. 2 is a schematic diagram showing the principle of electronic cooling using the above-mentioned superconducting circuit. As shown in the figure, in this system, a superconducting circuit and a heat bath are placed in a cryogenic device. The superconducting circuit includes an electron trapping region and a zero-pole resonator. A well-shaped electrostatic potential is formed in the electron trapping region. The electrons to be trapped oscillate at a frequency of about ω to 600 MHz in this environment. The heat bath maintains a low temperature of, for example, about 20 mK. When microwaves of, for example, about 10 μW are applied to the electron trapping region, the microwaves are amplified in the superconducting circuit. The cooling resonator can read the electron oscillations as an electrical signal. By electrically contacting the heat bath via this electrical signal, the electrons can be cooled.

[0037] Next, the inventors of the present invention have found the following. In the system of FIG. 2, the trapped electrons are cooled by being in electrical contact with the heat bath while vibrating at ω~600 MHz (i.e., "discarding heat"). In this case, there is a problem that heat flows from the heat bath to the electrons, instead of discharging heat. This is because, in light of the principle of blackbody radiation, the 20 mK heat bath is "not a vacuum" for electrons vibrating at 600 MHz (i.e., a 20 mK black body has radiation that resonates with the frequency of 600 MHz). In other words, in order to prevent heat from flowing in from the 20 mK heat bath (i.e., for the heat bath to be a vacuum from the electrons' perspective), the frequency of the electrons needs to be increased.

[0038] To address this issue, the inventors have found that it is effective to provide a circuit made of Josephson elements in a superconducting circuit. That is, Josephson elements have nonlinearity and can add or subtract different frequencies. This allows the current frequency to be converted by applying microwaves from the outside that correspond to the difference between a target frequency (for example, 3 GHz as described below) and a current frequency (for example, 600 MHz). At this time, it should be noted that the frequency of the microwaves applied is not limited to 2.4 GHz, and multiple types of microwaves that correspond to the difference may be used. For example, the microwave frequency may be 2 GHz+0.4 GHz, 1.5 GHz+0.5 GHz+0.4 GHz, or 5 GHz+2.6 GHz. However, in the last example, 2.6 GHz is used as a subtraction. By adding or subtracting frequencies in this way, 2.4 GHz corresponding to the difference frequency is created, and the current frequency of 600 MHz can be converted to the target frequency of 3 GHz. However, what frequency should actually be irradiated depends on the circuit configuration.

[0039] Figure 3 shows a schematic diagram of a superconducting circuit equipped with a cooled quantum bit element as an example of a circuit made of Josephson elements. This cooled quantum bit element is created using Josephson junctions, and converts the electron oscillation frequency ω~600 MHz into ω q =Up to 3GHz.

[0040] Here, ω and ω q According to the above-mentioned principle of blackbody radiation, a 20 mK heat bath can be considered as a vacuum for a frequency of 3 GHz. In other words, by increasing the oscillation frequency of the electrons to 3 GHz, it is possible to prevent heat from flowing into the electrons from the heat bath. In other words, the trapped electrons are electrically in contact with the heat bath after their oscillation frequency is converted using a cooling quantum bit element (i.e., after the frequency is increased to a level high enough that the heat bath can be considered as a vacuum). This can greatly improve the cooling effect.

[0041] The circuit made of Josephson elements may be a quantum bit.

[0042] Furthermore, the present inventors have obtained the following findings. First, the conventional technology will be described with reference to FIG. 4. FIG. 4 shows a type of superconducting circuit (conventional technology) that traps electrons on a planar chip. The upper part of FIG. 4 is a schematic diagram of a configuration in which two microwave electrodes are installed on a superconducting circuit on a planar chip, and the space between these electrodes is an electron trapping region. That is, in this case, electron trapping is performed by surface trapping. The middle and lower parts of FIG. 4 show the effective potential near the electron trapping region formed by this configuration. As shown in the figure, a well-shaped electrostatic potential is formed near the electron trapping region. However, in this case, the depth of the electrostatic potential well is about 1 meV. Such an effective potential may not be sufficient to trap electrons. In this case, it is necessary to effectively deepen the depth of the electrostatic potential well.

[0043] In order to solve this problem, the inventors have realized that it is effective to have a superconducting circuit having a microstructure surrounded by a superconductor, in which the opposing electrodes are arranged in line symmetry with respect to a center line passing through the electron trapping region, so that the electron trapping region is composed of a plurality of opposing electrodes.

[0044] The configuration of a superconducting circuit having a structure according to an embodiment will be described with reference to FIG. 5. The upper part of FIG. 5 shows a schematic diagram of a superconducting circuit having a flip-chip structure. This superconducting circuit is composed of a lower chip and an upper chip. Each of the upper chip and the lower chip includes one microwave electrode and one cooling electrode. By adopting such a flip-chip structure, the superconducting circuit has a microstructure in which the opposing electrodes are arranged in line symmetry with respect to the center line passing through the electron trapping region and are surrounded by a superconductor. A well-shaped electrostatic potential is formed in the electron trapping region surrounded by these four electrodes.

[0045] The middle and bottom panels of Figure 5 show the effective potential near the electron trapping region formed by this configuration. As shown in the figure, a well-shaped electrostatic potential is formed near the electron trapping region. The depth of this electrostatic potential well exceeds 200 meV. This effective potential is 200 times that of the surface trap, and is sufficient to trap electrons. In this way, by forming the superconducting circuit in a flip-chip structure so that the electron trapping region is composed of multiple opposing electrodes, it is possible to obtain an electrostatic potential sufficient to trap electrons.

[0046] The microstructure surrounded by the superconductor may have a side length of 1 mm or less.

[0047] The superconductor-encapsulated microstructure may be a flip-chip structure.

[0048] Regarding the size of the above electrodes, when the x-axis, y-axis, and z-axis are taken as shown in Figure 5, it is desirable that the size in the y-axis direction is about 100 μm. In this way, by setting the size of the electrode in the y-axis direction to about 100 μm, the deepest electrostatic potential can be obtained. On the other hand, regarding the size of the electrode in the x-axis direction, although there is no optimal value like in the y-axis direction, it should be noted that it is necessary to make it sufficiently shorter than the wavelength of the trapping microwave (several centimeters).

[0049] [First embodiment] 6 shows a functional block diagram of the electron trapping device 1 according to the first embodiment. The electron trapping device 1 comprises a cryogenic device 40, a superconducting circuit 10, and a heat bath 60. The superconducting circuit 10 and the heat bath 60 are placed in the cryogenic device 40. This allows the superconducting circuit 10 to operate at low temperatures, and the heat bath 60 is kept at a constant low temperature (for example, about 20 mK). The superconducting circuit 10 comprises a cooled resonator 20, a microwave resonator 22, and an electron trapping region 50. The superconducting circuit 10 has a flip-chip structure in which the electron trapping region 50 is composed of a plurality of opposing electrodes.

[0050] FIG. 7 is a photograph of the superconducting circuit 10 of the electron trap device 1. Here, the x-axis is taken along the longitudinal direction of the superconducting circuit 10, the y-axis is taken along the lateral direction, and the z-axis is taken along the height direction (from the back of the page to the front). The photograph on the left shows the lower chip 12 of the superconducting circuit 10, and the photograph on the right shows the upper chip 14 of the superconducting circuit 10. The lower chip 12 comprises a cooled resonator 20, a microwave resonator 22, and an electron trapping region 50. The upper chip 14 comprises a cooled resonator 20 and an electron trapping region 50. The superconducting circuit 10 is formed by inverting the upper chip 14 and superimposing it on the lower chip 12, and flip-chip mounting them in a sandwich type.

[0051] FIG. 8 is a schematic diagram showing how upper chip 14 is flipped over and placed on lower chip 12 for flip-chip mounting.

[0052] 9 is a cross-sectional view of the superconducting circuit 10 in the yz plane including the electron trapping region 50. The lower chip 12 includes a lower cooling electrode 30d, a lower microwave electrode 32d, and a lower ground electrode 34. The upper chip 14 includes an upper microwave electrode 32u facing the lower cooling electrode 30d, and an upper cooling electrode 30u facing the lower microwave electrode 32d. In this manner, the electron trapping region 50 is formed in a region surrounded by the four electrodes, the lower cooling electrode 30d, the lower microwave electrode 32d, the upper cooling electrode 30u, and the upper microwave electrode 32u.

[0053] By configuring the electron trapping device 1 as described above, electrons can be cooled and trapped in the electron trapping region 50. Furthermore, the microwave output required to trap electrons can be suppressed to about 10 μW when the microwave frequency is 6 GHz, whereas the room-temperature electron trap described in Non-Patent Document 1 required an extremely high output of several W.

[0054] [Second embodiment] FIG. 10 shows a functional block diagram of an electron trapping device 2 according to a second embodiment. The electron trapping device 1 includes a cryogenic device 40, a superconducting circuit 10, and a heat bath 60. The superconducting circuit 10 and the heat bath 60 are placed in the cryogenic device 40. This allows the superconducting circuit 10 to operate at low temperatures, and the heat bath 60 is kept at a constant low temperature (for example, about 20 mK). The superconducting circuit 10 includes a cooled resonator 20, a microwave resonator 22, an electron trapping region 50, and a cooled quantum bit element 24. The superconducting circuit 10 has a flip-chip structure in which the electron trapping region 50 is composed of a plurality of electrodes facing each other. That is, the electron trapping device 2 differs from the electron trapping device 1 of FIG. 1 in that it further includes a cooled quantum bit element 24. The other configurations of the electron trapping device 2 are common to those of the electron trapping device 1.

[0055] The cold qubit element 24 is produced, for example, using a Josephson junction. The cold qubit element 24 raises the oscillation frequency of the electrons to a frequency at which the thermal bath 60 can be considered substantially a vacuum. The trapped electrons are converted in oscillation frequency using the cold qubit element (i.e., raised to a frequency at which the thermal bath can be considered substantially a vacuum) before being placed in electrical contact with the thermal bath.

[0056] According to this embodiment, since it is possible to prevent heat from flowing from the heat bath 60 to the electrons, it is possible to greatly improve the cooling effect.

[0057] [Third embodiment] The electron trapping device according to the third embodiment comprises a resonator for converting the vibrational state of the electrons into microwave photons at microwave frequencies, and in one embodiment further comprises a microwave photon readout for reading out the properties of the converted microwave photons.

[0058] FIG. 11 shows a schematic diagram of the principle of the electron trapping device according to the third embodiment. In the four electrode configuration of FIG. 11, for example, assume that an electric field is applied from the upper right to the lower left as shown in the figure. Since the electrons oscillating in the electron trapping region can be interpreted as electric dipoles, they interact with this electric field as electric dipoles. The frequency related to this interaction can be estimated to be, for example, 1 kHz to 100 kHz. Here, by providing a resonator for converting the vibration state of the electrons into microwave photons at a microwave frequency, it is possible to convert between the electron vibrations (hereinafter also referred to as "electron phonons") and microwave photons (hereinafter also referred to as "microwave photons"). Furthermore, a microwave photon readout unit for reading out the characteristics of the microwave photons converted in this way can also be provided.

[0059] [Fourth embodiment] The electron trap device according to the fourth embodiment includes a quantum bit element for exciting a quantum bit based on the vibrational state of an electron.

[0060] Fig. 12 shows a schematic diagram of the principle of the electron trapping device according to the fourth embodiment. In Fig. 12, the resonator in Fig. 11 is replaced with a quantum bit element. This makes it possible to excite a quantum bit based on the vibration state of the electron. In other words, it is possible to convert between electronic phonons and quantum bit excitation.

[0061] [Fifth embodiment] The electron trapping device according to the fifth embodiment includes a magnetic field gradient generating unit that generates a magnetic field gradient in the electron trapping region. In one embodiment, the electron trapping device further includes a spin readout unit that reads out information on the electron spin observed based on the magnetic field gradient. In another embodiment, the electron trapping device further includes a quantum entanglement generating unit that generates quantum entanglement based on the information on the electron spin.

[0062] FIG. 13 shows a schematic diagram of the principle of the electron trapping device according to the fifth embodiment. In the configuration of FIG. 13, magnets are arranged with their north poles facing each other above the upper chip of the superconducting circuit of FIG. 9 and below the lower chip. As a result, a non-uniform magnetic field (i.e., a magnetic field with a magnetic field gradient) is generated in the electron trapping region. Electrons have spin (hereinafter, also referred to as "electron spin"). When electrons oscillate in a magnetic field gradient, an interaction occurs between the electron spin and the magnetic field. The force that the electron receives from the magnetic field is proportional to the product of the magnetic moment of the electron spin and the magnetic field gradient. The frequency related to this electron spin-oscillation interaction can be estimated to be, for example, about 100 kHz. In this way, by providing a magnetic field gradient generating unit that generates a magnetic field gradient in the electron trapping region, it is possible to realize energy exchange between electron phonons and electron spin. Furthermore, it is also possible to provide a spin reading unit that reads out information on the electron spin observed based on such a magnetic field gradient. Furthermore, it is also possible to provide a quantum entanglement generating unit that generates quantum entanglement based on such information on the electron spin.

[0063] Fig. 14 shows a schematic diagram of another example of the electron trapping device according to the fifth embodiment. In the example of Fig. 13, the magnetic field gradient formed in the electron trapping region is a DC gradient. In contrast, in the example of Fig. 14, an AC gradient is formed.

[0064] In one embodiment, the electron trap device may include a controller for controlling the cooling of electrons, the excitation of quantum bits, and the readout of the properties of the converted microwave photons, so that the electron trap device can operate with these functions combined and switched between them.

[0065] [Sixth embodiment] FIG. 15 shows a schematic diagram of a quantum computer according to the sixth embodiment. This quantum computer is constructed by connecting the electron trap devices according to the sixth embodiment. The upper part of FIG. 15 shows a quantum computer to which five electron trap devices are connected in total. Each electron trap device traps a plurality of electrons (two in this example). The electrons in each electron trap vibrate in the same manner as each other due to the Coulomb interaction. This forms an electron phonon. This electron phonon can exchange energy with the electron spin using the above-mentioned magnetic field gradient. This forms a fully coupled quantum node between the electron phonon and the electron spin. These fully coupled quantum nodes can be interconnected with the fully coupled quantum nodes in the adjacent electron trap regions by converting the electron phonon into microwave photons. In this way, by interconnecting the fully coupled quantum nodes, a quantum computer that is networked as a whole can be realized. Note that such interconnection between fully coupled quantum nodes has not yet been realized in ion traps.

[0066] [Seventh embodiment] FIG. 16 is a schematic diagram showing a system in which electrons trapped in the electron trap device according to this embodiment and ions trapped in the ion trap device are coupled by Coulomb interaction.

[0067] By utilizing the Coulomb interaction between electrons and ions, electrons can be cooled to the ground state by interacting with ions cooled by an ion cooler (e.g., laser cooling). Laser cooling of ions can be performed at room temperature, so in this embodiment, a superconducting cooling resonator is not required. This interaction becomes stronger as the electrons and ions get closer to each other. Electrons and ions can be trapped individually, for example, using a Paul trap. However, there are problems to be solved in order to trap electrons and ions simultaneously.

[0068] The first problem is the significant difference in mass between electrons and ions: the mass of an ion is 10 times that of an electron. 4 From 10 5 The trapping frequency of electrons and ions is about 100 times larger than that of ions. Therefore, the frequency of secular motion and the voltage applied for trapping electrons and ions are different. Therefore, in order to trap electrons and ions simultaneously, it is necessary to optimally design the electrodes for each.

[0069] The second challenge is that electrons and ions have opposite charges: electrons have a negative charge and ions have a positive charge. The effective potential created by the AC voltage works for both electrons and ions. However, a linear Paul trap also requires a DC voltage. This means that a simple end-cap structure cannot create an axial trapping potential to trap both electrons and ions simultaneously.

[0070] Furthermore, while it is desirable to keep the distance between the electrons and the ions as short as possible, it is important to keep them apart at a certain distance in order to prevent recombination from occurring, and therefore to prevent trapping of the electrons by the ions.

[0071] FIG. 17 is a top view diagrammatically showing an upper chip 80 for realizing an electron-ion simultaneous trap chip according to a seventh embodiment. FIG. 18 is a top view diagrammatically showing a lower chip 81 of an electron-ion simultaneous trap chip according to a seventh embodiment. The upper chip 80 and the lower chip 81 include a DC electrode 82, a microwave electrode 83, and an RF electrode 84 arranged on an insulator 85. The microwave electrode 83 and the RF electrode 84 are sandwiched between the DC electrode 82 and extend in the axial direction. A through hole 86 is provided between the microwave electrode 83 and the RF electrode 84. A conductive pillar 87 is provided in the microwave electrode 83 and the RF electrode 84.

[0072] The microwave electrode 83 is used to trap electrons, and the RF electrode 84 is used to trap ions. The electron-ion simultaneous trapping chip is realized by flip-chip mounting the upper chip 80 and the lower chip 81.

[0073] 19 is a cross-sectional view taken along line A-A' in FIGS. 18 and 19 when upper chip 80 and lower chip 81 are flip-chip mounted. As shown in the figure, DC electrode 82 of upper chip 80 faces DC electrode 82 of lower chip 81. Microwave electrode 83 of upper chip 80 faces RF electrode 84 of lower chip 81. RF electrode 84 of upper chip 80 faces microwave electrode 83 of lower chip 81.

[0074] Below are shown the results of calculations using an electromagnetic field simulator (COMSOL) of the potential when upper chip 80 and lower chip 81 are flip-chip mounted, a microwave voltage of 6 GHz-10 V is applied to the microwave electrode, and an RF voltage of 90 MHz-20 V is applied to the RF electrode.

[0075] The trap cross-sectional potential for electrons formed under the above conditions is shown in Fig. 20. As shown in the figure, a potential that realizes an electron trap region is formed in the center (red circle).

[0076] The trap cross-sectional potential for beryllium ions formed under the above conditions is shown in Figure 21. As shown in the figure, a potential that realizes a trap region for beryllium ions is formed in the center (red circle).

[0077] It can also be seen that the electrons and ions move in opposite directions by applying a DC voltage to the DC electrodes. Thus, the distance between the electrons and ions can be controlled by the voltage applied to the DC electrodes.

[0078] 22 shows the axial potential distribution of electrons and beryllium ions formed by flip-chip mounting the upper chip 80 and the lower chip 81. As shown in the figure, a well-shaped electrostatic potential is formed for each of the electrons and ions, with the axial position 0 being the center. By flip-chip mounting the upper chip 80 and the lower chip 81 in this way, it becomes possible to trap electrons and ions simultaneously. These trapped electrons and ions can be subjected to Coulomb interaction with each other.

[0079] By applying this flip-chip mounting to a device having the configuration shown in FIG. 6, it is possible to realize an electron trap device that can trap electrons and ions simultaneously.

[0080] 23 shows a functional block diagram of an electron trapping device 3 according to a seventh embodiment. The electron trapping device 3 includes a trapping circuit 10a including an ion cooler 25, a microwave resonator 22a, an RF resonator 23, and an electron-ion trapping region 51. The upper chip 80 and the lower chip 81 include a DC electrode 82, a microwave electrode 83 for trapping electrons, and an RF electrode 84 for trapping ions. The microwave electrode 83 and the RF electrode 84 of the upper chip 80 and the lower chip 81 are sandwiched between the DC electrodes 82 and extend in the axial direction. By forming a flip structure between the upper chip 80 and the lower chip 81, the DC electrode 82 of the upper chip 80 faces the DC electrode 82 of the lower chip 81, the microwave electrode 83 of the upper chip 80 faces the RF electrode 84 of the lower chip 81, and the RF electrode 84 of the upper chip 80 faces the microwave electrode 83 of the lower chip 81. This electron trap device 3 can trap electrons and ions simultaneously. Furthermore, these trapped electrons and ions can be subjected to Coulomb interaction with each other.

[0081] As described above, it is possible to simultaneously trap electrons and ions and cool the electrons to the ground state through the Coulomb interaction between them. In addition, it is possible to create quantum entanglement between the vibrational states of electrons and ions as a similar effect. Furthermore, it is possible to realize a hybrid quantum system consisting of electrons and ions through the entangled vibrational state.

[0082] [Eighth embodiment] Next, a preferred method for manufacturing the flip-chip structure of the electron trap device described above will be described. Figure 24 is a photograph showing an alignment method when flip-chip mounting the lower chip 12 and the upper chip 14 of Figure 8. Three adjustment pins 70, 71, and 72 for alignment are shown in Figure 24. The adjustment pins 70 and 71 are used for alignment in the x direction, and the adjustment pins 70 and 72 are used for alignment in the y direction.

[0083] Figure 25 shows the tilt of the upper chip when it is placed on the lower chip without any modification. In this case, the deviation between the upper chip and the lower chip is 145 nm, and the tilt angle of the chip is 2.45 degrees.

[0084] Figure 26 is a graph showing the simulation results of the spatial distribution of the effective potential when the inclination of the upper chip is 0 degrees and 2.45 degrees, under the assumption that it is in contact with a pillar located 600 μm from the trapping point. The upper part of Figure 26 shows the effective potential distribution in the z direction (height direction) from the substrate. The lower part of Figure 26 shows the effective potential distribution in the x direction (longitudinal direction) of the substrate. As can be seen from these figures, the effect of the inclination is small in the z direction, but differs by about 10 meV in the x direction. This shows that in order to improve the effective potential, it is necessary to suppress the angular deviation.

[0085] To solve this problem, the inventors realized that it would be advantageous to perform flip-chip mounting using the following procedure. That is, first, both ends of the lower chip and the upper chip are supported by a hard metal such as AgCu, and the center is supported by a soft metal such as Pb. In this state, the upper chip is pressed from above and heated to adhere to the lower chip. This deforms the soft metal, and the heights of the upper chip and lower chip can be aligned to the height of the hard metal. Then, silver paste is applied to the hard metal to achieve thermal contact and fixation. Figure 27 shows a flip-chip mounting created using this method.

[0086] Figure 28 shows the difference (height, width, length) between the origin and four points P1, P2, P3, and P4 on the chip in Figure 27 created using the above method. From this, the inclination of the entire board is calculated to be about 0.114 degrees. In other words, this method shows that the inclination is significantly reduced compared to the inclination of the upper chip of 2.45 degrees when the upper chip is simply placed on the lower chip.

[0087] The hard metal may be any metal that does not become superconducting even at low temperatures. In addition to AgCu, such metals may be, for example, elemental Cu or Pt. On the other hand, the soft metal may be any metal that becomes superconducting at low temperatures. In addition to Pb, such metals may be, for example, In.

[0088] [Ninth embodiment] 29 is a flow chart showing the process of an electron trapping method according to a ninth embodiment. This method includes step S1 of trapping electrons in an electron trapping region using a superconducting circuit including a cooling resonator, a microwave resonator, and an electron trapping region, and step S2 of cooling the trapped electrons using a heat bath. The superconducting circuit has a microstructure surrounded by a superconductor, in which the opposing electrodes are arranged in line symmetry with respect to a center line passing through the electron trapping region, so that the electron trapping region is composed of a plurality of opposing electrodes.

[0089] According to this method, electrons cooled to their ground state can be captured as isolated particles suspended in space.

[0090] The present invention has been described above based on the embodiments. These embodiments are merely examples, and it will be understood by those skilled in the art that various modifications are possible in the combination of each component and each treatment process, and that such modifications are also within the scope of the present invention.

[0091] For example, the low-temperature electrons trapped by the electron trapping device described in the embodiment can be interpreted as an extremely low-noise electron source. Using this, for example, an electron beam with excellent directionality can be obtained. This is expected to lead to the realization of, for example, a high-performance electron microscope.

[0092] Any combination of the above-described embodiments and modifications is also useful as an embodiment of the present invention. A new embodiment resulting from the combination has the combined effects of each of the combined embodiments and modifications.

[0093] The above describes the embodiments and modifications. In understanding the technical ideas that abstract the embodiments and modifications, the technical ideas should not be interpreted as being limited to the contents of the embodiments and modifications. The above-mentioned embodiments and modifications are merely illustrative examples, and many design changes such as changes, additions, and deletions of components are possible. In the embodiments, the contents in which such design changes are possible are emphasized by adding the notation "embodiment". However, design changes are also permitted even in contents without such notation. [Industrial Applicability]

[0094] The present invention can be used in an electron trap device, a quantum computer, a manufacturing method for a flip chip structure, and an electron trap method.

[0095] This application claims priority to U.S. Provisional Application No. 63246977, filed September 22, 2021, the entire specification of which is incorporated herein by reference. [Explanation of symbols]

[0096] 1. Electron trap device. 2. Electron trap device. 3. Electron trap device. 10. Superconducting circuits. 10a··Superconducting circuit. 12··Upper chip. 14··Lower chip. 20...Cooled resonator. 22··Microwave resonator. 22a··Microwave resonator. 23...RF resonator. 24 ··Cooling qubit elements. 25··Ion cooler. 30d...lower cooling electrode. 32d··Lower microwave electrode. 34d··Lower ground electrode. 30u...upper cooling electrode. 32u Upper microwave electrode. 34u Upper ground electrode. 36··Superconducting wiring. 40...Cryogenic equipment. 50··electron trap region. 51··Electron-ion trap region. 60·Heat bath. 71··Adjustment pin. 72··Adjustment pin. 73··Adjustment pin. 80··Upper chip. 81··Lower chip. 82...DC electrode. 83··Microwave electrodes. 84...RF electrode. 85··Insulator. 86··Through hole. 87··Conductive pillar. O Origin on the chip. P1: A point on the chip. P2: A point on the chip. P3: A point on the chip. P4: A point on the chip. S1: Trapping electrons in an electron trapping region using a superconducting circuit. S2: Cooling the trapped electrons using a heat bath.

Claims

1. 1. An electron trapping device for trapping electrons, comprising: a superconducting circuit having a cooling resonator and a heat bath for cooling electrons are placed in a cryogenic device; an electron trapping region for trapping electrons is formed in the superconducting circuit; An electron trap device, characterized in that the electrons are cooled by a heat bath via a cooling resonator.

2. The superconducting circuit includes a cooled quantum bit element including a Josephson element and a microwave resonator, 2. The electron trap device according to claim 1, wherein the oscillation frequency of the trapped electrons is increased by microwaves, and the electrons are cooled by the heat bath.

3. The electron trap device of claim 1, wherein the superconducting circuit includes a resonator that converts the vibrational state of the electrons into microwave photons at microwave frequencies through electric dipole interaction.

4. An electron trap device as described in claim 3, further comprising a microwave photon readout section for reading out the characteristics of the converted microwave photons.

5. The electron trapping device of claim 1, wherein the electron trapping region is composed of at least two cooling electrodes and at least two microwave electrodes.

6. The at least two cooling electrodes and the at least two microwave electrodes are arranged opposite each other, 6. The electron trap device according to claim 5, wherein the opposing electrodes are disposed at positions symmetrical with respect to a center line passing through the electron trap region.

7. An electron trap device as described in claim 6, characterized in that a well-shaped electrostatic potential is formed in an electron trap region surrounded by the at least two cooling electrodes and the at least two microwave electrodes.

8. The electron trapping device of claim 5, wherein the electron trapping region is formed by a flip chip structure.

9. The electron trapping device according to claim 1, further comprising a magnetic field gradient generating unit that generates a magnetic field gradient of a DC gradient or an AC gradient in the electron trapping region.

10. 10. The electron trap device according to claim 9, further comprising a spin readout section for reading out information on electron spins observed based on the magnetic field gradient.

11. 11. The electron trap device according to claim 10, further comprising a quantum entanglement generating unit that generates quantum entanglement based on the information on the electron spin.

12. A quantum computer constructed by connecting the electron trap devices according to claim 11 to each other.

13. A method for trapping electrons, comprising: Trapping the electrons in an electron trapping region using a superconducting circuit including a cooling resonator, a microwave resonator, and an electron trapping region; cooling the trapped electrons using a heat bath; 13. A method for trapping electrons comprising the steps of:

14. The superconducting circuit comprises a cooled quantum bit element including a Josephson element and a microwave resonator; 14. The electron trapping method according to claim 13, further comprising the step of increasing the oscillation frequency of the trapped electrons by microwaves and cooling the electrons by the heat bath.

15. An electron trapping device that simultaneously traps electrons and ions and cools the electrons to a ground state by Coulomb interaction between the electrons and the ions, comprising: a trapping circuit including an ion cooler, a microwave resonator, an electron trapping region, and an ion trapping region; the trap circuit comprises an upper chip and a lower chip; the upper and lower tips each include a DC electrode, a microwave electrode for trapping electrons, and an RF electrode for trapping ions; the microwave electrode and the RF electrode of the upper chip and the lower chip extend axially between the DC electrode; The upper chip and the lower chip form a flip structure, An electron trap device characterized in that the DC electrode of the upper chip faces the DC electrode of the lower chip, the microwave electrode of the upper chip faces the RF electrode of the lower chip, and the RF electrode of the upper chip faces the microwave electrode of the lower chip.

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