Permanent wafer handler with through-silicon vias for thermal equilibration and qubit modification

Abstract

The quantum device includes a qubit chip having a plurality of qubits and an interposer attached to and electrically connected to the qubit chip. The device also includes a substrate handler attached to one side of the qubit chip or one side of the interposer, or both, so as to be in thermal contact with the qubit chip, the interposer, or both. The substrate handler includes a plurality of vias, at least a portion of which are filled with a non-superconducting material, the non-superconducting material being selected to dissipate heat generated in the qubit chip, the interposer, or both.

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE The presently claimed embodiments of the invention relate to superconducting quantum mechanical devices, and more particularly, to quantum mechanical devices having permanent substrate handlers and methods of making the same. [Background technology]

[0002] Quantum operations are based on reliable control of quantum bits (referred to throughout this specification as qubits). The basic operations required to realize quantum algorithms are single-qubit operations and a set of two-qubit operations that establish correlations between two separate quantum bits. The realization of high-fidelity two-qubit operations can be desirable both to reach error thresholds for quantum operations and to reach reliable quantum simulations.

[0003] A superconducting quantum processor (with one or more superconducting qubits) comprises a superconducting metal (e.g., Al, Nb, etc.) on an insulating substrate (e.g., Si or highly resistive Si, Al2O3, etc.). A superconducting quantum processor is typically a planar two-dimensional lattice structure of individual qubits linked by couplers of various lattice symmetries (e.g., square, hexagonal, etc.) and a readout structure mounted on a flip chip. The couplers can be made from capacitors, resonators, coils, or any microwave component that provides coupling between the qubits.

[0004] Flip-chip methods may be required for a relatively large number of qubits within a given qubit chip area. Qubit chips with a relatively large size (e.g., greater than 20 mm by 20 mm) provide advantages in coherence when compared to multi-chip connections with a relatively small size. Implementation of a relatively large number of qubits would require qubit chips with a relatively large size (e.g., greater than 20 mm by 200 mm). However, larger ones (e.g., greater than 20 mm by 20 mm) would require vias to break the box mode. In conventional methods, forming vias in the qubit chip substrate requires thinning the substrate (e.g., silicon substrate). Thinning the substrate and the presence of vias can make the substrate weak and fragile. In conventional packaging methods, to mitigate the above problems, flat support structures or flat substrate handlers (e.g., made of glass, silicon, etc.) are used to reinforce the substrate during fabrication. However, these conventional packaging methods require that the flat substrate handler be removed (i.e., peeled off) from the final structure. However, finally removing the substrate handler can create problems in the final structure, including damaging the final structure during the removal procedure, such as damaging the substrate with the qubits, the qubits themselves and / or the interposer and / or other components. Summary of the Invention

[0005] One aspect of the invention is to provide a quantum device. The quantum device includes a qubit chip having a plurality of qubits and an interposer attached and electrically connected to the qubit chip. The quantum device further includes a substrate handler attached to one side of the qubit chip or one side of the interposer, or both, such that the substrate handler is in thermal contact with the qubit chip or the interposer, or both. The substrate handler includes a plurality of vias. At least a portion of the plurality of vias are filled with a non-superconducting material, the non-superconducting material being selected to dissipate heat generated in the qubit chip, the interposer, or both.

[0006] In some embodiments, the interposer is attached and electrically connected to the qubit chip using solder bumps. In some embodiments, the quantum device further includes a bonding material. A substrate handler is attached to one side of the qubit chip or one side of the interposer, or both, using the bonding material. In some embodiments, the bonding material is an adhesive bonding material or a metal or oxide bonding material. In some embodiments, the bonding material may be polyimide, benzocyclobutene (BCB), acrylic, Al-Al bonding material, In-In bonding material, Sn-Sn bonding material, Au-Sn bonding material, Au-In bonding material, and Sn-In bonding material, or any combination thereof.

[0007] In certain embodiments, the quantum device further includes a plurality of thermally conductive studs configured and arranged to thermally couple the substrate handler to one side of the qubit chip or one side of the interposer, or both.

[0008] In some embodiments, the quantum device further includes a superconducting material. The qubit chip and the interposer include a plurality of vias, at least a portion of which are filled with the superconducting material. In some embodiments, a backside of the qubit chip opposite a side having the plurality of qubits has a layer of superconducting material, and a backside of the interposer opposite a side of the interposer attached and electrically connected to the qubit chip has a layer of superconducting material.

[0009] In an embodiment, the substrate handler has a plurality of vias, a portion of the plurality of vias being filled with a superconducting material, and at least one of the plurality of vias being substantially empty to function as at least one window via. In an embodiment, the at least one window via is located behind a location of a qubit of the plurality of qubits to allow a laser beam to pass through the at least one window via to controllably remove a metal layer connected to the qubit and alter the capacitance of the qubit. In an embodiment, the interposer and substrate handler include at least one window via that traverses both the interposer and the substrate handler to allow a laser beam to pass through to a front side of the qubit to alter the qubit. In an embodiment, the interposer and substrate handler include at least one window via that traverses both the interposer and the substrate handler to allow a plasma to pass through to the qubit chip.

[0010] In one embodiment, an interposer includes a plurality of vias, a first portion of the plurality of vias being filled with superconducting material for a ground connection, and a second portion of the plurality of vias being filled with superconducting material for signal transmission.

[0011] In some embodiments, the quantum device also includes a first heat sink in thermal and mechanical contact with the substrate handler, the heat sink configured to further dissipate heat dissipated by the substrate handler. In some embodiments, the quantum device further includes an organic substrate attached and electrically connected to the interposer using a plurality of solder bumps. In some embodiments, the first heat sink is further attached to the organic substrate.

[0012] Another aspect of the invention provides a method of fabricating a quantum device, the method including providing a first substrate handler, providing a qubit chip substrate, forming a plurality of vias through the first substrate handler, filling the plurality of vias with a non-superconducting thermally conductive material, forming a plurality of thermally conductive studs on one side of the first substrate handler, forming a plurality of vias on a first side of the qubit chip substrate, filling the plurality of vias with a superconducting material, and bonding the first side of the qubit chip substrate to the one side of the first substrate handler with the thermally conductive studs.

[0013] In one embodiment, the method further includes grinding a second side of the qubit chip substrate until a plurality of vias on the first side of the qubit chip substrate are reached, the second side being opposite the first side; forming capacitors and bus wiring on the ground second side using a superconducting material; forming a plurality of qubits on the ground second side of the qubit chip substrate and connecting the plurality of qubits to the capacitors and bus wiring to obtain a qubit chip support structure.

[0014] In an embodiment, bonding the first surface of the qubit chip substrate to one side of the substrate handler with thermally conductive studs includes bonding using a polymer material, a metallic bonding material, or an oxide bonding material.

[0015] In one embodiment, the method also includes providing a second substrate handler, providing an interposer substrate, forming a plurality of vias through the second substrate handler, filling the plurality of vias with a non-superconducting thermally conductive material, forming a plurality of thermally conductive studs on one side of the second substrate handler, forming a plurality of vias on a first surface of the interposer substrate, filling the plurality of vias with a superconducting material, and bonding the first surface of the interposer substrate to the one side of the second substrate handler with the thermally conductive studs.

[0016] In one embodiment, the method further includes grinding a second side of the interposer substrate until reaching a plurality of vias on the first side of the interposer substrate, the second side being opposite the first side; forming a read resonator, a capacitive coupling wiring, and a drive wiring using a superconducting material; and providing solder bumps on the ground second side of the interposer substrate to obtain an interposer support structure.

[0017] In some embodiments, the method includes contacting a side of the interposer support structure having the solder bumps with a side of the qubit chip support structure having the qubits. In some embodiments, the qubit chip support structure having the plurality of qubits is diced into a plurality of qubit chips before contacting a side of the interposer support structure having the solder bumps with a side of the qubit chip support structure having the plurality of qubits. In some embodiments, the method further includes contacting each of the plurality of qubit chips having qubits with a side of the interposer support structure having the solder bumps. In some embodiments, the method further includes bonding the interposer support structure to an organic substrate.

[0018] The present method and quantum device have many advantages including relatively easy implementation and elimination of unnecessary conventional steps such as removing the substrate handler in the final structure (i.e., peeling the substrate handler). In fact, to the contrary, the substrate handler of the present invention can remain in the final structure and provide additional rigidity to the structure while acting as a heat sink.

[0019] The present disclosure, as well as the method of operation and function of the associated elements and combination of parts of the structure and economy of manufacture will become more apparent from a consideration of the following description and appended claims with reference to the accompanying drawings, all of which form a part hereof, and in which like reference numerals indicate corresponding parts in the various views, It is to be expressly understood, however, that the drawings are for the purpose of illustration and description only and are not intended to limit the scope of the invention. [Brief description of the drawings]

[0020] [Figure 1] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Diagram 2] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Diagram 3] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Figure 4] FIG. 2 is a schematic cross-sectional view of a quantum mechanical device according to another embodiment of the present invention. [Figure 5A] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Figure 5B] FIG. 1 is a schematic top view of a quantum mechanical device, according to an embodiment of the present invention. [Figure 6] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Figure 7] 1 is a schematic cross-sectional view of a quantum mechanical device according to an embodiment of the present invention. [Figure 8]1A-1H are diagrams illustrating various steps of a method for fabricating the quantum mechanical device shown in the figures above, according to one embodiment of the present invention. [Figure 9] 1A-1G show additional steps of a method for fabricating the quantum mechanical device shown in the figures above, according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] 1 is a schematic cross-sectional view of a quantum mechanical device 100 in accordance with one embodiment of the present invention. The quantum mechanical device 100 includes a qubit chip 102 that includes a plurality of qubits 104. In one embodiment, the plurality of qubits may be superconducting qubits, such as, for example, transmon qubits, xmon qubits, fluxonium qubits, etc. The term "qubit chip" is used broadly herein to mean a substrate that includes two or more qubits.

[0022] Quantum mechanical device 100 also includes an interposer 106 that is attached and electrically connected to qubit chip 102. In one embodiment, interposer 106 is attached and electrically connected to qubit chip 102 using solder bumps 108.

[0023] In an embodiment, the quantum mechanical device 100 also includes a superconducting material 110. In an embodiment, the qubit chip 102 has a plurality of vias 102A and the interposer has a plurality of vias 106A. In an embodiment, at least a portion of the vias 102A and / or 106A are filled with a superconducting material 110. In an embodiment, the interposer 106 has a first portion of the plurality of vias 106A filled with a superconducting material 110 for ground connection and a second portion of the plurality of vias 106A filled with a superconducting material 110 for signal transmission. In an embodiment, the vias 102A of the qubit chip 102 can have a size ranging from 3 μm to 100 μm in diameter for a circular type and a ring width of 3 μm to 100 μm for an annular type. In one embodiment, the vias 106A of the interposer 106 may also have a size ranging from 3 μm to 100 μm in diameter for the circular type and a ring width of 3 μm to 100 μm for the annular type.

[0024] In one embodiment, a backside 102B of qubit chip 102 opposite a frontside 102C of qubit chip 102 having a plurality of qubits 104 has a layer 110B of superconducting material 110. In one embodiment, a backside 106B of interposer 106 opposite a frontside 106C of interposer 106 attached to and electrically connected to qubit chip 102 has a layer 110A of superconducting material 110.

[0025] Quantum mechanical device 100 also includes a substrate handler 112A, 112B, or both, attached to one side of qubit chip 102 or attached to one side of interposer 106. For example, in one embodiment, substrate handler 112A can be attached to and in thermal contact with the backside 102B of qubit chip 102, and substrate handler 112B can be attached to and in thermal contact with the backside 106B of interposer 106. In one embodiment, substrate handler 112B can be made of glass, silicon, or the like.

[0026] In one embodiment, substrate handler 112A includes a plurality of vias 114A, and substrate handler 112B includes a plurality of vias 114B. In one embodiment, at least a portion of the plurality of vias 114A and / or 114B are filled with a non-superconducting material 116. The non-superconducting material 116 can be selected to dissipate heat generated in the qubit chip 102, the interposer 106, or both. In one embodiment, the vias 114A, 114B in substrate handlers 112A, 112B, respectively, have a size ranging from 30 μm to 1 mm in diameter for a circular type, and a ring width of 30 μm to 1 mm for an annular type. In one embodiment, the vias 114A, 114B in substrate handlers 112A, 112B, respectively, have a size larger (e.g., about 10 times larger) than the vias 102A of the qubit chip 102 or the vias 106A of the interposer 106.

[0027] In one embodiment, the quantum mechanical device 100 further includes a bonding material 118. The substrate handlers 112A, 112B are attached to the backside 102B of the qubit chip 102 or to the backside 106B of the interposer 106, or both, using the bonding material 118. For example, the substrate handler 112A is attached to the backside 102B of the qubit chip 102 using the bonding material 118, and the substrate handler 112B is attached to the backside 106B of the interposer 106 using the bonding material 118. In one embodiment, the bonding material 118 is an adhesive bonding material or a metal or oxide bonding material. In an embodiment, the bonding material 118 may be any of polyimide, benzocyclobutene (BCB), acrylic, Al-Al bonding material, In-In bonding material, Sn-Sn bonding material, Au-Sn bonding material, Au-In bonding material, and Sn-In bonding material, or any combination of two or more thereof.

[0028] In an embodiment, the quantum mechanical device 100 further includes a plurality of thermally conductive studs 120A, 120B configured and arranged to thermally couple the substrate handler 112A, 112B to the backside 102B of the qubit chip 102 or to the backside 106B of the interposer 106, or both. For example, the thermally conductive stud 120A is configured and arranged to thermally couple the substrate handler 112A to the backside 102B of the qubit chip 102, and the thermally conductive stud 120B is configured and arranged to thermally couple the substrate handler 112B to the backside 106B of the interposer 106. In an embodiment, the thermally conductive studs 120A, 120B may be any thermally conductive material, including but not limited to Cu, Au, electroplated Cu, electroplated Au, electroplated Re, or any combination thereof, or a solder material such as Sn, In, etc., or combinations thereof.

[0029] FIG. 2 is a schematic enlarged cross-sectional view of a quantum mechanical device 100 according to an embodiment of the present invention. In FIG. 2, the same reference numbers indicate the same components described above with respect to FIG. 1. Hence, the description of the common components will not be repeated in the following paragraphs, and only the unique features will be highlighted. For example, in an embodiment, in addition to the substrate handlers 112A, 112B, the qubit chip 102, the interposer 106, the bonding material 118, and the studs 120A, 120B, the quantum mechanical device 100 further includes a heat spreader material 202. For example, the heat spreader material 202 can be provided between the backside 102B of the qubit chip 102 and the bonding material 118 in contact with the thermally conductive stud 120A. For example, the heat spreader 202 can also be provided between the backside 106B of the interposer 106 and the bonding material 118 in contact with the thermally conductive stud 120B. In this manner, heat spreader 202 is configured to transfer heat from qubit chip 102, interposer 106, or both, to substrate handler 112A or substrate handler 112B, or both.

[0030] For example, heat from qubit chip 102 may be spread along backside 102B of qubit chip 102 by heat spreader 202 and then transferred via thermally conductive studs 120A to multiple vias 114A in substrate handler 112A that are filled with non-superconducting heat dissipation material 116. Similarly, heat from interposer 106 may be spread along backside 106B of interposer 106 by heat spreader 202 and then transferred via thermally conductive studs 120B to multiple vias 114B in substrate handler 112B that are filled with non-superconducting heat dissipation material 116.

[0031] FIG. 3 is a schematic cross-sectional view of a quantum mechanical device 100 according to an embodiment of the present invention. Similarly, the same reference numbers indicate the same components described above with respect to FIG. 1 and FIG. 2. Hence, the description of the common components will not be repeated in the following paragraphs, and only the unique features will be highlighted. In an embodiment, the quantum mechanical device 100 further includes a heat sink 302A in thermal and mechanical contact with a substrate handler 112A in thermal contact with the qubit chip 102. The heat sink 302A is configured to further dissipate the heat dissipated by the substrate handler 112A. In an embodiment, the quantum mechanical device 100 further includes a heat sink 302B in thermal and mechanical contact with a substrate handler 112B in thermal contact with the interposer 106. The heat sink 302B is configured to further dissipate the heat dissipated by the substrate handler 112B.

[0032] In some embodiments, quantum mechanical device 100 further includes an organic substrate 304 attached and electrically connected to interposer 106. In some embodiments, organic substrate 304 is attached and electrically connected to interposer 106 using a plurality of solder bumps 306. In some embodiments, organic substrate 304 is attached and electrically connected to front side 106C of interposer 106 attached and electrically connected to qubit chip 102, as shown in FIG. 3 . In some embodiments, organic substrate 304 may be, for example, a laminate.

[0033] In one embodiment, the heat sink 302A is further attached to the organic substrate 304 using a number of fasteners 308. The fasteners 308 are used to secure the heat sink 302A, the organic substrate 304, and the heat sink 302B together to form a rigid and sturdy structure. In one embodiment, an electromagnetic signal line, connector, or the like (e.g., an ardent connector) 310 for carrying an electromagnetic signal (e.g., a microwave signal) is connected to the organic substrate 304 configured to transmit the electromagnetic signal via the solder bumps 306 to the interposer 106.

[0034] FIG. 4 is a schematic cross-sectional view of a quantum mechanical device 400 according to another embodiment of the present invention. The quantum mechanical device 400 is similar in many aspects to the quantum mechanical device 100. Thus, common components are referred to herein using the same reference numbers. Like the quantum mechanical device 100, the quantum mechanical device 400 includes a qubit chip 102, an interposer 106, and substrate handlers 112A and 112B, etc. In the quantum mechanical device 100, the organic substrate 304 is attached and electrically connected to the front side 106C of the interposer 106. However, in the quantum mechanical device 400, the organic substrate 304 is instead attached and electrically connected to the back side 106B of the interposer 106. In an embodiment, the organic substrate 304 is attached and electrically connected to the back side 106B of the interposer 106 using solder bumps 402. In one embodiment, electromagnetic signal lines, connectors, etc. (e.g., Ardent connectors) 404 for carrying electromagnetic signals (e.g., microwave signals) are connected to the organic substrate 304 configured to transmit the electromagnetic signals via solder bumps 402 to the interposer 106.

[0035] 5A is a schematic cross-sectional view of a quantum mechanical device 500 according to one embodiment of the present invention. The quantum mechanical device 500 is similar in many respects to the quantum mechanical device 100, for example as shown in FIG. 2. Thus, common components are referred to herein using the same reference numerals. Similar to the quantum mechanical device 100, the quantum mechanical device 400 includes a qubit chip 102, an interposer 106, and substrate handlers 112A and 112B, etc.

[0036] As previously described with respect to the quantum mechanical device 100, the substrate handler 112A attached to the qubit chip 102 includes a plurality of vias 114A, and the substrate handler 112B attached to the interposer 106 includes a plurality of vias 114B. At least a portion of the plurality of vias 114A and / or 114B are filled with a non-superconducting material 116. The non-superconducting heat dissipation material 116 can be selected to dissipate heat generated in the qubit chip 102, the interposer 106, or both. As shown in FIG. 5A, instead of filling some of the vias 114A, 114B with the non-superconducting material 116, some of the vias 114A, 114B are not filled with the non-superconducting heat dissipation material 116. In one embodiment, at least one window via 502 is provided in addition to the vias 114A, 114B that are filled with the non-superconducting material 116.

[0037] FIG. 5B is a schematic top view of a quantum mechanical device 500 according to an embodiment of the present invention. FIG. 5B shows that some of the vias 114A, 114B are filled with non-superconducting heat dissipating material 116, while some of the vias remain empty and instead at least one window via 502 is provided therein. At least the window via 502 is provided on the backside 102B, 106B of the qubit chip 102 and interposer 106, respectively, at the location of a qubit 104A in the plurality of qubits 104. As shown in FIG. 5A, the at least one window via 502 traverses the entire depth of the substrate handler 112A, 112B as well as the bonding material 118 and the non-superconducting heat spreader 202. This can allow a laser beam to pass through the at least one window via 502 to controllably remove the metal layer connected to the qubit 104A and change the capacitance of the qubit 104A.

[0038] 6 is a schematic cross-sectional view of a quantum mechanical device 500 according to an embodiment of the present invention. As shown in FIG. 6, the quantum mechanical device 500 has a number of window vias 502. For example, a laser beam 600 can pass through one of the window vias 502 to reach the backside 102B of the qubit chip 102 to remove metal or superconducting material 110 from the metal layer at or near the qubit pocket 104B where the qubit 104A is mounted. By removing the metal at or near the qubit pocket 104B, the capacitance can be changed and thus the frequency of the qubit 104B can be altered as desired.

[0039] FIG. 7 is a schematic cross-sectional view of a quantum mechanical device 700 according to an embodiment of the present invention. As shown in FIG. 7, the quantum mechanical device 700 is similar in many aspects to the quantum mechanical devices 100, 400, 500 described in the paragraphs above. Hence, the same reference numbers are used in FIG. 7 to refer to the same components. As shown in FIG. 7, in addition to at least the window via 502 provided within the interposer 106 and the substrate handler 112B attached to the backside 106B of the interposer 106, at least a plasma window via 702 is also provided within the interposer 106 and the substrate handler 112B. However, as illustrated in FIG. 7, the laser beam 600 is used to remove metal or superconducting material from the frontside 102C of the qubit chip 102 on which the qubits 104A are mounted. Additionally, at least the plasma window via 702 traverses both the interposer 106 and the substrate handler 112B. This allows plasma to pass through plasma window via 702 to qubit chip 102, for example, to modify or improve coherence.

[0040] Figures 8(A)-8(H) illustrate various steps of a method for fabricating the quantum mechanical devices 100, 400, 500, 700 described in the above paragraphs according to an embodiment of the present invention. The method includes providing a first substrate handler 802 and providing a qubit chip substrate 804, as shown in Figures 8(A) and 8(E), respectively. The method further includes forming a plurality of vias 806 through the first substrate handler 802, as shown in Figure 8(B), and filling the plurality of vias 806 with a non-superconducting thermally conductive material 808, as shown in Figure 8(C). The method also includes forming a plurality of thermally conductive studs 810 on one side 812 of the first substrate handler 802, as shown in Figure 8(D).

[0041] The method further includes forming a plurality of vias 814 in a first side 816 of the qubit chip substrate 804, as shown in Figure 8(F). The method also includes filling the plurality of vias 814 with a superconducting material 818, as shown in Figure 8(G). After filling the plurality of vias 814 with a superconducting material 818, the method includes bonding the first side 816 of the qubit chip substrate 804 to one side 812 of a first substrate handler 802 having thermally conductive studs 810, as shown in Figure 8(H).

[0042] In one embodiment, bonding the first surface 816 of the qubit chip substrate 804 to one side 812 of the substrate handler 802 having thermally conductive studs 810 includes bonding using a polymer material, a metallic bonding material, or an oxide bonding material 820, as shown in FIG. 8(H).

[0043] 9(A)-9(G) illustrate further steps of a method for fabricating the quantum mechanical device 100, 400, 500, 700 described in the above paragraphs according to an embodiment of the present invention. The method further includes grinding a second side 826 of the qubit chip substrate 804 until the vias 814 in the first side 816 of the qubit chip substrate 804 are reached, the second side 826 being opposite the first side 816, as shown in FIG. 9(A). The method also further includes forming capacitors and bus wiring on the ground second side 826 using a superconducting material, as shown in FIG. 9(B). The method further includes forming a plurality of qubits 824 on the ground second side 826 of the qubit chip substrate 804, and connecting the plurality of qubits 824 to the capacitors and bus wiring to obtain a qubit chip support structure 828, as shown in FIG. 9(C).

[0044] The method includes providing a second substrate handler 902 and providing an interposer substrate 904, as shown in FIG. 9(D). In an embodiment, the method includes steps similar to those described above with reference to FIGS. 8(A)-8(H) and 9(A)-9(B), which are performed on the second substrate handler 902 and the interposer substrate 904. For example, the method includes forming a plurality of vias 906 through the second substrate handler 902 and filling the plurality of vias 906 with a non-superconducting thermally conductive material 908, as shown in FIG. 9(D). The method also includes forming a plurality of thermally conductive studs 910 on one side 912 of the second substrate handler 902, as shown in FIG. 9(D). The method includes forming a plurality of vias 914 in a first surface 916 of the interposer substrate 904, as shown in FIG. 9(D). The method further includes filling the plurality of vias 914 with a superconducting material 918. The method also includes bonding the first surface 916 of the interposer substrate 904 to one side 912 of the second substrate handler 902 having thermally conductive studs 910. In one embodiment, bonding the first surface 916 of the interposer substrate 904 to one side 912 of the second substrate handler 902 includes bonding using a polymer material, a metal bonding material, or an oxide bonding material 920, as shown in FIG.

[0045] The method further includes grinding a second side 926 of the interposer substrate 904, the second side 926 being opposite the first side 916, until the plurality of vias 914 in the first side 916 of the interposer substrate 904 is reached, as shown in Figure 9(D). The method also includes forming a read resonator, capacitive coupling wiring, and drive wiring using a superconducting material on the ground second side 926 of the interposer substrate 904.

[0046] The method includes applying solder bumps 924 on the ground second surface 926 of the interposer substrate 904 to obtain an interposer support structure 928, as shown in Figure 9(E). In one embodiment, the method includes contacting a side 930 of the interposer support structure 928 having the solder bumps 924 with a side 830 of the qubit chip support structure 828 having the qubits 824, as shown in Figure 9(F).

[0047] In one embodiment, qubit chip support structure 828 having a plurality of qubits 824 is diced into a plurality of qubit chips 840 before contacting side 930 of interposer support structure 928 having solder bumps 924 with side 830 of qubit chip support structure 828 having a plurality of qubits 824, as shown in Figure 9(G). In one embodiment, the method further includes contacting each of the plurality of qubit chips 840 having qubits 824 with side 930 of interposer support structure 928 having solder bumps 924, as shown in Figure 9(G). In one embodiment, the method also includes bonding interposer support structure 928 to an organic substrate 950.

[0048] As will be appreciated, the structure manufactured using the above method and shown in Figures 9(F) and 9(G) resembles the quantum mechanical device 100 shown in Figure 1, for example. The method of making the quantum mechanical devices 100, 400, 500, 700 described in the above paragraphs has many advantages, including relatively easy implementation and the elimination of unnecessary conventional steps such as removing the substrate handler in the final structure (i.e., peeling the substrate handler). In fact, to the contrary, the substrate handler can provide additional rigidity to the structure while acting as a heat sink.

[0049] The description of various embodiments of the present invention has been presented for purposes of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used in this specification have been selected to best explain the principles of the embodiments, practical applications, or technical improvements to the technology found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A quantum device, comprising: a qubit chip comprising a plurality of qubits; an interposer attached to and electrically connected to the qubit chip; a substrate handler attached to one side of the qubit chip or one side of the interposer, or both, such that the substrate handler is in thermal contact with the qubit chip or the interposer, or both; Equipped with the substrate handler includes a plurality of vias, at least a portion of the plurality of vias being filled with a non-superconducting material, the non-superconducting material being selected to dissipate heat generated in the qubit chip, the interposer, or both; The interposer is attached to and electrically connected to an organic substrate. Quantum devices.

2. 10. The quantum device of claim 1 , wherein the interposer is attached and electrically connected to the qubit chip using solder bumps.

3. 3. The quantum device of claim 1 or 2, further comprising a bonding material, the substrate handler being attached to the one side of the qubit chip or the one side of the interposer, or both, using the bonding material.

4. The quantum device of claim 3 , wherein the bonding material is an adhesive bonding material or a metal or oxide bonding material.

5. 4. The quantum device of claim 3, wherein the bonding material is selected from the group consisting of polyimide, benzocyclobutene (BCB), acrylic, Al-Al bonding material, In-In bonding material, Sn-Sn bonding material, Au-Sn bonding material, Au-In bonding material, and Sn-In bonding material.

6. 6. The quantum device of claim 1 , further comprising a plurality of thermally conductive studs configured and arranged to thermally connect the substrate handler to the one side of the qubit chip or the one side of the interposer, or both.

7. 7. The quantum device of claim 1, further comprising a superconducting material, the qubit chip and the interposer comprising a plurality of vias, at least a portion of which are filled with the superconducting material.

8. 8. The quantum device of claim 7, wherein a backside of the qubit chip opposite a side having the plurality of qubits has the layer of superconducting material, and a backside of the interposer opposite a side of the interposer attached and electrically connected to the qubit chip has the layer of superconducting material.

9. 9. The quantum device of claim 1, wherein the substrate handler comprises a plurality of vias, a portion of the plurality of vias being filled with superconducting material, and at least one of the plurality of vias being substantially empty to function as at least one window via.

10. 10. The quantum device of claim 9, wherein the at least one window via is located behind a location of a qubit of the plurality of qubits to allow a laser beam to pass through the at least one window via to controllably remove a metal layer connected to the qubit and change a capacitance of the qubit.

11. 11. The quantum device of claim 9 or 10, wherein the interposer and the substrate handler comprise at least one window via that traverses both the interposer and the substrate handler to allow a laser beam to pass to a front side of the qubit to modify the qubit.

12. 12. The quantum device of claim 9, wherein the interposer and the substrate handler comprise at least one window via that traverses both the interposer and the substrate handler to allow passage of plasma to the qubit chip.

13. 13. The quantum device of claim 1, wherein the interposer comprises a plurality of vias, a first portion of the plurality of vias being filled with a superconducting material for a ground connection and a second portion of the plurality of vias being filled with a superconducting material for signal transmission.

14. 14. The quantum device of claim 1, further comprising a first heat sink in thermal and mechanical contact with the substrate handler, the heat sink configured to further dissipate heat dissipated by the substrate handler.

15. 15. The quantum device of claim 14, wherein the first heat sink is further attached to an organic substrate.

16. 16. The quantum device of claim 1, further comprising an organic substrate attached and electrically connected to the interposer using a plurality of solder bumps.

17. 1. A method of making a quantum device, comprising the steps of: Providing a first substrate handler; providing a qubit chip substrate; forming a plurality of vias through the first substrate handler; filling the plurality of vias with a non-superconducting thermally conductive material; forming a plurality of thermally conductive studs on a side of the first substrate handler; forming a plurality of vias on a first surface of the qubit chip substrate; filling the plurality of vias with a superconducting material; bonding the first surface of the qubit chip substrate to the one side of the first substrate handler having the thermally conductive studs; A method comprising:

18. grinding a second side of the qubit chip substrate until the plurality of vias of the first side of the qubit chip substrate are reached, the second side being opposite the first side; forming capacitors and bus wiring on the ground second surface using a superconducting material; forming a plurality of qubits on the ground second surface of the qubit chip substrate and connecting the plurality of qubits to the capacitors and bus wiring to obtain a qubit chip support structure; 20. The method of claim 17, further comprising:

19. 19. The method of claim 17 or 18, wherein bonding the first surface of the qubit chip substrate to the one side of the substrate handler having the thermally conductive studs comprises bonding using a polymer material, a metal bonding material, or an oxide bonding material.

20. Providing a second substrate handler; providing an interposer substrate; forming a plurality of vias through the second substrate handler; filling the vias with a non-superconducting thermally conductive material; forming a plurality of thermally conductive studs on one side of the second substrate handler; forming a plurality of vias on a first surface of the interposer substrate; filling the plurality of vias with a superconducting material; bonding the first surface of the interposer substrate to the one side of the second substrate handler having the thermally conductive studs; 20. The method of any one of claims 17 to 19, further comprising:

21. grinding a second side of the interposer substrate until the plurality of vias on the first side of the interposer substrate are reached, the second side being opposite the first side; forming a read resonator, capacitive coupling wiring, and drive wiring using a superconducting material; providing solder bumps on the ground second surface of the interposer substrate to obtain an interposer support structure; 21. The method of claim 20, further comprising:

22. 22. The method of claim 21, further comprising contacting a side of the interposer support structure having the solder bumps with a side of the qubit chip support structure having the qubits.

23. 23. The method of claim 22, further comprising dicing the qubit chip support structure with the qubits into a plurality of qubit chips prior to contacting the side of the interposer support structure with the solder bumps and the side of the qubit chip support structure with the qubits.

24. 24. The method of claim 23, further comprising contacting each of the plurality of qubit chips having the qubits with the side of the interposer support structure having the solder bumps.

25. 25. The method of any one of claims 21 to 24, further comprising bonding the interposer support structure to an organic substrate.

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