Power Conversion Equipment

Abstract

When a short-circuit prevention period is set in a power conversion device provided with two bridge circuits, if two types of first and second phase shift amounts are used in order to be in accordance with a power command value, control becomes complex. In order to solve this problem, this power conversion device comprises: voltage detection means (33, 34) for detecting the voltages of respective bridge circuits (12, 22); and a control device (40) for controlling the semiconductor switching elements of each of the bridge circuits (12, 22). The power conversion device also comprises: a phase difference calculation unit (401) for calculating a phase difference between the output of the first bridge circuit and the output of the second bridge circuit on the basis of the voltage values of the respective bridge circuits (12, 22) detected by the voltage detection means (33, 34) and the power command value; a compensation amount calculation unit (402) for calculating a compensation amount for compensating error due to the phase difference; and a PWM signal generation unit (403) for generating gate signals for the semiconductor switching elements from the calculation result of the phase difference calculation unit (401) and the calculation result of the compensation amount calculation unit (402).

Description

[Technical field]

[0001] The present application relates to a power conversion device. [Background technology]

[0002] This power conversion device is an isolated DC / DC converter, and is particularly intended for a DC / DC converter that transmits power bidirectionally between two DC terminals. In a bidirectional isolated DC / DC converter in which two full-bridge circuits, each made of a bridge circuit equipped with multiple semiconductor switching elements, are connected to the primary and secondary sides of an isolation transformer, it is desired that the converter can transmit power over a wide voltage range with a simple circuit configuration and provide highly reliable output control without deterioration of controllability in the boost operation region due to the short circuit prevention period.

[0003] For this reason, it has been proposed to calculate a duty ratio based on the transmission power and a command value, drive and control each semiconductor switching element, set one semiconductor switching element in one bridge circuit as a first reference element, set the phase shift amount of the drive signal between the semiconductor switching element of the first diagonal element diagonally connected to the first reference element as a first phase shift amount, set one semiconductor switching element in the other bridge circuit as a second reference element, set the phase shift amount between the drive signal of the semiconductor switching element of the second diagonal element diagonally connected to the second reference element and the drive signal of the first reference element as a second phase shift amount, and when performing boost operation, control the second phase shift amount to be larger than the first phase shift amount beyond the short-circuit prevention period in each full bridge circuit regardless of the duty ratio, thereby eliminating the inability to perform boost operation (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2016 / 125374 Summary of the Invention [Problem to be solved by the invention]

[0005] The DC / DC converter proposed in Patent Document 1 is expected to be applied to a system that transmits power in a state where the relationship between the DC voltage of one DC terminal and the DC voltage of the other DC terminal is different from the turns ratio of a transformer. However, there is no mention of power transmission in a case where the relationship between the DC voltage of one DC terminal and the DC voltage of the other DC terminal is equal to the turns ratio of a transformer without assuming a step-up or step-down operation.

[0006] Furthermore, when the transmission power is small, the first phase shift amount and the second phase shift amount are reduced to make the transmission power match the command value. However, since the lower limit of the phase shift amount is limited by the short circuit prevention period in each bridge circuit, there is a limit to how much the first phase shift amount and the second phase shift amount can be reduced, and as a result, it is possible that a large amount of power different from the command value will be transmitted. In such a case, an uncontrollable operating region occurs in the DC / DC converter, causing deterioration of control performance.

[0007] The present application has been made to solve the above-mentioned problems, and has an object to provide a power conversion device that realizes operation regardless of the DC voltage at one DC terminal, the DC voltage at the other DC terminal, and the turns ratio of the transformer, and further in which the amount of phase shift that controls the transmission power is not affected by the short-circuit prevention period. [Means for solving the problem]

[0008] The power conversion device disclosed in the present application includes a transformer, a first bridge circuit having a first semiconductor switching element, connected to a primary winding of the transformer, and having a short-circuit prevention period set therefor, a second bridge circuit having a second semiconductor switching element, connected to a secondary winding of the transformer, and having a short-circuit prevention period set therefor, a first voltage detection means for detecting a voltage input to the first bridge circuit, a second voltage detection means for detecting a voltage input to the second bridge circuit, and a control device for controlling the first semiconductor switching element and the second semiconductor switching element, a phase difference calculation unit that calculates a phase difference between an output voltage of a first bridge circuit and an output voltage of a second bridge circuit based on a first voltage value detected by a voltage detection means, a second voltage value detected by a second voltage detection means, and a power command value; a compensation amount calculation unit that calculates a compensation amount for compensating for an error occurring in the phase difference using a calculation result by the phase difference calculation unit, the first voltage value, and the second voltage value; and a PWM signal generation unit that generates a gate signal for a first semiconductor switching element and a gate signal for a second semiconductor switching element from a calculation result by the phase difference calculation unit and a calculation result by the compensation amount calculation unit. The compensation amount calculation unit calculates a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on based on the phase difference calculated by the phase difference calculation unit and the first and second voltage values, and determines whether or not ZVS operation is achieved in the first bridge circuit and the second bridge circuit from the calculated current. If ZVS operation is not achieved in the bridge circuit on the load side of the first bridge circuit and the second bridge circuit, the compensation amount calculation unit outputs a phase amount corresponding to the short circuit prevention period with a polarity opposite to that of the phase difference calculated by the phase difference calculation unit. It is characterized by the above. Effect of the Invention

[0009] According to the power conversion device of the present application, it is possible to transmit power according to the power command value without being affected by the short circuit prevention period. [Brief description of the drawings]

[0010] [Figure 1] 1 is a configuration diagram of a power conversion device according to a first embodiment. [Diagram 2] 3 is a waveform diagram showing a voltage and an AC current applied to a transformer winding in the first embodiment. FIG. [Diagram 3] FIG. 2 is an explanatory diagram of a charging operation of the power conversion device according to the first embodiment. [Figure 4] FIG. 2 is an explanatory diagram of a charging operation of the power conversion device according to the first embodiment. [Diagram 5]3 is a waveform diagram showing a voltage and an AC current applied to a transformer winding in the first embodiment. FIG. [Figure 6] FIG. 4 is a diagram illustrating a charging operation of the power conversion device according to the first embodiment. [Figure 7] 3 is a characteristic diagram of the power conversion device according to the first embodiment. FIG. [Figure 8] 11 is a waveform diagram showing a voltage and an AC current applied to a transformer winding in the second embodiment. FIG. [Figure 9] 11 is a diagram illustrating a charging operation of a power conversion device according to a second embodiment. FIG. [Figure 10] FIG. 11 is a characteristic diagram of the power conversion device according to the second embodiment. [Figure 11] 13 is a waveform diagram showing the voltage and AC current applied to a transformer winding in the third embodiment. FIG. [Figure 12] FIG. 11 is a characteristic diagram of the power conversion device according to the third embodiment. [Figure 13] FIG. 13 is a diagram showing a configuration of a control device according to a fourth embodiment. [Figure 14] 13 is a flowchart illustrating the operation of the control device according to the fourth embodiment. [Figure 15] FIG. 13 is a configuration diagram of a power conversion device according to a fifth embodiment. [Figure 16] FIG. 13 is a configuration diagram of a control device according to a fifth embodiment. [Figure 17] FIG. 2 is a hardware configuration diagram of a control device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of a power conversion device will be described in detail with reference to the drawings. Note that the same reference numerals in the drawings indicate the same or corresponding parts. First embodiment In the first embodiment, a power conversion device will be described which is a DC / DC converter having two bridge circuits and a transformer with two windings and transmits power from one DC terminal to the other DC terminal.

[0012] FIG. 1 is a circuit diagram showing a configuration of a power conversion device according to a first embodiment of the present invention. As shown in FIG. 1, the power conversion device 1 includes a first bridge circuit 12 connected to a first DC terminal 11 that receives DC power from a DC power source 10; 2nd DC terminal 21 and a transformer 30.

[0013] The first bridge circuit 12 has a DC capacitor Cdc1 connected in parallel to the first DC terminal 11, and two switching legs each formed by connecting semiconductor switching elements Q11 to Q14 in series as positive and negative semiconductor elements. The second bridge circuit 22 has a DC capacitor Cdc2 connected in parallel to the second DC terminal 21, and two switching legs each formed by connecting semiconductor switching elements Q21 to Q24 in series as positive and negative semiconductor elements.

[0014] An intermediate connection point of each switching leg in the first bridge circuit 12 is connected to a primary winding 31 of a transformer 30, and an intermediate connection point of each switching leg in the second bridge circuit 22 is connected to a secondary winding 32 of the transformer 30. The power conversion device 1 is a circuit that converts a voltage V1 at a first DC terminal 11 via a first bridge circuit 12, a transformer 30 and a second bridge circuit 22 into a voltage V2 applied to a second DC terminal 21, and bidirectional power conversion can be freely controlled.

[0015] The voltage V1 of the first DC terminal 11 is detected by a first voltage detection means 33. Moreover, the voltage V2 of the second DC terminal 21 is detected by a second voltage detection means . It is assumed that the DC power source is connected to a source whose output voltage fluctuates, such as a solar panel (PV) or a storage battery. It is also possible to convert AC power to DC using an AC / DC converter. It is also assumed that the load 20 is connected to a source whose voltage fluctuates, such as a storage battery. It is also assumed that the load 20 is connected to an AC load, such as a motor connected via a DC / AC converter, or an LED connected via a DC / DC converter.

[0016] The semiconductor switching elements Q11 to Q24 are, for example, semiconductor switching elements having a self-extinguishing function, such as IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) connected in antiparallel to diodes. Each of the semiconductor switching elements Q11 to Q24 may be a combination of multiple semiconductor switching elements connected in parallel depending on the current capacity.

[0017] The control device 40 generates gate signals 41, 42 to the semiconductor switching elements Q11-Q24 of the first bridge circuit 12 on the power supply side and the second bridge circuit 22 on the load side to control the switching of the semiconductor switching elements Q11-Q24. By controlling the switching of the semiconductor switching elements Q11-Q24, the first bridge circuit 12 outputs an AC voltage VT1 to the primary winding 31 of the transformer 30, and the second bridge circuit 22 outputs an AC voltage VT2 to the secondary winding 32 of the transformer 30.

[0018] In this case, the action of the inductance elements between the first bridge circuit 12 and the second bridge circuit 22 and the transformer 30 enables the semiconductor switching elements Q11 to Q24 to perform zero voltage switching (ZVS) operation, which is soft switching. In this case, by soft switching of the semiconductor switching elements Q11 to Q24, it becomes possible to reduce switching loss, increase the operating frequency, and reduce the size of the transformer 30.

[0019] Soft switching is a technique for reducing the voltage or current applied to the semiconductor switching elements Q11 to Q24 during a switching transition period, thereby reducing switching loss and electromagnetic noise. The leakage inductance of the transformer 30 may be used as the inductance element.

[0020] Moreover, electrolytic capacitors or film capacitors, etc., are used for the DC capacitors Cdc1 and Cdc2. A high-frequency current flows through the DC capacitors Cdc1 and Cdc2, but when a film capacitor is used, degradation due to the high-frequency current can be suppressed and a longer life can be achieved. In FIG. 1, the direction of the arrow is positive. As shown in FIG. 1, the control device 40 in the first embodiment includes a phase difference calculation unit 401, a compensation amount calculation unit 402, and a PWM signal generation unit 403.

[0021] The phase difference calculation unit 401 calculates the phase difference φcal between the AC voltage VT1 output by the first bridge circuit 12 to the primary winding 31 of the transformer 30 and the AC voltage VT2 output by the second bridge circuit 22 to the secondary winding 32 of the transformer 30, based on the DC voltage V1 detected by the first voltage detection means 33 and the power command value Pref.

[0022] The compensation amount calculation unit 402 calculates the amount of compensation required to compensate for an error caused by a phase difference in the AC voltages VT1, VT2 applied to the primary winding 31 and the secondary winding 32 of the transformer 30 during the short-circuit prevention period. In calculating the amount of compensation, the compensation amount φcomp is calculated from the DC voltage V1 detected by the first voltage detection means 33 and the DC voltage V2 detected by the second voltage detection means 34, and the phase difference φcal calculated by the phase difference calculation unit 401.

[0023] In addition, the compensation amount calculation unit 402 calculates the current just before the semiconductor switching elements Q11 to Q24 in each of the first bridge circuit 12 and the second bridge circuit 22 are turned on, from the DC voltage V1 detected by the first voltage detection means 33 and the DC voltage V2 detected by the second voltage detection means 34, and the phase difference calculated by the phase difference calculation unit 401, and determines from the calculated current whether or not ZVS operation has been achieved in the first bridge circuit 12 and the second bridge circuit 22.

[0024] When ZVS operation is not achieved in the bridge circuit on the load side of the first bridge circuit 12 and the second bridge circuit 22, the compensation amount calculation unit 402 outputs a phase amount corresponding to the short circuit prevention period with opposite polarity to the phase difference calculated by the phase difference calculation unit 401. When ZVS operation is not achieved in the bridge circuit on the power supply side of the first bridge circuit 12 and the second bridge circuit 22, the compensation amount calculation unit 402 outputs a phase amount corresponding to the short circuit prevention period with the same polarity as the phase difference calculated by the phase difference calculation unit 401.

[0025] The PWM signal generating unit 403 determines the phase difference obtained by adding up the phase difference φcal calculated by the phase difference calculating unit 401 and the compensation amount φcomp calculated by the compensation amount calculating unit 402 as the phase difference command value φref, and generates gate signals 41, 42 for the semiconductor switching elements Q11 to Q24 based on this phase difference command value φref.

[0026] 2, a1 and a2 show the gate signals of the semiconductor switching elements Q11 to Q24 in the first embodiment, b1 and b2 show the waveforms of the AC voltages VT1 and VT2 output from the first bridge circuit 12 and the second bridge circuit 22 to the primary winding 31 and the secondary winding 32 of the transformer 30, and c shows the waveform of the AC current IL. In FIG. 2, φtd is the short circuit prevention period, φref is the phase difference command value generated in the control device 40, and φ is the phase difference between the actual AC voltages VT1 and VT2.

[0027] If the operating frequency of each of the semiconductor switching elements Q11 to Q24 is increased (for example, to 61 Hz or higher) in order to reduce the size of transformer 30, the loss in transformer 30 will increase. However, the increase in loss due to the increased frequency can be suppressed by using an amorphous material, a silicon steel plate with a silicon content of 6.5%, or a silicon steel plate with a thickness of approximately 0.1 mm as the iron core material.

[0028] As shown in Fig. 2, there is a phase difference φ between the AC voltage VT1 output by the first bridge circuit 12 and the AC voltage VT2 output by the second bridge circuit 22. In the power conversion device 1 in Fig. 1, the phase difference φ is controlled to control the transmitted power, and power is transmitted from the side with a leading phase difference to the side with a lagging phase difference.

[0029] For example, in the case of FIG. 2, the phase of the AC voltage VT1 leads with respect to the AC voltage Vt2, so power is transmitted from the first bridge circuit 12 on the power supply side to the second bridge circuit 22 on the load side, and the power P transmitted from the DC power supply 10 to the load 20 can be calculated by the following equation (1).

number

[0030] In addition, in the formula (1), fsw is the switching frequency of the semiconductor switching elements Q11 to Q24, and L is the total value of all inductance elements included in the current path through which the AC current passes, including the leakage inductance between the primary winding 31 and the secondary winding 32. Generally, the inductance of the wiring and the parasitic inductance included in the semiconductor switching elements are ignored in this inductance element. It mainly refers to the inductance connected in series to the transformer 30. Moreover, V2 is a voltage value converted into a value seen from the primary winding 31 of the transformer 30.

[0031] Furthermore, with regard to the AC current IL in the first bridge circuit 12 and the second bridge circuit 22 accompanying the transmission of power P to the load 20, the AC currents IL0, IL1, and IL2 at each change point can be calculated by the following equations (2), (3), and (4).

number

number

number

[0032] However, in equations (2) to (4), A and B are derived from equation (5).

number

[0033] Moreover, the phase difference φ for controlling the power can be obtained by the phase difference calculation unit 401 in the control device 40 by modifying the equation (1) as shown in the following equation (6).

number

[0034] Moreover, the phase difference φ can be approximately calculated from the formula (1) as shown in the following formula (7).

number

[0035] By simply calculating the phase difference φ as in equation (7), it is possible to reduce the calculation load of the phase difference calculation unit 401, and the control device 40 can be configured more inexpensively. Here, if the control device 40 does not have the compensation amount calculation unit 402, the check result φcal of the phase difference calculation unit 401 is input to the PWM signal generation unit 403 as the phase difference command value φref, and the gate signals 41 and 42 are generated by the PWM signal generation unit 403.

[0036] Fig. 3 shows the states of semiconductor switching elements Q11 to Q24 and AC current IL immediately before semiconductor switching elements Q11, Q14 are turned on in first bridge circuit 12. Note that in Fig. 3, semiconductor switching elements Q11, Q12, Q13, Q14, Q21, and Q24 indicated by dashed lines are in the off state or are elements through which no current is conducted, and semiconductor switching elements Q22 and Q23 indicated by solid lines are in the on state or are elements through which current is conducted.

[0037] Also, FIG. 3 shows the state immediately before the semiconductor switching elements Q11 and Q14 are turned on, so that in the first bridge circuit 12, all the semiconductor switching elements Q11 to Q14 are in the off state during the short-circuit prevention period.

[0038] 3, in the first bridge circuit 12, during the short circuit prevention period, the diodes connected in anti-parallel to the semiconductor switching elements Q11, Q14 are in a conducting state, and the voltage applied to the semiconductor switching elements Q11, Q14 is zero. If the semiconductor switching elements Q11, Q14 are turned on at this time, ZVS operation is performed.

[0039] Therefore, in order to realize ZVS operation in the first bridge circuit 12, the current immediately before each of the semiconductor switching elements Q11-Q14 is turned on must be a negative value, and therefore the condition is that the AC current IL0<0. Also, immediately before the start of the short circuit prevention period in the first bridge circuit 12, the semiconductor switching elements Q12, Q13 are turned off, and as the short circuit prevention period begins, the diodes connected in anti-parallel to the semiconductor switching elements Q11, Q14 are in a conducting state, and therefore the polarity of the AC voltage VT1 at the first AC terminal 13 switches from negative to positive.

[0040] Fig. 4 shows the states of the semiconductor switching elements Q11 to Q24 and the AC current IL immediately before the semiconductor switching elements Q21 and Q24 in the second bridge circuit 22 are turned on. In Fig. 4, the semiconductor switching elements Q12, Q13, Q21, Q22, Q23, and Q24 shown by dashed lines are in the off state or do not conduct current, and the semiconductor switching elements Q11 and Q14 shown by solid lines are in the on state or conduct current. In addition, Fig. 4 shows the state immediately before the semiconductor switching elements Q21 and Q24 are turned on, so in the second bridge circuit 22, all the semiconductor switching elements Q21 to Q24 are in the off state during the short-circuit prevention period.

[0041] 4, in the second bridge circuit 22, during the short circuit prevention period, the diodes connected in anti-parallel to the semiconductor switching elements Q21, Q24 are in a conducting state, and the voltage applied to the semiconductor switching elements Q21, Q24 is zero. If the semiconductor switching elements Q21, Q24 are turned on at this time, ZVS operation is performed.

[0042] Therefore, in order to realize ZVS operation in the second bridge circuit 22, the current immediately before each of the semiconductor switching elements Q21-Q24 is turned off must be a positive value, which is a condition that AC current IL1>0. Also, in the second bridge circuit 22, the semiconductor switching elements Q22, Q23 are turned off immediately before the start of the short circuit prevention period, and as the short circuit prevention period begins, the diodes connected in anti-parallel to the semiconductor switching elements Q21, Q24 are in a conducting state, so that the polarity of the voltage VT2 at the second AC terminal 23 switches from negative to positive.

[0043] The gate signal 42 of the semiconductor switches Q21-Q24 in the second bridge circuit 22 lags behind the gate signal 41 of the semiconductor switches Q11-Q14 in the first bridge circuit 12 by the phase difference φcal (=φref) calculated by the phase difference calculation unit 401. In this way, since the polarities of the AC voltages VT1, VT2 are switched as the semiconductor switching elements Q11-Q24 in the first bridge circuit 12 and the second bridge circuit 22 are turned off, the phase difference between the AC voltages VT1, VT2 also becomes φcal.

[0044] Next, in FIG. 5, a1 and a2 show the gate signals of each of the semiconductor switching elements Q11 to Q24 when the voltage V1 at the first DC terminal 11 is larger than the voltage V2 at the second DC terminal 21, b1 and b2 show the waveforms of the AC voltages VT1, VT2 output from the first bridge circuit 12 and the second bridge circuit 22 to the primary winding 31 and secondary winding 32 of the transformer 30, and c shows the waveform of the AC current IL.

[0045] As shown in Fig. 5, the AC current IL0 has a negative value at the moment the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 turn on, so the state immediately before the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 turn on is similar to that in Fig. 3, and therefore ZVS operation is achieved in the first bridge circuit 12. However, the AC current IL1 has a negative value at the moment the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 turn on, so the state immediately before the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 turn on is different from that in Fig. 4.

[0046] Fig. 6 shows the states of the semiconductor switching elements Q11-Q24 and the AC current IL immediately before the semiconductor switching elements Q21, Q24 of the second bridge circuit 22 are turned on in a case where the voltage V1 at the first DC terminal 11 is higher than the voltage V2 at the second DC terminal 21. In Fig. 6, the semiconductor switching elements shown by dashed lines are in the off state or do not conduct current, and the semiconductor switching elements shown by solid lines are in the on state or conduct current.

[0047] 6, because AC current IL has a negative value, even immediately before semiconductor switching elements Q21, Q24 turn on, the AC current passes through the diodes connected in anti-parallel to semiconductor switching elements Q22, Q23. In this state, the polarity of AC voltage VT2 remains negative, and when the short circuit prevention period ends, semiconductor switching elements Q21, Q24 turn on, causing the polarity of AC voltage VT2 to switch to positive.

[0048] At this time, since the diodes connected in anti-parallel to the semiconductor switching elements Q22, Q23 are in a conductive state when the semiconductor switching elements Q21, Q24 are turned on, recovery occurs in the diodes connected in anti-parallel to the semiconductor switching elements Q22, Q23. Furthermore, since the polarity of the voltages does not change until the short circuit prevention period ends, the phase difference φ between the AC voltages VT1 and VT2 becomes larger than the phase difference φcal calculated by the phase difference calculation unit 401 by the short circuit prevention period φtd, which results in an error in the transmitted power.

[0049] In other words, if ZVS operation cannot be achieved on the second bridge circuit 22 side, the phase difference φ between the AC voltages VT1 and VT2 will include an error corresponding to the short circuit prevention period φtd. Therefore, in the control device 40, the compensation amount calculation unit 402 calculates a compensation phase difference φcomp that compensates for the error φtd occurring in the phase difference φ, and adds this to the phase difference φcal calculated by the phase difference calculation unit 401. Thereafter, a phase difference command value φref to which the compensation phase difference φcomp has been added is calculated and input to the PWM signal generation unit to obtain gate signals 41 and 42, thereby transmitting power P that matches the command value to the load 20.

[0050] More specifically, the phase difference calculation unit 401 obtains the phase difference φcal by substituting the voltage V1 of the first DC terminal 11, the voltage V2 of the second DC terminal 21, and the command value P of the power transmitted by the power conversion device 1 into equation (6) or equation (7). Here, the phase difference calculation unit 401 uses the detected voltage V1 of the first DC terminal 11 and the detected voltage V2 of the second DC terminal 21 to calculate the phase difference. Note that the switching frequency fsw and the inductance element L are used to calculate equation (6) or equation (7), and these values ​​are values ​​that are determined when the power conversion device 1 is designed, and the design values ​​are input in advance to the control device 40.

[0051] Meanwhile, the compensation amount calculation unit 402 substitutes the phase difference φcal output from the phase difference calculation unit 401, the detected voltage V1 of the first DC terminal 11, and the detected voltage V2 of the second DC terminal 21 into equations (2) and (5) to calculate the AC current IL0. Furthermore, the calculated AC current IL0, the phase difference φcal, the detected voltage V1 of the first DC terminal 11, and the detected voltage V2 of the second DC terminal 21 are substituted into equations (3) and (5) to calculate the AC current IL1.

[0052] At this time, as described above, if the AC current IL1>0, the ZVS operation is established in the second bridge circuit 22, and the phase difference error φtd associated with the short circuit prevention period does not occur. Therefore, the compensation amount calculation unit 402 outputs the compensation phase difference φcomp=0 if the AC current IL1>0, and outputs the compensation phase difference φcomp=-φtd if the AC current IL1<0.

[0053] In the control device 40, the compensation phase difference φcomp of the output of the compensation amount calculation unit 402 is added to the output φcal of the phase difference calculation unit 401 to calculate the phase difference command value φref, so that the phase difference command value φref becomes φref=φcal-φtd, and the error in the phase difference generated due to the short circuit prevention period can be compensated for.

[0054] Fig. 7 shows a comparison performed by simulation with and without the compensation amount φcomp by the compensation amount calculation unit 402. As shown in Fig. 7, it can be confirmed that the power output from the power conversion device 1 closely matches the power command value due to the effect of the compensation amount φcomp by the compensation amount calculation unit 402. By adopting such a configuration, even if the output voltage of the DC power source 10 and the voltage of the load 20 fluctuate, the error in the power transmitted to the load 20 can be prevented without complicating the power control. This makes it possible to realize the power conversion device 1 with high control accuracy.

[0055] Embodiment 2 In the first embodiment, a case has been described in which the voltage V1 of the first DC terminal 11 is greater than the voltage V2 of the second DC terminal 21. In the second embodiment, a case has been described in which the voltage V1 of the first DC terminal 11 is smaller than the voltage V2 of the second DC terminal 21.

[0056] In FIG. 8, a1 and a2 show the gate signals of the semiconductor switching elements Q11 to Q24 when the voltage V1 at the first DC terminal 11 is larger than the voltage V2 at the second DC terminal 21, b1 and b2 show the waveforms of the AC voltages VT1, VT2 output from the first bridge circuit 12 and the second bridge circuit 22 to the primary winding 31 and secondary winding 32 of the transformer 30, and c shows the waveform of the AC current IL.

[0057] As shown in Fig. 8, the AC current IL1 at the moment when the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 are turned on is a positive value, so the state immediately before the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 are turned on is the same as that in Fig. 4, and therefore the ZVS operation is realized in the second bridge circuit 22. However, at the moment when the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 are turned on, exchange The current IL0 has a positive value, and the state immediately before the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 are turned on is different from that in FIG.

[0058] Fig. 9 shows the states of the semiconductor switching elements Q11-Q24 and the AC current IL immediately before the semiconductor switching elements Q11, Q14 of the first bridge circuit 12 are turned on in a case where the voltage V1 at the first DC terminal 11 is smaller than the voltage V2 at the second DC terminal 21. In Fig. 9, the semiconductor switching elements indicated by dashed lines are in the off state or elements through which no current is conducted, and the semiconductor switching elements indicated by solid lines are in the on state or elements through which current is conducted.

[0059] As shown in Fig. 9, since the AC current IL is a positive value, even immediately before the semiconductor switching elements Q11, Q14 are turned on, the current passes through the diodes connected in anti-parallel to the semiconductor switching elements Q12, Q13. In this state, the polarity of the AC voltage VT1 remains negative, and when the short circuit prevention period ends, the semiconductor switching elements Q11, Q14 are turned on, so the polarity of the AC voltage VT1 switches to positive. At this time, the diodes connected in anti-parallel to the semiconductor switching elements Q12, Q13 are in a conducting state when the semiconductor switching elements Q11, Q14 are turned on, so recovery occurs in the diodes connected in anti-parallel to the semiconductor switching elements Q12, Q13.

[0060] Furthermore, since the polarity of the voltages does not switch until the short circuit prevention period ends, the phase difference φ between the AC voltages VT1 and VT2 will be smaller than the phase difference φcal calculated by the phase difference calculation unit 401 by the short circuit prevention period φtd, resulting in an error in the transmitted power. In other words, if ZVS operation cannot be achieved on the first bridge circuit 12 side, the phase difference φ between the AC voltages VT1 and VT2 will include an error corresponding to the short circuit prevention period φtd.

[0061] Therefore, in the control device 40, the compensation amount calculation unit 402 calculates the phase difference φcomp that compensates for the error φtd occurring in the phase difference φ, and adds it to the phase difference φcal calculated by the phase difference calculation unit 401. After that, the phase difference command value φref to which the phase difference φcomp has been added is calculated and input to the PWM signal generation unit to obtain gate signals 41 and 42, thereby transmitting power P that matches the command value to the load 20.

[0062] More specifically, the phase difference calculation unit 401 obtains the phase difference φcal by substituting the voltage V1 of the first DC terminal 11, the voltage V2 of the second DC terminal 21, and the command value P of the power transmitted by the power conversion device 1 into equation (6) or equation (7). Here, the phase difference calculation unit 401 uses the detected voltage V1 of the first DC terminal 11 and the detected voltage V2 of the second DC terminal 21 to calculate the phase difference. In addition, the switching frequency fsw and the inductance element L are used to calculate equation (6) or equation (7), and these values ​​are determined when the power conversion device 1 is designed, and the design values ​​are input in advance to the control device 40.

[0063] On the other hand, the compensation amount calculation unit 402 substitutes the phase difference φcal output from the phase difference calculation unit 401, the detected voltage V1 of the first DC terminal 11, and the detected voltage V2 of the second DC terminal 21 into equations (2) and (5) to calculate the AC current IL0. As described above, if the AC current IL0<0, the ZVS operation is established in the first bridge circuit 12, and no error φtd in the phase difference associated with the short circuit prevention period occurs. Therefore, the compensation amount calculation unit 402 outputs the compensation phase difference φcomp=0 if the AC current IL0<0, and outputs the compensation phase difference φcomp=φtd if the AC current IL0>0.

[0064] In the control device 40, the compensation phase difference φcomp of the output of the compensation amount calculation unit 402 is added to the output φcal of the phase difference calculation unit 401 to calculate the phase difference command value φref, so that the phase difference command value φref becomes the phase difference command value φref=φcal+φtd, and the error in the phase difference generated due to the short circuit prevention period can be compensated for.

[0065] Fig. 10 shows a comparison between the presence and absence of the compensation amount φcomp by the compensation amount calculation unit 402, which was performed by simulation. As shown in Fig. 11, it can be confirmed that the power output from the power conversion device 1 closely matches the power command value due to the effect of the compensation amount φcomp by the compensation amount calculation unit 402. By adopting such a configuration, even if the output voltage of the DC power supply 10 fluctuates and even if the voltage of the load 20 fluctuates, no error occurs in the power transmitted to the load 20, and a power conversion device 1 with high control accuracy can be realized without complicating the power control.

[0066] In addition, under such operating conditions, if ZVS operation is not achieved in the second bridge circuit, the phase difference φ becomes larger by φtd due to the influence of the short circuit prevention period φtd as described above. Therefore, the phase difference φ becomes shorter by the short circuit prevention period φtd because the ZVS operation of the first bridge circuit 12 is not achieved, and the phase difference φ becomes longer by the short circuit prevention period φtd because the ZVS operation of the second bridge circuit 22 is not achieved. In this case, the effects cancel each other out, so that the effect of the short circuit prevention period φtd disappears, and the output φcomp of the compensation amount calculation unit 402 becomes φcomp=0.

[0067] Embodiment 3 In the second embodiment, a case has been described in which the voltage V1 at the first DC terminal 11 is smaller than the voltage V2 at the second DC terminal 21. In the third embodiment, a case will be described in which the power transmitted from the power conversion device 1 to the load 20 is small. In FIG. 11, a1 and a2 show the gate signals of each semiconductor switching element Q24 when the power transmitted from the first DC terminal 11 to the second DC terminal 21 is small, b1 and b2 show the waveforms of the AC voltages VT1, VT2 output from the first bridge circuit 12 and the second bridge circuit 22 to the primary winding 31 and secondary winding 32 of the transformer 30, and c shows the waveform of the AC current IL.

[0068] As shown in Fig. 11, the AC current IL0 has a negative value at the moment when the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 turn on, so the state immediately before the semiconductor switching elements Q11, Q14 in the first bridge circuit 12 turn on is similar to that in Fig. 4. On the other hand, the AC current IL1 has a positive value at the moment when the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 turn on, so the state immediately before the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 turn on is similar to that in Fig. 4. Therefore, in this case, the ZVS operation is achieved in the first bridge circuit 12 and the second bridge circuit 22, and no error occurs in the phase difference between the AC voltages VT1 and VT2.

[0069] 11, there is a period φZ in which the AC current IL is zero when the polarity is switched, and since this period does not contribute to the transmission of power, the phase difference φ is smaller than the command value φref by the period φZ, resulting in an error in the power transmitted to the load 20. In addition, this period occurs during the short-circuit prevention period of the first bridge circuit 12, and since the AC IL is zero, the polarity of the AC voltage VT1 matches the AC voltage VT2.

[0070] This period φZ occurs from the moment the AC current IL becomes IL0 to the moment it becomes IL1. Therefore, if the phase of the moment the AC current IL becomes IL=0 during the period from the moment the AC current IL becomes IL0 to the moment it becomes IL1 is φ0, the relationship of equation (8) is established from equations (2) and (5).

number

[0071] Here, by transforming equation (8), the phase φ0 at the moment when the AC current IL becomes 0 can be obtained as shown in equation (9).

number

[0072] As shown in FIG. 11, in the process in which the polarity of the AC voltage VT1 switches and the AC current changes from IL0 to IL1, a period φZ in which the AC current IL becomes zero starts after the period φ0 has elapsed. After that, when the short-circuit prevention period φtd of the first bridge circuit 12 ends, the polarity of the AC voltage VT1 returns to the polarity before the period φZ started. Considering this, the period φZ during which it does not contribute to the transmission of power can be calculated by the following equation (10).

number

[0073] Therefore, in the control device 40, the phase difference calculation unit 401 calculates and outputs the phase difference φcal by substituting the voltage V1 of the first DC terminal 11, the voltage V2 of the second DC terminal 21, and the command value P of the power to be transmitted by the power conversion device 1 into equation (6) or equation (7), and the compensation amount calculation unit 402 calculates and outputs the compensation phase difference φcomp using equation (10), and then adds it to the phase difference φcal, thereby obtaining a phase difference command value φref that does not cause an error in the power to be transmitted to the load 20. Note that in equation (10), when the period φZ>0, a period of AC current IL=0 occurs, causing an error in the power, and therefore when the period φZ<0, the output of the compensation amount calculation unit 402 is φcomp=0.

[0074] By adopting such a configuration, even if the output voltage of the DC power supply 10 fluctuates and even if the voltage of the load 20 fluctuates, no error occurs in the power transmitted to the load 20, and a power conversion device 1 with high control accuracy can be realized without complicating the power control.

[0075] Fig. 12 shows a comparison performed by simulation with and without the compensation amount φcomp by the compensation amount calculation unit 402. As shown in Fig. 12, when the power command value is small, it can be confirmed that the power output from the power conversion device 1 closely matches the power command value due to the effect of the compensation amount φcomp by the compensation amount calculation unit 402. With such a configuration, no error occurs in the power transmitted to the load 20, and the power conversion device 1 with high control accuracy can be realized.

[0076] Embodiment 4 In the third embodiment, a case where the power transmitted from the power conversion device 1 to the load 20 is small has been described. However, in reality, the state of the load 20 is constantly changing, and the state of the DC power source 10 is also constantly changing. Therefore, the compensation amount calculation unit 402 needs to output the compensation amount φcomp for the phase difference in accordance with the state. In the fourth embodiment, a configuration of the control device 40 that calculates the compensation amount φcomp for the phase difference in the compensation amount calculation unit 402 in accordance with the state of the load 20 and the DC power source 10 will be described.

[0077] 13 shows a configuration of a control device 40 according to the fourth embodiment. The control device 40 according to the fourth embodiment differs from the control devices 40 according to the first to third embodiments in that, from the detection value of the voltage V1 at the first DC terminal 11, the detection value of the voltage V2 at the second DC terminal 21, and the output of the phase difference calculation unit 401, exchange Current IL0 and alternating current The inverter further includes a switching-time current and zero current phase calculation unit 404 that calculates IL1 and phase φ0, a ZVS operation determination unit 405 that determines ZVS operation in the first bridge circuit 12 and the second bridge circuit 22 from the calculation results of the switching-time current and zero current phase calculation unit 404, and a zero current period determination unit 406 that determines whether a period occurs in which the AC current IL is zero.

[0078] Switching current and zero current phase calculation section In 404 The currents IL0 and IL1 are calculated using equations (2), (3), and (5), and the phase φ0 is calculated using equations (8) and (9). Then, exchange Current IL0 and alternating current IL1 is input to the ZVS operation determination unit 405, and if IL0<0, it is determined that ZVS operation is achieved in the first bridge circuit 12, and similarly, if IL1>0, it is determined that ZVS operation is achieved in the second bridge circuit 22.

[0079] These determination results are transmitted to the compensation amount calculation unit 402. Furthermore, the zero current period determination unit 406 receives the phase φ0, compares it with the short circuit prevention period φtd, and determines that a period φZ in which the AC current IL is zero is occurring if φ0<φtd, and determines that a period φZ in which the AC current IL is zero is not occurring if φ0>φtd. This determination result is transmitted to the compensation amount calculation unit 402.

[0080] The compensation amount calculation unit 402 receives the determination results from the ZVS operation determination unit 405 and the zero current period determination unit 406 and calculates the compensation amount φcomp for the phase difference based on the determination results. For example, when IL0>0 and IL1>0 are satisfied in the ZVS operation determination unit 405, the determination result that the ZVS operation is not achieved in the first bridge circuit 12 and the ZVS operation is achieved in the second bridge circuit 22 is transmitted to the compensation amount calculation unit 402.

[0081] In such a case, since no polarity reversal of the current occurs during the process of changing from IL0 to IL1, no period occurs during which the AC current IL is zero, and therefore the zero current period determination unit 406 determines that φ0>φtd, and that no period φZ occurs during which the AC current IL is zero. In response to these results, the compensation amount calculation unit 402 outputs the compensation phase difference φcomp=+φtd.

[0082] FIG. 14 shows a flow chart of the control device 40. In the control device 40, first, a switching current and zero current phase calculation unit 404 calculates a phase difference L from the detection value of the voltage V1 of the first DC terminal 11, the detection value of the voltage V2 of the second DC terminal 21, the power command Pref, the switching frequency fsw, and the inductance L of the inductance element. exchange Current IL0 and alternating current IL1 is calculated, and the phase difference φcal is calculated by the phase difference calculation unit 401 (step S1).

[0083] Next, the ZVS operation determination unit 405 determines whether or not ZVS operation is achieved in the first bridge circuit 12 from the polarity of IL0 (step S2). At this time, if the ZVS operation is achieved in the first bridge circuit 12 (IL0<0) (YES), the process proceeds to step S3A, and if the ZVS operation is not achieved in the first bridge circuit 12 (IL0>0) (NO), the process proceeds to step S3B.

[0084] Next, in step S3A, the ZVS operation determination unit 405 determines whether ZVS operation is achieved in the second bridge circuit 22 from the polarity of IL1, and if ZVS operation is achieved in the second bridge circuit 22 (YES), the process proceeds to step S4. On the other hand, if ZVS operation is not achieved in the second bridge circuit 22 (NO), the compensation amount calculation unit 402 calculates φcomp=−φtd (step S5).

[0085] Similarly, in step S3B, the ZVS operation determination unit 405 determines whether ZVS operation is achieved in the second bridge circuit 22 from the polarity of IL1, and if ZVS operation is achieved in the second bridge circuit 22 (YES), the compensation amount calculation unit 402 calculates φcomp = φtd (step S5), and if ZVS operation is not achieved in the second bridge circuit 22 (NO), the compensation amount calculation unit 402 calculates φcomp = 0 (step S5).

[0086] Next, in step S4, the zero current period determination unit 406 determines whether or not there is a period in which the AC current IL is zero. If there is no period in which the AC current IL is zero (YES), the compensation amount calculation unit 402 calculates φcomp=0 (step S5). be If the answer is NO, the compensation amount calculator 402 calculates φcomp=φZ (step S5).

[0087] Next, in step S6, the compensation amount φcomp calculated by the compensation amount calculation unit 402 is added to the phase difference φcal to calculate a phase difference command value φref. Next, the phase difference command value φref is input to the PWM signal generating unit 403 to generate the gate signals 41 and 42 (step S7). Thereafter, steps S1 to S7 are repeated as long as the power conversion device 1 is in operation.

[0088] By adopting such a configuration, it is possible to realize a power conversion device with high control accuracy without being affected by the short circuit prevention period when the voltage V1 at the first DC terminal 11, the voltage V2 at the second DC terminal 21, or the command value Pref of the transmission power changes, without complicating the power control.

[0089] Embodiment 5. So far, a method has been described in which the AC current IL is calculated from the operating conditions by the control device 40, and the presence or absence of the influence of the short circuit prevention period is determined. In the fifth embodiment, a configuration will be described in which the AC current IL is detected, and it is determined whether or not the ZVS operation is achieved in the first bridge circuit 12 and the second bridge circuit 22, thereby compensating for the influence of the short circuit prevention period.

[0090] Fig. 15 shows a power conversion device 1 including a current detection means 43. In Fig. 15, the current detection means 43 is disposed in the first bridge circuit 12, but this is not limited thereto. The current detection means may be disposed in the second bridge circuit 22, or may be disposed in both the first bridge circuit 12 and the second bridge circuit 22.

[0091] 16 shows the configuration of the control device 40 when the power conversion device 1 includes the current detection means 43. The control device 40 includes a switching time current detection unit 407 that detects the current during switching in the first bridge circuit 12 and the second bridge circuit 22 from the AC current IL detected by the current detection means 43.

[0092] In the switching current detection unit 407, when the semiconductor switching elements Q11 and Q14 in the first bridge circuit 12 are turned on, exchange The current IL0 is detected and transmitted to the ZVS operation determination unit 405. In addition, the switching current detection unit 407 detects the current IL0 at the time of turning off the semiconductor switching elements Q11 and Q14 in the first bridge circuit 12. exchange It is also possible to determine whether or not the ZVS operation is achieved in the first bridge circuit 12 by detecting the current IL2 and transmitting the detected current to the ZVS operation determination unit 405. This is because the integral value of one cycle of the AC current IL becomes zero. alternating current IL2 is alternating current This is because the polarity of IL0 is reversed and the absolute value is the same.

[0093] Furthermore, the switching-time current detection unit 407 detects the current IL1 when the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 are turned on, and transmits this to the ZVS operation determination unit 405. The switching-time current detection unit 407 also detects the current when the semiconductor switching elements Q21, Q24 in the second bridge circuit 22 are turned off, and transmits this to the ZVS operation determination unit 405, thereby making it possible to determine whether or not the ZVS operation in the second bridge circuit 22 has been achieved.

[0094] With this configuration, it is possible to simplify the configuration of the control device 40 since it is not necessary to calculate the currents IL0 and IL1 from the operating conditions of the power conversion device 1. In addition, since no error occurs due to the calculation, it is possible to perform more accurate control.

[0095] An example of the hardware of the control device of the present application is shown in Fig. 17. It is composed of a processor 100 and a storage device 200, and although not shown, the storage device 200 includes a volatile storage device such as a random access memory, and a non-volatile auxiliary storage device such as a flash memory. Also, instead of the flash memory, a hard disk auxiliary storage device may be included.

[0096] The processor 100 executes a program input from the storage device 200, thereby performing communication between the communication terminal 81 and the local server 5 and the local network base station 6, for example. In this case, the program is input from the auxiliary storage device to the processor 100 via the volatile storage device. The processor 100 may output data such as a calculation result to the volatile storage device of the storage device 200, or may store the data in the auxiliary storage device via the volatile storage device.

[0097] Although the present application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless modifications not exemplified are assumed within the scope of the technology disclosed in the present specification, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component and combining it with a component of another embodiment. [Explanation of symbols]

[0098] REFERENCE SIGNS LIST 1 power conversion device, 10 DC power supply, 11 first DC terminal, 12 first bridge circuit, 13 first AC terminal, 20 load, 21 second DC terminal, 22 second bridge circuit, 23 second AC terminal, 30 transformer, 31 primary winding, 32 secondary winding, 33 first voltage detection means, 34 second voltage detection means, 40 control device, 41, 42 gate signal, 43 current detection means, 100 processor, 200 storage device, 401 phase difference calculation unit, 402 compensation amount calculation unit, 403 PWM signal generation unit, 404 zero current phase calculation unit, 405 ZVS operation determination unit, 406 zero current period determination unit, 407 switching current detection unit

Claims

1. Transformer and a first bridge circuit having a first semiconductor switching element, connected to a primary winding of the transformer, and having a short circuit prevention period set; a second bridge circuit having a second semiconductor switching element, connected to a secondary winding of the transformer, and having a short circuit prevention period set; a first voltage detection means for detecting a voltage input to the first bridge circuit; a second voltage detection means for detecting a voltage input to the second bridge circuit; a control device that controls the first semiconductor switching element and the second semiconductor switching element, a phase difference calculation unit configured to calculate a phase difference between an output voltage of the first bridge circuit and an output voltage of the second bridge circuit based on a first voltage value detected by the first voltage detection means, a second voltage value detected by the second voltage detection means, and a power command value; a compensation amount calculation unit that calculates a compensation amount for compensating for an error occurring in the phase difference by using a calculation result by the phase difference calculation unit, the first voltage value, and the second voltage value; a PWM signal generation unit that generates a gate signal for the first semiconductor switching element and a gate signal for the second semiconductor switching element based on a calculation result of the phase difference calculation unit and a calculation result of the compensation amount calculation unit, the compensation amount calculation unit calculates a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on based on the phase difference calculated by the phase difference calculation unit, the first voltage value, and the second voltage value, and determines whether or not ZVS operation has been achieved in the first bridge circuit and the second bridge circuit from the calculated current; a phase amount corresponding to the short circuit prevention period is output with a polarity opposite to that of the phase difference calculated by the phase difference calculation unit when a ZVS operation is not achieved in a bridge circuit on a load side of the first bridge circuit and the second bridge circuit.

2. Transformer and a first bridge circuit having a first semiconductor switching element, connected to a primary winding of the transformer, and having a short circuit prevention period set; a second bridge circuit having a second semiconductor switching element, connected to a secondary winding of the transformer, and having a short circuit prevention period set; a first voltage detection means for detecting a voltage input to the first bridge circuit; a second voltage detection means for detecting a voltage input to the second bridge circuit; a control device that controls the first semiconductor switching element and the second semiconductor switching element, the control device includes a phase difference calculation unit that calculates a phase difference between an output voltage of the first bridge circuit and an output voltage of the second bridge circuit based on a first voltage value detected by the first voltage detection means, a second voltage value detected by the second voltage detection means, and a power command value; a compensation amount calculation unit that calculates a compensation amount for compensating for an error occurring in the phase difference by using a calculation result by the phase difference calculation unit, the first voltage value, and the second voltage value; a PWM signal generation unit that generates a gate signal for the first semiconductor switching element and a gate signal for the second semiconductor switching element from a calculation result of the phase difference calculation unit and a calculation result of the compensation amount calculation unit, the compensation amount calculation unit calculates a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on based on the phase difference calculated by the phase difference calculation unit, the first voltage value, and the second voltage value, and determines whether or not ZVS operation has been achieved in the first bridge circuit and the second bridge circuit from the calculated current; a phase amount corresponding to the short circuit prevention period, outputting the phase difference calculated by the phase difference calculation unit with the same polarity as the phase difference, when ZVS operation is not achieved in the bridge circuit on the power supply side of the first bridge circuit and the second bridge circuit.

3. Transformer and a first bridge circuit having a first semiconductor switching element, connected to a primary winding of the transformer, and having a short circuit prevention period set; a second bridge circuit having a second semiconductor switching element, connected to a secondary winding of the transformer, and having a short circuit prevention period set; a first voltage detection means for detecting a voltage input to the first bridge circuit; a second voltage detection means for detecting a voltage input to the second bridge circuit; a control device that controls the first semiconductor switching element and the second semiconductor switching element, a phase difference calculation unit configured to calculate a phase difference between an output voltage of the first bridge circuit and an output voltage of the second bridge circuit based on a first voltage value detected by the first voltage detection means, a second voltage value detected by the second voltage detection means, and a power command value; a compensation amount calculation unit that calculates a compensation amount for compensating for an error occurring in the phase difference by using a calculation result by the phase difference calculation unit, the first voltage value, and the second voltage value; a PWM signal generation unit that generates a gate signal for the first semiconductor switching element and a gate signal for the second semiconductor switching element based on a calculation result of the phase difference calculation unit and a calculation result of the compensation amount calculation unit, the compensation amount calculation unit calculates a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on based on the phase difference calculated by the phase difference calculation unit, the first voltage value, and the second voltage value, determines whether or not there is a period during which the AC current input to the transformer becomes zero, and calculates a compensation amount to compensate for an error occurring in the phase difference based on a result of this determination.

4. 4. The power conversion device according to claim 3, wherein, when a period during which the AC current is zero occurs, the compensation amount calculation unit calculates a phase amount corresponding to the period during which the AC current is zero, and calculates this phase amount as the compensation amount.

5. Transformer and a first bridge circuit having a first semiconductor switching element, connected to a primary winding of the transformer, and having a short circuit prevention period set; a second bridge circuit having a second semiconductor switching element, connected to a secondary winding of the transformer, and having a short circuit prevention period set; a first voltage detection means for detecting a voltage input to the first bridge circuit; a second voltage detection means for detecting a voltage input to the second bridge circuit; a control device that controls the first semiconductor switching element and the second semiconductor switching element, a phase difference calculation unit configured to calculate a phase difference between an output voltage of the first bridge circuit and an output voltage of the second bridge circuit based on a first voltage value detected by the first voltage detection means, a second voltage value detected by the second voltage detection means, and a power command value; a compensation amount calculation unit that calculates a compensation amount for compensating for an error occurring in the phase difference by using a calculation result by the phase difference calculation unit, the first voltage value, and the second voltage value; a PWM signal generation unit that generates a gate signal for the first semiconductor switching element and a gate signal for the second semiconductor switching element from a calculation result of the phase difference calculation unit and a calculation result of the compensation amount calculation unit, the control device includes a switching-time current and zero-current phase calculation unit that calculates a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on and a period during which an AC current input to the transformer becomes zero based on the phase difference calculated by the phase difference calculation unit, the first voltage value, and the second voltage value; a ZVS operation determination unit that determines whether or not ZVS operation has been achieved in the first bridge circuit and the second bridge circuit based on currents immediately before the first semiconductor switching element and the second semiconductor switching element are turned on; a zero current period determination unit that determines whether or not there is a period during which the AC current is zero, the zero current period determination unit being provided before the compensation amount calculation unit; The power conversion device, wherein the compensation amount calculation unit calculates a compensation amount for compensating for an error occurring in the phase difference based on determination results of the ZVS operation determination unit and the zero current period determination unit.

6. 6. The power conversion device according to claim 5, wherein the zero current period determination unit determines whether or not a period in which the AC current becomes zero occurs, based on the switching-time current and a phase in which the AC current becomes zero calculated by the zero current phase calculation unit.

7. a current detection means for detecting an AC current input to the transformer, 6. The power conversion device according to claim 5, wherein the switching-time current and zero-current phase calculation unit comprises: switching-time current detection means for detecting a current immediately before the first semiconductor switching element and the second semiconductor switching element are turned on based on the current detected by the current detection means; and a zero-current phase calculation unit.

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