Distance measuring device
Patent Information
- Application Number
- JP2022527643
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-05-26
- Filing Date
- 2021-05-11
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2041-05-11
Smart Images

Figure 0007645883000001 
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a distance measuring device. [Background technology]
[0002] Distance measuring devices using the indirect ToF (indirect time of flight: iToF) method have been developed. Indirect ToF distance measuring devices indirectly calculate the distance from the measuring device to an object based on the phase difference between the emitted light and the reflected light. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2020-013909 A Summary of the Invention [Problem to be solved by the invention]
[0004] However, conventional distance measuring devices using the indirect ToF method have photodiodes in a silicon substrate, and it is not possible to obtain sufficient quantum efficiency Qe (sensitivity). In addition, in distance measuring devices using a silicon substrate with high infrared transmittance, it is necessary to thicken the silicon substrate in order to increase the quantum efficiency. However, if the silicon substrate is made thicker, it becomes difficult to electrically or optically separate adjacent pixels, which leads to problems such as a deterioration of the SNR (Signal-to-Noise Ratio) and a decrease in resolution.
[0005] Therefore, the present disclosure has been made in consideration of such problems, and provides a distance measuring device that can improve quantum efficiency and resolution. [Means for solving the problem]
[0006] A distance measuring device according to one aspect of the present disclosure comprises a semiconductor layer having a first surface and a second surface opposite the first surface, a lens provided on the second surface side, first and second charge accumulation units provided in the semiconductor layer on the first surface side, a photoelectric conversion unit in contact with the semiconductor layer on the first surface side and made of a material different from the semiconductor layer, first and second voltage application units that apply a voltage to the semiconductor layer between the first and second charge accumulation units and the photoelectric conversion unit, and a first wiring provided on the first surface side and electrically connected to the photoelectric conversion unit.
[0007] The photoelectric conversion portion may be smaller in area than the opening through which incident light passes from the lens to the semiconductor layer when viewed from above the second surface of the semiconductor layer.
[0008] The semiconductor device may further include an impurity layer provided in the semiconductor layer on the first surface side and in contact with the photoelectric conversion section, the photoelectric conversion section being smaller in area than the impurity layer when viewed from above the second surface of the semiconductor layer.
[0009] The semiconductor layer may be made of silicon, and the photoelectric conversion portion may be made of germanium, InGaAs, CIGS, or Qdot.
[0010] The element may further include a metal layer made of a conductive and light-reflecting material, covering the periphery of the photoelectric conversion section except for the contact section between the photoelectric conversion section and the semiconductor layer.
[0011] The metal layer may be an electrode that electrically connects the photoelectric conversion unit and the first wiring.
[0012] The metal layer may have projections and recesses that protrude or are recessed toward the photoelectric conversion section.
[0013] The light-emitting device may further include a mixed layer provided between the photoelectric conversion section and the semiconductor layer, the mixed layer being a mixture of a material of the photoelectric conversion section and a material of the semiconductor layer.
[0014] The semiconductor device may further include a high-concentration impurity layer that is provided in a contact portion of the photoelectric conversion section that is electrically connected to the first wiring and has a higher impurity concentration than the photoelectric conversion section.
[0015] The first voltage application unit is a first gate electrode provided on the first surface between the first charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer, and the second voltage application unit is a second gate electrode provided on the first surface between the second charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer, and may further include a second wiring provided on the first surface side and connected to the first voltage application unit, and a third wiring provided on the first surface side and connected to the second voltage application unit.
[0016] The first and second voltage application units may be provided on the first surface of the semiconductor layer via an insulating film.
[0017] The first and second voltage application units may be embedded in the semiconductor layer from a first surface of the semiconductor layer.
[0018] The first voltage application section may be adjacent to the first charge accumulation section on the first surface and be a first impurity layer having a different conductivity type than the first charge accumulation section, and the second voltage application section may be adjacent to the second charge accumulation section on the first surface and be a second impurity layer having a different conductivity type than the second charge accumulation section, and may further include a second wiring provided on the first surface side and connected to the first voltage application section, and a third wiring provided on the first surface side and connected to the second voltage application section.
[0019] The semiconductor layer may further include a waveguide section extending from the second surface to the photoelectric conversion section and made of a material different from that of the semiconductor layer.
[0020] The waveguide section has an area on the second surface side equal to or greater than the opening that passes incident light from the lens to the semiconductor layer, and has an area on the first surface side equal to or less than the area of the photoelectric conversion section, and the side surface between the first surface and the second surface may have a tapered shape.
[0021] The refractive index of the waveguide may be higher than the refractive index of the semiconductor layer.
[0022] The refractive index of the waveguide may be lower than the refractive index of the lens.
[0023] The optical waveguide may further include a metal film provided on a side surface of the waveguide. [Brief description of the drawings]
[0024] [Figure 1] 1 is a block diagram showing an example of the configuration of a distance measuring device according to a first embodiment. [Diagram 2] FIG. 2 is a block diagram showing an example of the schematic configuration of a light receiving element of the distance measuring device according to the first embodiment. [Diagram 3] FIG. 2 is a diagram showing an example of a circuit configuration of a pixel. [Figure 4] FIG. 4 is a plan view showing an example of the arrangement of the pixel circuits shown in FIG. [Diagram 5] FIG. 2 is a cross-sectional view showing an example of the configuration of a pixel according to the first embodiment. [Figure 6] FIG. 4 is a timing chart showing an example of the operation of the distance measuring device according to the first embodiment. [Figure 7] FIG. 11 is a cross-sectional view showing an example of the configuration of a pixel according to a second embodiment. [Figure 8] FIG. 11 is a cross-sectional view showing an example of the configuration of a pixel according to a third embodiment. [Figure 9] FIG. 13 is a cross-sectional view showing an example of the configuration of a pixel according to a fourth embodiment. [Figure 10] FIG. 13 is a cross-sectional view showing an example of the configuration of a pixel according to the fifth embodiment. [Figure 11] FIG. 13 is a cross-sectional view showing an example of the configuration of a pixel according to the sixth embodiment. [Figure 12] FIG. 23 is a cross-sectional view showing an example of the configuration of a pixel according to the seventh embodiment. [Figure 13] FIG. 13 is a cross-sectional view showing an example of the configuration of a light receiving element according to an eighth embodiment. [Figure 14] FIG. 13 is a cross-sectional view showing an example of the configuration of a pixel according to the ninth embodiment. [Figure 15] FIG. 13 is a cross-sectional view of a light-receiving element having a metal film on the side surface of a waveguide portion. [Figure 16] FIG. 2 is a plan view showing an example of a pixel layout according to the present disclosure. [Figure 17]FIG. 11 is a plan view showing another example of a pixel layout according to the present disclosure. [Figure 18] FIG. 1 is a block diagram showing a configuration example of a smartphone as an electronic device to which the present technology is applied. [Figure 19] 1 is a block diagram showing a schematic configuration example of a vehicle control system that is an example of a mobile object control system to which the technology according to the present disclosure can be applied. [Figure 20] FIG. 4 is a diagram showing an example of an installation position of an imaging unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0025] Hereinafter, specific embodiments to which the present technology is applied will be described in detail with reference to the drawings. The drawings are schematic or conceptual, and the ratios of each part are not necessarily the same as those in reality. In the specification and drawings, elements similar to those described above with respect to the previously mentioned drawings are given the same reference numerals, and detailed descriptions are omitted as appropriate.
[0026] (First embodiment) 1 is a block diagram showing a configuration example of a distance measuring device according to a first embodiment. The distance measuring device 100 is a distance measuring device using an indirect ToF (hereinafter also referred to as iToF) method, and is used, for example, in an in-vehicle system that is mounted on a vehicle and measures the distance to an object outside the vehicle. The distance measuring device 100 may also be used, for example, in a system for identifying an individual, such as face authentication.
[0027] The distance measuring device 100 includes a light receiving element 1, a light emitting element 2, a modulator 3, and a PLL (Phase Locked Loop) 4. The PLL 4 generates a pulse signal. The modulator 3 modulates the pulse signal from the PLL 4 to generate a control signal. The frequency of the control signal may be, for example, 5 MHz to 20 MHz. The light emitting element 2 emits light in accordance with the control signal from the modulator. The light emitting element 2 has a light emitting diode that emits infrared light with a wavelength in the range of 780 nm to 1000 nm as a light source, and generates irradiation light in synchronization with a rectangular wave or sine wave control signal. The light generated by the light emitting element 2 may be, for example, short wave infrared light (SWIR (Short Wave Infrared Radiometer)). The irradiation light emitted from the light emitting element 2 is reflected by an object M and received by the light receiving element 1.
[0028] The reflected light received by the light receiving element 1 is delayed from the timing at which the light emitting element 2 emits light according to the distance to the object M. A phase difference occurs between the irradiated light and the reflected light due to the delay time of the reflected light relative to the irradiated light. In the iToF method, the distance measuring device 100 calculates the phase difference between the irradiated light and the reflected light, and obtains the distance (depth information) from the distance measuring device 100 to the object M based on this phase difference.
[0029] 2 is a block diagram showing a schematic configuration example of a light receiving element of the distance measuring device according to the first embodiment. The light receiving element 1 is an element used in the distance measuring device 100 using the iToF method shown in FIG.
[0030] The light receiving element 1 receives light (reflected light) that is generated by a light emitting element 2 acting as a light source, hits an object, and is reflected back, and outputs a depth image that represents distance information to the object as a depth value.
[0031] The light receiving element 1 has a pixel array section 21 provided on a semiconductor substrate (not shown) and a peripheral circuit section provided on the same semiconductor substrate. The peripheral circuit section is composed of, for example, a vertical drive section 22, a column processing section 23, a horizontal drive section 24, a system control section 25, a signal processing section 26, and a data storage section 27. All or a part of the peripheral circuit section may be provided on the same semiconductor substrate as the light receiving element 1, or may be provided on a substrate separate from the light receiving element 1.
[0032] The pixel array section 21 has a plurality of pixels 10 arranged two-dimensionally in a matrix in row and column directions. The pixels 10 generate charges according to the amount of light received, and output signals according to the charges. That is, the pixels 10 perform photoelectric conversion on the incident light, and output signals according to the resulting charges. Details of the pixels 10 will be described later. Note that the row direction is the horizontal direction in FIG. 2, and the column direction is the vertical direction.
[0033] In the pixel array unit 21, a pixel drive line 28 is wired in the row direction for each pixel row in the matrix-like pixel arrangement, and two vertical signal lines 29 are wired in the column direction for each pixel column. For example, the pixel drive line 28 transmits a drive signal for driving the pixels 10 when reading out a signal. Note that, although FIG. 2 shows the pixel drive line 28 as a single line, the number of lines is not limited to one. One end of the pixel drive line 28 is connected to an output terminal of the vertical drive unit 22 corresponding to each row.
[0034] The vertical driving unit 22 is composed of a shift register, an address decoder, etc., and drives each pixel 10 of the pixel array unit 21 simultaneously for all pixels or in row units, etc. In other words, the vertical driving unit 22, together with a system control unit 25 that controls the vertical driving unit 22, constitutes a driving unit that controls the operation of each pixel 10 of the pixel array unit 21.
[0035] The detection signals output from each pixel 10 in the pixel row in response to drive control by the vertical drive unit 22 are input to the column processing unit 23 through vertical signal lines 29. The column processing unit 23 performs predetermined signal processing on the detection signals output from each pixel 10 through the vertical signal lines 29, and temporarily holds the detection signals after signal processing. Specifically, the column processing unit 23 performs noise removal processing, AD (Analog-to-Digital) conversion processing, and the like as signal processing.
[0036] The horizontal driving unit 24 is composed of a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 23. By selective scanning by the horizontal driving unit 24, detection signals that have been signal-processed for each unit circuit in the column processing unit 23 are sequentially output.
[0037] The system control unit 25 is composed of a timing generator that generates various timing signals, and controls the driving of the vertical driving unit 22, the column processing unit 23, the horizontal driving unit 24, etc. based on the various timing signals generated by the timing generator.
[0038] The signal processing unit has an arithmetic processing function, and performs various signal processing such as arithmetic processing based on the detection signal output from the column processing unit 23. The data storage unit 27 temporarily stores data necessary for the signal processing in the signal processing unit .
[0039] The light receiving element 1 configured as above includes distance information to an object as a depth value in a pixel value, and outputs the pixel value as a depth image. The light receiving element 1 can be mounted, for example, in a vehicle-mounted system that is mounted in a vehicle and measures the distance to an object outside the vehicle.
[0040] 3 is a diagram showing an example of a circuit configuration of the pixel 10. The pixel 10 includes a photodiode PD, transfer transistors TRG1 and TRG2, floating diffusion regions FD1 and FD2, additional capacitances FDL1 and FDL2, switching transistors FDG1 and FDG2, amplification transistors AMP1 and AMP2, reset transistors RST1 and RST2, selection transistors SEL1 and SEL2, and a charge discharging transistor OFG.
[0041] The photodiode PD is a photoelectric conversion element that generates an electric charge in response to received light.
[0042] The transfer transistors TRG1, TRG2, switching transistors FDG1, FDG2, amplification transistors AMP1, AMP2, selection transistors SEL1, SEL2, reset transistors RST1, RST2, and charge discharging transistor OFG are configured, for example, by N-type metal oxide semiconductor field effect transistors (MOSFETs).
[0043] The transfer transistor TRG1 becomes conductive when a transfer signal applied to the gate electrode TRG1g becomes active (e.g., high level), and transfers the charge stored in the photodiode PD to the floating diffusion region FD1. The transfer transistor TRG2 becomes conductive when a transfer signal applied to the gate electrode TRG2g becomes active, and transfers the charge stored in the photodiode PD to the floating diffusion region FD2.
[0044] The floating diffusion regions FD1 and FD2 are charge storage units capable of storing charges transferred from the photodiode PD.
[0045] The switching transistor FDG1 becomes conductive when the switching signal FDG1g becomes active, and connects the additional capacitance FDL1 to the floating diffusion region FD1. The switching transistor FDG2 becomes conductive when the switching signal FDG2g becomes active, and connects the additional capacitance FDL2 to the floating diffusion region FD2. The additional capacitances FDL1 and FDL2 may be composed of capacitive elements such as MoM (Metal-on-Metal), MIM (Metal-Insulator-Metal), or MOS capacitors. Note that the switching transistors FDG1 and FDG2 are conductive when accumulating charges due to incident light in the iToF, and are electrically connected to the floating diffusion regions FD1 and FD2, respectively. This allows the pixel 10 to suppress saturation of signal charges in the floating diffusion regions FD1 and FD2, and to accumulate charges.
[0046] The reset transistor RST1 becomes conductive when the reset drive signal RSTg becomes active, and resets the potential of the floating diffusion region FD1. The reset transistor RST2 becomes conductive when the reset drive signal RSTg becomes active, and resets the potential of the floating diffusion region FD2. When the reset transistors RST1 and RST2 are activated, the switching transistors FDG1 and FDG2 are also activated at the same time, and the additional capacitances FDL1 and FDL2 are also reset.
[0047] For example, in the case of accumulating charges due to incident light in iToF, the vertical drive unit 22 makes the switching transistors FDG1 and FDG2 conductive to connect the floating diffusion region FD1 to the additional capacitance FDL1 and also connect the floating diffusion region FD2 to the additional capacitance FDL2. This allows a large amount of charges to be accumulated.
[0048] On the other hand, when the quantum efficiency is to be increased, the vertical drive unit 22 may set the switching transistors FDG1 and FDG2 to a non-conductive state to separate the additional capacitances FDL1 and FDL2 from the floating diffusion regions FD1 and FD2, respectively. In this manner, by switching the switching transistors FDG1 and FDG2, the dynamic range of the light receiving element 1 can be increased.
[0049] The charge drain transistor OFG is turned on when the drain signal OFG1g becomes active, and drains the charge accumulated in the photodiode PD. The charge drain transistor OFG is used when the charge in the photodiode PD overflows due to strong incident light.
[0050] The source electrode of the amplifier transistor AMP1 is connected to the vertical signal line 29A via the selection transistor SEL1. As a result, the amplifier transistor AMP1 is connected to a constant current source (not shown) to form a source follower circuit. The source electrode of the amplifier transistor AMP2 is connected to the vertical signal line 29B via the selection transistor SEL2. As a result, the amplifier transistor AMP2 is connected to a constant current source (not shown) to form a source follower circuit.
[0051] The selection transistor SEL1 is connected between the source electrode of the amplification transistor AMP1 and the vertical signal line 29A. When the selection signal SEL1g is in an active state, the selection transistor SEL1 is turned on and outputs the detection signal VSL1 output from the amplification transistor AMP1 to the vertical signal line 29A.
[0052] The selection transistor SEL2 is connected between the source electrode of the amplification transistor AMP2 and the vertical signal line 29B. When the selection signal SEL2g is in an active state, the selection transistor SEL2 is turned on and outputs the detection signal VSL2 output from the amplification transistor AMP2 to the vertical signal line 29B.
[0053] The transfer transistors TRG1 and TRG2, the switching transistors FDG1 and FDG2, the amplification transistors AMP1 and AMP2, the selection transistors SEL1 and SEL2, and the charge discharging transistor OFG of the pixel 10 are controlled by a vertical drive section 22.
[0054] As described above, when charges due to incident light are stored in the iToF, the additional capacitances FDL1 and FDL2 are connected to the floating diffusion regions FD1 and FD2, respectively. Therefore, in the iToF pixel 10, the switching transistors FDG1 and FDG2 may be omitted.
[0055] Next, the operation of the pixel 10 will be briefly described.
[0056] First, before starting light reception, a reset operation is performed on all pixels to reset the charges in the pixels 10. That is, the charge drain transistor OFG, the reset transistors RST1 and RST2, and the switching transistors FDG1 and FDG2 are turned on, and the charges stored in the photodiode PD, the floating diffusion regions FD1 and FD2, and the additional capacitances FDL1 and FDL2 are drained.
[0057] After the accumulated charge is discharged, light reception begins.
[0058] During the light receiving period, the transfer transistors TRG1 and TRG2 are alternately driven. For example, during the first period, the transfer transistor TRG1 is in a conductive state (hereinafter, ON), and the transfer transistor TRG2 is in a non-conductive state (hereinafter, OFF). At this time, the charge generated in the photodiode PD is transferred to the floating diffusion region FD1 and the additional capacitance FDL1. During the second period following the first period, the transfer transistor TRG1 is turned OFF, and the transfer transistor TRG2 is turned ON. During the second period, the charge generated in the photodiode PD is transferred to the floating diffusion region FD2 and the additional capacitance FDL2. As a result, the charge generated in the photodiode PD is distributed and accumulated in the floating diffusion regions FD1 and FD2.
[0059] The first and second periods are alternately repeated periodically in synchronization with the light emitted from the light-emitting element 2. This allows the floating diffusion regions FD1, FD2 and the additional capacitances FDL1, FDL2 to accumulate charges according to the phase difference between the light emitted from the light-emitting element 2 and the reflected light received by the light-receiving element 1. The relationship between the phase difference and the charges accumulated in the floating diffusion regions FD1, FD2 and the additional capacitances FDL1, FDL2 will be described later.
[0060] Then, when the light receiving period ends, each pixel 10 in the pixel array section 21 is selected in sequence. In the selected pixel 10, the selection transistors SEL1 and SEL2 are turned on. As a result, the charges accumulated in the floating diffusion region FD1 and the additional capacitance FDL1 are output as a detection signal VSL1 to the column processing section 23 via the vertical signal line 29A. The charges accumulated in the floating diffusion region FD2 and the additional capacitance FDL2 are output as a detection signal VSL2 to the column processing section 23 via the vertical signal line 29B.
[0061] When one light receiving operation is completed in this manner, the next light receiving operation is executed, starting with a reset operation.
[0062] The reflected light received by pixel 10 is delayed from the timing of irradiation by the light source according to the distance to the object. A phase difference occurs between the irradiated light and the reflected light due to the delay time according to the distance to the object, and the distribution ratio of the charges stored in the additional capacitances FDL1 and FDL2 (or the floating diffusion regions FD1 and FD2) changes. Thus, by detecting the potentials of the floating diffusion regions FD1 and FD2, the phase difference between the irradiated light and the reflected light can be calculated, and the distance to the object can be obtained based on this phase difference.
[0063] Fig. 4 is a plan view showing an example of the arrangement of the pixel circuits shown in Fig. 3. The horizontal direction in Fig. 4 corresponds to the row direction (horizontal direction) in Fig. 2, and the vertical direction corresponds to the column direction (vertical direction) in Fig. 2.
[0064] 4, an N+ type impurity layer 52 is provided in an N type semiconductor layer 51. A photodiode PD is provided in the impurity layer 52. When viewed from above the surface of the semiconductor layer 51, the impurity layer 52 and the photodiode PD have a substantially rectangular shape, and the photodiode PD is provided inside the impurity layer 52.
[0065] Outside the impurity layer 52, along a predetermined one of the four sides of the rectangular pixel 10, the transfer transistor TRG1, the switching transistor FDG1, the reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1 are linearly arranged. Along the other one of the four sides of the rectangular pixel 10, the transfer transistor TRG2, the switching transistor FDG2, the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are linearly arranged. Furthermore, the charge discharge transistor OFG is arranged on a side other than the two sides of the pixel 10 on which the transfer transistors TRG1, TRG2, etc. are provided. For example, the charge discharge transistor OFG is arranged on a side opposite to the side of the pixel 10 on which the transfer transistors TRG1, FDG1, RST1, AMP1, and SEL1 are provided. The arrangement of the pixel circuit shown in FIG. 4 is not limited to this example, and other arrangements may be used.
[0066] Fig. 5 is a cross-sectional view showing an example of the configuration of a pixel 10 according to the first embodiment. Although one pixel 10 is shown in Fig. 5, a plurality of pixels 10 are arranged in parallel in a two-dimensional manner in the pixel array section 21.
[0067] The pixel 10 includes a semiconductor layer 51, an on-chip lens 47, an anti-reflection film 43, a light-shielding film 45, an inter-pixel isolation portion 61, an impurity layer 52, floating diffusion regions FD1, FD2, a photodiode PD, transfer transistors TRG1, TRG2, vias V1 to V4, Vbias, wirings M1 to M4, Mbias, and additional capacitances FDL1, FDL2.
[0068] The semiconductor layer 51 is made of, for example, silicon and has a thickness of, for example, 1 μm to 6 μm. The semiconductor layer 51 is, for example, an N-type semiconductor layer. The semiconductor layer 51 has a front surface F1 as a first surface and a back surface F2 as a second surface opposite to the front surface F1. A multilayer wiring structure including wirings M1 to M4 and Mbias is provided on the front surface F1 side. An on-chip lens 47 for receiving light is provided on the back surface F2 side. Therefore, the light receiving element 1 according to the present disclosure is a back-illuminated element, and receives light on the back surface F2 opposite to the front surface F1 on which the wirings M1 to M4 and Mbias are provided. The back surface F2 of the semiconductor layer 51 is the light incident surface.
[0069] An anti-reflection film 43 is provided on the rear surface F2 of the semiconductor layer 51. The anti-reflection film 43 may have a laminated structure in which a fixed charge film and an oxide film are laminated. For example, the anti-reflection film 43 may be a high dielectric constant (High-k) insulating film formed by an ALD (Atomic Layer Deposition) method. More specifically, the anti-reflection film 43 may be formed of, for example, hafnium oxide (HfO2), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta 2 O 5 ), STO (Strontium Titanium Oxide), or other metal oxide films can be used.
[0070] A light-shielding film 45 is provided in an area other than the anti-reflection film 43 on the back surface F2 of the semiconductor layer 51. The light-shielding film 45 is provided adjacent to the periphery of the anti-reflection film 43 and suppresses the entry of incident light from areas other than the anti-reflection film 43. That is, the light-shielding film 45 defines an opening OP that passes incident light from the on-chip lens 47 to the semiconductor layer 51. The light-shielding film 45 is made of a light-shielding material and may be made of a metal material such as tungsten (W), aluminum (Al), or copper (Cu).
[0071] The inter-pixel isolation 61 is provided at the boundary between adjacent pixels 10 in the semiconductor layer 51, and isolates the adjacent pixels 10. The inter-pixel isolation 61 prevents incident light from leaking to adjacent pixels (i.e., crosstalk). The inter-pixel isolation 61 is also made of a light-shielding material, and may be made of a metal material such as tungsten (W), aluminum (Al), or copper (Cu). Although not shown, the bottom and side surfaces of the inter-pixel isolation 61 may be covered with a material that reflects light. This increases the amount of light incident on the photodiode PD, improving the quantum efficiency of the pixel 10.
[0072] A planarization film 46 is provided on the antireflection film 43 and the light-shielding film 45. The planarization film 46 is made of, for example, an insulating film such as silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON), or an organic material such as a resin.
[0073] An on-chip lens 47 is provided on the planarization film 46 for each pixel 10. The on-chip lens 47 is provided on the back surface F2 of the semiconductor layer 51, and is made of a resin material such as a styrene resin, an acrylic resin, a styrene-acrylic copolymer resin, or a siloxane resin. The light collected by the on-chip lens 47 is incident on the photodiode PD via the antireflection film 43 and the semiconductor layer 51.
[0074] On the other hand, a photodiode PD is provided on the front surface F1 side of the semiconductor layer 51 as an example of a photoelectric conversion unit. The photodiode PD is provided on the front surface F1 of the semiconductor layer 51 so as to be in contact with the semiconductor layer 51, and is made of a material different from the semiconductor layer 51. A material having a higher quantum efficiency (photoelectric conversion efficiency) than silicon is used for the photodiode PD, such as germanium, InGaAs, CIGS (Copper Indium Gallium Di Selenide), or Qdot (Quantum dot). The photodiode PD generates a charge according to the amount of light received. Furthermore, the photodiode PD protrudes and bites into the semiconductor layer 51 or the impurity layer 52 from the front surface F1 toward the back surface F2 to some extent. This shortens the path from the photodiode PD to the floating diffusion regions FD1 and FD2 via the transfer transistors TRG1 and TRG2, improving the charge transfer efficiency and transfer speed.
[0075] The photodiode PD is connected to a wiring Mbias through a via Vbias as a first wiring. The wiring Mbias is provided on the front surface F1 side and is electrically connected to the photodiode PD in order to apply a predetermined bias voltage to the photodiode PD. For example, by applying a positive voltage (e.g., about +0.5 V) to the wiring Mbias, charges (e.g., electrons) photoelectrically converted by the photodiode PD are easily taken into the impurity layer 52.
[0076] 4 and 5, when viewed from above the back surface F2 of the semiconductor layer 51, the photodiode PD has an area smaller than that of the opening OP and the impurity layer 52. This reduces the contact area between the photodiode PD and the semiconductor layer 51, and as will be described later, can reduce the dark current.
[0077] The impurity layer 52 is provided on the surface F1 side in the semiconductor layer 51 and is in contact with the photodiode PD. The impurity layer 52 is, for example, an N-type impurity layer having a higher impurity concentration than the semiconductor layer 51, and captures charges photoelectrically converted by the photodiode PD.
[0078] Floating diffusion regions FD1 and FD2, which are examples of first and second charge accumulation portions, are provided on both sides of the impurity layer 52. The floating diffusion regions FD1 and FD2 are provided in the semiconductor layer 51 on the front surface F1 side, and temporarily hold or accumulate the charge transferred from the photodiode PD. The floating diffusion regions FD1 and FD2 are, for example, N-type impurity layers, and contain a high concentration of impurities higher than that of the semiconductor layer 51.
[0079] As an example of a first voltage application unit, a gate electrode TRG1g of a transfer transistor TRG1 is provided on a surface F1 between the floating diffusion region FD1 and the photodiode PD or the impurity layer 52. The gate electrode TRG1g is provided on the surface F1 via a gate insulating film and is electrically insulated from the semiconductor layer 51. The gate electrode TRG1g can apply a voltage to the semiconductor layer 51 between the floating diffusion region FD1 and the photodiode PD or the impurity layer 52 to bring the transfer transistor TRG1 into a conductive state or a non-conductive state. For example, a conductive material such as a metal or polysilicon doped with an impurity that serves as an acceptor or donor is used for the gate electrode TRG1g.
[0080] As an example of a second voltage application unit, a gate electrode TRG2g of the transfer transistor TRG2 is provided on the surface F1 between the floating diffusion region FD2 and the photodiode PD or the impurity layer 52. The gate electrode TRG2g is provided on the surface F1 via a gate insulating film and is electrically insulated from the semiconductor layer 51. The gate electrode TRG2g can apply a voltage to the semiconductor layer 51 between the floating diffusion region FD2 and the photodiode PD or the impurity layer 52 to bring the transfer transistor TRG2 into a conductive state or a non-conductive state. For example, a conductive material such as a metal or doped polysilicon is used for the gate electrode TRG2g.
[0081] The gate electrode TRG1g, the impurity layer 52, and the floating diffusion region FD1 configure a transfer transistor TRG1, which can transfer charges from the impurity layer 52 to the floating diffusion region FD1 by a gate voltage applied to the gate electrode TRG1g.
[0082] The gate electrode TRG2g, the impurity layer 52, and the floating diffusion region FD2 configure a transfer transistor TRG2, which can transfer charges from the impurity layer 52 to the floating diffusion region FD2 by a gate voltage applied to the gate electrode TRG2g.
[0083] The charges transferred to the floating diffusion regions FD1 and FD2 are stored in the floating diffusion region FD1 and the additional capacitance FDL1 in FIG. 3 or in the floating diffusion region FD2 and the additional capacitance FDL2 in FIG.
[0084] The gate electrode TRG1g is electrically connected to the wiring M41 as the second wiring through the vias V11, V21, V31, V41 and the wirings M11, M21, M31. That is, the wiring M41 is provided on the front surface F1 side and is connected to the gate electrode TRG1g. The gate electrode TRG2g is electrically connected to the wiring M42 as the third wiring through the vias V12, V22, V32, V42 and the wirings M12, M22, M32. That is, the wiring M42 is provided on the front surface F1 side and is connected to the gate electrode TRG2g. The vertical driving unit 22 of FIG. 2 is connected to the wirings M41, M42 and controls the potentials of the gate electrodes TRG1g, TRG2g through the wirings M41, M42. This allows the vertical driving unit 22 to drive the transfer transistors TRG1, TRG2. For example, a conductive metal such as copper is used for the wirings M11 to M42, Mbias, the vias V11 to V42, and Vbias. In FIG. 5, the wirings M11 to M42 have a four-layer structure, but the number of wiring layers is not limited, and may be more or less than four.
[0085] The wirings M11, M12, and Mbias are formed in the same wiring layer, and the wirings M21 and M22 are formed in the same wiring layer. The wirings M31 and M32 are formed in the same wiring layer, and the wirings M41 and M42 are formed in the same wiring layer. The wirings M11 and M12 are electrically connected to the gate electrodes TRG1g and TRG2g of the transfer transistors TRG1 and TRG2, respectively, through the vias V11 and V12.
[0086] The additional capacitances FDL1 and FDL2 may be, for example, MoM, MIM, or MOS capacitors formed of wiring in the same layer as the wirings M21 and M22 or wirings M31 and 32. Although not shown here, the additional capacitances FDL1 and FDL2 are electrically connected to the floating diffusion regions FD1 and FD2, respectively, and can accumulate charges together with the floating diffusion regions FD1 and FD2. In addition, the additional capacitances FDL1 and FDL2 overlap with the photodiode PD in a plan view from the front surface F1 side. This allows the layout area of the pixel 10 to be reduced. Of course, the additional capacitances FDL1 and FDL2 may be formed of a conductive layer different from that of the wirings M21 and M22 and wirings M31 and 32.
[0087] The interlayer insulating film 62 is provided on the surface F1 of the semiconductor layer 51, and covers the wirings M11 to M42, Mbias, the vias V11 to V42, Vbias, etc. The interlayer insulating film 62 includes, for example, an insulating film such as a silicon oxide film.
[0088] Next, the operation of the distance measuring device 100 will be described.
[0089] 6 is a timing diagram showing an example of the operation of the distance measuring device according to the first embodiment. The horizontal axis indicates time. The vertical axis indicates the signal level (intensity) of the irradiated light, the signal level (intensity) of the reflected light, and the gate signal S TRG1 , S TRG2 , and the amount of charge Q stored in the floating diffusion regions FD1 and FD2 or the additional capacitances FDL1 and FLD2 FD1 , Q FD2 The gate signal S TRG1 , S TRG2are signals applied to the gate electrodes TRG1g and TRG2g shown in FIG. 3 and FIG. 5, respectively.
[0090] First, the light receiving element 1 is in a reset state. The light emitting element 2 emits irradiation light. The frequency of the irradiation light is Fmod. The irradiation light is reflected by the object M and received by the light receiving element 1. The frequency of the reflected light is the same as that of the irradiation light, and remains Fmod. Meanwhile, the time Δt that it takes for the irradiation light to be emitted and reflected by the object M and returned as reflected light is the delay time (ToF) of the reflected light relative to the irradiation light. If the delay time Δt is known, the distance from the distance measuring device 100 to the object M can be calculated based on the speed of light c. However, since a phase difference occurs between the irradiation light and the reflected light according to the delay time Δt (t1 to t2), in iToF, the distance (depth information) D from the distance measuring device 100 to the object M is calculated using the phase difference α between the irradiation light and the reflected light.
[0091] The distance D is expressed by Equation 1. D=(c×Δt) / 2=(c×α) / (4π×Fmod) (Equation 1) If the phase difference α is known, the distance D can be calculated using Equation 1.
[0092] The phase difference α is expressed by the following equation 2. α = arctan((Q 90 -Q 270 ) / (Q 0 -Q 180 )) (Formula 2) Q θ (θ=0, 90, 180, 270) is the gate signal S TRG1 , S TRG2 This indicates the difference (potential difference) in the amount of charge stored in the floating diffusion regions FD1 and FD2 or the additional capacitances FDL1 and FDL2 when the phase of the gate signal S TRG1 , S TRG2A phase difference α is calculated using four pieces of image data obtained when the phase of the light beam is shifted by a predetermined value (for example, 0 degrees, 90 degrees, 180 degrees, and 270 degrees). Then, the phase difference α is used to calculate the distance D. This calculation may be performed by the signal processing unit 26 in FIG. 2.
[0093] Referring to Figure 6, θ The calculation of is explained below.
[0094] The gate electrodes TRG1g and TRG2g of the transfer transistors TRG1 and TRG2 are supplied with a gate signal S TRG1 , S TRG2 is applied. Gate signal S TRG1 , S TRG2 is a pulse signal with the same frequency Fmod as the irradiated light. The gate signal S TRG1 and the gate signal S TRG2 are opposite-phase signals shifted by 180 degrees from each other, and are set to be shifted by a predetermined phase θ (any of 0 degrees, 90 degrees, 180 degrees, and 270 degrees) from the irradiated light. For example, in FIG. 6, the gate signal S TRG1 The phase of the gate signal S is set to be shifted by 90 degrees (θ=90) from the phase of the irradiated light. TRG2 is the gate signal S TRG1 Since it is the inverse phase signal of the gate signal S TRG2 The phase of the gate signal S TRG1 The phases of both are shifted.
[0095] Gate signal S TRG1 , S TRG2 Since the gate signals S and S are opposite in phase to each other, the transfer transistors TRG1 and TRG2 in FIG. 3 and FIG. 5 are alternately turned on. For example, during t0 to t3, the gate signals S TRG1 Since the gate signal S TRG2is at a low level, the transfer transistor TRG2 is in a non-conductive state. At this time, the charge qa generated in the photodiode PD is transferred to the floating diffusion region FD1 and the additional capacitance FDL1 via the transfer transistor TRG1. On the other hand, the charge qa is not transferred to the floating diffusion region FD2 and the additional capacitance FDL2. The amount of charge in the floating diffusion region FD1 and the additional capacitance FDL1 is Q FD1 Then, the charge Q FD1 changes (decreases) by the amount of charge qa. On the other hand, the charge is not transferred to the floating diffusion region FD2 and the additional capacitance FDL2. Therefore, the charge amount of the floating diffusion region FD2 and the additional capacitance FDL2 is Q FD2 Then, the charge Q FD2 does not change.
[0096] Next, during t3 to t4, the gate signal S TRG2 becomes high level, and the transfer transistor TRG2 becomes conductive. On the other hand, the gate signal S TRG1 becomes low level, and the transfer transistor TRG1 becomes non-conductive. At this time, the charge qb generated in the photodiode PD is transferred to the floating diffusion region FD2 and the additional capacitance FDL2 via the transfer transistor TRG2. On the other hand, the charge qb is not transferred to the floating diffusion region FD1 and the additional capacitance FDL1. Therefore, the charge amount Q FD2 changes (decreases) by the charge amount qb. On the other hand, the charge is not transferred to the floating diffusion region FD1 and the additional capacitance FDL1. Therefore, the charge amount Q FD1 does not change.
[0097] The operation of the light receiving element 1 from t4 to t5 and t6 to t7 is the same as the operation of the light receiving element 1 from t0 to t3. Moreover, the operation of the light receiving element 1 from t5 to t6 and t7 to t8 is the same as the operation of the light receiving element 1 from t3 to t4. In this way, the transfer transistors TRG1 and TRG2 alternate between a conductive state and a non-conductive state and periodically repeat them. As a result, the charge qa generated in the photodiode PD is gradually accumulated (integrated) in the floating diffusion region FD1 and the additional capacitance FDL1, and the charge qb generated in the photodiode PD is gradually accumulated (integrated) in the floating diffusion region FD2 and the additional capacitance FDL2. By distributing the charges qa and qb generated in the photodiode PD based on the frequency Fmod of the irradiated light and the reflected light, the charge amount difference Q according to the phase difference α of the reflected light relative to the irradiated light is 90 The charge difference Q 90 When becomes sufficiently large, the light receiving element 1 outputs the potentials of the floating diffusion regions FD1 and FD2 via the vertical signal lines 29A and 29B in FIG.
[0098] The above light reception process is performed for each of θ=0, 90, 180, and 270, and the charge difference Q 0 , Q 90 , Q 180 , Q 270 This detects the gate signal S TRG1 , S TRG2 Four image data obtained by shifting the phase of 0 , Q 90 , Q 180 , Q 270 The signal processor 26 converts these four image data (Q 0 , Q 90 , Q 180 , Q 270 ) to calculate the phase difference α from Equation 2. Furthermore, the signal processing unit 26 calculates the distance D from Equation 1 using the phase difference α.
[0099] In this manner, the distance measuring device 100 according to the present disclosure obtains the distance D (depth information) using the iToF method.
[0100] As described above, the light receiving element 1 according to this embodiment has a back-illuminated structure in which the wiring structure is on the front surface F1 of the semiconductor layer 51 and the on-chip lens 47 is on the back surface F2. Therefore, the incident light is not blocked by the wirings M11 to M42, Mbias, etc., and reaches the photodiode PD without being significantly attenuated through the highly transmittant on-chip lens 47 and the semiconductor layer 51. This increases the amount of light photoelectrically converted in the semiconductor layer 51, thereby improving the quantum efficiency (Qe), i.e., the sensitivity of the pixel 10.
[0101] According to this embodiment, the photodiode PD is not formed of an impurity diffusion layer in the semiconductor layer 51 (for example, a silicon substrate), but is formed of a material different from the semiconductor layer 51 that is in contact with the back surface F2 of the semiconductor layer 51. By using a material (for example, germanium, InGaAs, CIGS, or Qdot) having a higher quantum efficiency (photoelectric conversion efficiency) than silicon as the photodiode PD, the contact area between the photodiode PD and the semiconductor layer 51 can be reduced. For example, as shown in FIG. 4, when viewed from above the back surface F2 of the semiconductor layer 51, the area of the photodiode PD is smaller than the area of the opening OP or the area of the impurity layer 52. In this case, the contact area between the photodiode PD and the semiconductor layer 51 is an overlapping region between the photodiode PD and the opening OP or the impurity layer 52, and depends on the area of the photodiode PD. Therefore, by reducing the layout area of the photodiode PD, the contact area between the photodiode PD and the semiconductor layer 51 is also reduced. This reduces the layout area of each pixel 10, leading to a miniaturization of the light receiving element 1. In addition, the interface between the photodiode PD and the semiconductor layer 51 can cause a dark current due to the difference in lattice constant between the materials. However, the dark current can be reduced by reducing the contact area between the photodiode PD and the semiconductor layer 51.
[0102] In addition, since the photodiode PD is provided separately from the semiconductor layer 51, there is no need to thicken the semiconductor layer 51 in consideration of improving quantum efficiency. Since the semiconductor layer 51 can be made thin, there is no need to form the inter-pixel isolation portion 61 deep, making it easier to form the inter-pixel isolation portion 61. Furthermore, even if the inter-pixel isolation portion 61 is relatively shallow, it is possible to efficiently suppress leakage of incident light to adjacent pixels and effectively suppress crosstalk. This can improve the SNR and improve the resolution.
[0103] In addition, a bias voltage is applied to the photodiode PD through the wiring Mbias and the via Vbias. As a result, the charge photoelectrically converted in the photodiode PD is easily taken into the impurity layer 52 and quickly transferred to the floating diffusion regions FD1 and FD2 through the transfer transistors TRG1 and TRG2. That is, according to this embodiment, the transfer speed of the charge from the photodiode PD to the floating diffusion regions FD1 and FD2 can be increased.
[0104] Second embodiment FIG. 7 is a cross-sectional view showing a configuration example of a pixel 10 according to the second embodiment. The pixel 10 according to the second embodiment further includes a metal layer 65. The metal layer 65 is made of a metal material that is conductive and reflects light, such as tungsten (W), aluminum (Al), or copper (Cu). The metal layer 65 covers the periphery of the photodiode PD except for the contact portion between the photodiode PD and the semiconductor layer 51. That is, the metal layer 65 covers the bottom surface and the four side surfaces of the photodiode PD except for the top surface, and has a rectangular container shape. The metal layer 65 is also provided between the photodiode PD and the via Vbias or the wiring Mbias, and also functions as an electrode that electrically connects the photodiode PD and the wiring Mbias.
[0105] The metal layer 65 reflects the light incident on the photodiode PD within the photodiode PD, making the optical path within the photodiode PD as long as possible. This makes it possible to increase the quantum efficiency of the photodiode PD. That is, the metal layer 65 has a light trapping effect within the photodiode PD, and can increase the quantum efficiency (sensitivity).
[0106] The metal layer 65 also functions as an electrode for the photodiode PD. Therefore, the bias voltage from the wiring Mbias is applied to the photodiode PD from the entire bottom and side surfaces of the photodiode PD via the metal layer 65. This allows the charge of the photodiode PD to be more easily taken into the impurity layer 52, and the charge transfer speed is further increased.
[0107] Other configurations of the second embodiment may be similar to the corresponding configurations of the first embodiment. Therefore, the second embodiment further includes the configurations of the first embodiment.
[0108] Third embodiment 8 is a cross-sectional view showing a configuration example of a pixel 10 according to the third embodiment. The pixel 10 according to the third embodiment has a protrusion 65a protruding toward the photodiode PD on the inner bottom surface of a metal layer 65. The protrusion 65a is made of the same material as the metal layer 65. The protrusion 65a may be formed integrally with the metal layer 65.
[0109] The protrusion 65a can further diffusely reflect the light incident on the photodiode PD within the photodiode PD, and can further lengthen the optical path within the photodiode PD. This can further increase the quantum efficiency of the photodiode PD. In other words, the protrusion 65a can further improve the light confinement effect of the metal layer 65 within the photodiode PD, and can increase the sensitivity.
[0110] In the third embodiment, the protrusion 65a is provided on the inner bottom surface of the metal layer 65, but the same effect can be obtained even if a recess (not shown) is provided on the inner bottom surface of the metal layer 65. That is, on the inner bottom surface of the metal layer 65, the unevenness protruding or recessed toward the photodiode PD may be provided regularly or irregularly. Moreover, the unevenness protruding or recessed toward the photodiode PD may be provided not only on the bottom surface of the metal layer 65 but also on the inner side surface.
[0111] (Fourth embodiment) 9 is a cross-sectional view showing a configuration example of a pixel 10 according to the fourth embodiment. According to the fourth embodiment, the gate electrodes TGR1g and TGR2g are embedded in the semiconductor layer 51 from the surface F1 to form a vertical gate structure. This allows the transfer transistors TRG1 and TRG2 to be in a conductive state even at a low gate voltage, and the charge transfer speed can be further increased.
[0112] In addition, since the gate electrodes TGR1g and TGR2g are provided between the impurity layer 52 or the photodiode PD and the floating diffusion regions FD1 and FD2, it is possible to prevent the incident light from directly entering the floating diffusion regions FD1 and FD2, thereby reducing the PLS (Parasitic Light Sensitivity).
[0113] Fifth embodiment FIG. 10 is a cross-sectional view showing a configuration example of a pixel 10 according to the fifth embodiment. The pixel 10 according to the fifth embodiment further includes a mixed layer 66 provided between the photodiode PD and the semiconductor layer 51, in which the material of the photodiode PD and the material of the semiconductor layer 51 are mixed. For example, when the semiconductor layer 51 is made of silicon and the photodiode PD is made of germanium, the mixed layer 66 is a SiGe layer. In this way, even if the mixed layer 66 is provided between the photodiode PD and the semiconductor layer 51, the effect of the present disclosure is not lost. According to the fifth embodiment, when a SiGe layer is provided as the mixed layer 66, there is an effect that the band gap between the photodiode PD and the semiconductor layer 51 can be continuously changed by controlling the addition ratio of germanium (Ge).
[0114] Sixth embodiment 11 is a cross-sectional view showing a configuration example of a pixel 10 according to the sixth embodiment. In the pixel 10 according to the sixth embodiment, the upper part of the photodiode PD is embedded in the impurity layer 52 from the surface F1 of the semiconductor layer 51. Since the upper part of the photodiode PD is embedded in the impurity layer 52, charges are easily taken from the photodiode PD into the impurity layer 52. This further increases the charge transfer speed.
[0115] Seventh embodiment FIG. 12 is a cross-sectional view showing a configuration example of a pixel 10 according to the seventh embodiment. The pixel 10 according to the seventh embodiment includes a high-concentration impurity layer 67 provided in the photodiode PD. The high-concentration impurity layer 67 is provided in a region between the wiring Mbias, the via Vbias, or the metal layer 65 and the photodiode PD, and contains impurities at a higher concentration than the photodiode PD. The high-concentration impurity layer 67 may be a portion of the photodiode PD that contacts the wiring Mbias, the via Vbias, or the metal layer 65 (for example, a contact portion of the via Vbias). The impurity contained in the high-concentration impurity layer 67 may be a high-concentration P-type impurity (for example, boron, etc.). The high-concentration impurity layer 67 reduces the contact resistance between the wiring Mbias and the photodiode PD, and further increases the charge transfer speed.
[0116] Eighth embodiment 13 is a cross-sectional view showing a configuration example of the light receiving element 1 according to the eighth embodiment. The light receiving element 1 according to the eighth embodiment includes a semiconductor chip of the pixel 10 and a semiconductor chip 20 of other peripheral circuits. The semiconductor chip 20 may be, for example, a controller of the pixel 10, and has a CMOS (Complementary Metal Oxide Semiconductor) logic circuit or the like provided on a semiconductor substrate. The semiconductor chip of the pixel 10 and the semiconductor chip 20 are directly bonded (Cu-Cu bonded) with their wirings to function as one device (module). In this way, the light receiving element 1 may be a module in which a plurality of semiconductor chips are stacked.
[0117] Although not shown, in the above embodiment, a gate electrode TGR1g is disclosed as an example of the first voltage application unit. However, the first voltage application unit may be a first impurity layer (not shown) adjacent to the floating diffusion region FD1 on the surface F1 and having an opposite conductivity type to the floating diffusion region FD1. A gate electrode TGR2g is disclosed as an example of the second voltage application unit. However, the second voltage application unit may be a second impurity layer (not shown) adjacent to the floating diffusion region FD2 on the surface F1 and having an opposite conductivity type to the floating diffusion region FD2. In this case, a second wiring (for example, wiring M41) provided on the first surface side is electrically connected to the first impurity layer as the first voltage application unit. A third wiring (for example, wiring M42) provided on the first surface side is connected to the second impurity layer as the second voltage application unit. By periodically switching the direction of the current flowing through the first and second impurity layers, it is possible to distribute electric charges to the floating diffusion regions FD1 and FD2. This allows the distance measuring device 100 to measure the distance D by the iToF method, similarly to the above embodiment.
[0118] Ninth embodiment FIG. 14 is a cross-sectional view showing a configuration example of a pixel 10 according to the ninth embodiment. The pixel 10 according to the ninth embodiment further includes a waveguide 55 in the semiconductor layer 51. The waveguide 55 extends from the back surface F2 of the semiconductor layer 51 toward the photodiode PD on the front surface F1 side so as to become gradually thinner. The waveguide 55 is provided up to the vicinity of the surface of the impurity layer 52, but does not reach the photodiode PD. That is, the impurity layer 52 exists between the waveguide 55 and the photodiode PD for charge transfer. The waveguide 55 is made of a material different from that of the semiconductor layer 51. For the waveguide 55, a resin material such as a styrene resin, an acrylic resin, a styrene-acrylic copolymer resin, or a siloxane resin is used, as in the on-chip lens 47. In addition, the waveguide 55 is made of a low refractive index material such as SiO 2 , MgF, SiOC, etc., and high refractive index materials such as a-Si, PolySi, SiN, Ta 2 O 5 , Al 2 O 3 , TiO 2 , HfO 2 , Nb 2 O 25 etc. are also acceptable.
[0119] The waveguide 55 reflects at least a portion of the incident light at the interface with the semiconductor layer 51, and guides the incident light to the photodiode PD.
[0120] The waveguide 55 has an area equal to or greater than the opening OP on the back surface F2 side of the semiconductor layer 51, and an area equal to or less than the photodiode PD on the front surface F1 side. That is, the waveguide 55 is formed so as to become gradually thinner from the back surface F2 to the front surface F1, and has a tapered shape on the side surface between the front surface F1 and the back surface F2. This allows the waveguide 55 to guide incident light from the relatively large opening OP to the smaller photodiode PD.
[0121] The waveguide 55 guides the incident light to the photodiode PD, thereby increasing the quantum efficiency of the photodiode PD. Furthermore, in the ninth embodiment, a metal layer 65 is provided on the bottom and side surfaces of the photodiode PD. Therefore, the quantum efficiency of the light receiving element 1 can be dramatically increased by the synergistic effect of the waveguide 55 and the metal layer 65. Furthermore, since the waveguide 55 guides the incident light, the photodiode PD can receive a large amount of incident light even if the layout area on the surface F1 of the photodiode PD is reduced. Therefore, since the waveguide 55 is provided, the photodiode PD can maintain high quantum efficiency and quantum efficiency even if the layout area is reduced. If the layout area of the photodiode PD is small, the contact area between the photodiode PD and the semiconductor layer 51 is also small, so that the dark current can also be suppressed. That is, the pixel 10 according to the ninth embodiment can suppress the dark current while maintaining the quantum efficiency of the photodiode PD, thereby achieving both high sensitivity and high resolution.
[0122] The refractive index of the waveguide 55 is preferably higher than the refractive index of the semiconductor layer 51. In this case, the incident light in the waveguide 55 can be totally reflected at the interface between the waveguide 55 and the semiconductor layer 51. The taper angle θt of the side surface of the waveguide 55 is preferably smaller than the critical angle of the interface between the waveguide 55 and the semiconductor layer 51. This is because the light incident perpendicularly to the back surface F2 can be easily totally reflected at the interface between the waveguide 55 and the semiconductor layer 51.
[0123] Furthermore, when the refractive index of the waveguide 55 is equal to or lower than the refractive index of the semiconductor layer 51, the metal film 56 may be provided on the side surface of the waveguide 55. FIG. 15 is a cross-sectional view of the light-receiving element 1 having the metal film 56 on the side surface of the waveguide 55. The metal film 56 may be made of a metal material that reflects light, such as tungsten (W), aluminum (Al) or copper (Cu). Even if the waveguide 55 has a low refractive index, the metal film 56 reflects the incident light in the waveguide 55, so that the waveguide 55 can guide the incident light to the photodiode PD.
[0124] When the antireflection film 43 is not provided, it is preferable that the refractive index of the waveguide 55 is lower than the refractive indexes of the on-chip lens 47 and the planarization film 46. This allows incident light to be incident on the waveguide 55 without being reflected at the interface between the on-chip lens 47 or the planarization film 46 and the waveguide 55.
[0125] At least two of the first to ninth embodiments may be combined with each other.
[0126] Next, a specific example of a planar layout of the pixel 10 according to the present disclosure will be described.
[0127] Fig. 16 is a plan view showing an example of the layout of a pixel 10 according to the present disclosure. In Fig. 16, one photodiode PD is provided in the center of the impurity layer 52. A via Vbias is provided in the center of the photodiode PD.
[0128] Fig. 17 is a plan view showing another example of the layout of the pixel 10 according to the present disclosure. In Fig. 17, a plurality of photodiodes PD are provided in a divided manner in the center of the impurity layer 52. A via Vbias is provided in the center of each photodiode PD. Therefore, the same number of vias Vbias as the number of photodiodes PD are provided. In Fig. 17, the photodiode PD is divided into four, but it may be divided into three or less, or five or more.
[0129] The width of the slit between the photodiodes PD is preferably narrower than the wavelength of the irradiated light, which is expected to provide a resonance effect and promote photoelectric conversion by optimizing the slit width for the wavelength.
[0130] <Examples of electronic device configurations> The light receiving element 1 can be applied to a distance measuring device, and can also be applied to various electronic devices such as imaging devices including a distance measuring function, such as digital still cameras and digital video cameras, and smartphones including a distance measuring function.
[0131] FIG. 18 is a block diagram showing a configuration example of a smartphone as an electronic device to which the present technology is applied.
[0132] 18, the smartphone 601 includes a distance measuring module 602, an imaging device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a control unit 610, which are connected via a bus 611. In addition, the control unit 610 has functions as an application processing unit 621 and an operation system processing unit 622 by the CPU executing a program.
[0133] The distance measuring device 100 may be applied to the distance measuring module 602. For example, the distance measuring module 602 is disposed on the front surface of a smartphone 601, and can measure distance to a user of the smartphone 601, thereby outputting depth values of the surface shapes of the user's face, hands, fingers, and the like as distance measurement results.
[0134] The imaging device 603 is disposed on the front side of the smartphone 601, and captures an image of the user of the smartphone 601 as a subject, thereby obtaining an image of the user. Although not shown, the imaging device 603 may also be disposed on the back side of the smartphone 601.
[0135] The display 604 displays an operation screen for performing processing by the application processing unit 621 and the operation system processing unit 622, images captured by the imaging device 603, etc. The speaker 605 and the microphone 606 output the voice of the other party and pick up the voice of the user, for example, when making a call using the smartphone 601.
[0136] The communication module 607 performs network communication via a communication network such as the Internet, a public telephone line network, a wide area communication network for wireless mobile devices such as a so-called 4G line or 5G line, a wide area network (WAN) or a local area network (LAN), and short-range wireless communication such as Bluetooth (registered trademark) or near field communication (NFC). The sensor unit 608 senses speed, acceleration, proximity, etc., and the touch panel 609 acquires a touch operation by a user on an operation screen displayed on the display 604.
[0137] The application processing unit 621 performs processing for providing various services by the smartphone 601. For example, the application processing unit 621 can perform processing for creating a computer-graphics-based face that virtually reproduces the user's facial expression based on the depth value supplied from the distance measurement module 602, and displaying the face on the display 604. In addition, the application processing unit 621 can perform processing for creating, for example, three-dimensional shape data of any stereoscopic object based on the depth value supplied from the distance measurement module 602.
[0138] The operation system processing unit 622 performs processing for realizing basic functions and operations of the smartphone 601. For example, the operation system processing unit 622 can perform processing for authenticating the face of the user and unlocking the smartphone 601 based on the depth value supplied from the distance measurement module 602. In addition, the operation system processing unit 622 can perform processing for recognizing, for example, a gesture of the user based on the depth value supplied from the distance measurement module 602 and inputting various operations according to the gesture.
[0139] In the smartphone 601 configured in this manner, by applying the above-mentioned ranging device 100 as a ranging module 602, it is possible to perform processes such as measuring and displaying the distance to a specified object, and creating and displaying three-dimensional shape data of the specified object.
[0140] <Applications to moving objects> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.
[0141] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.
[0142] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053 are illustrated.
[0143] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.
[0144] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.
[0145] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 includes the distance measuring device 100, and may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface based on the received image.
[0146] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.
[0147] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.
[0148] The microcomputer 12051 can calculate control target values for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating a vehicle collision, following a vehicle based on the distance between vehicles, maintaining vehicle speed, warning a vehicle collision, or warning a vehicle from leaving a lane.
[0149] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.
[0150] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.
[0151] The audio / image output unit 12052 transmits at least one output signal of audio and image to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 19, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.
[0152] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.
[0153] In FIG. 20, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.
[0154] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The images of the front acquired by the imaging units 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
[0155] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.
[0156] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.
[0157] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.
[0158] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.
[0159] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.
[0160] The embodiments according to the present technology are not limited to the above-described embodiments, and various modifications are possible without departing from the spirit and scope of the present technology. (1) a semiconductor layer having a first surface and a second surface opposite the first surface; A lens provided on the second surface side; first and second charge accumulation units provided in the semiconductor layer on the first surface side; a photoelectric conversion portion in contact with the semiconductor layer on the first surface side and made of a material different from that of the semiconductor layer; first and second voltage application units that apply a voltage to the semiconductor layer between the first and second charge accumulation units and the photoelectric conversion unit; A distance measuring device comprising: a first wiring provided on the first surface side and electrically connected to the photoelectric conversion unit. (2) The distance measuring device according to (1), wherein the photoelectric conversion unit, when viewed from above the second surface of the semiconductor layer, has an area smaller than an opening through which incident light passes from the lens to the semiconductor layer. (3) an impurity layer provided in the semiconductor layer on the first surface side and in contact with the photoelectric conversion portion; The distance measuring device according to (1) or (2), wherein the photoelectric conversion unit has an area smaller than that of the impurity layer when viewed from above the second surface of the semiconductor layer. (4) The semiconductor layer is made of silicon, The distance measuring device according to any one of (1) to (3), wherein germanium, InGaAs, CIGS (Copper Indium Gallium DiSelenide), or Qdot (Quantum Dot) is used for the photoelectric conversion unit. (5) A distance measuring device described in any one of (1) to (4), further comprising a metal layer made of a conductive and light-reflecting material and covering the periphery of the photoelectric conversion unit except for the contact portion between the photoelectric conversion unit and the semiconductor layer. (6) The distance measuring device according to (5), wherein the metal layer is an electrode that electrically connects the photoelectric conversion unit and the first wiring. (7) The distance measuring device according to (5) or (6), wherein the metal layer has an uneven portion that protrudes or is recessed toward the photoelectric conversion portion. (8) A distance measuring device described in any one of (1) to (7), further comprising a mixed layer provided between the photoelectric conversion unit and the semiconductor layer, in which a material of the photoelectric conversion unit and a material of the semiconductor layer are mixed. (9) A distance measuring device described in any one of (1) to (8), further comprising a high-concentration impurity layer having a higher impurity concentration than the photoelectric conversion unit, the high-concentration impurity layer being provided at a contact portion of the photoelectric conversion unit that is electrically connected to the first wiring. (10) the first voltage application unit is a first gate electrode provided on the first surface between the first charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer; the second voltage application unit is a second gate electrode provided on the first surface between the second charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer; A second wiring provided on the first surface side and connected to the first voltage application unit; The distance measuring device according to any one of (1) to (9), further comprising a third wiring provided on the first surface side and connected to the second voltage application section. (11) The distance measuring device according to (10), wherein the first and second voltage application units are provided on the first surface of the semiconductor layer via an insulating film. (12) The distance measuring device according to (10), wherein the first and second voltage application units are embedded into the semiconductor layer from the first surface of the semiconductor layer. (13) the first voltage application section is adjacent to the first charge accumulation section on the first surface and is a first impurity layer having a different conductivity type from the first charge accumulation section, the second voltage application section is a second impurity layer adjacent to the second charge accumulation section on the first surface and having a different conductivity type from the second charge accumulation section, A second wiring provided on the first surface side and connected to the first voltage application unit; The distance measuring device according to any one of (1) to (9), further comprising a third wiring provided on the first surface side and connected to the second voltage application section. (14) The distance measuring device according to any one of (1) to (13), further comprising a waveguide section extending from the second surface to the photoelectric conversion section within the semiconductor layer and made of a material different from that of the semiconductor layer. (15) The distance measuring device described in (14), wherein the waveguide section has an area on the second surface side equal to or greater than an opening that passes incident light from the lens to the semiconductor layer, and an area on the first surface side equal to or less than an area of the photoelectric conversion section, and a side surface between the first surface and the second surface has a tapered shape. (16) The distance measuring device according to (14) or (15), wherein the refractive index of the waveguide portion is higher than the refractive index of the semiconductor layer. (17) The distance measuring device according to (16), wherein the refractive index of the waveguide is lower than the refractive index of the lens. (18) The distance measuring device according to any one of (14) to (17), further comprising a metal film provided on a side surface of the waveguide portion.
[0161] The present disclosure is not limited to the above-described embodiment, and various modifications are possible without departing from the scope of the present disclosure. Furthermore, the effects described in this specification are merely examples and are not limiting, and other effects may be obtained. [Explanation of symbols]
[0162] 100 distance measuring device, 1 light receiving element, 10 pixel, PD photodiode, TRG1, TRG2 transfer transistor, FD1, FD2 floating diffusion region, FDL1, FDL2 additional capacitance, 51 semiconductor layer, 47 on-chip lens, 43 anti-reflection film, 45 light shielding film, 61 pixel separation section, 52 impurity layer, V1 to V4, Vbias via, M1 to M4, Mbias wiring, 65 metal layer, 55 waveguide section
Claims
1. a semiconductor layer having a first surface and a second surface opposite the first surface; A lens provided on the second surface side; a first charge storage portion and a second charge storage portion provided in the semiconductor layer on the first surface side; a photoelectric conversion portion in contact with the semiconductor layer on the first surface side and made of a material having a higher quantum efficiency or photoelectric conversion efficiency than the semiconductor layer; first and second voltage application units that apply a voltage to the semiconductor layer between the first and second charge accumulation units and the photoelectric conversion unit; a first wiring provided on the first surface side and electrically connected to the photoelectric conversion unit; A distance measuring device, wherein the photoelectric conversion unit, when viewed from above the second surface of the semiconductor layer, has an area smaller than an opening through which incident light passes from the lens to the semiconductor layer.
2. an impurity layer provided in the semiconductor layer on the first surface side and in contact with the photoelectric conversion unit; The distance measuring device according to claim 1 , wherein the photoelectric conversion portion has an area smaller than that of the impurity layer when viewed from above the second surface of the semiconductor layer.
3. 2. The distance measuring device according to claim 1, wherein the semiconductor layer is made of silicon, and the photoelectric conversion section is made of germanium, InGaAs, copper indium gallium di selenide (CIGS), or quantum dot (Qdot).
4. A semiconductor layer having a first surface and a second surface opposite the first surface; A lens provided on the second surface side; a first charge storage portion and a second charge storage portion provided in the semiconductor layer on the first surface side; a photoelectric conversion portion in contact with the semiconductor layer on the first surface side and made of a material having a higher quantum efficiency or photoelectric conversion efficiency than the semiconductor layer; first and second voltage application units that apply a voltage to the semiconductor layer between the first and second charge accumulation units and the photoelectric conversion unit; a first wiring provided on the first surface side and electrically connected to the photoelectric conversion unit; A distance measuring device further comprising a metal layer made of a conductive and light-reflecting material and covering the periphery of the photoelectric conversion unit except for a contact portion between the photoelectric conversion unit and the semiconductor layer.
5. The distance measuring device according to claim 4 , wherein the metal layer is an electrode that electrically connects the photoelectric conversion unit and the first wiring.
6. The distance measuring device according to claim 4 , wherein the metal layer has an uneven portion that protrudes or is recessed toward the photoelectric conversion portion.
7. A semiconductor layer having a first surface and a second surface opposite the first surface; A lens provided on the second surface side; a first charge storage portion and a second charge storage portion provided in the semiconductor layer on the first surface side; a photoelectric conversion portion in contact with the semiconductor layer on the first surface side and made of a material having a higher quantum efficiency or photoelectric conversion efficiency than the semiconductor layer; first and second voltage application units that apply a voltage to the semiconductor layer between the first and second charge accumulation units and the photoelectric conversion unit; A first wiring provided on the first surface side and electrically connected to the photoelectric conversion unit; A distance measuring device comprising: a mixed layer provided between the photoelectric conversion unit and the semiconductor layer, the mixed layer being a mixture of a material of the photoelectric conversion unit and a material of the semiconductor layer.
8. 8. The distance measuring device according to claim 1, further comprising a high-concentration impurity layer having a higher impurity concentration than the photoelectric conversion unit, the high-concentration impurity layer being provided at a contact portion of the photoelectric conversion unit that is electrically connected to the first wiring.
9. the first voltage application unit is a first gate electrode provided on the first surface between the first charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer; the second voltage application unit is a second gate electrode provided on the first surface between the second charge accumulation unit and the photoelectric conversion unit and insulated from the semiconductor layer, and a second wiring provided on the first surface side and connected to the first voltage application unit; 8. The distance measuring device according to claim 1, further comprising: a third wiring provided on the first surface side and connected to the second voltage application portion.
10. The distance measuring device according to claim 9 , wherein the first and second voltage application sections are provided on the first surface of the semiconductor layer via an insulating film.
11. The distance measuring device according to claim 9 , wherein the first and second voltage application units are embedded in the semiconductor layer from the first surface of the semiconductor layer.
12. the first voltage application section is adjacent to the first charge accumulation section on the first surface and is a first impurity layer having a different conductivity type from the first charge accumulation section, the second voltage application section is adjacent to the second charge accumulation section on the first surface and is a second impurity layer having a different conductivity type from the second charge accumulation section, A second wiring provided on the first surface side and connected to the first voltage application unit; 8. The distance measuring device according to claim 1, further comprising: a third wiring provided on the first surface side and connected to the second voltage application portion.
13. The distance measuring device according to claim 1 , further comprising a waveguide section extending from the second surface to the photoelectric conversion section within the semiconductor layer and made of a material different from that of the semiconductor layer.
14. 14. The distance measuring device of claim 13, wherein the waveguide portion has an area on the second surface side equal to or greater than an opening portion that passes incident light from the lens to the semiconductor layer, and an area on the first surface side equal to or less than an area of the photoelectric conversion portion, and a side surface between the first surface and the second surface has a tapered shape.
15. The distance measuring device according to claim 13 , wherein the refractive index of the waveguide portion is higher than the refractive index of the semiconductor layer.
16. The distance measuring device according to claim 15 , wherein the refractive index of the waveguide is lower than the refractive index of the lens.
17. The distance measuring device according to claim 13 , further comprising a metal film provided on a side surface of the waveguide portion.
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