Method for manufacturing semiconductor wafers containing vapor-phase epitaxial layers in a deposition chamber - Patents.com

JP7651725B2Active Publication Date: 2025-03-26SILTRONIC AG
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2023562724
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-04-13
Filing Date
2022-04-04
Publication Date
2025-03-26
Estimated Expiration
2042-04-04

AI Technical Summary

Benefits of technology

【0011】 第2の堆積ガスがもたらす材料堆積は、基板ウェハ上にエピタキシャル層を作り出すコーティング工程の前、間、または後に行われてよい。第1のガス流および第2のガス流は互いに影響を及ぼし合う可能性があるため、堆積ガスを用いた材料堆積は、エピタキシャル層を基板ウェハ上に堆積させる前に行うのが好ましい。しかしながら、エピタキシャル層を有する完成した半導体ウェハの上に第2の堆積ガスを用いて、すなわち第1の堆積ガスを用いてエピタキシャル層を堆積させた後に、材料を堆積させることも可能である。エピタキシャル層を堆積させている間に第2の堆積ガスを用いて材料を堆積させることも不可能ではないが、この材料堆積は、エピタキシャル層を堆積させる前または後に別個のプロセス工程として行うことに利点がある。これらの場合、完全にかつ互いに独立して、エピタキシャル層を作り出すコーティング工程とエッジ領域で材料堆積をもたらすプロセス工程との両方に対してプロセス制御が保持される。以下では、別個のプロセス工程の適用として、各コーティング工程の前に第2の堆積ガスによる材料堆積が行われることを想定している。場合によっては、この別個のプロセス工程は、第2の堆積ガスの第2のガス流に加えて、基板ウェハの上方に供給されるキャリアガス、たとえば水素の第1のガス流を与えることを含んでいてもよい。別個のコーティング工程の各々は、第1の堆積ガスの第1のガス流に加えて、供給ラインをパージするために、基板ウェハのエッジに供給されるキャリアガスの第2のガス流を与えることを含んでいてもよい。この場合には、このようなキャリアガスの第2のガス流の体積速度は、5slmよりも小さいことが好ましく、3slmよりも小さいことがより好ましい。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007651725000001
    Figure 0007651725000001
  • Figure 0007651725000002
    Figure 0007651725000002
  • Figure 0007651725000003
    Figure 0007651725000003
Patent Text Reader

Abstract

A method for manufacturing a semiconductor wafer having an epitaxial layer deposited from a vapor phase in a deposition chamber includes removing material deposited in the deposition chamber during a preceding coating step from the deposition chamber by etching the deposition chamber, a number of coating steps performed in succession, each of which involves depositing an epitaxial layer on a substrate wafer in the deposition chamber, with a first gas flow of a first deposition gas passing over the substrate wafer to form a semiconductor wafer having an epitaxial layer, and supplying a second gas flow of a second deposition gas to an edge region of each of the substrate wafers or each of the semiconductor wafers having an epitaxial layer before, during or after each of the plurality of successive coating steps, wherein at least one process parameter is modified during the step of supplying the second deposition gas to increase material deposition in the edge region depending on the number of coating steps performed after the step of removing material from the deposition chamber.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The invention relates to a method for producing semiconductor wafers having epitaxial layers deposited from the vapor phase in a deposition chamber, the method including a step of removing from the deposition chamber material deposited in the deposition chamber during a preceding coating step. [Background technology]

[0002] Prior art / issue Semiconductor wafers with epitaxial layers deposited from the gas phase are required for the manufacture of electronic components. The epitaxial layers are deposited inside a deposition chamber, which generally takes the form of a single wafer reactor. The substrate wafer to be coated is placed on a susceptor and deposition gases are supplied at a deposition temperature through the deposition chamber above the substrate wafer, which rotates together with the susceptor.

[0003] Deposition chambers are also known which allow the establishment of a second gas flow having a direction different from that of a first gas flow which primarily results in the formation of an epitaxial layer.

[0004] According to US 2014 0 137 801 A1, a deposition chamber of this kind can be used to establish a second deposition gas flow.

[0005] US 2015 0 368 796 A1 proposes a deposition chamber of this kind for reacting an etching gas with a deposition gas.

[0006] JP 2019 114 699 A describes a method in which a second gas flow is employed to influence the effect of a first gas flow.

[0007] WO 2017 102 597 A1 is particularly directed to the problem of improving the edge geometry of semiconductor wafers with epitaxial layers. It has been found that, after a typical etching (chamber etching) which is periodically performed in the deposition chamber to remove material deposited in the deposition chamber during the preceding coating step, the successive subsequent coating steps result in an increased edge roll-off in the semiconductor wafers with epitaxial layers which are subsequently produced in the deposition chamber. In order to compensate for the decreasing material deposition in the edge area during the deposition of the epitaxial layer with a resulting increase in the edge roll-off, it is proposed to carry out an etching in the presence of each substrate wafer to be coated before the deposition of the epitaxial layer. The drawbacks which affect this proposal are that this etching can cause excessive material consumption, can cause crystal defects to appear in the substrate wafer and can generate particles which contaminate the semiconductor wafers with the epitaxial layer. Summary of the Invention [Problem to be solved by the invention]

[0008] An object of the present invention is to address the phenomenon of increased edge roll-off after chamber etching without having to accept the drawbacks mentioned above. [Means for solving the problem]

[0009] The object of the invention is achieved by a method for producing a semiconductor wafer having an epitaxial layer deposited from the vapor phase in a deposition chamber, the method comprising the steps of: removing material deposited in the deposition chamber during a previous coating step from the deposition chamber by etching the deposition chamber; a plurality of coating steps performed in succession, each including depositing an epitaxial layer on a substrate wafer in a deposition chamber, with a first gas flow of a first deposition gas passing over the substrate wafer to form a semiconductor wafer having an epitaxial layer; and supplying a second gas flow of a second deposition gas to an edge region of each of the substrate wafers or each of the semiconductor wafers having an epitaxial layer before, during, or after each of the plurality of successive coating steps, wherein through the step of supplying the second deposition gas, at least one process parameter is altered to increase material deposition in the edge region depending on the number of coating steps performed following the step of removing material from the deposition chamber.

[0010] According to the invention, a second gas flow of a second deposition gas is established that compensates as much as possible for the expected decreasing material deposition at the edge region with each coating step while increasing the material deposition at the edge region with each coating step.

[0011] The material deposition resulting from the second deposition gas may take place before, during or after the coating step that creates the epitaxial layer on the substrate wafer. Since the first and second gas flows may affect each other, the material deposition with the deposition gas is preferably carried out before the epitaxial layer is deposited on the substrate wafer. However, it is also possible to deposit material with the second deposition gas on a finished semiconductor wafer with an epitaxial layer, i.e. after the epitaxial layer has been deposited with the first deposition gas. It is not impossible to deposit material with the second deposition gas while the epitaxial layer is being deposited, but it is advantageous to carry out this material deposition as a separate process step before or after the epitaxial layer is deposited. In these cases, process control is maintained for both the coating step that creates the epitaxial layer and the process step that results in material deposition in the edge area, completely and independently of each other. In the following, it is assumed that the application of separate process steps involves material deposition with the second deposition gas before each coating step. In some cases, the separate process steps may include providing a first gas flow of a carrier gas, e.g., hydrogen, supplied above the substrate wafer in addition to the second gas flow of the second deposition gas. Each separate coating step may include providing a second gas flow of a carrier gas, e.g., hydrogen, supplied to the edge of the substrate wafer in addition to the first gas flow of the first deposition gas, to purge the supply lines. In this case, the volumetric velocity of such a second gas flow of a carrier gas is preferably less than 5 slm, more preferably less than 3 slm.

[0012] A second gas flow of a second deposition gas or carrier gas is provided to an edge region of a substrate wafer resting on the susceptor such that the second gas flow has a directional component that is orthogonal to the direction of the first gas flow of the first deposition gas or carrier gas.

[0013] The first and second deposition gases each include a precursor gas that includes the semiconductor to be deposited, such as silane, for example trichlorosilane. Additionally, the first and second deposition gases may also include a carrier gas, such as hydrogen, and possibly a doping gas, such as diborane. These gases are mixed into the first and second gas flows of deposition gas, respectively. The doping gas includes a dopant that is deposited with the semiconductor material. The compositions of the first and second deposition gases may be the same or different.

[0014] The process conditions under which the second deposition gas is supplied to the substrate wafer during the process steps are different from one another and depend in particular on the number of coating steps with the first deposition gas that have been performed since the last chamber etch. The higher the number, the higher the amount of material deposited with the second deposition gas at the edge region of the substrate wafer. The process conditions are adjusted so that the thickness of the material deposited at the edge region compensates as much as possible for the edge roll-off that would be expected if there were no process steps after the next coating step.

[0015] Since the expected edge roll-off increases with each coating step, at least one process parameter is modified for this process step so that a larger amount of material is deposited at the edge region of the substrate wafer compared to the previous process step in response to the expected edge roll-off increase. Suitable process parameters are, for example, the time that the second deposition gas is supplied to the edge region of the substrate wafer, or the rate at which the second gas flow of the second deposition gas is supplied to the edge region of the substrate wafer. For example, the longer the time that the second deposition gas is supplied to the edge region of the substrate wafer, the larger the amount of material deposited thereon. Suitable process parameters are also the volume ratio of the precursor gas to the carrier gas in the second gas flow of deposition gas, the volume velocity ratio between the precursor gas and the carrier gas before mixing them to create the second gas flow of deposition gas, the temperature in the deposition chamber, or the rotation speed of the substrate wafer. The optimal adjustment of the process parameters, in the sense of the present invention, also depends on the deposition chamber used and, in some cases, on the volume velocity of the carrier gas when used as the first gas flow of carrier gas in addition to the second gas flow of deposition gas during a separate process step. This adjustment can be obtained through experimentation.

[0016] An etching gas, e.g., hydrogen chloride, is passed through the deposition chamber to remove material deposited therein during the preceding coating step from the deposition chamber. This type of chamber etch is preferably performed periodically, e.g., when the material deposited on the interior surface of the deposition chamber reaches or exceeds a predetermined thickness, or after a predetermined number of coating steps have been performed. Following the chamber etch, a chamber coating may be performed, e.g., by passing trichlorosilane through the deposition chamber at the deposition temperature. This may be performed in the presence of a substrate wafer placed on the susceptor, which acts as a dummy to cover the susceptor.

[0017] The invention is further explained below with reference to the drawings. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 illustrates components of a deposition chamber suitable for carrying out the method of the present invention. [Diagram 2] FIG. 2 illustrates, in a plan view, the supply of a first gas flow and a second gas flow to a substrate wafer. [Diagram 3] FIG. 13 illustrates the change in edge geometry depending on the deposition order of epitaxial layers after chamber etching. [Figure 4] FIG. 13 illustrates the change in edge geometry depending on the deposition order of epitaxial layers after chamber etching. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THEINVENTION The apparatus for depositing epitaxial layers on substrate wafers shown in Figure 1 comprises a deposition chamber 3 with an upper lid 1 and a lower lid 2, and an upper lining 7 and a lower lining 8 surrounding the reaction space. The upper and lower lamp arrays present outside the deposition chamber 3 are not shown. The radiant energy of the lamps brings the deposition chamber to the temperature required for vapor deposition.

[0020] For the coating process, the substrate wafer 4 is placed on a susceptor 5 which is rotatably held from below by a carrier arm. A preheat ring 6 is provided around the periphery of the susceptor. The substrate wafer 4 can be placed on the susceptor 5 and, after coating, can be lifted off the susceptor 5 by means of lifting rods which pass through the susceptor 5.

[0021] During coating of the substrate wafer 4, a first deposition gas is fed into the deposition chamber 3 through first gas inlet holes 9 in the upper lining 7 and above the substrate wafer along a first flow direction to a first gas outlet 11. Furthermore, the lower lining is provided with one or more second gas inlet holes through which deposition gas is fed to the edge region of the substrate wafer 4 or semiconductor wafer with an epitaxial layer along a second flow direction during a separate process step or during a coating step. Finally, a lower gas inlet hole 12 and a lower gas outlet 13 may optionally be provided so that a purge gas is fed below the susceptor 5 and into the lower gas outlet 13.

[0022] FIG. 2 shows in plan view the passage of a first gas flow 14 over a substrate wafer 4 and a second gas flow 15 to the edge region 4 of the substrate wafer. The second gas flow 15 has a directional component perpendicular to the flow direction of the first gas flow 14. These two flow directions preferably include an angle α of 45° to 90°. If a deposition gas is delivered via the second gas flow 15 as a separate process step, the first gas flow 14 consisting of a carrier gas is preferably supplied simultaneously above the substrate wafer 4 or a semiconductor wafer with an epitaxial layer. During a coating step which is carried out before or after this separate process step, the deposition gas passes above the substrate wafer only via the first gas flow 14, and possibly the carrier gas is supplied to the edge of the substrate wafer via the second gas flow 15. If there is no separate process step, both the first gas flow 14 and the second gas flow 15 contain deposition gas.

[0023] Working Example: In the first experiment, an epitaxial layer of single crystal silicon was deposited on each of 25 substrate wafers, each 300 mm in diameter and made of single crystal silicon. After the chamber etching of the deposition chamber, the coating step was carried out in the deposition chamber of a single wafer reactor. The single wafer reactor was designed such that a first gas flow passed over the substrate wafer and a second gas flow was delivered to the edge region of the substrate wafer.

[0024] For every second substrate wafer, a separate process step was performed before the coating step, during which a first gas flow of carrier gas passed over the substrate wafer and a second gas flow of deposition gas was supplied to the edge region of the substrate wafer. The more coating steps performed after the chamber etching, the longer the supply time of the second gas flow of deposition gas was selected. Before even-numbered coating steps, the separate process step before the coating step was omitted.

[0025] After the next coating process, the edge geometry of the manufactured semiconductor wafer with epitaxial layer was investigated and quantified as ESFQD_AVG_Δ (Edge Site Front surface least squares site deviation, ESFQD). ESFQD measurements were taken at 72 edge sites (sectors of 30 mm length excluding 2 mm edge, and the measurements were calculated in an area of ​​these sectors with a radius between 147.5 mm and 148 mm), and for each measurement, an average value (AVG) was calculated for each substrate wafer and each resulting semiconductor wafer with epitaxial layer, and one of these two pairs of average values ​​was subtracted from the other (Δ).

[0026] 3 is a plot of the subtraction result ESFQD_AVG_Δ as a function of the number N of coating steps performed after the chamber etch. In this sequence, odd numbers are assigned to substrate wafers coated according to the invention, and even numbers are assigned to substrate wafers coated without a separate process step, i.e., without a second gas flow of deposition gas. Furthermore, in one method performed according to the invention, the time during which the second gas flow of deposition gas is supplied to the edge region of the substrate wafer was a constant amount longer than the corresponding time in the immediately preceding method performed according to the invention.

[0027] The even overlapping data points represent the effect of increasing edge roll-off after a chamber etch without intervention, while the odd ascending data points in the series indicate that the intervention of the present invention more than compensated for the edge roll-off in some instances, and even resulted in more material being deposited in the edge region than was intended.

[0028] In the next experiment, for the coating steps performed according to the present invention with odd numbers in the series, a separate process step was omitted, i.e., during the coating step, a second gas flow of a second deposition gas was supplied to the edge region of the substrate wafer, a different ratio was selected for the volumetric velocities of the precursor gas and the carrier gas before mixing the precursor gas and the carrier gas to create the second gas flow of the deposition gas, and the duration of the coating step was shortened compared to that in the first experiment.

[0029] FIG. 4 illustrates that a selected combination of process parameters can achieve relatively uniform edge geometry for semiconductor wafers having epitaxial layers. [Explanation of symbols]

[0030] List of reference numbers used 1 Upper lid 2 Lower lid 3. Deposition chamber 4 Substrate Wafer 5 Susceptor 6 Preheat Ring 7 Upper Lining 8 Lower Lining 9 First gas inlet hole 10 Gas inlet hole for second gas flow 11 First gas outlet 12 Lower gas inlet hole 13 Lower gas outlet 14 First gas stream 15 Second Gas Stream

Claims

1. 1. A method for manufacturing a semiconductor wafer having an epitaxial layer deposited from a vapor phase in a deposition chamber, the method comprising: removing material deposited in the deposition chamber during a previous coating step from the deposition chamber by etching the deposition chamber; a plurality of coating steps performed in succession, each including depositing an epitaxial layer on a substrate wafer in the deposition chamber, with a first gas flow of a first deposition gas passing over the substrate wafer to form a semiconductor wafer having an epitaxial layer; and supplying a second gas flow of a second deposition gas to an edge region of each of the substrate wafers or each of the epitaxial layer-bearing semiconductor wafers before or after each of the successive coating steps, wherein at least one process parameter is changed during the supplying of the second deposition gas to increase material deposition in the edge region depending on the number of coating steps performed after the step of removing the material from the deposition chamber; 13. The method of claim 12, further comprising the steps of: providing the first gas flow along a first flow direction; and providing the second gas flow along a second flow direction, wherein an angle between the first flow direction and the second flow direction is between 45° and 90°.

2. 2. The method of claim 1, wherein the at least one process parameter is selected from the group including: a time that the second gas flow of the second deposition gas is supplied to the substrate wafer, a rate at which the second deposition gas is supplied to an edge region of the substrate wafer, a volumetric ratio of a precursor gas to a carrier gas in the second gas flow, a volumetric velocity ratio of the precursor gas to the carrier gas before mixing the precursor gas and the carrier gas to create the second gas flow, a temperature in the deposition chamber, and a rotation speed of the substrate wafer.

Citation Information

Patent Citations

  • Method and device for growing epitaxial silicon layer

    JP1994232060A

  • Gas-phase reactor

    JP2000349030A

  • Thermal reactor with improved gas flow distribution

    JP2013219344A

  • Epitaxial chamber with cross-flow

    JP2013507004A

  • Epitaxial wafer manufacturing method

    JP2015026776A