Printed Circuit Board

The printed circuit board design embeds the second circuit pattern within the insulating layer and uses a supporting second insulating layer to prevent collapse and maintain component mounting area, addressing the challenges faced by conventional boards with fine patterns.

JP7654628B2Active Publication Date: 2025-04-01LG INNOTEK CO LTD
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Patent Information

Application Number
JP2022502583
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-07-15
Filing Date
2020-07-15
Publication Date
2025-04-01
Estimated Expiration
2040-07-15

AI Technical Summary

Technical Problem

Conventional printed circuit boards with fine circuit patterns face issues of collapse and reduced component mounting area due to the protrusion of the outermost circuit pattern, which is not adequately supported by the insulating layer.

Method used

A printed circuit board structure is developed where the second circuit pattern is embedded within the insulating layer, with a second insulating layer surrounding the circuit pattern and having a height that ranges from 20% to 99% of the circuit pattern's height, providing support and minimizing exposure reduction.

Benefits of technology

This solution effectively prevents the collapse of fine circuit patterns and maintains a sufficient component mounting area by ensuring the second circuit pattern is stably supported and exposed to the necessary extent.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A printed circuit board according to an embodiment includes a first insulating layer, a first circuit pattern disposed inside or on the lower surface of the first insulating layer, a second circuit pattern disposed on the upper surface of the first insulating layer, and a second insulating layer disposed on the upper surface of the first insulating layer and surrounding the second circuit pattern, wherein the second circuit pattern and the second insulating layer are disposed protruding above the second surface of the first insulating layer, and the height of the second circuit pattern is greater than the height of the second insulating layer.
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Description

[Technical field]

[0001] The embodiments relate to a printed circuit board, and more particularly to a printed circuit board having an embedded structure in which a circuit pattern arranged on the outermost layer is embedded in an insulating layer, and a method for manufacturing the same. [Background technology]

[0002] As electronic components become smaller, lighter, and more integrated, the line width of circuits is becoming finer. In particular, as semiconductor chip design rules become more integrated on the nanometer scale, the line width of the circuits on package substrates or printed circuit boards on which semiconductor chips are mounted is becoming finer, down to a few micrometers or less.

[0003] Various methods have been proposed to increase the circuit integration of printed circuit boards, i.e., to make the circuit line width finer. SAP (semi-additive process) and MSAP (modified semi-additive process) methods have been proposed to prevent loss of circuit line width during the etching step to form patterns after copper plating.

[0004] Since then, in order to realize finer circuit patterns, the ETS (Embedded Trace Substrate (hereinafter referred to as "ETS") method, in which copper foil is embedded in an insulating layer, has been used in the industry. The ETS method manufactures copper foil circuits by embedding them in an insulating layer instead of forming them on the surface of the insulating layer, so there is no circuit loss due to etching and it is advantageous for making the circuit pitch finer.

[0005] However, conventional printed circuit boards including fine circuit patterns have a structure in which the outermost circuit pattern protrudes above the insulating layer, which causes a problem that the outermost circuit pattern easily collapses. Summary of the Invention [Problem to be solved by the invention]

[0006] In the embodiments, a printed circuit board having a new structure and a manufacturing method thereof are provided.

[0007] In addition, in the embodiment, the outermost circuit pattern is also embedded in the insulating layer, thereby providing a printed circuit board and a manufacturing method thereof that can improve reliability.

[0008] The technical problems to be achieved by the proposed embodiments are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person having ordinary skill in the art to which the embodiments belong from the following description. [Means for solving the problem]

[0009] A printed circuit board according to an embodiment includes a first insulating layer, a first circuit pattern arranged inside or on a lower surface of the first insulating layer, a second circuit pattern arranged on an upper surface of the first insulating layer, and a second insulating layer arranged on the upper surface of the first insulating layer and surrounding the second circuit pattern, wherein the second circuit pattern and the second insulating layer are arranged to protrude above the second surface of the first insulating layer, and the height of the second circuit pattern is different from the height of the second insulating layer.

[0010] The second insulating layer includes a resin and an inorganic filler disposed in the resin.

[0011] At least a portion of the inorganic filler is exposed on the upper surface of the second insulating layer.

[0012] Moreover, at least a portion of the inorganic filler of the second insulating layer is disposed on an upper surface of the second circuit pattern.

[0013] The lower surface of the second circuit pattern is located on the same plane as the lower surface of the second insulating layer.

[0014] In addition, the upper surface of the second circuit pattern is located higher than the upper surface of the second insulating layer.

[0015] The height of the second insulating layer is within the range of 20% to 99% of the height of the second circuit pattern.

[0016] In addition, the second circuit pattern includes a first portion disposed on the second surface of the first insulating layer and having a side surface in contact with the second insulating layer, and a second portion disposed on the first portion and protruding above an upper surface of the second insulating layer, the second portion decreasing in width from the bottom to the top.

[0017] On the other hand, a printed circuit board according to an embodiment includes a first insulating layer, a first circuit pattern arranged on a first surface of the first insulating layer, a second circuit pattern arranged on a second surface of the first insulating layer, and a second insulating layer arranged on the second surface of the first insulating layer and surrounding the second circuit pattern, the second insulating layer including a resin and an inorganic filler arranged within the resin, and at least a portion of the inorganic filler is exposed on an upper surface of the second insulating layer.

[0018] Moreover, at least a portion of the inorganic filler of the second insulating layer is disposed on an upper surface of the second circuit pattern.

[0019] In addition, the second circuit pattern and the second insulating layer are disposed to protrude above the second surface of the first insulating layer, and the height of the second circuit pattern is greater than the height of the second insulating layer.

[0020] The height of the second insulating layer is within the range of 20% to 99% of the height of the second circuit pattern.

[0021] In addition, the second circuit pattern includes a first portion disposed on the second surface of the first insulating layer and having a side surface in contact with the second insulating layer, and a second portion disposed on the first portion and protruding above an upper surface of the second insulating layer, the second portion decreasing in width from the bottom to the top.

[0022] The second circuit pattern is a fine pattern, the width of the second circuit pattern is in the range of 6 μm to 15 μm, and the interval between the second circuit patterns is in the range of 8 μm to 15 μm.

[0023] Meanwhile, a method for manufacturing a printed circuit board according to an embodiment includes the steps of: preparing a circuit board including a first insulating layer, a first circuit pattern embedded in a lower portion of the first insulating layer, and a second circuit pattern disposed on an upper surface of the first insulating layer and protruding above the upper surface of the first insulating layer; disposing a second insulating layer on the upper surface of the first insulating layer and on an upper surface of the second circuit pattern; and removing a portion of the second insulating layer to expose an upper surface of the second circuit pattern, wherein the second insulating layer includes a resin and an inorganic filler disposed in the resin, and at least a portion of the inorganic filler is exposed through the upper surface of the second insulating layer by the removal.

[0024] Moreover, at least a portion of the inorganic filler of the second insulating layer remains on the upper surface of the second circuit pattern.

[0025] The removal is performed so that the height of the second insulating layer falls within a range of 20% to 99% of the height of the second circuit pattern.

[0026] In addition, the second circuit pattern includes a first portion disposed on the upper surface of the first insulating layer and having a side surface in contact with the second insulating layer, and a second portion disposed on the first portion and protruding above the upper surface of the second insulating layer, the second portion decreasing in width from the bottom to the top. Effect of the Invention

[0027] According to an embodiment of the present invention, in a second circuit pattern disposed on a first insulating layer and protruding above a surface of the first insulating layer, a second insulating layer is formed on the first insulating layer to support a side of the second circuit pattern, whereby problems such as collapse and rubbing of the protruding second circuit pattern can be solved by miniaturizing the second circuit pattern, thereby improving the reliability of the product.

[0028] According to an embodiment of the present invention, the second insulating layer is formed such that the upper surface of the second insulating layer is located lower than the upper surface of the second circuit pattern. That is, the height of the second insulating layer in the embodiment is lower than the height of the second circuit pattern. This solves the problem of the second insulating layer remaining on the surface of the second circuit pattern, which reduces the exposed area of ​​the surface of the second circuit pattern, and thereby solves the problem of the reduction in the component mounting area.

[0029] In addition, in the embodiment, after forming the second insulating layer, the second insulating layer is etched so that the upper surface of the second insulating layer is located lower than the upper surface of the second circuit pattern. At this time, inorganic filler is present in the second insulating layer. Then, by etching the second insulating layer, the inorganic filler is disposed so as to protrude from the surface of the second insulating layer in the final product. According to this, the surface area and the surface roughness of the second insulating layer can be increased by the protrusion of the inorganic filler, and thus the adhesive strength with a protective layer such as a solder resist disposed on the second insulating layer can be improved. [Brief description of the drawings]

[0030] [Figure 1] 1 is a diagram showing a printed circuit board according to a comparative example. [Diagram 2] 1 is a diagram showing a printed circuit board according to an embodiment. [Diagram 3] FIG. 3 is an enlarged view of region B in FIG. 2. [Figure 4a] 1 is a diagram showing a printed circuit board according to a comparative example. [Figure 4b] 1 is a diagram referred to in explaining a problem caused by the height of a second insulating layer. [Figure 4c] 1 is a diagram showing a printed circuit board according to an embodiment of the present invention. [Diagram 5] 13 is a diagram showing a change in shape of a second circuit pattern according to an embodiment. [Figure 6] 13 is a diagram for explaining problems that arise depending on the height of a second insulating layer. [Figure 7a] 1 is a diagram showing a surface of a printed circuit board formed by sandblasting. [Figure 7b] 1 is a diagram showing a surface of a printed circuit board formed by plasma. [Figure 8] 2A to 2C are diagrams illustrating a method for manufacturing a printed circuit board according to an embodiment in the order of steps; [Figure 9] 2A to 2C are diagrams illustrating a method for manufacturing a printed circuit board according to an embodiment in the order of steps; [Figure 10] 2A to 2C are diagrams illustrating a method for manufacturing a printed circuit board according to an embodiment in the order of steps; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] Hereinafter, the embodiments disclosed in the present specification will be described in detail with reference to the attached drawings. The same or similar components are given the same reference numerals regardless of the drawing numbers, and the duplicated description thereof will be omitted. The suffixes "module" and "part" for components used in the following description are given or mixed to facilitate the preparation of the specification, and do not have a mutually distinguishing meaning or role by themselves. In addition, in the description of the embodiments disclosed in the present specification, if a detailed description of the related known technology is determined to hinder the understanding of the embodiments disclosed in the present specification, the detailed description thereof will be omitted. In addition, the attached drawings are intended to facilitate the understanding of the embodiments disclosed in the present specification, and the technical ideas disclosed in the present specification are not limited by the attached drawings, and should be understood to include all modifications, equivalents, or alternatives included in the idea and technical scope of the present invention.

[0032] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0033] When a component is referred to as being "coupled" or "connected" to another component, it should be understood that the component may be directly "coupled" or "connected" to the other component, and that there may be other components in between. Conversely, when a component is referred to as being "directly coupled" or "directly connected" to another component, it should be understood that there are no other components in between.

[0034] A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0035] In this application, the use of terms such as "comprise" or "have" is intended to specify the presence of any feature, number, step, operation, component, part, or combination thereof set forth in the specification, but is to be understood as not precluding the presence or additional possibility of one or more other features, number, steps, operations, components, parts, or combinations thereof.

[0036] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0037] FIG. 1 is a diagram showing a printed circuit board according to a comparative example.

[0038] Referring to FIG. 1(a), a printed circuit board according to a comparative example includes a circuit pattern manufactured by the ETS method.

[0039] Specifically, the printed circuit board manufactured by the ETS process includes an insulating layer 10, a first circuit pattern 20, and a second circuit pattern 30.

[0040] The first circuit pattern 20 is embedded in the insulating layer 10 .

[0041] Preferably, the first circuit pattern 20 is embedded in a lower region of the insulating layer 10. This allows the lower surface of the first circuit pattern 20 to be disposed flush with the lower surface of the insulating layer 10.

[0042] On the upper surface of the insulating layer 10, a second circuit pattern 30 is disposed.

[0043] The second circuit pattern 30 has a structure protruding above the upper surface of the insulating layer 10 .

[0044] Meanwhile, although the drawings show a printed circuit board having a two-layer structure based on the circuit pattern layer, including only one insulating layer 10, the number of layers of the circuit pattern of the printed circuit board may be increased.

[0045] However, even if the number of layers of the circuit patterns is increased, the second circuit pattern 30 disposed on the outermost side has a structure that protrudes above the surface of the insulating layer 10.

[0046] Meanwhile, circuit patterns are becoming finer and finer recently. In the case of fine circuit patterns with a width / spacing of 15 μm / 15 μm or less, the outermost layer must be realized by the ETS process. That is, in the case of fine circuit patterns in which the outermost layer circuit pattern has a width of 15 μm and the circuit patterns must be spaced apart from each other by 15 μm or less, a stable fine circuit pattern cannot be formed unless the circuit pattern is formed by the ETS process.

[0047] As in the comparative example, the outermost circuit pattern has a structure that protrudes above the upper surface of the insulating layer 10. In this case, the protruding second circuit pattern 30 may have a width of 15 μm or less. Here, when the protruding second circuit pattern 30 has a width exceeding 15 μm, it is resistant to external impact.

[0048] However, as shown in FIG. 1(b), as circuit patterns become finer and the width of the outermost second circuit pattern 30 becomes smaller, if the second circuit pattern 30 has a structure protruding above the top surface of the insulating layer 10, a problem occurs in that the second circuit pattern 30 easily collapses due to external impact.

[0049] That is, as in the comparative example, the second circuit pattern 30 of the outermost layer has a very fine pattern shape, which causes a problem that it is easily broken or scratched by a small external impact.

[0050] In addition, with the recent development of 5G technology, interest in printed circuit boards that can reflect this technology is growing. At this time, in order to apply 5G technology, the printed circuit board needs to have a highly multi-layer structure, and the circuit pattern needs to be fine. However, in the comparative example, although it is possible to form a fine pattern, there is a problem that it is not possible to stably protect the pattern.

[0051] Accordingly, the embodiments provide a printed circuit board having a new structure capable of solving the reliability problem of the fine patterns arranged on the outermost side, and a method for controlling the same.

[0052] FIG. 2 is a diagram showing a printed circuit board according to an embodiment, and FIG. 3 is an enlarged view of a region B in FIG.

[0053] 2 and 3, a printed circuit board 100 includes a first insulating layer 110, a second insulating layer 140, a first circuit pattern 120 and a second circuit pattern .

[0054] In FIG. 2, the printed circuit board 100 is illustrated as having a two-layer structure with the insulating layer 10 being the circuit pattern layer at the center, but this is merely an example, and the number of the circuit pattern layers may be increased.

[0055] However, the first circuit pattern 120 in FIG. 2 may be a first outermost layer that is disposed at the bottom among the multiple circuit pattern layers, and the second circuit pattern 140 may be a second outermost layer that is disposed at the top among the multiple circuit patterns.

[0056] The first insulating layer 110 can include any of a printed circuit board, a wiring board, and an insulating substrate made of an insulating material on which a circuit pattern can be formed, as a substrate on which an electric circuit capable of being rewired is arranged.

[0057] For example, the first insulating layer 110 may be rigid or flexible. For example, the first insulating layer 110 may include glass or plastic. In particular, the first insulating layer 110 may include chemically strengthened / semi-strengthened glass, such as soda lime glass or aluminosilicate glass, or may include reinforced or flexible plastic, such as polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), polycarbonate (PC), or sapphire.

[0058] Also, the first insulating layer 110 may include an optically isotropic film. For example, the first insulating layer 110 may include a cyclic olefin copolymer (COC), a cyclic olefin polymer (COP), an optically isotropic polycarbonate (PC), an optically isotropic polymethyl methacrylate (PMMA), or the like.

[0059] In addition, the first insulating layer 110 may be bent with a partial curved surface. That is, the first insulating layer 110 may be bent with a partial flat surface and a partial curved surface. In particular, the first insulating layer 110 may be bent with a curved end or may be bent or folded with a surface including a random curvature.

[0060] The first insulating layer 110 may be a flexible substrate having a flexible characteristic. The first insulating layer 110 may be a curved or bent substrate. In this case, the first insulating layer 110 may represent electrical wiring for connecting circuit components based on a circuit design as a wiring diagram, and reproduce electrical conductors on an insulator. The first insulating layer 110 may mount electrical components and form wiring for connecting them in a circuit manner, and may mechanically fix components other than the electrical connection function of the components.

[0061] A circuit pattern is disposed on the surface of the first insulating layer 110.

[0062] Preferably, a first circuit pattern 120 is disposed on the lower part of the first insulating layer 10. And, a second circuit pattern 140 is disposed on the upper part of the first insulating layer 110.

[0063] Specifically, the first circuit pattern 120 is embedded below the first insulating layer 110 .

[0064] Therefore, the lower surface of the first circuit pattern 120 may be located on the same plane as the lower surface of the first insulating layer 110 .

[0065] The second circuit pattern 120 is disposed on the upper surface of the first insulating layer 110. Preferably, the second circuit pattern 130 is disposed in a structure protruding above the upper surface of the first insulating layer 110.

[0066] As a result, the lower surface of the second circuit pattern 130 is disposed in direct contact with the upper surface of the first insulating layer 110 .

[0067] The first circuit pattern 120 and the second circuit pattern 130 may be made of a metal material having high electrical conductivity as wiring for transmitting an electrical signal. To this end, the first circuit pattern 120 and the second circuit pattern 130 may be made of at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). In addition, the first circuit pattern 120 and the second circuit pattern 130 may be made of a paste or solder paste containing at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) having excellent bonding strength. Preferably, the first circuit pattern 120 and the second circuit pattern 130 may be made of copper (Cu), which has high electrical conductivity and is relatively inexpensive.

[0068] The first circuit pattern 120 and the second circuit pattern 130 can be formed using conventional printed circuit board manufacturing processes such as additive process, subtractive process, MSAP (Modified Semi Additive Process), and SAP (Semi Additive Process), and detailed description thereof will be omitted here.

[0069] The second insulating layer 140 is disposed on the first insulating layer 110. Preferably, the second insulating layer 140 is disposed between the second circuit patterns 130 on the first insulating layer 110. That is, the second circuit patterns 130 are disposed on the first insulating layer 110 at a certain distance. The second insulating layer 140 is disposed to cover an area of ​​the upper surface of the first insulating layer 110 where the second circuit patterns 130 are not disposed.

[0070] Therefore, the second insulating layer 140 may have a structure in which the second circuit pattern 130 is in direct contact with the second insulating layer 140 .

[0071] Preferably, the side of the second insulating layer 140 may be in direct contact with the side of the second circuit pattern 130 .

[0072] That is, the second insulating layer 140 may be a supporting insulating layer disposed to surround the second circuit pattern 130 and support the second circuit pattern 130 .

[0073] The second insulating layer 140 may have a structure in which a resin and a filler are mixed, that is, the second insulating layer 140 may be an insulating layer without glass fiber such as ABF, RCC, or the like.

[0074] In the embodiment, as described above, the second insulating layer 140 is formed on the first insulating layer 110 to surround the second circuit pattern 130 and directly contact the side of the second circuit pattern 130. The second insulating layer 140 supports the fine second circuit pattern 130, thereby stably protecting the second circuit pattern 130 from external impact.

[0075] At this time, if the second circuit pattern 130 is not a fine pattern, the second circuit pattern 130 is resistant to external impact, and therefore the second insulating layer 140 is not required. However, if the second circuit pattern 130 is a fine pattern, there is a problem that it easily collapses due to external impact, and therefore the second insulating layer 140 is used to stably support the second circuit pattern 130.

[0076] Therefore, the width of the second circuit pattern 130 may be in the range of 6 μm to 15 μm. It is difficult to form the second circuit pattern 130 to have a width less than 6 μm, and the second circuit pattern 130 having a width less than 6 μm is vulnerable to external impacts and has a problem with reliability. The width of the second circuit pattern 130 may be 15 μm or less. In this case, the width of the second circuit pattern 130 may be greater than 15 μm. However, when the second circuit pattern 130 is greater than 15 μm, the need for the second insulating layer 140 is low, and the second circuit pattern 130 does not easily collapse even without the second insulating layer 140.

[0077] The intervals between the second circuit patterns 130 are set to be in the range of 8 μm to 15 μm.

[0078] 3, the height H2 of the second insulating layer 140 may be smaller than the height H1 of the second circuit pattern 130. That is, the upper surface of the second insulating layer 140 may be located lower than the upper surface of the second circuit pattern 130. And, the lower surface of the second insulating layer 140 may be located on the same plane as the lower surface of the second circuit pattern 130.

[0079] Meanwhile, the height H2 of the second insulating layer 140 and the height H1 of the second circuit pattern 130 may be the same. However, if the height H1 of the second circuit pattern 130 and the height H2 of the second insulating layer 140 are the same, a part of the second insulating layer 140 may remain on the second circuit pattern 130, which may cause a problem in the function of the second circuit pattern 130. Here, if the second circuit pattern 130 functions as a pad connected to a device (not shown), the problem in function may mean a reliability problem in the electrical connection with the device. Therefore, the height H2 of the second insulating layer 140 is made lower than the height H1 of the second circuit pattern 130 to solve the above reliability problem.

[0080] Meanwhile, if the height H2 of the second insulating layer 140 is too low, the second circuit pattern 130 is not stably supported. Therefore, the height H2 of the second insulating layer 140 is set to be 20% or more of the height H1 of the second circuit pattern 130. That is, if the height H2 of the second insulating layer 140 is less than 20% of the height H1 of the second circuit pattern 130, the second circuit pattern 130 is not stably supported by the second insulating layer 140, which may cause a problem that the second circuit pattern 130 collapses.

[0081] In addition, the height H2 of the second insulating layer 140 is 99% or less of the height of the second circuit pattern 130. That is, if the height H2 of the second insulating layer 140 exceeds 99% of the height H1 of the second circuit pattern 130, a portion of the resin of the second insulating layer 140 remains on the surface of the second circuit pattern 130, which may cause a reliability problem.

[0082] Meanwhile, in a typical printed circuit board, a solder resist is disposed on the first insulating layer 110 instead of the second insulating layer 140. However, if the solder resist is disposed without disposing the second insulating layer 140, the second circuit pattern 130 may collapse during the application of the solder resist. In addition, if the solder resist is removed while it is applied on the second circuit pattern 130, cracks are highly likely to occur due to the characteristics of the solder resist, which may cause problems in the reliability of the printed circuit board.

[0083] Therefore, in the embodiment, the second insulating layer 140 is preferentially disposed to stably support the fine second circuit pattern 130, and then the solder resist can be disposed.

[0084] Meanwhile, in an embodiment, a solder resist may be additionally disposed on the second insulating layer 140.

[0085] That is, the printed circuit board has an exposed area that exposes a pad for mounting a chip or connecting to an external board (e.g., a main board), and the structure in Figures 2 and 3 shows a portion of the entire area of ​​the printed circuit board that corresponds to the exposed area.

[0086] The printed circuit board includes an area covered with a solder resist on the outside, although the area covered with the solder resist is omitted in the drawings.

[0087] However, in the embodiment, the solder resist may be included.

[0088] Specifically, the printed circuit board may include a first region and a second region, the first region being a region where a surface of the second circuit pattern is to be exposed to the outside, and the second region being a region where a surface of the second circuit pattern is to be covered with a solder resist.

[0089] The supporting insulating layer is disposed in the spaces between the second circuit patterns, without dividing the first region and the second region.

[0090] In addition, the solder resist is disposed at a certain height in a region of the disposed support insulating layer corresponding to the second region, and the solder resist is disposed to cover the second circuit pattern located in the second region.

[0091] Meanwhile, in an embodiment, a filler may be exposed on an upper surface during the removal of the support insulating layer. The filler may impart a certain roughness to the surface of the support insulating layer. The solder resist is disposed on the upper surface of the support insulating layer located in the second region. At this time, the roughness of the support insulating layer imparted by the filler may improve the adhesive strength between the support insulating layer and the solder resist.

[0092] Hereinafter, the printed circuit board 100 according to the presence or absence of the second insulating layer 140 and the height of the second insulating layer 140 will be described.

[0093] Fig. 4a is a diagram showing a printed circuit board according to a comparative example, Fig. 4b is a diagram referred to in explaining a problem caused by the height of the second insulating layer, and Fig. 4c is a diagram showing a printed circuit board according to the present embodiment.

[0094] 4a(a), a second circuit pattern 30 is disposed on an insulating layer 10. At this time, the second circuit pattern 30 has a structure protruding above the upper surface of the insulating layer 10. Also, there is no supporting insulating layer on the insulating layer 10 to support the second circuit pattern 30.

[0095] Furthermore, as shown in (b) of FIG. 4a, the absence of the supporting insulating layer results in collapse and rubbing of the circuit pattern in area A, which corresponds to the fine pattern of the second circuit pattern 30 of the comparative example.

[0096] 4b (a), the printed circuit board 100 includes a first insulating layer 110 and a second insulating layer 140A disposed on the first insulating layer 110 to surround a second circuit pattern 130. In this case, the height of the second insulating layer 140A may be equal to or greater than the height of the second circuit pattern 130.

[0097] 4(b) and 4(c), the second insulating layer 140A may remain on the surface of a partial region C of the second circuit pattern 130, thereby reducing the surface area of ​​the second circuit pattern 130 exposed to the outside. If the surface area of ​​the second circuit pattern 130 is reduced, a component mounting area for mounting an element may be reduced, which may cause a mounting failure of the element.

[0098] 4c (a), (b) and (c), the printed circuit board 100 includes a first insulating layer 110 and a second insulating layer 140 disposed on the first insulating layer 110 to surround the second circuit pattern 130. In this case, the height of the second insulating layer 140 may be smaller than the height of the second circuit pattern 130. Preferably, the height of the second insulating layer 140 may be in the range of 20% to 99% of the height of the second circuit pattern 130.

[0099] According to this, in a second circuit pattern disposed on a first insulating layer and protruding above the surface of the first insulating layer, a second insulating layer is formed on the first insulating layer to support the sides of the second circuit pattern. According to this, problems such as collapse and rubbing of the protruding second circuit pattern can be solved by miniaturizing the second circuit pattern, thereby improving the reliability of the product.

[0100] In addition, in forming the second insulating layer, the upper surface of the second insulating layer is positioned lower than the upper surface of the second circuit pattern. That is, the height of the second insulating layer in the embodiment is lower than the height of the second circuit pattern. This solves the problem of the second insulating layer remaining on the surface of the second circuit pattern, which reduces the exposed area of ​​the surface of the second circuit pattern, and thereby solves the problem of the reduction in the component mounting area.

[0101] FIG. 5 is a diagram showing a change in shape of the second circuit pattern 130 according to an embodiment.

[0102] Referring to FIG. 5, the printed circuit board 100 includes a second circuit pattern 130 disposed on the first insulating layer 110 .

[0103] In this case, a second insulating layer 140 may be disposed on the first insulating layer 110 in the area between the second circuit patterns 130 .

[0104] Here, the second insulating layer 140 has a height in the range of 20% to 99% of the height of the second circuit pattern 130. For example, when the height of the second insulating layer 140 is 80% of the height of the second circuit pattern 130, an upper region of 20% of the entire area of ​​the second circuit pattern 130 is removed together during the etching process of the second insulating layer 140.

[0105] Therefore, the second circuit pattern 130 may include a first portion 131 disposed on the first insulating layer 110 and a second portion 132 disposed on the first portion 131 .

[0106] At this time, the first portion 131 is protected by the second insulating layer 140, and therefore the areas of the upper and lower surfaces may be the same.

[0107] On the other hand, the second portion 132 has an upper portion removed during the etching process of the second insulating layer 140, so that the area of ​​the upper surface is smaller than the area of ​​the lower surface. Preferably, the cross section of the second portion 132 may have a trapezoidal shape. For example, the side surface of the second portion 132 is disposed to be inclined with a certain inclination.

[0108] FIG. 6 is a diagram for explaining problems that arise depending on the height of the second insulating layer.

[0109] 6, the printed circuit board 100 includes a first insulating layer 110 and a second insulating layer 140B disposed on the first insulating layer 110 to surround a second circuit pattern 130. In this case, the height of the second insulating layer 140B may be smaller than the height of the second circuit pattern 130. Preferably, the height of the second insulating layer 140B may be less than 20% of the height of the second circuit pattern 130.

[0110] In this case, 80% or more of the upper region of the second circuit pattern 130 is removed together with the etching process of the second insulating layer 140. At this time, since the removed region of the second circuit pattern 130 is large, the uppermost region may have a triangular pyramid shape. Preferably, the upper region of the second circuit pattern 130 may have a triangular shape. As a result, a mounting area for mounting a device on the upper part of the second circuit pattern 130 is not secured, which may cause mounting defects.

[0111] Meanwhile, in the embodiment, the second insulating layer 140 may have a height of 20% to 99% of the height H1 of the second circuit pattern 130 through an etching process as described above.

[0112] In this case, the second insulating layer 140 may include a resin and an inorganic filler.

[0113] The inorganic filler disposed inside the second insulating layer 140 may be exposed to the surface by the etching.

[0114] Meanwhile, the etching of the second insulating layer 140 can be performed by sandblasting, or alternatively, by a plasma process.

[0115] FIG. 7a is a diagram showing the surface of a printed circuit board formed by sandblasting, and FIG. 7b is a diagram showing the surface of a printed circuit board formed by plasma.

[0116] 7a(a) is a SEM photograph of the surfaces of the second insulating layer 140 and the second circuit pattern 130, enlarged 3000 times, and FIG 7a(b) is a SEM photograph of the surface of the second circuit pattern 130, enlarged 10000 times.

[0117] As shown in FIG. 7a (a), an inorganic filler 150a is disposed in the second insulating layer 140, and the inorganic filler 150a may be exposed on the surface by performing a sandblasting process on the second insulating layer 140.

[0118] Also, as shown in FIG. 7a (b), it can be seen that the inorganic filler 150a contained in the second insulating layer 140 remains on the surface of the second circuit pattern 130.

[0119] At this time, the surface analysis results of the second circuit pattern are as shown in Table 1.

[0120] [Table 1]

[0121] As shown in Table 1, it was confirmed that the surface of the second circuit pattern 130 contained 1.591 wt.% O, 0.522 wt.% Si, and 97.887 wt.% Cu, the raw material of the second circuit pattern 130.

[0122] 7b(a) is a SEM photograph of the second insulating layer 140 and the surface of the second circuit pattern 130 formed by the plasma process, enlarged 3000 times, and FIG 7b(b) is a SEM photograph of the surface of the second circuit pattern 130, enlarged 10000 times.

[0123] As shown in FIG. 7b (a), an inorganic filler 150a is disposed within the second insulating layer 140, and the inorganic filler 150a may be exposed on the surface by performing a plasma process on the second insulating layer 140.

[0124] Also, as shown in FIG. 7b (b), it can be seen that the inorganic filler 150a contained in the second insulating layer 140 remains on the surface of the second circuit pattern 130.

[0125] At this time, the surface analysis results of the second circuit pattern are as shown in Table 2.

[0126] [Table 2]

[0127] As shown in Table 1, it was confirmed that the surface of the second circuit pattern 130 contains 3.725 wt.% O, 6.664 wt.% Si, and 89.611 wt.% Cu, which is the raw material of the second circuit pattern 130. In the embodiment, after forming the second insulating layer, the second insulating layer is etched so that the upper surface of the second insulating layer is located lower than the upper surface of the second circuit pattern. At this time, inorganic filler is present in the second insulating layer. Then, by etching the second insulating layer, the inorganic filler is protruding and disposed on the surface of the second insulating layer in the final product. According to this, the surface area and surface roughness of the second insulating layer can be increased by the protrusion of the inorganic filler, and thus the adhesive strength with a protective layer such as a solder resist disposed on the second insulating layer can be improved.

[0128] Hereinafter, a method for manufacturing a printed circuit board according to the embodiment shown in FIG. 2 will be described.

[0129] 8 to 10 are diagrams for explaining the steps of a method for manufacturing a printed circuit board according to an embodiment of the present invention in order of steps.

[0130] Referring to FIG. 8, a first insulating layer 110, a first circuit pattern 120 embedded in a lower region of the first insulating layer 110, and a second circuit pattern 130 protruding above the first insulating layer 110 are formed.

[0131] At this time, the first circuit pattern 120 and the second circuit pattern 130 may be formed by the ETS method.

[0132] To this end, the printed circuit board manufacturing process may begin with providing a separate carrier (not shown).

[0133] Once the separation carrier is prepared, a first circuit pattern 120 can be formed on the separation carrier. The first circuit pattern 120 can be formed using a typical printed circuit board manufacturing process such as an additive process, a subtractive process, a modified semi-additive process (MSAP), or a semi-additive process (SAP), and a detailed description thereof will be omitted here.

[0134] In addition, the first circuit pattern 120 may be made of a metal material having high electrical conductivity as a wiring for transmitting an electrical signal. To this end, the first circuit pattern 120 may be made of at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). In addition, the first circuit pattern 120 may be made of a paste or solder paste containing at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) having excellent bonding strength. Preferably, the first circuit pattern 120 may be made of copper (Cu), which has high electrical conductivity and is relatively inexpensive.

[0135] After the first circuit pattern 120 is formed, a first insulating layer 110 is formed on the separation carrier to cover the first circuit pattern 120. Thus, the first circuit pattern 120 may have a structure embedded in a lower region of the first insulating layer 110.

[0136] After the first circuit pattern 120 is formed, a second circuit pattern 130 may be formed on the first insulating layer 110 .

[0137] 9, a second insulating layer 140 is formed on the first insulating layer 110. The second insulating layer 140 is disposed to cover the second circuit pattern 130. Preferably, the second insulating layer 140 is disposed on the first insulating layer 110 at a height greater than the height of the second circuit pattern 130.

[0138] Thereafter, the second insulating layer 140 is etched by performing a sandblasting process or a plasma process.

[0139] At this time, as shown in FIG. 10, the conditions of the etching process are adjusted so that the height H2 of the second insulating layer 140 is 20% to 99% of the height H1 of the second circuit pattern .

[0140] That is, if the height H2 of the second insulating layer 140 is less than 20% of the height H1 of the second circuit pattern 130, the second insulating layer 140 may not stably support the second circuit pattern 130, which may cause the second circuit pattern 130 to collapse.

[0141] In addition, the height H2 of the second insulating layer 140 is 99% or less of the height of the second circuit pattern 130. That is, if the height H2 of the second insulating layer 140 exceeds 99% of the height H1 of the second circuit pattern 130, a portion of the resin of the second insulating layer 140 remains on the surface of the second circuit pattern 130, which may cause a reliability problem.

[0142] At this time, the inorganic filler 150 a may remain on the surface of the second insulating layer 140 , and a portion of the inorganic filler 150 a may remain on the surface of the second circuit pattern 130 .

[0143] According to an embodiment of the present invention, in a second circuit pattern disposed on a first insulating layer and protruding above a surface of the first insulating layer, a second insulating layer is formed on the first insulating layer to support a side of the second circuit pattern, whereby problems such as collapse and rubbing of the protruding second circuit pattern can be solved by miniaturizing the second circuit pattern, thereby improving the reliability of the product.

[0144] According to an embodiment of the present invention, the second insulating layer is formed such that the upper surface of the second insulating layer is located lower than the upper surface of the second circuit pattern. That is, the height of the second insulating layer in the embodiment is lower than the height of the second circuit pattern. This solves the problem of the second insulating layer remaining on the surface of the second circuit pattern, which reduces the exposed area of ​​the surface of the second circuit pattern, and thereby solves the problem of the reduction in the component mounting area.

[0145] In addition, in the embodiment, after forming the second insulating layer, the second insulating layer is etched so that the upper surface of the second insulating layer is located lower than the upper surface of the second circuit pattern. At this time, inorganic filler is present in the second insulating layer. Then, by etching the second insulating layer, the inorganic filler is disposed so as to protrude from the surface of the second insulating layer in the final product. According to this, the surface area and the surface roughness of the second insulating layer can be increased by the protrusion of the inorganic filler, and thus the adhesive strength with a protective layer such as a solder resist disposed on the second insulating layer can be improved.

[0146] The features, structures, effects, etc. described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to one embodiment. In addition, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person having ordinary skill in the art to which the embodiment belongs. Therefore, the contents related to such combinations and modifications should be interpreted as being included in the scope of the present invention.

[0147] Although the above description has focused on the embodiments, these are merely illustrative and do not limit the present invention. A person having ordinary skill in the art to which the present invention pertains may make various modifications and applications not exemplified above within the scope of the essential characteristics of the present embodiments. For example, each component specifically presented in the embodiments may be modified and implemented. The differences related to such modifications and applications should be interpreted as being included in the scope of the present invention as defined in the appended claims.

Claims

1. A first insulating layer; a first circuit pattern embedded within the first insulating layer; a second circuit pattern disposed on the first insulating layer and having a thickness equal to that of the first circuit pattern; a second insulating layer disposed on the first insulating layer and surrounding a side surface of the second circuit pattern; an upper surface of the second insulating layer is located closer to the first insulating layer than an upper surface of the second circuit pattern; the second circuit pattern includes a first portion that protrudes onto the second insulating layer and does not overlap the second insulating layer along a horizontal direction, and a second portion that overlaps the second insulating layer along the horizontal direction, the first portion of the second circuit pattern has a side surface having a first inclination angle that increases in width in a horizontal direction toward the first insulating layer; the second portion of the second circuit pattern has a side surface having a second inclination angle different from the first inclination angle, the first circuit pattern has a side surface generally at the second inclination angle; A circuit board, wherein the side of the second circuit pattern having the first inclination angle is not in contact with the second insulating layer.

2. the second insulating layer includes a resin and an inorganic filler disposed in the resin; The circuit board according to claim 1 , wherein the upper surface of the second insulating layer includes a first upper surface corresponding to the resin and a second upper surface corresponding to the inorganic filler.

3. The circuit board according to claim 1 , wherein a width of the upper surface of the second circuit pattern is smaller than a width of a lower surface of the second circuit pattern.

4. The circuit board according to claim 1 , wherein the height of the second insulating layer is 20% to 99% of the height of the second circuit pattern.

5. further comprising a protective layer disposed on the second insulating layer; The circuit board according to claim 1 , wherein the second circuit pattern is an outermost layer circuit pattern arranged on the outermost side.

6. The circuit board according to claim 5 , wherein the protective layer includes a solder resist.

7. the second circuit pattern includes a fine pattern, The width of the fine pattern is 6 μm to 15 μm, 2. The circuit board according to claim 1, wherein the spacing between the plurality of fine patterns is 8 μm to 15 μm.

8. A circuit board as described in claim 1, wherein the vertical length of the first portion having the first inclination angle is different from the vertical length of the second portion having the second inclination angle.

9. A circuit board as described in claim 8, wherein the vertical length of the first portion having the first inclination angle is shorter than the vertical length of the second portion having the second inclination angle.

10. The circuit board of claim 1, wherein the second inclination angle is perpendicular to the upper surface of the first insulating layer.

11. The circuit board according to claim 5 , wherein at least a portion of the lower surface of the protective layer is located lower than an upper surface of the second circuit pattern.

12. A first insulating layer; a first circuit pattern embedded within the first insulating layer; a second circuit pattern disposed on the first insulating layer and having a thickness equal to that of the first circuit pattern; a second insulating layer disposed on the first insulating layer and surrounding a side surface of the second circuit pattern; an upper surface of the second insulating layer is located lower than an upper surface of the second circuit pattern; an upper surface of the second insulating layer is located closer to the first insulating layer than an upper surface of the second circuit pattern; the second circuit pattern includes a first portion that protrudes onto the second insulating layer and does not overlap the second insulating layer along a horizontal direction, and a second portion that overlaps the second insulating layer along the horizontal direction, the first portion of the second circuit pattern has a side surface having a first inclination angle that increases in width in a horizontal direction toward the first insulating layer; the second portion of the second circuit pattern has a side surface having a second inclination angle different from the first inclination angle, the first circuit pattern has a side surface generally at the second inclination angle; the side surface of the second circuit pattern having the first inclination angle is not in contact with the second insulating layer; the side surface of the second circuit pattern having the second inclination angle is in contact with the second insulating layer; A circuit board, wherein a side surface of the first circuit pattern is entirely in contact with the first insulating layer.

13. the second insulating layer includes a resin and an inorganic filler disposed in the resin; The circuit board according to claim 12 , wherein the upper surface of the second insulating layer includes a first upper surface corresponding to the resin and a second upper surface corresponding to the inorganic filler.

14. The circuit board according to claim 12, wherein the thickness of the second insulating layer is 20% to 99% of the thickness of the second circuit pattern.

15. The circuit board according to claim 14 , wherein a width of the upper surface of the second circuit pattern is smaller than a width of the lower surface of the second circuit pattern.

16. further comprising a protective layer disposed on the second insulating layer; The circuit board according to claim 12 , wherein the second circuit pattern is an outermost layer circuit pattern arranged on the outermost side.

17. The width of the second circuit pattern is 6 μm to 15 μm; The circuit board according to claim 12, wherein the spacing between the plurality of second circuit patterns is between 8 μm and 15 μm.

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