Electronic components and their manufacturing method

Abstract

This electronic component (100) comprises a substrate (10), a first electrode layer (20), an insulating layer (30), a second electrode layer (40), and a via conductor (50). The first electrode layer (20) is provided on the substrate (10). The first electrode layer (20) has conductive fillers (21) and a binder (22) including the conductive filler (21). The insulating layer (30) is provided on the first electrode layer (20). In the insulating layer (30), a via hole (31) is formed. The via hole (31) passes through the insulating layer (30) in the stacking direction of the substrate (10), the first electrode layer (20), and the insulating layer (30). The second electrode layer (40) is provided on the insulating layer (30). The via conductor (50) is provided inside the via hole (31). The via conductor (50) electrically connects the first electrode layer (20) and the second electrode layer (40). A portion of the first electrode layer (20) which overlaps the via hole (31) when viewed in a top view includes a connection layer (231). The content of the binder (22) in the connection layer (231) is relatively less than the content of the binder (22) in a portion of the first electrode layer (20), the portion being positioned on the outside of the via hole (31).

Description

[Technical field]

[0001] The present disclosure relates to electronic components and methods for manufacturing electronic components. [Background technology]

[0002] For example, in multilayer boards including boards with embedded components, a wiring structure that ensures electrical connection between layers through non-through via holes (Interstitial Via Holes, IVHs) is widely used in order to mount elements that constitute electronic circuits at a high density. A method for manufacturing a multilayer board having such a wiring structure is described in, for example, Patent Document 1.

[0003] In the manufacturing method of Patent Document 1, first, an inner layer conductor circuit is formed as an electrode layer on both sides of an insulating base material to prepare an inner layer circuit board. Next, after surface treatment of the inner layer conductor circuit, an insulating layer with copper foil is formed on both sides of the inner layer circuit board. Next, the copper foil is etched to form an opening in the copper foil, and a laser is irradiated into the opening to form a via hole in the insulating layer that reaches the inner layer conductor circuit. Then, electroless plating metal as a via conductor is filled into the via hole. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2001-156452 A Summary of the Invention [Problem to be solved by the invention]

[0005] As described in Patent Document 1, when manufacturing electronic components including non-through via holes, such as multi-layer boards, via holes are formed in an insulating layer to expose an electrode layer, and a via conductor is filled in the via hole to connect the electrode layer and the via conductor. The electrode layer is made of, for example, a plating film or a sputtering film. However, with such a method, it is difficult to firmly connect the electrode layer and the via conductor. If the connection strength between the electrode layer and the via conductor is insufficient, for example, when stress is generated in the electronic component, peeling may occur at the interface between the electrode layer and the via conductor, and the conductivity between the electrode layer and the via conductor may not be ensured. Therefore, a problem of reduced reliability of the electronic component may occur.

[0006] An object of the present disclosure is to improve the connection strength between an electrode layer and a via conductor and ensure the reliability of an electronic component. [Means for solving the problem]

[0007] The electronic component according to the present disclosure includes a substrate, a first electrode layer, an insulating layer, a second electrode layer, and a via conductor. The first electrode layer is provided on the substrate. The first electrode layer has a conductive filler and a binder containing the conductive filler. The insulating layer is provided on the first electrode layer. A via hole is formed in the insulating layer. The via hole penetrates the insulating layer in a stacking direction of the substrate, the first electrode layer, and the insulating layer. The second electrode layer is provided on the insulating layer. The via conductor is provided in the via hole. The via conductor electrically connects the first electrode layer and the second electrode layer. A portion of the first electrode layer that overlaps with the via hole in a top view includes a connection layer connected to the via conductor. The binder content of the connection layer is smaller than the binder content of a portion of the first electrode layer located outside the via hole. Effect of the Invention

[0008] According to the present disclosure, the connection strength between the electrode layer and the via conductor can be improved, thereby ensuring the reliability of the electronic component. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view of an electronic component according to an embodiment. [Diagram 2] FIG. 2 is a partially enlarged cross-sectional view of the electronic component shown in FIG. [Diagram 3] FIG. 3 is a flowchart of the method for manufacturing an electronic component according to the embodiment. [Figure 4A] FIG. 4A is a schematic diagram for explaining a method for manufacturing an electronic component. [Figure 4B] FIG. 4B is a schematic diagram for explaining the method for manufacturing the electronic component. [Figure 4C] FIG. 4C is a schematic diagram for explaining the method for manufacturing the electronic component. [Figure 4D] FIG. 4D is a schematic diagram for explaining the method for manufacturing the electronic component. [Figure 4E] FIG. 4E is a schematic diagram for explaining a method for manufacturing an electronic component. [Figure 4F] FIG. 4F is a schematic diagram for explaining a method for manufacturing an electronic component. [Figure 4G] FIG. 4G is a schematic diagram for explaining a method for manufacturing an electronic component. [Figure 4H] FIG. 4H is a schematic diagram for explaining the method for manufacturing the electronic component. [Diagram 5] FIG. 5 is a scanning electron microscope image of the surface of the electronic component according to the embodiment. [Figure 6] FIG. 6 is a scanning electron microscope image of another surface of the electronic component according to the embodiment. [Figure 7] FIG. 7 is a cross-sectional view of an electronic component according to a modified example of the above embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The electronic component according to the embodiment includes a substrate, a first electrode layer, an insulating layer, a second electrode layer, and a via conductor. The first electrode layer is provided on the substrate. The first electrode layer has a conductive filler and a binder containing the conductive filler. The insulating layer is provided on the first electrode layer. A via hole is formed in the insulating layer. The via hole penetrates the insulating layer in a stacking direction of the substrate, the first electrode layer, and the insulating layer. The second electrode layer is provided on the insulating layer. The via conductor is provided in the via hole. The via conductor electrically connects the first electrode layer and the second electrode layer. A portion of the first electrode layer that overlaps with the via hole in a top view includes a connection layer connected to the via conductor. The binder content of the connection layer is smaller than the binder content of a portion of the first electrode layer located outside the via hole (first configuration).

[0011] In the electronic component according to the first configuration, a portion of the first electrode layer on the substrate that overlaps with the via hole of the insulating layer in a top view includes a connection layer that is connected to the via conductor. Since the binder content in the connection layer is relatively small, a part of the via conductor can enter the gap of the conductive filler. This allows the connection layer to be firmly connected to the via conductor, and the connection strength between the first electrode layer including the connection layer and the via conductor can be improved. Therefore, peeling between the first electrode layer and the via conductor is unlikely to occur, and a decrease in conductivity due to peeling can be prevented. This ensures the reliability of the electronic component.

[0012] In the connection layer, the conductive fillers may be bonded to one another, and parts of the via conductors may fill the gaps between the bonded conductive fillers (second configuration).

[0013] According to the second configuration, a part of the via conductor fills the gap between the conductive filler in the connection layer of the first electrode layer. This increases the contact area between the first electrode layer and the via conductor, thereby reducing the wiring resistance between the first electrode layer and the via conductor.

[0014] An electronic component according to another embodiment includes a substrate, a first electrode layer, an insulating layer, a second electrode layer, and a via conductor. The first electrode layer is provided on the substrate. The first electrode layer includes a conductive filler and a binder containing the conductive filler. The insulating layer is provided on the first electrode layer. A via hole is formed in the insulating layer. The via hole penetrates the insulating layer in a stacking direction of the substrate, the first electrode layer, and the insulating layer. The second electrode layer is provided on the insulating layer. The via conductor is provided in the via hole. The via conductor electrically connects the first electrode layer and the second electrode layer. A portion of the first electrode layer that overlaps with the via hole in a top view includes a connection layer. In the connection layer, the conductive fillers are bonded to each other. The connection layer is connected to the via conductor by a portion of the via conductor entering a gap between the bonded conductive fillers (third configuration).

[0015] In the electronic component according to the third configuration, a portion of the first electrode layer on the substrate that overlaps with the via hole of the insulating layer in a top view includes a connection layer that is connected to the via conductor. In the connection layer, the conductive fillers are bonded to each other, and a part of the via conductor enters the gap between the bonded conductive fillers. This allows the connection layer to be firmly connected to the via conductor, and the connection strength between the first electrode layer including the connection layer and the via conductor can be improved. Therefore, peeling between the first electrode layer and the via conductor is unlikely to occur, and a decrease in conductivity due to peeling can be prevented. This ensures the reliability of the electronic component. In addition, the contact area between the first electrode layer and the via conductor can be increased by the part of the via conductor entering the gap between the conductive fillers, and the wiring resistance between the first electrode layer and the via conductor can be reduced.

[0016] The first electrode layer may further include a base layer that is disposed between the connection layer and the substrate, and the base layer has a binder content greater than that of the connection layer (fourth configuration).

[0017] According to the fourth configuration, a base layer having a higher binder content than the connection layer is disposed between the connection layer and the substrate, and the base layer can protect the substrate.

[0018] The conductive filler may have a melting point of 1100° C. or less (fifth configuration).

[0019] In general, after forming a via hole in an insulating layer, a pretreatment such as activation is performed on the surface on which the via conductor is to be formed before the via conductor is introduced into the via hole. This pretreatment is suitable for the metal type used as the via conductor. For example, copper or other metals having a melting point of 1100°C or less are often used for the via conductor. In consideration of this, in the fifth configuration, a conductive filler having a melting point of 1100°C or less is used as the conductive filler contained in the first electrode layer. That is, the surface of the first electrode layer, which becomes the bottom surface of the via hole, is in a state suitable for the conventional pretreatment. Therefore, electronic components can be manufactured without making significant changes to the conventional manufacturing process.

[0020] In the portion of the first electrode layer located outside the via hole, the content of the conductive filler may be 30 vol % or more and 80 vol % or less (sixth configuration).

[0021] In the sixth configuration, the first electrode layer contains a rich conductive filler at a content of 30 vol % or more and 80 vol % or less, thereby ensuring good conductivity of the first electrode layer.

[0022] The first electrode layer may have a thickness of not less than 10 μm and not more than 40 μm (seventh configuration).

[0023] In the seventh configuration, the thickness of the first electrode layer is 10 μm or more and 40 μm or less. This allows the electrical resistance of the first electrode layer to be sufficiently small. In addition, since the thickness of the first electrode layer is not too large, the first electrode layer can be easily formed on a substrate in the manufacturing process of the electronic component.

[0024] The connection layer may have a surface roughness Rz of 1 μm or more and 10 μm or less (eighth configuration).

[0025] In the eighth configuration, in the first electrode layer, the surface roughness Rz of the connection layer is 1 μm or more and 10 μm or less. This makes it possible to ensure the contact area between the connection layer and the via conductor, and to further improve the connection strength between the first electrode layer and the via conductor. In addition, it is possible to further reduce the wiring resistance between the first electrode layer and the via conductor.

[0026] The insulating layer may have a thickness of not less than 20 μm and not more than 50 μm (ninth configuration).

[0027] In a ninth configuration, the thickness of the insulating layer is 20 μm or more and 50 μm or less, thereby ensuring the insulating properties of the insulating layer while preventing the electrical resistance of the via holes provided in the insulating layer from increasing.

[0028] The insulating layer may be made of an epoxy resin (tenth configuration).

[0029] In the tenth configuration, the insulating layer between the electrode layers is made of an epoxy resin, which is suitable as an insulating layer because it is easy to process, for example, by a laser and has relatively high insulating properties.

[0030] The via hole may have, for example, a circular cross section. In this case, the diameter of the via hole on the first electrode layer side may be 40 μm or more and 120 μm or less (eleventh configuration).

[0031] In an eleventh configuration, the diameter of the via hole on the first electrode layer side is not less than 40 μm and not more than 120 μm, thereby making it possible to more reliably connect the via conductor in the via hole to the connection layer of the first electrode layer.

[0032] The insulating layer is made of, for example, a resin. In this case, it is preferable that the via conductor includes an electroless plating layer and an electrolytic plating layer. The electroless plating layer is provided on a side wall of the via hole. The electrolytic plating layer is provided on the electroless plating layer (twelfth configuration).

[0033] When the insulating layer is made of resin, it is difficult to directly form an electrolytic plating layer on the side wall of the via hole provided in the insulating layer. Therefore, in the twelfth configuration, an electroless plating layer is provided as a seed layer on the side wall of the via hole, and an electrolytic plating layer is superimposed on the electroless plating layer. This allows the electrolytic plating layer to be provided on the side wall of the via hole, and ensures adhesion between the insulating layer and the via conductor including the electrolytic plating layer.

[0034] The electronic component may further include a conductive layer provided between the substrate and the first electrode layer (a thirteenth configuration). The conductive layer is, for example, a carbon layer containing a carbon filler (a fourteenth configuration).

[0035] A method for manufacturing an electronic component according to an embodiment includes the steps of preparing a substrate, applying a conductive paste containing a conductive filler and a binder in which the conductive filler is dispersed onto the substrate to form a first electrode layer, forming an insulating layer on the first electrode layer, forming a second electrode layer on the insulating layer, forming via holes in the insulating layer to expose portions of the first electrode layer from the via holes, heating the portions of the first electrode layer exposed from the via holes to melt and bond the conductive fillers together and to burn the binder, thereby forming a porous layer in which gaps are generated between the conductive fillers and which is porous, and forming via conductors in the via holes after forming the porous layer on the first electrode layer (fifteenth configuration).

[0036] In the manufacturing method according to the embodiment, the portion of the first electrode layer exposed from the via hole is heated, and the conductive fillers are melted and bonded to each other in the portion, and the binder is burned, so that gaps are generated between the conductive fillers to form a porous layer. As a result, when the via conductor is formed, a part of the via conductor can be inserted and filled into the gaps between the conductive fillers in the porous layer. Therefore, the first electrode layer is firmly connected to the via conductor, and the connection strength between the first electrode layer and the via conductor can be improved. Therefore, the first electrode layer and the via conductor are less likely to peel off, and the decrease in conductivity due to peeling can be prevented. Therefore, the reliability of the manufactured electronic component can be ensured. In addition, the contact area between the first electrode layer and the via conductor can be increased by the via conductor penetrating into the porous layer formed in the first electrode layer, so that the wiring resistance between the first electrode layer and the via conductor can be reduced.

[0037] In the above manufacturing method, a porous layer can be formed by irradiating a laser onto a portion of the first electrode layer exposed from the via hole (sixteenth configuration).

[0038] According to the sixteenth configuration, the porous layer is formed by irradiating the portion of the first electrode layer exposed from the via hole with a laser. In the case of laser processing, the temperature controllability of the processing surface is good, so that the porous layer can be easily formed.

[0039] The laser preferably has a wavelength in the infrared region (17th configuration).

[0040] In the manufacturing method according to the embodiment, the first electrode layer is formed using a conductive paste containing a conductive filler and a binder. For example, the binder, which is a resin, has a high infrared absorption rate and is easily processed by a laser having a wavelength in the infrared region. In contrast, for example, the conductive filler, which is a metal, has a low infrared absorption rate and is difficult to process by a laser having a wavelength in the infrared region. Therefore, when a laser having a wavelength in the infrared region is irradiated to the first electrode layer as in the seventeenth configuration, not only can the binder be burned and eliminated more reliably, but also the conductive filler can be appropriately melted and bonded. Therefore, a porous layer can be easily formed in the portion of the first electrode layer exposed from the via hole.

[0041] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In each drawing, the same or corresponding components are denoted by the same reference characters, and the same description will not be repeated.

[0042] [Electronic component configuration] 1 is a cross-sectional view of an electronic component 100 according to this embodiment. The electronic component 100 is a component that includes a wiring structure that ensures interlayer connection by via holes. The electronic component 100 may be, for example, a multilayer substrate (package substrate) such as a substrate with embedded components, or a part thereof.

[0043] 1, electronic component 100 includes substrate 10, first electrode layer 20, insulating layer 30, second electrode layer 40, and via conductor 50. In electronic component 100, substrate 10, first electrode layer 20, insulating layer 30, and second electrode layer 40 are stacked in this order. For ease of explanation, hereinafter, the stacking direction of substrate 10, first electrode layer 20, insulating layer 30, and second electrode layer 40 may be referred to as the up-down direction, and the substrate 10 side may be referred to as the bottom, and the second electrode layer 40 side may be referred to as the top.

[0044] The substrate 10 has a plate or foil shape. The substrate 10 is conductive and is made of, for example, a metal. When the electronic component 100 is a component-embedded substrate or a part thereof and includes a capacitor, the substrate 10 may be the anode of the capacitor. For example, when the substrate 10 is provided in the electronic component 100 as the anode of an electrolytic capacitor, the substrate 10 is preferably made of a valve metal. Examples of the valve metal include simple metals such as aluminum, tantalum, niobium, titanium, and zirconium, or alloys containing at least one of these metals. It is particularly preferable that the valve metal is aluminum or an aluminum alloy.

[0045] The first electrode layer 20 is provided on the substrate 10. In the example shown in FIG. 1, the first electrode layer 20 is disposed on one surface of the substrate 10. When the substrate 10 is an anode of a capacitor, the first electrode layer 20 may be a cathode of the capacitor. The first electrode layer 20 preferably has a thickness of 10 μm or more and 40 μm or less. The thickness of the first electrode layer 20 refers to the length of the first electrode layer 20 in the vertical direction. The first electrode layer 20 includes a conductive filler 21 and a binder 22.

[0046] The conductive filler 21 has, for example, a granular, flake, or rod shape. The conductive filler 21 has electrical conductivity. The conductive filler 21 may be a metal filler containing a metal such as copper, nickel, or silver as a main component, or may be a non-metal filler. The conductive filler 21 has, for example, a melting point of 1100° C. or less. The conductive filler 21 is preferably a copper filler containing copper as a main component.

[0047] The binder 22 includes the conductive filler 21. That is, a large number of the conductive fillers 21 are dispersed in the binder 22. As the binder 22, a binder used in a known conductive adhesive can be appropriately selected and used. The binder 22 is, for example, a resin. The binder 22 may be a thermosetting resin.

[0048] The insulating layer 30 is provided on the first electrode layer 20. In the example shown in Fig. 1, the insulating layer 30 is disposed on the substrate 10 and the first electrode layer 20 so as to cover the entire first electrode layer 20. The insulating layer 30 preferably has a thickness of 20 µm or more and 50 µm or less. The thickness of the insulating layer 30 refers to the length of the insulating layer 30 in the vertical direction.

[0049] The insulating layer 30 is typically made of a resin. For example, the insulating layer 30 can be made of a thermosetting resin. The insulating layer 30 is preferably made of an epoxy-based resin. Examples of the epoxy-based resin include a phenol-cured epoxy resin, a cyanate ester / epoxy mixed resin, and a phenol ester-cured epoxy resin.

[0050] A via hole 31 is formed in the insulating layer 30. The via hole 31 penetrates the insulating layer 30 in the stacking direction (vertical direction) of the substrate 10, the first electrode layer 20, and the insulating layer 30. The via hole 31 extends downward from the upper surface of the insulating layer 30 and reaches the first electrode layer 20. In the example shown in FIG. 1, the opening area of ​​the via hole 31 on the first electrode layer 20 side is larger than the opening area of ​​the via hole 31 on the opposite side. The via hole 31 is formed in a tapered shape whose width gradually narrows toward the first electrode layer 20 in a cross-sectional view of the electronic component 100 including the central axis of the via hole 31. However, the via hole 31 may have a constant width throughout in a cross-sectional view of the electronic component 100 including the central axis of the via hole 31. In other words, the opening area of ​​the via hole 31 on the first electrode layer 20 side and the opening area of ​​the via hole 31 on the opposite side may be substantially equal.

[0051] The via hole 31 may have, for example, a circular cross section. The cross section of the via hole 31 is a cross section of the via hole 31 when cut along a plane perpendicular to the central axis of the via hole 31. When the cross section of the via hole 31 is circular, the diameter of the via hole 31 on the first electrode layer 20 side is preferably 40 μm or more and 120 μm or less.

[0052] The second electrode layer 40 is provided on the insulating layer 30. In the example shown in Fig. 1, the second electrode layer 40 is provided around the via hole 31 on the surface of the insulating layer 30 opposite the first electrode layer 20.

[0053] The second electrode layer 40 is conductive. The second electrode layer 40 is made of, for example, a metal. The second electrode layer 40 may be, for example, a metal film mainly composed of copper, silver, gold, or the like. The metal film is, for example, a plated film or a sputtered film. Alternatively, the second electrode layer 40 may contain a conductive filler and a binder, similar to the first electrode layer 20.

[0054] The via conductor 50 is provided in the via hole 31, and electrically connects the first electrode layer 20 and the second electrode layer 40. In the example shown in FIG. 1, the via conductor 50 includes an electroless plating layer 51 and an electrolytic plating layer 52.

[0055] The electroless plating layer 51 is provided directly on the sidewall of the via hole 31. The electroless plating layer 51 is also provided on the first electrode layer 20 exposed from the lower opening of the via hole 31 and on the second electrode layer 40 formed on the insulating layer 30. That is, the electroless plating layer 51 is continuously formed from the bottom of the via hole 31 to the upper surface of the insulating layer 30 so as to cover the first electrode layer 20, the sidewall of the via hole 31, and the second electrode layer 40. The electroless plating layer 51 is a metal film deposited by a chemical reaction. Although not particularly limited, the electroless plating layer 51 is preferably an electroless copper plating layer.

[0056] The electrolytic plating layer 52 is provided on the electroless plating layer 51. The electrolytic plating layer 52 covers the entire electroless plating layer 51. The electrolytic plating layer 52 is a metal coating deposited using electricity. Although not particularly limited, the electrolytic plating layer 52 is preferably an electrolytic copper plating layer.

[0057] 1, a so-called filled via is used to connect electrode layers 20, 40, and a via conductor 50 including an electroless plating layer 51 and an electrolytic plating layer 52 is filled in via hole 31. However, via conductor 50 may be recessed along via hole 31. In other words, electrode layers 20, 40 may be connected by a so-called conformal via.

[0058] Fig. 2 is an enlarged view of via hole 31 and its vicinity in the cross section of electronic component 100 shown in Fig. 1. Hereinafter, first electrode layer 20, in particular the portion of first electrode layer 20 corresponding to via hole 31, will be described in detail with reference to Fig. 2.

[0059] As shown in FIG. 2, a portion of the first electrode layer 20 corresponding to the via hole 31, in other words, a portion (via hole portion) 23 located directly below the via hole 31, includes a connection layer 231 and a base layer 232. The via hole portion 23 is a portion of the first electrode layer 20 that overlaps with the via hole 31 in a top view of the electronic component 100, and is a portion that is exposed from the via hole 31 when the via conductor 50 is not present. The via hole portion 23 is disposed inside the via hole 31 when the first electrode layer 20 is viewed from the insulating layer 30 side. The connection layer 231 is a layer that is disposed adjacent to the via hole 31 and is connected to a part of the via conductor 50. The base layer 232 is disposed between the connection layer 231 and the substrate 10.

[0060] The connection layer 231 and the base layer 232 each contain a conductive filler 21. However, the state of the conductive filler 21 differs between the connection layer 231 and the base layer 232. In the connection layer 231, the conductive fillers 21 are bonded to each other. More specifically, in the connection layer 231, a plurality of conductive fillers 21 are fused and bonded to form a network structure. On the other hand, in the base layer 232, the conductive fillers 21 are overlapped and in contact with each other, but are not bonded to each other. Also, in a portion (non-via hole portion) 24 of the first electrode layer 20 located outside the via hole 31, the conductive fillers 21 are overlapped and in contact with each other, but are not bonded to each other.

[0061] In the base layer 232 of the via hole portion 23, the gaps between the overlapping conductive fillers 21 are filled with the binder 22. In the non-via hole portion 24, the gaps between the overlapping conductive fillers 21 are also filled with the binder 22. On the other hand, in the connection layer 231 of the via hole portion 23, the amount of binder 22 is smaller than that in the base layer 232 and the non-via hole portion 24. The connection layer 231 may be substantially free of the binder 22. In the connection layer 231, a part of the via conductor 50 enters the gaps between the conductive fillers 21 bonded to each other. That is, in the connection layer 231, a part of the via conductor 50 fills the gaps between the conductive fillers 21 instead of the binder 22. As a result, the connection layer 231 is firmly connected to the via conductor 50. The thickness (length in the vertical direction) of the connection layer 231 can be, for example, 1 μm or more and 30 μm or less.

[0062] As described above, in the via hole portion 23, the amount of the binder 22 contained in the connection layer 231 is less than the amount of the binder 22 contained in the base layer 232. Also, the amount of the binder 22 contained in the connection layer 231 is less than the amount of the binder 22 contained in the non-via hole portion 24. That is, the content (vol%) of the binder 22 in the connection layer 231 is less than the content (vol%) of the binder 22 in each of the non-via hole portion 24 and the base layer 232. When the content of the binder 22 in the connection layer 231 is V1 and the content of the binder 22 in the base layer 232 is V2, V1 / V2 is, for example, 0.95 or less. When the content of the binder 22 in the connection layer 231 is V1 and the content of the binder 22 in the non-via hole portion 24 is V0, V1 / V0 is, for example, 0.95 or less.

[0063] The content of the conductive filler 21 in the non-via hole portion 24 is preferably 30 vol% or more and 80 vol% or less. In addition, in the non-via hole portion 24, the conductive filler 21 preferably has a particle size (average particle size) of 0.1 μm or more and 25.0 μm or less. The content of the conductive filler 21 in the base layer 232 of the via hole portion 23 may be 30 vol% or more and 80 vol% or less, similar to the non-via hole portion 24. The average particle size of the conductive filler 21 in the base layer 232 may be 0.1 μm or more and 25.0 μm or less, similar to the non-via hole portion 24.

[0064] The respective contents (vol%) of the conductive filler 21 and the binder 22 in the via hole portion 23 can be measured using an image of a cross section of the electronic component 100. For example, an elemental mapping image of an energy dispersive X-ray spectroscopy (SEM-EDX) of a cross section including the central axis of the via hole 31 is obtained, and the contents of the binder 22 for each of the connection layer 231 and the base layer 232 can be obtained based on the area ratio of the binder 22 in this image. Similarly, the content of the conductive filler 21 in the base layer 232 can be obtained based on the area ratio of the conductive filler 21 in the elemental mapping image of the cross section including the central axis of the via hole 31. Furthermore, the average particle size of the conductive filler 21 in the base layer 232 can be calculated using the elemental mapping image of the cross section including the central axis of the via hole 31.

[0065] The respective contents (vol%) of the conductive filler 21 and the binder 22 in the non-via hole portion 24 can also be measured using an image of a cross section of the electronic component 100. For example, an element mapping image of the cross section at a position sufficiently away from the periphery of the via hole 31 is obtained, and the respective contents of the conductive filler 21 and the binder 22 can be obtained based on the area ratio of the binder 22 in this image. In addition, the average particle size of the conductive filler 21 in the non-via hole portion 24 can be calculated using the image. Note that the conductive filler 21 does not necessarily have to be spherical.

[0066] The connection layer 231 of the via hole portion 23 preferably has a surface roughness Rz of 1 μm or more and 10 μm or less. More specifically, the surface roughness Rz of the surface (upper surface) of the connection layer 231 on the via hole 31 side is preferably 1 μm or more and 10 μm or less. The surface roughness Rz is the maximum height roughness defined in JIS B 0601:2013. The surface roughness Rz of the non-via hole portion 24 is smaller than the surface roughness Rz of the connection layer 231. The surface roughness Rz can also be calculated based on the cross-sectional element mapping images of the via hole portion 23 and the non-via hole portion 24, like the respective contents of the conductive filler 21 and the binder 22.

[0067] [Electronic component manufacturing method] Next, an example of a method for manufacturing electronic component 100 will be described with reference to Fig. 3 and Figs. 4A to 4H. Fig. 3 is a flowchart of the method for manufacturing electronic component 100. Figs. 4A to 4H are schematic views for explaining each step included in the manufacturing method.

[0068] 3, the method for manufacturing the electronic component 100 includes a step S1 of preparing a substrate 10, a step S2 of forming a first electrode layer 20 on the substrate 10, a step S3 of forming an insulating layer 30 on the first electrode layer 20, a step S4 of forming a second electrode layer 40 on the insulating layer 30, a step S5 of forming via holes 31 in the insulating layer 30, a step S6 of forming a porous layer in the first electrode layer 20, and a step S7 of forming via conductors 50 in the via holes 31. Each step will be described in detail below.

[0069] 3 and 4A, in step S1, the substrate 10 is prepared. As described above, the substrate 10 has electrical conductivity. The substrate 10 may be, for example, a metal foil.

[0070] The substrate 10 may be subjected to a predetermined treatment depending on its application. For example, if the substrate 10 is to be used as the anode of an electrolytic capacitor and is made of a valve metal, the surface of the substrate 10 may be subjected to anodizing treatment (chemical conversion treatment). This allows a dielectric layer made of an oxide film to be formed on the surface of the substrate 10.

[0071] 3 and 4B, in step S2, the conductive paste is applied onto the substrate 10 to form the first electrode layer 20. The conductive paste includes the conductive filler 21 and the binder 22 described above. The conductive paste can be prepared, for example, by blending the conductive filler 21 having a nominal average particle size of 0.1 μm or more and 25.0 μm or less with the binder 22 in a fluid state. The content of the conductive filler 21 in the conductive paste is, for example, 30 vol% or more and 80 vol% or less. The conductive paste is applied to a predetermined region on the substrate 10 by, for example, sponge transfer, screen printing, spray application, a dispenser, inkjet printing, or the like. The conductive paste is applied onto the substrate 10 with a thickness of, for example, 10 μm or more and 40 μm or less.

[0072] The conductive paste is applied onto the substrate 10, dried, and then fired to form the first electrode layer 20. The conductive paste is fired at a temperature (e.g., about 200° C.) that can thermally harden the binder 22 and does not melt the conductive filler 21, for example.

[0073] 3 and 4C, in step S3, an insulating layer 30 is formed on the first electrode layer 20. The method for forming the insulating layer 30 is not particularly limited. For example, the insulating layer 30, which is a film-like resin, is prepared, and the insulating layer 30 is laminated on the substrate 10 with the first electrode layer 20 by using a vacuum laminator. Thereafter, the laminate of the substrate 10, the first electrode layer 20, and the insulating layer 30 is heated at a predetermined temperature for a predetermined time to thermally cure the insulating layer 30.

[0074] 3, 4D, and 4E, in step S4, a second electrode layer 40 is formed on the insulating layer 30. For example, a metal film 41 serving as a seed layer for the second electrode layer 40 may be formed on the surface of the insulating layer 30 by performing electrolytic plating or electroless plating on the insulating layer 30, as shown in FIG. 4D. Then, a part of the metal film 41 is removed by photolitho-etching, so that the second electrode layer 40 can be formed as shown in FIG. 4E. At this time, the metal film 41 is also removed from a portion of the insulating layer 30 where the via hole 31 is to be formed.

[0075] 3 and 4F, in step S5, a via hole 31 is formed in the insulating layer 30, and a part of the first electrode layer 20 is exposed from the via hole 31. For example, the insulating layer 30 is processed using a laser processing machine, so that the via hole 31 penetrating the insulating layer 30 can be formed. The laser for processing the insulating layer 30 is, for example, a CO2 laser. The laser preferably has a wavelength in the infrared region.

[0076] Following step S5, step S6 is performed. Referring to Fig. 3 and Fig. 4G, in step S6, the portions of the first electrode layer 20 exposed from the via holes 31 are heated to melt the conductive fillers 21 and bond them together, and the binder 22 is combusted. As a result, a porous layer 25 is formed in the portions of the first electrode layer 20 exposed from the via holes 31.

[0077] In step S6, a laser is irradiated to the portion of the first electrode layer 20 exposed from the via hole 31 to form a porous layer 25. The porous layer 25 is formed by forming the via hole 31 in the insulating layer 30 with a laser and then irradiating the first electrode layer 20 with a laser in succession. When the first electrode layer 20 is irradiated with a laser, the conductive fillers 21 that were merely overlapping each other melt and bond to form a network structure. In addition, in the portion of the first electrode layer 20 irradiated with the laser, the binder 22 is burned and disappears. Therefore, gaps where the binder 22 does not exist are formed between the conductive fillers 21 that have bonded to each other to form a network structure. The porous layer 25 is a layer in which such gaps are generated between the conductive fillers 21 and become porous. It is preferable that the porous layer 25 does not reach the substrate 10.

[0078] In step S6, the laser irradiated onto the portion of first electrode layer 20 exposed from via hole 31 preferably has a wavelength in the infrared region. The wavelength of the laser is more preferably 2000 nm or more and 20000 nm or less.

[0079] 3 and 4H, after forming the porous layer 25 in the first electrode layer 20, in step S7, a via conductor 50 is formed in the via hole 31. For example, first, an electroless plating process is performed on the side wall of the via hole 31, the portion of the first electrode layer 20 exposed from the via hole 31, and the surface of the second electrode layer 40 to form an electroless plating layer 51. Next, an electrolytic plating layer 52 is formed on the electroless plating layer 51 by an electrolytic plating process.

[0080] When the via conductors 50 are formed in step S7, the via conductors 50 fit into the porous layer 25. More specifically, parts of the via conductors 50 enter and fill many gaps formed between the conductive fillers 21 in the porous layer 25. This makes the porous layer 25 a connection layer 231 for the via conductors 50. The connection layer 231 firmly connects the via conductors 50 to the first electrode layer 20.

[0081] [effect] FIG. 5 is a scanning electron microscope image (SEM image) of the surface of the non-via hole portion 24 of the first electrode layer 20. FIG. 6 is an SEM image of the surface of the connection layer 231 of the via hole portion 23 of the first electrode layer 20. As can be seen from FIGS. 5 and 6, in the connection layer 231, unlike the non-via hole portion 24 in which the conductive fillers 21 are simply overlapped with each other, the conductive fillers 21 are bonded to each other to form a network structure. In the connection layer 231, a part of the via conductor 50 enters the gaps between the conductive fillers 21 that form the network structure. The connection layer 231 firmly connects the first electrode layer 20 to the via conductor 50, and the connection strength between the first electrode layer 20 and the via conductor 50 can be improved. Therefore, peeling between the first electrode layer 20 and the via conductor 50 is less likely to occur, and a decrease in conductivity due to peeling can be prevented. Therefore, the reliability of the electronic component 100 can be ensured.

[0082] In addition, the contact area between the first electrode layer 20 and the via conductor 50 can be increased by the via conductor 50 entering the gaps between the conductive fillers 21 in the connection layer 231 of the first electrode layer 20. Thus, the wiring resistance between the first electrode layer 20 and the via conductor 50 can be reduced.

[0083] In this embodiment, a base layer 232 is disposed between the connection layer 231 of the first electrode layer 20 and the substrate 10. For example, when the porous layer 25, which will eventually become the connection layer 231, is formed in the first electrode layer 20 by a laser, the first electrode layer 20 is processed so that the base layer 232 remains on the substrate 10. Therefore, for example, the substrate 10 can be protected from damage caused by laser processing.

[0084] In this embodiment, the conductive filler 21 contained in the first electrode layer 20 is, for example, a filler having a melting point of 1100° C. or less. The conductive filler 21 is preferably a copper filler. This allows the first electrode layer 20 to be suitable for a conventional manufacturing process that assumes the use of a metal having a melting point of 1100° C. or less, such as copper, as a conductive material. Thus, the electronic component 100 can be manufactured without significantly changing the conventional manufacturing process. In addition, since the electrical resistance of the copper filler is relatively small, good electrical conductivity can be ensured for the first electrode layer 20.

[0085] In this embodiment, the content of the conductive filler 21 in the first electrode layer 20 is preferably 30 vol% or more and 80 vol% or less. In this case, the conductive filler 21 is richly mixed in the first electrode layer 20. Therefore, good conductivity of the first electrode layer 20 can be ensured.

[0086] In this embodiment, the thickness of the first electrode layer 20 is preferably 10 μm or more and 40 μm or less. This allows the electrical resistance of the first electrode layer 20 to be sufficiently small. In addition, since the thickness of the first electrode layer 20 is not excessively large, the first electrode layer 20 can be easily formed on the substrate 10 in the manufacturing process of the electronic component 100.

[0087] In this embodiment, the surface roughness Rz of the connection layer 231 of the first electrode layer 20 is preferably 1 μm or more and 10 μm or less. This makes it possible to appropriately secure the contact area between the connection layer 231 and the via conductor 50, and to further improve the connection strength between the first electrode layer 20 and the via conductor 50. In addition, the wiring resistance between the first electrode layer 20 and the via conductor 50 can be further reduced.

[0088] In this embodiment, the thickness of the insulating layer 30 is preferably 20 μm or more and 50 μm or less, which ensures the insulating properties of the insulating layer 30 while preventing the electrical resistance of the via hole 31 penetrating the insulating layer 30 from increasing.

[0089] In this embodiment, the insulating layer 30 is preferably made of an epoxy resin. The insulating layer 30 may be made of, for example, a phenol-cured epoxy resin, a cyanate ester / epoxy mixed resin, a phenol ester-cured epoxy resin, or the like. These resins are easy to process, for example, by a laser, and have relatively high insulating properties.

[0090] In this embodiment, when the via hole 31 has a circular cross section, the diameter of the via hole 31 on the first electrode layer 20 side is preferably 40 μm or more and 120 μm or less. This allows the via conductor 50 in the via hole 31 to be more reliably connected to the connection layer 231 of the first electrode layer 20.

[0091] In this embodiment, the insulating layer 30 is made of, for example, a resin. In this case, the via conductor 50 provided in the via hole 31 of the insulating layer 30 preferably includes an electroless plating layer 51 and an electrolytic plating layer 52. By providing the electroless plating layer 51 as a seed layer on the side wall of the via hole 31, the electrolytic plating layer 52 can be connected to the side wall of the via hole 31 via the electroless plating layer 51.

[0092] In this embodiment, when the porous layer 25 is formed on the first electrode layer 20, the portion of the first electrode layer 20 exposed from the via hole 31 is irradiated with, for example, a laser. Since the temperature of the processed surface can be well controlled in the laser processing, the porous layer 25 can be easily formed by using a laser.

[0093] In this embodiment, the first electrode layer 20 is formed using a conductive paste containing a conductive filler 21 and a binder 22. For example, the binder 22, which is a resin, has a high infrared absorption rate and is easily processed by a laser having a wavelength in the infrared region. In contrast, for example, the conductive filler 21, which is a metal, has a low infrared absorption rate and is difficult to process by a laser having a wavelength in the infrared region. Therefore, when processing the part of the first electrode layer 20 exposed from the via hole 31 with a laser, the wavelength of this laser is preferably a wavelength in the infrared region. This makes it possible to more reliably burn and eliminate the binder 22 in the part of the first electrode layer 20 exposed from the via hole 31, and also to realize appropriate melting and bonding of the conductive filler 21, thereby easily forming a network structure. Therefore, in the part of the first electrode layer 20 exposed from the via hole, a porous layer 25 suitable for engagement with the via conductor 50 can be easily formed.

[0094] In the electronic component 100 according to this embodiment, for example, the substrate 10 can be used as an anode of a capacitor, and the first electrode layer 20 can be used as a cathode of the capacitor. For example, the substrate 10 can be used as a common anode, and the first electrode layer 20 can be provided as a cathode on both sides of the substrate 10. In this case, the capacitance density of the capacitor can be doubled compared to when a cathode is formed on one side of the substrate 10. Capacitors including the substrate 10 and one or more first electrode layers 20 can be arranged in an array in the electronic component 100.

[0095] However, the substrate 10 and the first electrode layer 20 do not necessarily have to be electrodes of a capacitor. The electronic component 100 according to this embodiment can be applied to any component that includes a wiring structure that ensures interlayer connection by via holes 31. The wiring structure including the substrate 10, the first electrode layer 20, the insulating layer 30, the second electrode layer 40, and the via conductors 50 can be provided, for example, on a multilayer substrate, more specifically, on an organic build-up substrate. A plurality of such wiring structures may be provided on the organic build-up substrate.

[0096] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present disclosure.

[0097] For example, in the electronic component 100 according to the above embodiment, the first electrode layer 20, the insulating layer 30, and the second electrode layer 40 are laminated in this order on the substrate 10. However, the electronic component 100 may also include layers other than the first electrode layer 20, the insulating layer 30, and the second electrode layer 40. As shown in FIG. 7, the electronic component 100 may include a conductive layer 60 provided between the substrate 10 and the first electrode layer 20. The conductive layer 60 may be, for example, a carbon layer containing a carbon filler. The carbon layer can be formed by applying a binder containing a carbon filler to a predetermined region on the substrate 10 by, for example, sponge transfer, screen printing, spray application, a dispenser, inkjet printing, or the like. [Explanation of symbols]

[0098] 100: Electronic components 10: Substrate 20: First electrode layer 21: Conductive filler 22: Binder 23: Beer Hall Section 231: Connection layer 232: Basal layer 24: Non-via hole section 25: Porous layer 30: Insulating layer 31: Beer hall 40:Second electrode layer 41: Metal film 50: Via conductor 51: Electroless plating layer 52: Electrolytic plating layer 60: Conductive layer

Claims

1. A substrate; a first electrode layer provided on the substrate and having a conductive filler and a binder containing the conductive filler; an insulating layer provided on the first electrode layer, the insulating layer having a via hole formed therein that penetrates the insulating layer in a stacking direction of the substrate, the first electrode layer, and the insulating layer; A second electrode layer provided on the insulating layer; a via conductor provided in the via hole and electrically connecting the first electrode layer and the second electrode layer; Equipped with A portion of the first electrode layer that overlaps with the via hole in a top view is a connection layer connected to the via conductor, the connection layer having a binder content smaller than that of a portion of the first electrode layer located outside the via hole; Including, electronic components.

2. 2. The electronic component according to claim 1 , An electronic component, wherein the conductive fillers are bonded to each other in the connection layer, and a portion of the via conductor fills the gaps between the bonded conductive fillers.

3. A substrate; a first electrode layer provided on the substrate and having a conductive filler and a binder containing the conductive filler; an insulating layer provided on the first electrode layer, the insulating layer having a via hole formed therein that penetrates the insulating layer in a stacking direction of the substrate, the first electrode layer, and the insulating layer; A second electrode layer provided on the insulating layer; a via conductor provided in the via hole and electrically connecting the first electrode layer and the second electrode layer; Equipped with A portion of the first electrode layer that overlaps with the via hole in a top view is a connection layer in which the conductive fillers are bonded to each other and a part of the via conductor enters into a gap between the bonded conductive fillers, thereby connecting the via conductor; Including, electronic components.

4. The electronic component according to any one of claims 1 to 3, The portion of the first electrode layer overlapping with the via hole in a top view further includes a base layer disposed between the connection layer and the substrate; An electronic component, wherein the binder content of the base layer is greater than the binder content of the connection layer.

5. The electronic component according to any one of claims 1 to 3, The conductive filler has a melting point of 1100° C. or less.

6. The electronic component according to any one of claims 1 to 3, an electronic component, wherein a content of the conductive filler in a portion of the first electrode layer located outside the via hole is 30 vol % or more and 80 vol % or less.

7. The electronic component according to any one of claims 1 to 3, The first electrode layer has a thickness of 10 μm or more and 40 μm or less.

8. The electronic component according to any one of claims 1 to 3, The connection layer has a surface roughness Rz of 1 μm or more and 10 μm or less.

9. The electronic component according to any one of claims 1 to 3, The insulating layer has a thickness of 20 μm or more and 50 μm or less.

10. The electronic component according to any one of claims 1 to 3, The insulating layer is made of an epoxy resin.

11. 4. The electronic component according to claim 1, The via hole has a circular cross section, The electronic component, wherein the via hole has a diameter on the first electrode layer side of 40 μm or more and 120 μm or less.

12. The electronic component according to any one of claims 1 to 3, The insulating layer is made of a resin, the via conductor includes an electroless plating layer provided on a side wall of the via hole, and an electrolytic plating layer provided on the electroless plating layer.

13. The electronic component according to any one of claims 1 to 3, further comprising: a conductive layer provided between the substrate and the first electrode layer; An electronic component comprising:

14. The electronic component according to claim 13, The electronic component, wherein the conductive layer is a carbon layer containing a carbon filler.

15. A method for manufacturing an electronic component, comprising: providing a substrate; forming a first electrode layer by applying a conductive paste containing a conductive filler and a binder in which the conductive filler is dispersed onto the substrate; forming an insulating layer on the first electrode layer; forming a second electrode layer on the insulating layer; forming a via hole in the insulating layer and exposing a portion of the first electrode layer from the via hole; a step of heating a portion of the first electrode layer exposed from the via hole to melt and bond the conductive fillers to each other and burn the binder, thereby forming a porous layer in which gaps are generated between the conductive fillers and the porous layer is formed; forming a via conductor in the via hole after forming the porous layer on the first electrode layer; A manufacturing method comprising:

16. The method of claim 15, further comprising the steps of: a laser is irradiated onto a portion of the first electrode layer exposed from the via hole to form the porous layer.

17. The method of claim 16, further comprising the steps of: The method of claim 1, wherein the laser has a wavelength in the infrared region.

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