Multilayer ceramic sintered body substrate for electronic device, electronic device, chip resistor, and method for manufacturing chip resistor

Abstract

To provide a laminated ceramic sintered body substrate for an electronic device, which is used for an electronic device such as a chip resistor and has excellent heat dissipation while suppressing an adverse effect on the characteristics due to the unevenness of the surface of the ceramic sintered body substrate.SOLUTION: A laminated ceramics sintered body substrate for an electronic device includes a ceramics sintered body substrate, and a flattening film provided on the upper surface of the ceramics sintered body substrate, and the flattening film contains a heat conductive filler.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a multilayer ceramic sintered substrate for an electronic device, an electronic device, a chip resistor, and a method for manufacturing a chip resistor. [Background technology]

[0002] Some electronic devices, including chip resistors, are formed on a ceramic sintered body substrate that exhibits high strength and insulation. For example, a thin-film chip resistor includes an insulating substrate, a pair of upper electrodes provided at both ends of the upper surface of the insulating substrate, and a resistor provided on the upper surface of the insulating substrate and connected between the pair of upper electrodes.

[0003] The chip resistor further includes a protective film provided to cover at least the resistor body, a pair of end electrodes provided on both end surfaces of the insulating substrate to be electrically connected to the pair of upper electrodes, and a plating layer formed on a portion of the upper electrode and on the surfaces of the pair of end electrodes.

[0004] In manufacturing the electronic device, a plurality of structures including resistors and the like are formed on the surface of a large sintered ceramic substrate, and then the substrate is cut into a lattice shape using a dicing blade; alternatively, division grooves are formed in advance in a lattice shape in the sintered ceramic substrate, and the substrate is divided along the division grooves to obtain individual elements.

[0005] However, since the ceramic sintered body substrate is produced by sintering ceramic particles together with various binders, the surface of the ceramic sintered body substrate has minute irregularities and undulations due to the shape of the ceramic particles, and is not smooth. Therefore, there is a problem that the shape of the front electrode and resistor formed on the surface of the ceramic sintered body substrate is difficult to stabilize. In particular, when the front electrode and resistor are formed as a thin film on the surface of the ceramic sintered body substrate by a film formation process or photolithography, the front electrode and resistor, which are thin films, are affected by the surface condition of the alumina substrate, and local distortion, unevenness in film thickness, cracks, etc. occur, resulting in variation in characteristics and defects.

[0006] In order to solve the above problems, for example, Patent Document 1 proposes a technology in which a small amount of silica glass is contained in the alumina substrate itself, a glass coating is formed over the entire surface of the alumina substrate, and an upper electrode, resistor, etc. are formed on the glass coating. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2017-168749 A Summary of the Invention [Problem to be solved by the invention]

[0008] In recent years, electronic devices are expected to have high reliability in harsh environments and to handle increased power input, as typified by in-vehicle applications. This increases the thermal load on the element structure of the electronic device, and the electronic device is therefore required to dissipate heat appropriately to the outside.

[0009] Of the alumina substrate and glass coating layer that constitute the chip resistor in Patent Document 1, the thermal conductivity of the alumina substrate is, for example, 26 W / (m K), while that of the glass (SiO 2 ) has a thermal conductivity of about 0.01 W / (m K), for example, which is significantly lower than that of the alumina substrate. Therefore, if the thermal load on the element structure is large, the heat cannot be dissipated sufficiently, which can result in deterioration of the element characteristics or even damage.

[0010] The present disclosure has been made in consideration of the above-mentioned circumstances, and an object of the present disclosure is to provide an electronic device such as a chip resistor that has excellent heat dissipation properties and suppresses the adverse effects on characteristics caused by unevenness on the surface of the ceramic sintered substrate, a manufacturing method for a chip resistor, and a multilayer ceramic sintered substrate for use in an electronic device such as a chip resistor. [Means for solving the problem]

[0011] A multilayer ceramic sintered substrate for an electronic device according to an embodiment of the present disclosure that can achieve the above object is characterized in that it comprises a ceramic sintered substrate and a planarization film that is provided on an upper surface of the ceramic sintered substrate and contains a thermally conductive filler.

[0012] The chip resistor according to the embodiment of the present disclosure that can achieve the above object is: The multilayer ceramic sintered body substrate for electronic devices, a resistor and a pair of upper electrodes provided on a surface of the planarization film of the multilayer ceramic sintered body substrate for electronic devices, the surface being opposite to the ceramic sintered body substrate; a pair of end electrodes provided in a lamination direction of the multilayer ceramic sintered body substrate for electronic devices and the upper electrode so as to contact the ends of the substrate and the upper electrode; The present invention is characterized in that it is provided with:

[0013] A method for manufacturing a chip resistor according to an embodiment of the present disclosure that can achieve the above object is characterized in that a planarizing film for the chip resistor is formed by a sol-gel method. Effect of the Invention

[0014] According to the present disclosure, it is possible to provide an electronic device such as a chip resistor, which has excellent heat dissipation properties and in which adverse effects on characteristics due to unevenness on the surface of the ceramic sintered substrate are suppressed, a manufacturing method for a chip resistor, and a multilayer ceramic sintered substrate for use in an electronic device such as a chip resistor. [Brief description of the drawings]

[0015] [Figure 1] FIG. 1 is a schematic cross-sectional view of a multilayer ceramic sintered substrate for an electronic device according to one embodiment of the present disclosure. [Diagram 2] FIG. 2 is a schematic cross-sectional view of a chip resistor according to an embodiment of the present disclosure. [Diagram 3] FIG. 3 is a schematic cross-sectional view of the chip resistor according to the embodiment of the present disclosure taken along line XX in FIG. [Figure 4] FIG. 4 is a diagram showing an example of a scanning electron microscope photograph of a cross section of a multilayer ceramic sintered compact substrate for electronic devices in an example. [Diagram 5] FIG. 5 is a diagram showing the results of a thermal simulation for confirming the effect of a planarizing film having a thermally conductive filler in an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] In order to realize an electronic device such as a chip resistor that has excellent heat dissipation properties and suppresses adverse effects on characteristics due to surface irregularities of the ceramic sintered body substrate, the inventors have conducted extensive research, particularly on a multilayer ceramic sintered body substrate used in electronic devices such as chip resistors. As a result, it has been found that the multilayer ceramic sintered body substrate can be provided with a ceramic sintered body substrate and a planarization film containing a thermally conductive filler and provided on the upper surface of the ceramic sintered body substrate. In the following, the "multilayer ceramic sintered body substrate for electronic devices" may be simply referred to as the "multilayer ceramic sintered body substrate".

[0017] Hereinafter, a multilayer ceramic sintered body substrate according to an embodiment of the present disclosure and a chip resistor including the multilayer ceramic sintered body substrate will be described with reference to the drawings. Note that the embodiment of the present disclosure is not limited to the form shown in the drawings below, and can be appropriately modified without impairing the effects of the present disclosure. In the following description, the same components are given the same reference numerals, and the description is omitted as appropriate.

[0018] [Layered ceramic sintered substrate] First, a multilayer ceramic sintered body substrate in an embodiment of the present disclosure will be described with reference to Fig. 1. A multilayer ceramic sintered body substrate 11 in one embodiment of the present disclosure has a configuration shown in Fig. 1. That is, in the multilayer ceramic sintered body substrate 11, a planarization film 2 containing a thermally conductive filler 3 is formed on the entire upper surface of a ceramic sintered body substrate 1.

[0019] (Sintered ceramic substrate) The type of ceramic of the ceramic sintered body substrate 1 is not limited, and examples of the ceramic sintered body substrate include an alumina substrate, an alumina zirconia substrate, a silicon nitride substrate, and an aluminum nitride substrate, each having the physical properties shown in Table 1. The ceramic sintered body substrate is preferably an alumina substrate. Note that even if the type of ceramic is the same, if the particle size of the ceramic particles or the density of the ceramic particles in the ceramic sintered body is different, the physical properties may differ from the values ​​in Table 1.

[0020] [Table 1]

[0021] The ceramic sintered body substrate 1 is manufactured by mixing various ceramic particles and a binder, forming the mixture, and sintering the mixture. The surface of the ceramic sintered body substrate has irregularities due to the shape of the ceramic particles constituting the sintered body. As an example of the ceramic sintered body substrate, an alumina substrate (A476) manufactured by Kyocera Corporation has a surface roughness Ra of 0.3 to 0.5 micrometers, and an alumina substrate (A493) with a different product number has a surface roughness Ra of 0.05 to 0.08 micrometers. In the embodiment of the present disclosure, by providing a planarizing film on the upper surface of the ceramic sintered body substrate 1 as described below, for example, an upper electrode or a resistor can be provided without being affected by the surface state of the ceramic sintered body substrate.

[0022] (Planarization film) In the embodiment of the present disclosure, a planarization film 2 is formed on the upper surface of the ceramic sintered body substrate 1. By forming the planarization film 2, the material constituting the planarization film 2 fills the recesses on the surface of the ceramic sintered body substrate 1, and the unevenness of the surface of the planarization film 2 becomes smaller than the unevenness of the surface of the ceramic sintered body substrate 1. Therefore, according to the embodiment of the present disclosure, the upper electrode and the resistor can be formed on the surface of the planarization film 2 with reduced unevenness without being affected by the surface state of the ceramic sintered body substrate 1.

[0023] The material constituting the parent phase (base) of the planarization film 2 (hereinafter sometimes referred to as the "base material") is not particularly limited. In the manufacture of the planarization film 2, since the planarization film 2 is fired at high temperatures and its shape tends to change, it is preferable that the base material is a material that has a small difference in thermal expansion coefficient from the ceramic sintered body substrate. The parent phase of the planarization film 2 is silicon dioxide (SiO 2 ) or aluminum oxide (Al 2 O 3 )

[0024] (Thermal conductive filler contained in the planarization film) The first characteristic required for the thermally conductive filler 3 is high thermal conductivity. The presence of the thermally conductive filler 3 in the planarization film 2 must result in a thermal conductivity higher than that of a planarization film that does not include the thermally conductive filler 3. For this reason, the thermally conductive filler 3 must exhibit a thermal conductivity higher than that of the parent phase of the planarization film 2.

[0025] There are no particular limitations on the material constituting the thermally conductive filler 3 as long as it satisfies the above-mentioned characteristics. As the thermally conductive filler, for example, one or more compounds selected from the group consisting of zinc oxide (ZnO), magnesium oxide (MgO), beryllium oxide (BeO), aluminum nitride (AlN), boron nitride (BN), silicon nitride (SiNx), and diamond can be used.

[0026] Table 2 shows the thermal conductivity and linear expansion coefficient of typical ceramics. 2 In the case where the matrix of the planarization film 2 is alumina (Al 2 O 3 ), the thermal conductivity of the matrix is ​​1.3 W / (m K), and therefore the material constituting the thermally conductive filler 3 must have a thermal conductivity higher than 1.3 W / (m K). 2 O 3), the thermal conductivity of the matrix is ​​32 W / (m K), so the material that constitutes the thermally conductive filler 3 must have a thermal conductivity of more than 32 W / (m K). Note that, although Table 2 below lists representative examples of the thermal conductivity and linear expansion coefficient of typical ceramics, the thermal conductivity and linear expansion coefficient below may show different values ​​depending on the manufacturing method and structure of each company.

[0027] [Table 2]

[0028] The size of the thermally conductive filler 3, for example, the average particle diameter, is not particularly limited. Since the height of the unevenness on the surface of the ceramic sintered body substrate is on the level of several μm, the average particle diameter of the thermally conductive filler 3 is preferably 10 μm or less, more preferably 2 μm or less. More preferably, the average particle diameter of the thermally conductive filler 3 is preferably equal to or less than the average particle diameter of the ceramic particles constituting the matrix of the flattening film 2. The reason for this is that if the particle diameter of the thermally conductive filler 3 is significantly larger than the size of the ceramic particles constituting the matrix of the flattening film 2 or the height of the unevenness on the surface of the ceramic sintered body substrate 1, the surface roughness of the flattening film 2 increases, making it difficult to achieve smoothness. The average particle diameter of the thermally conductive filler and the average particle diameter of the particles for forming the matrix used in forming the flattening film can be measured by dynamic light scattering, laser diffraction, BET method, or photographic observation using a scanning electron microscope (SEM) or a transmission electron microscope (TEM).

[0029] For the formation of the flattening film, it is preferable to use a thermally conductive filler whose average particle size is equal to or smaller than the average particle size of the particles for forming the matrix of the flattening film, and for example, a commercially available product having an average particle size of, for example, several tens of nm to several tens of μm can be preferably used as the thermally conductive filler. The average particle size of the thermally conductive filler 3 in the flattening film 2 is substantially the same as the average particle size of the thermally conductive filler used for forming the flattening film. The average particle size of the thermally conductive filler 3 in the flattening film 2 and the average particle size of the ceramic particles constituting the matrix of the flattening film 2 can be measured by photographic observation using a scanning electron microscope (SEM) or the like. In measuring the average particle size of the thermally conductive filler 3 in the flattening film 2, elemental analysis may be combined to distinguish the thermally conductive filler 3 from the matrix of the flattening film 2.

[0030] The shape of the thermally conductive filler 3 is not particularly limited. Examples of the shape of the thermally conductive filler 3 include a spherical shape, a fibrous shape, a polygonal shape, a flat plate shape, and a scale shape. Depending on the shape of the thermally conductive filler 3, when the thermally conductive filler 3 appears on the outermost surface of the planarizing film 2, the surface roughness may become large. Therefore, the shape of the thermally conductive filler 3 may be selected according to the uneven shape of the ceramic sintered substrate 1, the thickness of the planarizing film 2, the desired thermal conductivity, and the like.

[0031] The thermally conductive filler is preferably electrically insulating. That is, the specific volume resistivity of the thermally conductive filler is 10 +13 In the case where element characteristics such as withstand voltage are required as in the case of a chip resistor, if, for example, metal particles having electrical conductivity are used as the thermally conductive filler, the metal particles themselves become a conductive path and deteriorate the element characteristics such as withstand voltage, which is not preferable.

[0032] The ratio of the thermally conductive filler 3 in the planarization film 2 is not particularly limited. The higher the ratio of the thermally conductive filler 3 in the planarization film 2, the higher the thermal conductivity, but the ratio of the parent phase of the planarization film 2 is relatively reduced, and the strength of the planarization film 2 is likely to decrease. Therefore, the ratio of the thermally conductive filler 3 in the planarization film 2 may be appropriately determined according to the thermal conductivity and strength required for the planarization film 2.

[0033] A plurality of types of thermally conductive fillers differing in at least one of material, size, and shape may be used as the thermally conductive filler 3. For example, when thermally conductive fillers having different particle sizes or shapes are combined, the effect of filling voids in the planarizing film is obtained, increasing the effective density, and the effect of increasing the thermal conductivity is obtained.

[0034] The surface of a typical ceramic sintered body substrate has irregularities of several μm level. Therefore, the thickness of the planarizing film is preferably equal to or greater than the height of the irregularities of the ceramic sintered body substrate. The thickness of the planarizing film depends on the height of the irregularities, but is preferably, for example, 1.0 μm or more. The upper limit of the thickness of the planarizing film is not particularly limited, but the thickness of the planarizing film can be, for example, 20 μm or less.

[0035] The method for forming the planarization film 2 containing the thermally conductive filler 3 on the ceramic sintered substrate 1 is not particularly limited, but from the viewpoint of efficiently filling the unevenness on the surface of the ceramic sintered substrate with the material constituting the planarization film 2 and forming the planarization film 2 in which the thermally conductive filler 3 is dispersed, it is preferable to form the planarization film by a sol-gel method. The sol-gel method is one of the ceramic synthesis methods, and can form a planarization film at a lower temperature than the conventional melting method or sintering method. In addition, since the raw material is in a solution state, a planarization film with a thin thickness can be formed.

[0036] To form a planarization film 2 containing the thermally conductive filler 3 according to the present disclosure, particles for forming the parent phase of the planarization film 2 and the thermally conductive filler 3 intended to improve the thermal conductivity of the planarization film are mixed into a sol liquid.

[0037] As described above, in forming the planarizing film, it is preferable to use a thermally conductive filler having an average particle size equal to or smaller than the average particle size of the particles for forming the matrix of the planarizing film, so as to easily achieve smoothness.

[0038] The thermally conductive filler 3 may be subjected to various pretreatments such as surface modification before being mixed with the particles for forming the matrix of the planarization film 2. Examples of such pretreatments include hydrophilization, hydrophobization, and adjustment of surface charge. The pretreatments improve the dispersibility of the thermally conductive filler, and provide the advantage of uniforming the thermal conductivity in the planarization film. can be done.

[0039] [Electronic Devices] An embodiment of the present disclosure includes an electronic device including the multilayer ceramic sintered body substrate for electronic devices described above. The electronic device may be a chip resistor.

[0040] A chip resistor according to an embodiment of the present disclosure will be described with reference to Figures 2 and 3. Figure 2 is a schematic cross-sectional view of the chip resistor according to an embodiment of the present disclosure, and Figure 3 is a schematic cross-sectional view taken along line XX in Figure 2. The chip resistor is obtained by forming a resistor and the like on the multilayer ceramic sintered body substrate 11 shown in Figure 1. Therefore, a description of the multilayer ceramic sintered body substrate 11 in Figure 2 will be omitted.

[0041] The chip resistor 21 according to the embodiment of the present disclosure has a configuration shown in FIG. A multilayer ceramic sintered substrate 11 for an electronic device, comprising a ceramic sintered substrate 1 and a planarizing film 2 containing a thermally conductive filler 3; A resistor 4 and a pair of upper electrodes 5 are provided on the surface of the planarization film 2 opposite to the ceramic sintered body substrate 1 side, a pair of end electrodes 7 provided in the lamination direction of the multilayer ceramic sintered substrate 11 and the upper electrode 5 so as to contact the ends of these; The configuration is equipped with the above.

[0042] The resistor 4 is provided on the upper surface of the multilayer ceramic sintered body substrate 11 and is connected between a pair of upper electrodes 5. The pair of upper electrodes 5 are provided at both ends of the upper surface of the multilayer ceramic sintered body substrate 11 for electronic devices on which the resistor 4 is formed. As shown in FIG. 2, a pair of lower electrodes 6 may be provided at both ends of the back surface facing the upper surface of the multilayer ceramic sintered body substrate 11. The pair of end surface electrodes 7 are provided on both end surfaces of the multilayer ceramic sintered body substrate 11 so as to be electrically connected to the pair of upper electrodes 5. Although the chip resistor 21 illustrated in FIG. 2 is provided with the lower electrode 6, the chip resistor according to the present disclosure may not be provided with the lower electrode 6.

[0043] The resistor 4 can be made of a material that satisfies the desired resistivity and temperature coefficient of resistance (TCR). As an example, a material with a low TCR is made of a thin film material mainly composed of four elements, Ni, Cr, Al, and Si, with a Ni / Cr ratio of 45 / 55 to 55 / 45 by weight, Al being contained in an amount of 10 to 18% by weight relative to the total weight, and Si being contained in an amount of 2 to 6% by weight relative to the total weight. Other examples of materials constituting the resistor include materials with a high TCR. Examples of materials with a high TCR include pure metals of Pt, Ni, and Cu, and alloys containing 50% or more by mass of each metal, such as a Pt-Co alloy. Resistors made of these materials can be used as resistors for measuring temperature in addition to functioning as chip resistors.

[0044] Resistor 4 may be provided with a trimming groove for adjusting the resistance value, and resistor 4 may have a meandering structure (serpentine shape) 4a as shown in FIG.

[0045] The heat generated in the resistor 4 is dissipated via the resistor 4 or the multilayer ceramic sintered body substrate 11 below the resistor 4 as the main path, from the end electrode 7 to the substrate on which the chip resistor 21 is mounted. Of these, the material of the resistor 4 is determined according to the required electrical characteristics, so it is difficult to determine the material from the viewpoint of improving heat dissipation. Therefore, in order to improve the heat dissipation of the chip resistor for the purpose of expanding the operating temperature range and increasing the input power, it is useful to improve the heat dissipation performance of the multilayer ceramic sintered body substrate 11, which is the other path.

[0046] In particular, when the resistor 4 has a meandering structure 4a, if heat generated in the resistor 4, particularly in the center of the structure of the meandering structure 4a, is dissipated only through the resistor, the generated heat must pass through a very long path in the resistor. In this way, when it is difficult to dissipate heat only from the resistor, according to the embodiment of the present disclosure in which the multilayer ceramic sintered substrate 11 is in contact with the resistor 4, heat dissipation is improved and the effects of the embodiment of the present disclosure are fully exhibited.

[0047] The thickness of the planarizing film 2 is preferably greater than the thickness of the resistor 4. This makes the heat capacity of the planarizing film 2 greater than the heat capacity of the resistor 4, and as a result, the temperature of the planarizing film 2 tends to be lower than the temperature of the resistor 4, allowing efficient heat dissipation.

[0048] The upper electrode 5 is not particularly limited as long as it satisfies the desired resistor characteristics. An example is a thin-film electrode made of Cu or a Cu-based alloy such as CuNi. The thin-film electrode can be formed by a method such as sputtering, electron beam deposition, or resistance heating deposition. In order to improve the adhesion between the thin-film electrode and the planarization film 2, a metal thin film such as Cr, Ti, or Ni may be provided as an adhesion layer under the thin-film electrode.

[0049] When the lower electrode 6 is provided as shown in FIG. 2, there is no particular limitation on the lower electrode 6 as long as it satisfies the desired resistor characteristics. One example is a thin-film electrode made of Cu or a Cu-based alloy such as CuNi. The thin-film electrode can be formed by a method such as sputtering, electron beam deposition, or resistance heating deposition. In order to improve the adhesion between the thin-film electrode and the ceramic sintered body substrate 1, a metal thin film of Cr, Ti, Ni, or the like may be provided as an adhesion layer under the thin-film electrode.

[0050] The pair of end electrodes 7 are provided on both end surfaces of the multilayer ceramic sintered substrate 11 and are electrically connected to the upper surfaces of the pair of upper electrodes 5, and are made of, for example, Ag. The end electrodes 7 can be formed, for example, by printing a material made of Ag and resin. Alternatively, they can be formed by sputtering a metal material. When the pair of lower electrodes 6 are formed, the pair of end electrodes 7 are also connected to the pair of lower electrodes 6.

[0051] To enhance the heat dissipation effect of the multilayer ceramic sintered substrate 11, it is preferable that at least one of the upper electrode 5 and the end electrode 7 is in contact with the planarizing film 2, and more preferably, both the upper electrode 5 and the end electrode 7 are in contact with the planarizing film 2. The larger the contact area between the planarizing film 2 and the upper electrode 5 and the end electrode 7, and in particular the contact area between the planarizing film 2 and the end electrode 7, the more heat moves from the planarizing film 2 to the end electrode 7, which is the final heat dissipation path, and the more effective the heat dissipation becomes.

[0052] The protective film 8 is formed to protect the resistor 4 from oxygen and humidity. The protective film 8 may be made of a material such as resin or Al. 2 O 3、 Inorganic compounds such as SiNx can be used, and both resin and inorganic compounds can be used.

[0053] 2 and 3, a plating layer may be further formed on the upper surface of the end electrode 7. This plating layer may be formed by a commonly used method.

[0054] According to the multilayer ceramic sintered body substrate of the embodiment of the present disclosure, heat generated from the element structure formed on the ceramic sintered body substrate can be effectively released to the outside, and adverse effects due to unevenness of the ceramic sintered body substrate can be suppressed. Therefore, by using the multilayer ceramic sintered body substrate of the embodiment of the present disclosure in an electronic device, the temperature characteristics of the electronic device can be improved and the occurrence of element defects can be suppressed. Furthermore, by using the multilayer ceramic sintered body substrate of the embodiment of the present disclosure in a resistor, the usable temperature range and rated power can be expanded. EXAMPLES

[0055] Hereinafter, the embodiments of the present disclosure will be described in more detail with reference to examples. The embodiments of the present disclosure are not limited to the following examples, and may be modified as appropriate within the scope of the above and below-described aims, and all of these are included in the technical scope of the present disclosure.

[0056] Example 1 A multilayer ceramic sintered body substrate was produced by the following manufacturing method. First, as the ceramic sintered body substrate, an alumina substrate was used, which has excellent heat resistance and insulating properties and is inexpensively available.

[0057] A planarizing film was formed on the ceramic sintered body substrate as follows. First, AlN nanoparticles (median particle size 100 nm, measured by photographic observation with a scanning electron microscope (SEM)) produced by a thermal plasma method were added to polysilazane (NN120, manufactured by Merck Ltd.) and stirred to be uniformly dispersed, to prepare a planarizing film forming solution. Then, this planarizing film forming solution was treated with a spin coater at a rotation speed of 3000 rpm for 20 seconds. After that, it was dried for 30 seconds on a hot plate set at 100°C, and then baked at 700°C for 12 hours in an electric drying furnace to form a planarizing film containing AlN nanoparticles as a thermally conductive filler and having a silicon dioxide base.

[0058] The cross section of the multilayer ceramic sintered body substrate having the planarizing film on the ceramic sintered body substrate obtained as described above was observed with a scanning electron microscope (S-5000, Hitachi High-Tech Corporation). An example of the scanning electron microscope observation photograph is shown in FIG. 4. From FIG. 4, it was confirmed that in the multilayer ceramic sintered body substrate according to the embodiment of the present disclosure, the unevenness on the surface of the ceramic sintered body substrate (alumina substrate) 1 represented by the dashed line A is filled with the material constituting the planarizing film 2, and the surface of the planarizing film 2 is smoother than the surface of the ceramic sintered body substrate (alumina substrate) 1 represented by the dashed line A, as shown by the dashed line B.

[0059] Example 2 A resistor and the like were formed on the multilayer ceramic sintered substrate produced in Example 1 as described below to produce a chip resistor.

[0060] A thin film made of NiCrAlSi alloy was prepared by sputtering on the planarized film of the multilayer ceramic sintered body substrate, and then the thin film was patterned into a meandering structure by photolithography (resist coating, drying, exposure, development, etching, and resist peeling) to obtain a resistor. After that, a heat treatment was performed at 300°C for 5 hours to obtain the desired temperature coefficient of resistance (TCR).

[0061] Furthermore, an upper electrode was formed on the planarizing film as follows. First, a CuNi alloy film was formed on the planarizing film by sputtering, and then the above-mentioned photolithography was performed. Instead of the photolithography, the film may be formed only in the required area by the sputtering method using a metal mask.

[0062] Furthermore, a lower electrode was formed on the surface of the alumina substrate opposite to the surface on which the upper electrode was formed in the same manner as the upper electrode. That is, a CuNi alloy film was formed by a sputtering method, and then the above-mentioned photolithography was performed. Instead of the photolithography, the film may be formed only in the required area by the above-mentioned sputtering method using a metal mask.

[0063] Next, a metal oxide film was formed as a protective film on the resistor by sputtering. In this embodiment, the protective film was Al 2 O 3 A film was formed, but if it can provide protection, Al 2 O 3 Other than the film, a metal oxide film, a SiNx film, or the like may also be used.

[0064] In order to increase the efficiency of the process up to this point, a plurality of laminates each including the resistor, upper electrode, lower electrode and protective film were formed on a large alumina substrate.

[0065] Next, to obtain individual chip resistors, the large alumina substrate on which the multiple laminates were formed was cut by dicing to obtain individual chips. Then, to form end electrodes of each chip, a conductive paste containing Ni-based metal particles or Ag-based metal particles and a resin as a binder was applied and cured to the ends of the multilayer ceramic sintered substrate, upper electrode, and lower electrode, and further electroplating was performed to form a Ni layer and a Sn layer, thereby obtaining chip resistors.

[0066] Example 3 A thermal simulation was performed to estimate the effect of the above chip resistors. ANSYS (ANSYS, Inc.) was used as the simulation software.

[0067] The thermal simulation was performed with the chip resistor mounted by solder on a Cu land pattern on a printed circuit board. The size of the chip resistor is 1 mm × 0.5 mm × 0.3 mm. The main configuration of the chip resistor is the same as that of Example 2. Specifically, an alumina substrate is used as the ceramic sintered body substrate, and the planarization film on the alumina substrate has a thickness of 5 μm and a thermal conductivity of 120 W / (m·K). The resistor on the planarization film has a thickness of 1 μm and a thermal conductivity of 120 W / (m·K), and CuNi is used as the upper electrode and Ni is used as the end electrode. Unlike Example 2, Example 3 does not form a lower electrode, but the presence or absence of a lower electrode does not have a significant effect on the element self-heating amount obtained in the thermal simulation.

[0068] As a comparative example, we also performed a simulation on a model in which the planarization film was a 5 μm-thick alumina layer that did not contain any thermally conductive filler and had a thermal conductivity of 26 W / (m K) (thermal conductivity of alumina). The results are shown in Figure 5.

[0069] 5 shows the results of a steady-state simulation in which a planarization film containing a thermally conductive filler and having a thermal conductivity of 120 W / (m·K) is formed, and in which a planarization film not containing a thermally conductive filler and having a thermal conductivity of 26 W / (m·K) is formed. At an input power of 0.2 W, which is about 3.2 times the assumed rated input power, the element self-heating was confirmed to have decreased by about 4.8%, from 72.9°C when the thermally conductive filler was not included to 69.5°C when the thermally conductive filler was included. In this way, the effects of the embodiment of the present disclosure could be verified.

[0070] In the above Example 3, due to limitations in the simulation, the film thickness of the resistor is set to 1 μm, but in actual chip resistors, the film thickness of the resistor may be as thin as several tens of nm. When the film thickness is this thin, heat dissipation via the resistor alone cannot be expected, but in such cases, it is believed that the high heat dissipation effect exhibited by the multilayer ceramic sintered body substrate of the present disclosure is more significantly exhibited.

[0071] Example 4 In Example 4, a chip resistor including a multilayer ceramic sintered body substrate having the same structure as in Examples 1 and 2 was obtained, except that the material constituting the resistor was Pt and the etching and heat treatment conditions in the process were changed accordingly. It was confirmed that smoothing could be achieved by configuring the chip resistor, and that temperature measurement was possible by taking advantage of the large TCR of the resistor. Furthermore, it was confirmed that the responsiveness of the resistance value to external temperature changes was improved because the thermal conductivity of the multilayer ceramic sintered body substrate itself was high. [Industrial Applicability]

[0072] The multilayer ceramic sintered body substrate of the present disclosure has excellent heat dissipation properties and suppresses adverse effects on characteristics due to unevenness of the ceramic sintered body substrate. Therefore, it is useful as a substrate component for use in electronic devices. It is also useful as a chip resistor using the multilayer ceramic sintered body substrate. [Explanation of symbols]

[0073] 1. Sintered ceramic substrate 2 Planarization film 3. Thermally conductive filler 4 Resistors 5 Upper electrode 6 Lower electrode 7 Edge electrode 8 Protective film 11. Multilayer ceramic sintered substrate 21 Chip resistors

Claims

1. A ceramic sintered body substrate; a planarization film including a thermally conductive filler provided on an upper surface of the ceramic sintered body substrate; Equipped with The parent phase of the planarization film is composed of silicon dioxide (SiO 2 ) or aluminum oxide (Al 2 O 3 ); The thermally conductive filler is one or more compounds selected from the group consisting of zinc oxide (ZnO), magnesium oxide (MgO), beryllium oxide (BeO), aluminum nitride (AlN), boron nitride (BN), silicon nitride (SiNx), and diamond.

2. 2. The multilayer ceramic sintered substrate for electronic devices according to claim 1, wherein the ceramic sintered substrate is an alumina sintered substrate.

3. 3. The multilayer ceramic sintered substrate for electronic devices according to claim 1, wherein the thermally conductive filler is electrically insulating.

4. 4. An electronic device comprising a multilayer ceramic sintered body substrate for electronic devices according to claim 1.

5. A multilayer ceramic sintered body substrate for electronic devices according to any one of claims 1 to 3, a resistor and a pair of upper electrodes provided on a surface of the planarization film of the multilayer ceramic sintered body substrate for electronic devices opposite to the ceramic sintered body substrate; a pair of end electrodes provided in a lamination direction of the multilayer ceramic sintered body substrate for electronic devices and the upper electrode so as to contact the ends of the substrate and the upper electrode; A chip resistor comprising:

6. The chip resistor according to claim 5 , wherein the thickness of the planarization film is greater than the thickness of the resistor body.

7. The chip resistor according to claim 5 , wherein the resistor has a meandering structure.

8. The chip resistor according to any one of claims 5 to 7, wherein in a cross section in the stacking direction, the planarizing film is in contact with at least one of the upper electrode and the end surface electrode.

9. A method for producing a chip resistor according to any one of claims 5 to 8, A method for manufacturing a chip resistor, comprising forming a planarizing film by a sol-gel method.

10. The method for producing a chip resistor according to claim 9 , wherein the planarization film is formed using a thermally conductive filler having an average particle size equal to or smaller than an average particle size of particles for forming a matrix of the planarization film.

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