Semiconductor device manufacturing method and manufacturing apparatus

Abstract

To provide a semiconductor device capable of reducing stress given to the semiconductor device having fragile insulating films in the mounting process.SOLUTION: A semiconductor device has multiple bumps located above electrode pads, resist covering the bumps, and an air hole connecting the bump and an outside of the resist inside the resist. The semiconductor device also has the multiple bumps above the electrode pads, the resist covering the bumps, and dummy bumps linked to the bumps by an air hole.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to Semiconductor device manufacturing method and manufacturing apparatus Regarding. [Background technology]

[0002] In recent years, efforts have been made to narrow the pitch between the electrode terminals of semiconductor devices and reduce the area of ​​the electrode terminals in order to achieve both higher density and more pins on the electrode terminals of semiconductor devices. Flip-chip mounting is known as one of the mounting techniques for semiconductor devices with narrower pitch between electrode terminals and smaller area of ​​electrode terminals on a mounting substrate.

[0003] In flip-chip mounting, protruding electrodes are formed on the electrode terminals of semiconductor devices such as system LSIs, memories, and CPUs, and are pressed against and heated to the electrode pads of the mounting substrate. The electrode terminals are then bump-connected to the electrode pads of the mounting substrate, and the semiconductor device is flip-chip mounted to the mounting substrate. As transistors in semiconductor devices become finer, fragile low-dielectric films are being used, and low-stress mounting is required.

[0004] In response to this, a method has been proposed in which tapered fine metal bumps made of, for example, gold or copper are used, the tips of which are plastically deformed in the face-down mounting process, and bonding is performed by solid-phase diffusion. With this method, the stress can be relieved by the deformation of the tapered fine metal bumps, making it possible to accommodate semiconductor devices with fragile low-dielectric films.

[0005] As a method for forming tapered fine metal bumps, there is a gas deposition method in which fine particles and a carrier gas are sprayed to deposit fine metal particles. (See, for example, Patent Document 1). However, in this embodiment, in order to form a cone-shaped metal bump, fine metal particles and a carrier gas must be sprayed from a nozzle onto an electrode portion for each bump. In order to form a large number of bumps on a wafer with many pins and a large diameter, the entire surface of the wafer must be scanned and sprayed, which is a problem in that it takes a long production time. In addition, since the deposited metal film is peeled off at the same time as the mask layer, the metal film made of expensive metals such as gold and platinum must be discarded or collected, which is a problem in that the production cost increases.

[0006] In view of this, a method has been proposed as a bump formation method that has good productivity, is low cost, and further improves yield and reliability, in which a negative resist is over-exposed to form an inverted tapered resist pattern, and then bumps are formed by electrolytic plating using the resist pattern as a mask (see, for example, Patent Document 2).

[0007] 7(a) to 7(c) are cross-sectional views conceptually showing a method for manufacturing a semiconductor device according to a conventional embodiment. First, as shown in FIG. 7(a), an insulating film 102, an aluminum pad 103, and a protective film 104 are formed on a silicon substrate 101, and then a barrier metal 105 is formed. Next, a negative resist 107 is applied. Then, an exposure mask is pressed against the resist 107 and the resist 107 is exposed to light. In the negative resist, the portion irradiated with light does not dissolve in the developer, and the portion not irradiated with light dissolves in the developer. Here, if the exposure time is longer than normal, that is, if the resist 107 is overexposed, the resist 107 will have an opening with a reverse tapered cross-sectional shape after development as shown in FIG. 7(b). Next, the opening of the resist 107 is filled by electrolytic plating with an electrolytic plating solution using the resist 107 as a mask, and the shape of the bump 106 becomes a forward tapered shape as shown in FIG. 7(c).

[0008] As a method for filling resist openings with metal, other than plating, a method of jetting a fluid to fill resist openings with a metal fluid has been proposed (for example, Patent Document 3). For example, a head unit including a tank capable of storing a fluid such as molten solder and a discharge head is provided, the discharge head is brought close to the resist opening, and a positive pressure is applied to the fluid by a pressure supply means to inject the fluid into the opening. It is said that a bump can be formed by cooling the fluid to the solidification point of the molten solder. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] International Publication No. 2007 / 114314 [Patent Document 2] Japanese Patent Application Publication No. 4-217324 [Patent Document 3] International Publication No. 2016 / 114275 Summary of the Invention [Problem to be solved by the invention]

[0010] (delete)

[0011] The present invention 、 An object of the present invention is to provide a manufacturing method and manufacturing apparatus capable of stably producing a semiconductor device having a fragile film and capable of mitigating stress applied to a circuit board. [Means for solving the problem]

[0012] In order to solve the above problems, The method for manufacturing a semiconductor device includes a resist opening process in which a mold is pressed against a resist covering a plurality of electrodes provided on a device body from the upper side of the resist to form a plurality of openings in the resist that do not reach the electrodes, a resist hardening process in which light energy is applied to the resist from the upper side of the resist and then a heat treatment is performed to harden the resist, and a developing process in which the resist is reacted with a developer to expand the opening width of the opening so that the bottom of the opening is wider than the entrance.

[0013] The present invention also uses a manufacturing apparatus for semiconductor devices that forms openings in a resist formed on a plurality of electrodes provided on an apparatus body, the manufacturing apparatus comprising a mold that is pressed against the upper surface side of the resist, a light source that irradiates the resist with light energy, and a heating means that heats the resist.

[0014] (delete)

[0015] (delete) Effect of the Invention

[0016] The present disclosure Semiconductor device manufacturing method and manufacturing apparatus According to the present invention, it is possible to reduce the stress applied to the circuit board during the mounting process. It is possible to provide a semiconductor device . [Brief description of the drawings]

[0017] [Figure 1] 1A is a cross-sectional view of a semiconductor device according to a first embodiment; FIG. 1B is a plan view of the semiconductor device according to the first embodiment; [Diagram 2] 1A to 1G are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a first embodiment. [Diagram 3] 1A is a cross-sectional view of a semiconductor device according to a second embodiment; FIG. 1B is a plan view of the semiconductor device according to the second embodiment; [Figure 4] 1A to 1G are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a second embodiment. [Diagram 5] FIG. 13 is a perspective view illustrating a modification of the semiconductor device according to the second embodiment. [Figure 6] 1A is a cross-sectional view of a modified example of the semiconductor device according to the second embodiment; FIG. 1B is a plan view of a modified example of the semiconductor device according to the second embodiment; [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the prior art. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] In view of the above problems, the present disclosure provides a structure and a manufacturing method for a semiconductor device having protruding electrodes that relieve stress during mounting in a semiconductor device that is becoming increasingly multi-pinned and fragile. Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings.

[0019] Further advantages and benefits of certain aspects of the present disclosure will become apparent from the specification and drawings, in which such advantages and / or benefits are provided by some of the embodiments and features described in the specification and drawings, respectively, but not necessarily all of which are provided to obtain one or more identical features.

[0020] [Embodiment 1] <Structure of Semiconductor Device> 1(a) and 1(b) are cross-sectional views illustrating the structure of a semiconductor device U according to the first embodiment.

[0021] 1(a) is a cross-sectional view showing the structure of a semiconductor device U before mounting. In the following, in order to explain the positional relationship of the components, the normal direction of the surface on which the electrode pads 2 of the semiconductor device U are formed will be referred to as the upward direction. However, this direction does not indicate the posture of the semiconductor device U when in use.

[0022] The semiconductor device U has a structure in which an electrode pad 2, an insulating film 3, an under-bump metal layer 4, and a bump 5 are formed in this order on a device body 1. A fragile insulating film 11 is provided below the electrode pad 2.

[0023] The device body 1 is, for example, a semiconductor element such as a transistor, a rectifier, a sensor element, a light emitting element, or a light receiving element. The device body 1 has a structure in which a semiconductor element is formed in a semiconductor substrate such as silicon, gallium arsenide, gallium nitride, silicon carbide, indium gallium arsenide, gallium nitride, or indium phosphide. The device body 1 may be a discrete device or a monolithic IC.

[0024] The electrode pads 2 are made of metal, such as gold, copper, aluminum, aluminum silicon, aluminum copper, tungsten, etc. A plurality of electrode pads 2 are provided on the device body 1.

[0025] An insulating film 3 having an opening is provided on the electrode pads 2, an under-bump metal layer 4 is formed on the insulating film 3, and a bump 5 is formed on the under-bump metal layer 4, with the bumps 5 and the electrode pads 2 being electrically connected to each other. The bumps 5 are formed on each of the electrode pads 2. Furthermore, a resist 8 is formed so as to be in contact with the bumps 5. An air escape hole 10 is formed in the resist 8, and the air escape hole 10 is connected to the bumps 5.

[0026] The under-bump metal layer 4 is a conductive layer formed to be electrically connected to the electrode pad 2, and is used as an electrode in the metal filling process. For example, after forming a conductive film on the entire surface of the device body 1 by sputtering, vapor deposition, or plating, the conductive film between adjacent terminals may be removed by photolithography so that each electrode pad is independent. If the metal filling process is a molten solder filling process, the under-bump metal layer 4 may be made of a material that is wetted by solder and diffuses after the solder is wetted. The under-bump metal layer 4 may be made of, for example, Cu, Au-Ni, Au-Cu-Ni, or Au. The electrode pads 2 are, for example, 10 μm in diameter with a pitch of 15 μm.

[0027] Here, the bump 5 is integrally formed on the under-bump metal layer 4 without any gaps at the interface. The bump 5 is made of a conductive material, for example, a solder material such as SnAg, SnAgCu, Sn, In, SnAgBiIn, SnSb, SnZn, SnZnBi, AuSn, or SnIn.

[0028] The resist 8 is a photosensitive insulating adhesive, for example, a chemically amplified negative photosensitive resist.

[0029] Fig. 1(b) is a plan view showing the structure of the semiconductor device U shown in Fig. 1(a). Bumps 5 are arranged at a predetermined interval, and the tops of the bumps 5 are exposed from the surface of the resist 8. Furthermore, a plurality of air escape holes 10, for example, four, are formed surrounding the tops of the bumps 5 at equal intervals from the center of the bumps in the diametric direction of the bumps. The diameter of the tops of the bumps 5 is, for example, 5 to 8 µm, and the diameter of the air escape holes 10 is, for example, 0.5 to 2 µm. The air escape holes 10 are approximately parallel to the electrode pads 2 in a direction perpendicular to the electrode pads 2.

[0030] <Method of Manufacturing Semiconductor Device> 2(a) to 2(f) are cross-sectional views illustrating a method for manufacturing the semiconductor device U according to the first embodiment.

[0031] First, the under-bump metal layer forming step shown in FIG. 2(a) will be described.

[0032] A plurality of electrode pads 2 are formed on the upper surface of the device body 1. An insulating film 3 having openings through which parts of the electrode pads 2 are exposed is also formed on the electrode pads 2. The insulating film 3 is formed by, for example, plasma CVD or spin coating of a solution. The insulating film 3 is then heat-treated, and openings are formed in the insulating film 3 by a photolithography process. As a result, the upper surfaces of the electrode pads 2 are exposed from the openings formed in the insulating film 3.

[0033] Furthermore, an under-bump metal layer 4 is formed so as to cover the insulating film 3 and the exposed portions of the electrode pads 2. The semiconductor device U is supplied, for example, in the form of a wafer. For example, it has a circular shape of 6 inches, 8 inches, or 12 inches.

[0034] The under-bump metal layer 4 is a thin conductive layer formed on the entire upper surface of the device body 1 so as to cover the electrode pads 2, and is used as an electrode in the metal filling process. When the metal filling process is an electroplating process, the under-bump metal layer 4 is also used as a base layer for forming the electroplating. The material of the under-bump metal layer 4 may be, for example, Ni, W, Cr, Cu, Co, Ti, Au, etc. The thickness of the under-bump metal layer 4 may be, for example, 0.02 to 2 μm.

[0035] The resist formation process shown in FIG. 2(b) will be described.

[0036] After the under-bump metal layer 4 is formed, a resist 8 is formed on the under-bump metal layer 4. The resist 8 is formed to be a uniform film by using, for example, spin coating, a bar coater, spraying, jet dispensing, or the like.

[0037] Next, the resist opening step shown in FIG. 2(c) will be described. The positions of the first protrusions 9a and the second protrusions 9b provided on the nanoimprint mold 9 are aligned with the positions of the electrode pads 2 provided on the semiconductor device U, and the first protrusions 9a and the second protrusions 9b are pressed into the resist 8 softened by a heating and pressurizing means. Furthermore, the nanoimprint mold 9 is stopped at a position where the resist 8 remains between the first protrusions 9a and the second protrusions 9b and the electrode pads 2. Next, the nanoimprint mold 9 is lifted up, and the first openings 8a and the second openings 8b are formed in the resist 8 (see FIG. 2(d)). The first openings 8a and the second openings 8b formed by the nanoimprint mold 9 are opened vertically. The nanoimprint mold 9 has a plurality of first protrusions 9a so that the first openings 8a are formed at positions corresponding to the plurality of electrode pads 2. The plurality of first openings 8a and second openings 8b formed by the nano-imprint mold 9 are each formed to have the same shape.

[0038] Here, the nanoimprint mold 9 is a mold for transfer in which a first protrusion 9a and a second protrusion 9b having the same dimensions and shapes as the first opening 8a and the second opening 8b formed in the resist 8 are provided at a predetermined interval on one side. The nanoimprint mold 9 has the first protrusion 9a and the second protrusion 9b formed in a position facing the electrode pad 2. The shape of the first protrusion 9a and the second protrusion 9b may be, for example, a circle, a rectangle, or an octagon.

[0039] The nanoimprint mold 9 may be made of, for example, one of quartz, glass, electroformed nickel, silicon, and silicone resin, or may be formed by laminating a plurality of these. For example, using a flexible silicone resin on the upper surface of the nanoimprint mold 9 is preferable because it can absorb the warpage and waviness of the semiconductor device U. The nanoimprint mold 9 may be formed, for example, by fabricating an original plate and then flowing and hardening the material of the nanoimprint mold 9.

[0040] The original mold produced here has a plurality of recesses with dimensions equivalent to the opening diameter of the third openings 8c at intervals equal to those of the third openings 8c formed in the resist 8. The original mold may be formed, for example, by etching or electric discharge machining silicon, quartz, or glass. The outer dimensions of the nanoimprint mold 9 need only be larger than those of the semiconductor device U. The shape of the nanoimprint mold 9 is, for example, rectangular.

[0041] Next, the resist curing step shown in FIG. 2(d) will be described. As shown in FIG. 2(d), the entire surface of the resist 8 in which the third opening 8c is formed is given light energy that causes the resist 8 to react. First, the resist 8 is irradiated with light, for example, ultraviolet light, and then the resist 8 is heated. Here, in the resist 8, the portion close to the upper surface of the resist 8 is irradiated with a larger amount of light energy than the portion close to the under-bump metal layer 4, so that the acid generator reacts more and the acid concentration becomes higher. Next, a crosslinking reaction is caused by a heating means. With the acid concentration, the degree of crosslinking becomes higher closer to the upper surface of the resist 8, and the degree of crosslinking becomes lower closer to the under-bump metal layer 4. Here, as the heating means, for example, a batch oven, a reflow furnace, induction heating, infrared heating, a hot plate, etc. are used.

[0042] 2(e), the semiconductor device U is immersed in a developer. The developer enters the first opening 8a, dissolving the inner wall of the first opening 8a of the resist 8, and the first opening 8a is formed in a reverse tapered shape while expanding the opening width toward the bottom surface.

[0043] Here, in the resist hardening process, the amount of light reaching the inside of the first opening 8a is lower than that on the surface of the resist 8, so that the amount of acid generated is less inside the first opening 8a than on the surface of the resist 8, and the degree of cross-linking of the resist 8 is lower. Therefore, dissolution of the inner wall of the first opening 8a is promoted more than that of the resist 8.

[0044] The process of forming the first opening 8a by the developing process will be described in detail later. Here, the developing solution has the effect of dissolving the resist 8. The developing solution may be, for example, an aqueous solution of tetramethylammonium hydroxide or trimethyl-2-hydroxyethylammonium hydroxide. Furthermore, the residue of the developing solution that has entered the first openings 8a, 8b, and 8c is removed by a cleaning solution. The cleaning solution is, for example, pure water. On the other hand, the second opening 8b is narrower than the first opening 8a and the amount of the developing solution that enters is smaller, so the hole expansion diameter of the second opening 8b is smaller than that of the first opening 8a.

[0045] 2(f), a metal filling unit 20 is disposed so as to be in contact with the resist 8 of the semiconductor device U. The metal filling unit 20 comprises a tank 21 containing molten metal 24, a pressure generating source 22, and a drive control device 23. After the position of the tank 21 is moved by the drive control device 23 so that the opening of the tank 21 and the first opening 8a of the resist 8 are aligned, pressure is applied to the tank 21 from the pressure generating source 22, and the molten metal 24 is supplied from the tip of the tank 21, filling the first opening 8a with the molten metal 24. For the molten metal 24, a material such as solder, indium, or gold-tin is used.

[0046] In the cooling step shown in FIG. 2(g), when the molten metal 24 is cooled to below its solidification point, a bump 5 having a sharp tip is formed.

[0047] Here, the metal filling process will be described. When the molten metal 24 is pressurized and injected into the first opening 8a, compressed air passes through the second opening 8b, which is a pressure release hole. The molten metal 24 then wets and spreads over the under-bump metal layer 4, filling the first opening 8a up to its bottom. However, since the molten metal 24 is a viscous fluid, it does not fill the second opening 8b, which is a tiny air release hole, and remains as an air escape route.

[0048] <Effects> As described above, according to the embodiment of the present invention, even if the resist opening has a minute tapered shape, it is possible to stably fill it to the bottom. This makes it possible to form a bump with a sharp tip, and even a fragile semiconductor can be bonded while relieving stress.

[0049] [Embodiment 2] The second embodiment differs from the first embodiment in that the air escape holes are connected in a planar direction (approximately parallel to the electrode pad 2). Items that are not explained are the same as those in the first embodiment.

[0050] <Structure of Semiconductor Device> 3(a) and 3(b) are conceptual diagrams illustrating the structure of a semiconductor device U according to the second embodiment.

[0051] FIG. 3(a) is a cross-sectional view of the semiconductor device U, and FIG.

[0052] 3(a), the semiconductor device U has a structure in which an electrode pad 2, an insulating film 3, an under-bump metal layer 4, and a bump 5 or a dummy bump 15 are formed in this order on a device body 1. A fragile insulating film 11 is provided below the electrode pad 2.

[0053] The device body 1 is, for example, a semiconductor element.

[0054] The electrode pads 2 are made of metal, such as gold, copper, aluminum, aluminum silicon, aluminum copper, tungsten, etc. A plurality of electrode pads 2 are provided on the device body 1.

[0055] An under-bump metal layer 4 is formed on the electrode pad 2, and a bump 5 is formed on the under-bump metal layer 4, and the bump 5 and the electrode pad 2 are electrically connected. A plurality of bumps 5, for example, eight bumps 5, are formed on the electrode pad 2. A resist 8 is further formed to cover the bumps 5. An air vent 10 is formed inside the resist 8, and the air vent 10 is connected to the bump 5. The air vent 10 may be hollow or may be filled with the same metal material as the bump 5. Furthermore, a dummy bump 15 is provided on the same electrode pad 2. The dummy bump 15 and the bump 5 are connected through the air vent 10.

[0056] <Method of Manufacturing Semiconductor Device> 4(a) to 4(f) are cross-sectional views illustrating a method for manufacturing a semiconductor device U according to the second embodiment.

[0057] As shown in Fig. 4(a), in the path forming adhesive application step, the path forming adhesive 13 is supplied by a material supplying means. For example, the material supplying means may be a dispenser, a screen printer, or deposition using a mask. The path forming adhesive 13 is hardened or dried by light or heating means.

[0058] The path forming adhesive 13 contains a component whose boiling point is lower than the curing temperature of the resist 8, and is a photo- or thermosetting adhesive or hydrophilic material. The photo- or thermosetting adhesive may be made of, for example, a solvent component such as ethanol, alcohol, glycol ether, toluene, or xylene, a resin component such as acrylic, epoxy, or urethane, or an insulating filler component such as an inorganic filler or an organic filler. The hydrophilic material may be made of a hydrophilic polymer containing, for example, 2,3-dihydroxypropyl methacrylate, polyvinyl alcohol, polymysoxyoligoethylene glycol methacrylate, carboxylate, or sulfonate. The following steps will be described using a photo-curing adhesive as an example.

[0059] 4(b), in a resist supplying step, a resist 8 is supplied by, for example, spin coating, screen printing, or dispensing so as to cover the volatile path forming adhesive 13. The resist 8 is cured by ultraviolet irradiation or heating means.

[0060] Furthermore, as shown in FIG. 4(c), in the nanoimprinting process, a nanoimprinting mold 9 provided with a plurality of first protrusions 9a is pressed against the resist 8 and then peeled off.

[0061] 4(d), when the resist 8 is irradiated with light by the light irradiation means, the acid generator contained in the resist 8 reacts to generate acid. The acid is diffused within the resist 8 by the heating means, and reacts with the crosslinking agent contained in the resist 8 to promote the crosslinking reaction. Here, the path forming adhesive 13 is volatilized by the heating means, and air escape holes 10 are formed.

[0062] Next, in the development step shown in FIG. 4(e), the resist opening is expanded by the developer to form an inversely tapered resist opening.

[0063] 4(f), a metal filling unit 20 is used to fill the first opening 8a with metal to form a bump 5. During metal filling, air passes through air escape hole 10, then passes through dummy bump 15 and is discharged into the air.

[0064] Next, a process in which a hydrophilic polymer is used as the path forming adhesive will be described. The path forming adhesive is supplied in the same manner as in the above process, and then dried. Only the pattern in which the path forming adhesive is drawn exhibits hydrophilic properties. Furthermore, in the development process, the developer penetrates into the pattern portion in which hydrophilic properties are exhibited, and dissolves it, forming air holes 10.

[0065] According to the embodiment of the present invention, it becomes possible to fill smaller inverted tapered openings with metal.

[0066] <Modification of the second embodiment> FIG. 5 is a three-dimensional view illustrating the structure of a semiconductor device U according to the second embodiment.

[0067] In the semiconductor device U, bumps 5 are formed on each of a plurality of electrode pads 2. A dummy pad 25 is formed adjacent to the bump 5. After forming the bumps with air holes 10 in the same manner as in the manufacturing method of the second embodiment, the resist 8 is peeled off to form the above structure. Here, it differs from the second embodiment in that the electrode pads 2 are provided independently.

[0068] 6A and 6B are conceptual diagrams for explaining a solder filling step in a method for manufacturing a semiconductor device U according to a modified example of the embodiment 2. As shown in FIG. 6A, FIG. 6A is a cross-sectional view of the semiconductor device U, and FIG. 6B is a plan view of the semiconductor device U.

[0069] 6(a), the semiconductor device U has a structure in which an electrode pad 2, an insulating film 3, an under-bump metal layer 4, and a bump 5 or a dummy bump 15 are formed in this order on a device body 1. A fragile insulating film 11 is provided below the electrode pad 2.

[0070] The device body 1 is, for example, a semiconductor element.

[0071] The electrode pads 2 are made of metal, such as gold, copper, aluminum, aluminum silicon, aluminum copper, tungsten, etc. A plurality of electrode pads 2 are provided on the device body 1.

[0072] An under-bump metal layer 4 is formed on the electrode pad 2, and a bump 5 is formed on the under-bump metal layer 4, and the bump 5 and the electrode pad 2 are electrically connected. Incidentally, one bump 5 is formed on each electrode pad 2. Furthermore, a resist 8 is formed to cover the bump 5. An air vent 10 is formed inside the resist 8, and the air vent 10 is connected to the bump 5. The air vent 10 may be hollow or may be filled with a metal of the same material as the bump 5. Furthermore, a dummy bump 15 is provided on a dummy pad 25 on the same plane. The dummy bump 15 and the bump 5 are connected through the air vent 10.

[0073] As shown in FIG. 6(b), the electrode pads 2, including the dummy pad 25, are arranged at regular intervals, and adjacent pads 2 are joined by linear air escape holes 10, and a path leading to the dummy pad 25 is also formed. When molten solder is filled in the positions starting from the position furthest from the dummy pad 25, air can be released from the dummy bump 15. By arranging the dummy bump 15, the dummy bump 15 is formed with the same shape and dimensions as the first opening 8a, so that the dummy bump 15 can be formed simultaneously with the resist opening step. This eliminates the need for a production step for forming the dummy bump, improving productivity.

[0074] <Effects> As described above, according to the second embodiment, it is possible to form smaller protruding bumps, and when mounting the semiconductor device U on a circuit board, it is possible to further reduce the stress acting on the insulating film 11 in the semiconductor device U. This makes it possible to improve the manufacturing yield.

[0075] In the above description, the metal filling step is described as filling with molten solder, but this is not limited to this. The same effect can be obtained even if nanopaste, conductive paste, or plating is used. [Industrial Applicability]

[0076] According to the semiconductor device according to the present disclosure, it is possible to reduce the stress applied to the semiconductor device during the mounting process. [Explanation of symbols]

[0077] 1. Device body 2 Electrode pads 3. Insulating film 4 Underbump Metal Layer 5. Bump 8. Resist 8a 1st opening 8b 2nd opening 8c 3rd opening 9 Nanoimprint type 9a 1st protrusion 9b 2nd protrusion U Semiconductor Devices 10. Air Vent 11. Insulating film 13 Adhesive for forming pathways 15 Dummy Bump 20 Metal Filling Unit 21 Tank 22 Pressure Source 23 Drive control device 24 Molten Metal 25 Dummy Pad IC Monolithic 101 Silicon substrate 102 Insulating film 103 Aluminum Pad 104 Protective film 105 Barrier Metal 106 Bump 107 Resist

Claims

1. a resist opening step of pressing a mold against a resist covering a plurality of electrodes provided on the device body from an upper surface side of the resist to form a plurality of openings in the resist that do not reach the electrodes; a resist hardening step of applying light energy to the resist from an upper surface side of the resist and then performing a heat treatment to harden the resist; a developing step of reacting the resist with a developer to expand the width of the opening so that the bottom of the opening is wider than the inlet, The resist contains an acid generator, A method for manufacturing a semiconductor device, in which, in the resist hardening process, acid is generated in the resist by the light energy, so that the acid concentration is high on the top side of the resist where a greater amount of light energy is irradiated, and the acid concentration is low on the electrode side of the resist where a lesser amount of light energy is irradiated, and by performing the heat treatment in this acid concentration state, the degree of cross-linking of the resist on the electrode side is lower than the degree of cross-linking of the top side of the resist.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein in the developing step, the device body is immersed in the developer to cause the resist to react with the developer.

3. 2 . The method for manufacturing a semiconductor device according to claim 1 , wherein in the developing step, an opening width of the opening is gradually increased from the upper surface side of the resist toward the electrode.

4. 2. The method for manufacturing a semiconductor device according to claim 1, wherein in said resist opening step, said resist is softened by heating.

5. A manufacturing apparatus for forming openings in a resist formed on a plurality of electrodes provided in an apparatus body, comprising: A mold for pressing the resist from above; a light source that irradiates the resist with light energy; A heating means for heating the resist, The resist contains an acid generator, An apparatus for manufacturing a semiconductor device, comprising: an apparatus for generating acid in the resist by the light energy irradiated from the light source, so that the acid concentration is high on the upper side of the resist where the amount of light energy is greater and the acid concentration is low on the electrode side of the resist where the amount of light energy is lesser; and an apparatus for manufacturing a semiconductor device, comprising: a heating means for heating the resist in the acid concentration state so that the degree of cross-linking on the electrode side of the resist is lower than the degree of cross-linking on the upper side of the resist.

6. 6. The apparatus for manufacturing a semiconductor device according to claim 5, wherein said heating means heats said resist after said light energy is irradiated onto said resist by said light source.

7. 6. The apparatus for manufacturing a semiconductor device according to claim 5, wherein the mold is pressed against the resist so as not to reach the electrode.

8. a resist opening step of pressing a mold against a resist covering a plurality of electrodes provided on the device body from an upper surface side of the resist to form a plurality of openings in the resist that do not reach the electrodes; a resist hardening step of applying light energy to the resist from an upper surface side of the resist and then performing a heat treatment to harden the resist; a developing step of reacting the resist with a developer to expand the width of the opening so that the bottom of the opening is wider than the inlet, In the developing step, the device body is immersed in the developer, thereby causing the resist to react with the developer.

9. A manufacturing apparatus for forming openings in a resist formed on a plurality of electrodes provided in an apparatus body, comprising: A mold for pressing the resist from above; a light source that irradiates the resist with light energy; A heating means for heating the resist; an immersion unit for immersing the device body in a developer, pressing the mold against an upper surface of the resist provided on an apparatus body to form a plurality of the openings in the resist that do not reach the electrodes; After the light energy is applied from the upper surface side of the resist by the light source, the resist is heated by the heating means to harden the resist; An apparatus for manufacturing a semiconductor device, comprising: an apparatus body including the hardened resist, which is immersed in the developer in the immersion section, causing the resist to react with the developer, thereby expanding the opening width of the opening so that the bottom of the opening is wider than the entrance.

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