Time-domain filtering of gamma events

Abstract

This application generally relates to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system having an array of cells, each having a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD. The system can further include a trigger network configured to generate a pulse on a trigger line in response to a SPAD of the array undergoing breakdown. The system can further include a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width.

Description

[Technical field]

[0001] The following relates to silicon photomultiplier (SiPM) detector arrays of the type often used in digital positron emission tomography (PET) systems, astronomy detectors, light detection and ranging (LIDAR) systems, and the like. [Background technology]

[0002] In SiPMs used for digital PET, each pixel of the detector array is itself composed of an array of cells, each cell containing a single photon avalanche diode (SPAD) reverse biased above its breakdown voltage, and a portion of the support circuitry. The support circuitry includes submodules that generate and verify a trigger event when the SPAD breaks down, and count the breakdown events across the array of cells of the pixel for a time interval after the trigger event. Following a trigger event (e.g., after a breakdown), quench and refresh circuits are used to speed up reinstallation of the SPAD. Some illustrative examples of SiPM detector arrays for PET are described in U.S. Patent No. 9,268,033 to Frach et al., entitled "Digital Silicon Photomultiplier Tube for TOFPET," and U.S. Patent Publication No. 2016 / 0011321 A1 to Solf, entitled "Timestamping Detected Radiation Quanta."

[0003] However, noise can cause certain problems, specifically so-called dark counts that are not related to photon detection but mostly SPAD breakdown due to thermally generated carriers in single-photon avalanche diode junctions. Such dark counts can result in false triggers, which in turn result in undesirable detector dead times when the false triggers are processed, rejected, and the SiPM is reset. Summary of the Invention [Problem to be solved by the invention]

[0004] The following discloses certain improvements that address this and other problems. [Means for solving the problem]

[0005] In one disclosed aspect, a system includes an array of cells each including a single photon avalanche diode (SPAD) reverse biased above a breakdown voltage of the SPAD, a trigger network configured to generate a pulse on a trigger line in response to a SPAD of the array undergoing breakdown, and a pulse width filter configured to block pulses on the trigger line whose pulse width is less than a threshold width.

[0006] In another disclosed aspect, a method includes providing a trigger network for generating a pulse on a trigger line in response to a single photon avalanche diode of the array undergoing breakdown, and providing a pulse width filter for blocking pulses on the trigger line having a pulse width less than a threshold width.

[0007] In another disclosed aspect, a trigger network for a silicon photomultiplier tube (SiPM) is disclosed that includes an array of cells each including a single photon avalanche diode (SPAD) reverse biased above a breakdown voltage of the SPAD, a network of OR gates connecting cells of the array to a trigger line, the trigger network including the network of OR gates that generate a pulse on the trigger line in response to a SPAD of the array experiencing a breakdown voltage, and a pulse width filter configured to block pulses on the trigger line that have a pulse width less than a threshold width.

[0008] One advantage is that it provides a trigger line noise filter that effectively eliminates dark counts.

[0009] Another advantage is providing a trigger line noise filter that efficiently eliminates dark counts without invoking energy-based validation logic, thereby avoiding unnecessary detector dead time.

[0010] Another advantage is providing a trigger line noise filter that effectively rejects dark counts without triggering the integration and time stamping circuitry, thereby avoiding unnecessary detector reset processes.

[0011] Another advantage resides in an improved PET system having improved imaging capabilities.

[0012] Another advantage resides in improved light detection and ranging (LIDAR) systems.

[0013] A given embodiment may provide none, one, two, more, or all of the above advantages and / or may provide other advantages, as will be apparent to one of ordinary skill in the art upon reading and understanding this disclosure.

[0014] The invention may take form in various components and arrangements of components, and in various steps and arrangements of steps. The drawings are only for purposes of illustrating preferred embodiments and are not to be construed as limiting the invention. [Brief description of the drawings]

[0015] [Figure 1] 1 illustrates a schematic diagram of an embodiment of a PET scanning system. [Figure 2A] 1A and 1B show schematic diagrams of an embodiment of a detector pixel (or more generally a silicon photomultiplier, or SiPM); [Figure 2B] 1 shows a schematic representation of an embodiment of a detector pixel (or more generally a silicon photomultiplier, SiPM); 2 shows a row combining circuit; [Diagram 3]Examples of pulses caused by dark counts and gamma events are shown. [Figure 4] FIG. 2 illustrates an embodiment of a pulse width filter. [Diagram 5] FIG. 2B illustrates a variable width pulse generator embodiment of the row trigger pulse generator of FIG. 2A. [Figure 6] Figure 1 shows the efficiency of the time domain filters, more specifically the coincidence resolved time spectra for different pulse width / trigger filter settings. [Figure 7] Measurements are presented showing the effect of the time domain filter alone, and more specifically, the effect of the pulse width filter with the second level fast verification filter disabled and variable pulse widths. [Figure 8] 1 illustrates a schematic diagram of an embodiment relating to a pulse width filter; [Figure 9] 1 diagrammatically illustrates an embodiment relating to a variable width pulse generator; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] The following is directed to silicon photomultiplier (SiPM) detector arrays of the type often used in medical nuclear imaging systems such as digital positron emission tomography (PET) systems, however the disclosed approach has many applications both within and outside the field of nuclear medicine imaging.

[0017] 1, a radiation imaging system 10 includes a scanner 12. Scanner 12 is positioned and sized to receive a prone human subject in an examination region.

[0018] In medical nuclear imaging, various scanning techniques and variations can be used. One such technique is PET. In one example of PET, a radiopharmaceutical containing a positron-emitting radioisotope is administered to the subject. The radiopharmaceutical may be designed to accumulate in an organ or tissue of interest, such as the brain, lungs, or tumor. After administration of the radiopharmaceutical, the subject is loaded into the examination area. As time progresses, the radiopharmaceutical will emit positrons in a radioactive decay event. The positrons emitted by the radiopharmaceutical travel a short (generally negligible) distance before interacting with an electron. Once the positron interacts with the electron, both the positron and the electron are annihilated, producing a pair of opposing gamma photons (also called annihilation photons). The gamma photons travel in opposite directions and can each be detected when they reach the scintillator 100 in the scanner 12. This example may rely on the coincident detection of a pair of gamma photons. Thus, some algorithms may discount gamma photons that do not arrive at the same time.

[0019] To detect gamma photons, silicon photomultiplier (SiPM) detector arrays were used. In these detectors, each pixel of the detector array is itself composed of an array of cells, each cell containing a single photon avalanche diode (SPAD), reverse biased above its breakdown voltage, and including part of the support circuitry. (In the following, the term "pixel" is used to refer to the array of SPAD cells, since in PET applications this array of cells forms one pixel of a larger PET detector array. However, in some other applications a single array of SPAD cells may be used, for example, as a radiation detector in a LIDAR system, in which case there may be only a single "pixel"), the support circuitry including submodules for generating and verifying a trigger event when the SPAD goes into failure, counting breakdown events across the array of pixel cells for a time interval after the trigger event, and assigning a digital timestamp to the event. Quenching and refresh circuits are used after failure to accelerate the reinstallation of the SPAD. To provide high spatial resolution in PET detector designs, the silicon area occupied by each cell is made as small as practicable. While some support circuitry must be within the area of ​​the cells in the array, a feasible portion of the support circuitry is located on the periphery of the pixel and also designed to service multiple cells (e.g., an entire row of cells). Some illustrative examples of SiPM detector arrays for PET are described in U.S. Patent Application Publication No. 9,268,033 to Frach et al., entitled "Digital Silicon Photomultipliers for TOFPET," and U.S. Patent Application Publication No. 2016 / 0011321 A1 to Solf, entitled "Time-Stamping Detected Radiation Quantity," both of which are incorporated herein by reference in their entireties.

[0020] A complete PET radiation detector for detecting gamma rays further includes a scintillator 100 that produces a flash of light (scintillation) when a gamma ray is absorbed. The SiPM pixel 110 detects the burst of photons that constitutes the scintillation. The total number of counts over the integration time interval is a metric of the photon energy of the detected event, and the timing of the trigger signal provides a timestamp of the event. Furthermore, it is desirable to operate the SiPM at room temperature, or at least to limit the amount of cooling.

[0021] The interest here is that the trigger detection and validation circuitry is located at the periphery of the pixel area, and the trigger lines of the cells are combined by a trigger network that includes a logical "OR" unit. The effect of this is that the final output is a train of trigger pulses generated by all the SPADs of the pixel. Thus, a single trigger detection circuit can be employed for the entire pixel. The goal of some designs is to trigger the very first SPAD breakdown to provide the highest time resolution.

[0022] One problem that may arise is that the SPAD may also be triggered by noise. Specifically, so-called dark counts are trigger events that are not related to photon detection, but are mostly due to thermally generated carriers in single-photon avalanche diode junctions. Generally, as temperature increases, so does noise (e.g., dark count trigger events). In this regard, this may lead to false triggers, since the pixel triggers on the first SPAD breakdown. An energy-based verification circuit can partially address this problem. The trigger verification circuit verifies the trigger signal and stops integrating the counts if the trigger signal is determined to be false (e.g., due to thermally induced SPAD breakdown). In one approach, the trigger verification circuit measures the current through the bias network of the SiPM. If the total current remains below a certain current threshold for a selected time interval within the capture period, which is measured by a discriminator or other circuit, capture (i.e., counting over the integration time interval) is stopped and an automatic reset sequence is initiated in preparation for the next trigger. If the current exceeds the threshold, the discriminator output rises to a "high" level and capture continues. This approach works because the SPAD in its reverse-biased quiescent state conducts a very low current, whereas upon breakdown it conducts a large current. Thus, if the trigger pulse is generated by a random thermal breakdown, the bias network current will be low (corresponding to a random breakdown rate), whereas if the trigger pulse is the first photon detection of a scintillation event, there should not be a large number of SPAD breakdowns generating a larger bias network current. Another trigger verification approach that operates in the digital domain is to detect the number of counts in a short time interval into the integration time interval and stop integrating if the counts are too low. These trigger verification approaches are referred to herein as energy-based verification because the verification metric is an assessment of the energy of the scintillation (and therefore, indirectly, the gamma rays that generate the scintillation).

[0023] Time resolution is a further factor to be considered in the system design. More specifically, when coupled to a time-of-flight scintillator, suitable fast trigger logic of the digital silicon photomultiplier typically allows a time resolution in the range of 100 ps to 200 ps. However, to obtain the best time resolution and assume negligible scintillation pulse rise time, the integration time period of the digital silicon photomultiplier should be triggered to start at the very first photon detected by the device (i.e., at the occurrence of the first SPAD breakdown). However, digital silicon photomultipliers are not ideal and have a certain level of noise (e.g., dark counts). Therefore, the device configuration for the best time resolution would trigger on every dark count, automatically resulting in an increase in the dead time of the device. Although verification can partially address the problem of dark current induced triggering, this solution is not completely satisfactory. This is because there is a time interval between the triggering of the integration time interval and the subsequent cessation of integration due to the operation of the verification circuitry, followed by an automatic pixel controller reset sequence (including resetting of the integration and time stamp circuits). This introduces a sensor dead time during which the SPAD array cannot detect scintillation events. For example, resetting a time-to-digital converter (TDC) that timestams the trigger pulse can take up to 50 ns in some embodiments (see Solf, U.S. Patent Application Publication 2016 / 0011321 A1), which becomes problematic when designing for 200 ps time resolution.

[0024] An approach to address this issue is described in the prior patent application Solf, US Patent Application Publication 2016 / 0011321 A1. This approach inserts a 5 ns delay line at the output of the (coupled) trigger line, providing time to verify the trigger using an energy-based verification logic before actually triggering the pixel controller. Here, the basic principle is to gate the first photon trigger pulse by a higher "energy" threshold. As an example, each photon (and dark count) generates a 1 ns long trigger pulse on the trigger network. At the output of the trigger network, the pulse train is sent with a 5 ns delay line, followed by the first input of an AND gate. The other input of the AND gate is connected to logic that detects higher energy levels (e.g. verification logic that detects higher energy levels by measuring the current in the bias network or early counts of SPAD breakdown), thereby determining whether a particular pulse at the end of the delay line belongs to a real gamma event or to a dark noise event. In this way, dark noise events are suppressed and do not trigger the pixel controller, and therefore do not contribute to the dead time of the sensor. The resulting dead time can be reduced, enabling high coincidence time resolution even at room temperature.

[0025] Furthermore, the event filter of Solf, US Patent Application Publication No. 2016 / 0011321 A1 uses pulse coding of the trigger event and is therefore sensitive to the trigger pulse width. Long pulse widths can create dead time in the trigger network and lead to event and background noise triggers being merged together. It is therefore beneficial to keep the pulse width of the trigger pulse as short as possible, especially when operating the sensor at higher temperatures and therefore higher noise levels.

[0026] This disclosure describes a different and / or additional approach to improve the discrimination of dark noise events by adding a pulse width filter 120 before the actual energy-based fast validation trigger filter 130. The pulse width filter 120 is configured to block single trigger pulses (or more generally pulses whose pulse width is below some minimum threshold), typically originating from dark counts. This blocks dark noise events and reduces the dead time of the pixel controller. In one example, an actual event is represented by the detection of tens of photons in the first nanosecond. The trigger pulses of those photons overlap in the trigger network, thereby lengthening the trigger pulse entering the pulse width filter 120. The pulse width filter 120 is a time domain filter that passes longer pulses to act as trigger pulses for triggering downstream components. Advantageously, the disclosed pulse width filter 120 rejects false triggers before initiating downstream validation logic and time stamping and integration circuits, thereby avoiding the dead time and subsequent pixel reset time associated with false triggering of these processes.

[0027] Put another way, in some aspects there is a programmable pulse width filter / discriminator. Thus, in some embodiments the pulse width filter threshold (i.e., the minimum pulse width that will pass) is a programmable filter parameter. The pulse width of each trigger can also be varied / adjusted.

[0028] Exemplary embodiments of detector pixels (or more generally, silicon photomultipliers, or SiPMs) are shown in FIGS. 2A and 2B. A PET detector typically consists of a ring of detector pixels. Each detector pixel includes an array (200) of cells (202), as shown generally in inset A of FIG. 2A. Inset A shows a schematic of a SiPM chip in plan view (bottom of inset A), a suitable layout of SPAD rows 210 and row trigger pulse generators 214, and a more detailed layout of one exemplary row (top of inset A). As shown diagrammatically in inset B of FIG. 2A, each cell 202 includes a single-photon avalanche diode 204 that is reverse biased above the breakdown voltage of the SPAD 204. For design reasons, these SPAD cells are arranged in rows 210, and inset B of FIG. 2A shows two cells 202 in a single row. Each row of SPAD cells 210 generates a trigger pulse of finite width (typically 1 nanosecond or less) when one or more SPADs in the row break down. Figure 2A shows a circuit for generating the trigger pulse. The trigger lines of the SPADs 202 are connected by a tree of logical OR gates 212 to a row trigger pulse generator 214 that generates a pulse 216 in response to any SPAD 202 in the row going into breakdown (thus generating a logic high on the tree of logical OR gates 212). The control logic 206 of the cells 202 also automatically quenches and recharges the failed SPAD to restore sensitivity. It is noted that the row 210 can be composed of a single SPAD cell in the extreme case.

[0029] Referring to FIG. 2B, inset C shows a schematic of a SiPM chip in plan view, showing a SPAD array 210, 214 including a SPAD column 210 and associated row trigger pulse generator 214, as well as a suitable layout for components 120, 220, 130, 240, 250 at the periphery of the SPAD array 210, 214. This is merely one illustrative example, and the detailed layout of the components on the silicon chip area is appropriately designed for a particular application. FIG. 2B further shows a trigger network consisting of (but not limited to) a tree of logical OR gates 220, which combines the trigger outputs 216 of the SPAD rows 210, 214 to a single trigger line 230. (It is noted that the term "logical OR gate" as used herein is intended to encompass logical equivalents such as the De Morgan equivalent, A OR B = NOT [NOT A AND NOT B]). Here, the pulses of the individual rows 210, 214 are combined in time, as shown in FIG. 2B. Due to the asynchronous nature of the breakdown, trigger pulses may overlap and merge into a longer trigger pulse. The pulse width filter 120 filters the trigger line 230 to block pulses on the trigger line 230 whose pulse width is less than a threshold width and pass trigger pulses whose pulse width is greater than the threshold width. The time stamp circuit 240 is configured to assign a time stamp to the trigger pulses that pass the pulse width filter 120. The time stamp circuit 240 may include, for example, at least one time-to-digital converter (TDC). In one approach, the rising edge of the trigger pulse that passes the pulse width filter 120 serves to latch the value of a counter or other reference clock to provide the time stamp. A more complex TDC circuit for providing time stamping with high time resolution (e.g., useful for time-of-flight PET) is described in Frach et al., U.S. Patent Application Publication No. 2012 / 0068077 A1, entitled "Method for Improving the Time Resolution of Digital Silicon Photomultiplier Tubes," which is incorporated herein by reference in its entirety.Furthermore, the integrated circuit 250 is configured to accumulate a count of SPAD breakdown events in the array 200 of cells 202 over an integration time period triggered by a trigger pulse passing through the pulse width filter 120. The integration circuit preferably includes a digital counter that counts the number of SPAD breakdown events occurring over the integration time interval. Some suitable embodiments of the integrated circuit are described in US Patent No. 9,268,033 to Frach et al. and US Patent Application Publication No. 2016 / 0011321 A1 to Solf. In some embodiments, the trigger pulse passed by the pulse width filter 120 also passes through an energy-based validation trigger filter 130 that is configured to validate the pulse on the trigger line that passes through the pulse width filter. In response to a validation failure, the optical detector resets (e.g., the time stamp circuit 240 is reset and the accumulation of breakdown counts by the integration circuit 250 is discontinued). The advantages of interposing the pulse width filter 120 to filter out shorter pulses on the trigger line 230 are as follows: Since typical dark count rates at the input of the trigger network are of the order of a few hundred kcps, the average duration of the trigger pulses at the output of the trigger network is typically >1 microsecond and the pulse width is of the order of 1 nanosecond, so the probability of trigger pulse width broadening due to coincidence counting is very low (this assumes low optical crosstalk in the sensor / scintillator).

[0030] In other words, in FIG. 2B the time-domain pulse-width filter 120 is inserted on the trigger line after the last combined OR 220 but before it enters the downstream timestamp, integration, and trigger validation logic. The premise is that for real gamma rays, a burst of photons results in the rapid triggering of many SPADs, so that when these are combined by a logical "OR" chain into a single combined trigger signal, the result is a long pulse. In contrast, SPAD breakdowns are isolated events, and while the thermal breakdown rate may be quite high, it is unlikely that random thermal breakdowns will combine to produce a composite pulse of the same length as a true gamma detection. Thus, by setting the time-domain pulse-width filter to pass only pulses longer than some minimum threshold length, pulses due to thermal noise are rejected.

[0031] An example of overlapping trigger pulses is shown in FIG. 3, where for a gamma event with sufficient energy, the probability that many rows will trigger within a short time window and generate a sufficiently long trigger pulse increases. In FIG. 3, the time-trigger time window for gamma events to be detected is labeled Te, while the time-trigger time window for dark count events to be detected is labeled Td. A higher energy deposition in the crystal results in more photons being emitted by the crystal and thus a higher probability of generating a trigger pulse that can pass through the filter. In this way, the time-domain filter, in combination with the programmable pulse width, acts as an energy threshold. Variable trigger pulse width and filter parameters allow optimization of noise suppression for a given detector configuration. For example, the photon density in a 1:1 coupled detector is much higher compared to, for example, a light-shared detector. Thus, in a 1:1 coupled detector, narrow trigger pulses still overlap to trigger a pulse of sufficient length and the dead time of the trigger network is minimized. For light-shared detectors with low photon density the trigger pulse width must be extended and the pulse width filter window must be adapted to still allow sufficient discrimination of real events from noise. For very low photon densities (eg BGO or light sharing detectors), time domain filtering becomes less effective and measures are implemented to bypass / disable the time domain filter.

[0032] Making the trigger pulse width too narrow can have another effect in high photon density situations. In this case, the pulse width filter acts as a low pass filter, and the threshold of the next Schmitt trigger is determined by the integral of the first N narrow pulses (duty cycle of the filter input) rather than the trigger of the first photon. This can lead to a trigger signal passing through the filter, and the timestamp of this trigger is no longer correlated to the first detected photon, leading to a degradation of the coincidence time resolution. Therefore, some embodiments also include adjustable filter parameters, including variable trigger pulse width. Some embodiments also include providing filter parameter adjustments to adjust for the characteristics of different scintillator crystals and / or different noise levels (e.g., at different operating temperatures).

[0033] One possible implementation of the pulse width filter 120 is shown in FIG. Budo Following the inverters N1, N2 / P1, P2 are the gate oxide capacitor pair Cn / Cp and the inverting Schmitt trigger 410. The Schmitt trigger 410 is intended to prevent oscillations when the voltage on Cn / Cp reaches a level close to a threshold voltage (e.g., about 100 mV). The starved inverter is used as a switched current source with an adjustable current to charge and discharge the gate capacitor depending on the duty cycle of the input signal. The Schmitt trigger 410 provides hysteresis and determines whether the averaged input signal corresponds to a logic 1 or 0. The voltages Vn and Vp are used to adjust the rising and falling edge currents, and thus the charge and discharge rates of Cn / Cp, respectively.

[0034] 5 shows an example of a variable width pulse generator 500 that may suitably function as the row trigger pulse generator 214 (see FIG. 2A) for each row to provide a variable pulse width. The embodiment presented here uses a starter pulse generator similar to that in the exemplary embodiment of the pulse width filter 120 of FIG. Budo An inverter configuration 540 is also used, but the star of FIG. BudoIn the inverter configuration 540 it is used as a variable delay element. To save chip area, only the rising edge of the input signal can be delayed by adjusting the bias voltage Vn of N2. The falling edge of the trigger input in does not lead to a trigger pulse at the output out and therefore does not need to be adjusted. A static, active high trigger signal is connected to the AND gate 510 input A and its inverted copy is connected to the input B via the variable delay element 540. Thus, when the trigger input in switches from 0 to 1, the input B is still at logic 1 and the output Z of the AND gate 510 switches to logic 1. After the adjusted delay Tp, the AND gate 510 input B changes to logic 0 and as a result, the AND gate 510 outputs after a short time. Thus, the variable delay element 540 is utilized to adjust the pulse width Tp. An additional static delay element 530 (buffer) can be optionally added before input A of AND gate 510 as shown in Figure 5 to compensate for the internal delay ΔT of Schmitt trigger 520, which would otherwise limit the minimum pulse width. In an alternative embodiment, variable delay element 540 can be replaced by multiple fixed delay elements (e.g., a buffer or inverter chain, a chain of fixed delay elements) connected to a multiplexer, which is then used to select the preferred delay. This has the advantage of avoiding analog voltages and digital-to-analog converters (chip area, noise sensitivity), but only a relatively small number of pulse widths can be selected.

[0035] Figure 6 shows the efficiency of the time domain filter. More specifically, Figure 6 shows the coincidence resolved time spectrum for different pulse width / trigger filter settings. For short trigger pulse widths, the noise floor is significantly reduced. The time domain filter suppresses the dark count noise by one order of magnitude. This results in a suppression of the noise floor for uncorrelated coincidence pairs (shown in Figure 6 as the line corresponding to the #30 pulse 0.5 ns) compared to trigger filter configurations using longer trigger pulses. The "shoulder" around the coincidence peak is due to the subsequent fast verification trigger filter, as described in Solf, U.S. Patent Application Publication No. 2016 / 0011321 A1.

[0036] FIG. 7 shows the effect of the time domain filter alone. More specifically, FIG. 7 shows measurements showing the effect of the pulse width filter and variable pulse width with the second level fast verification filter disabled. The pulse width filter in combination with a short trigger pulse effectively reduces the tail of the coincidence timing histogram. The probability that at least one of the timestamps is generated by a dark count hit is strongly reduced (by 8 times), while a shorter trigger pulse length only gives a 2-fold reduction. The embodiments described herein show a reduction in dead time, resulting in an increase in system sensitivity even at high temperatures (here 35° C. with 98% sensitivity).

[0037] FIG. 8 is a flow chart of an embodiment of a pulse width filter. Referring to this, in step 802, the SPAD is broken down. In step 804 (optional), the OR tree generates a row trigger. In step 806, the row trigger pulse generator 214 generates a pulsed SPAD row trigger signal 216. In step 810, the SPAD row trigger signal 216 is received by a number of OR gates. In step 820, a trigger signal 230 is generated from the SPAD row trigger signal 216 with a number of OR gates. In step 830, the trigger signal 230 is received from a number of OR gates with a pulse width filter 120. In step 840, a pulse width filtered signal is generated from the received trigger signal with the pulse width filter 120. In step 850, a pulse width filtered signal is received from the pulse width filter using an energy-based fast verification trigger filter.

[0038] In addition to PET, there are many other uses for the disclosed digital silicon photomultiplier tubes, especially when used at high temperatures. More generally, other applications requiring the detection of light pulses by high time resolution time stamping are conceivable. Other applications include, for example, PET / CT, PET / MR, SPECT, high energy physics, LIDAR, and fluorescence lifetime imaging microscopy. Of particular interest are LIDAR systems that perform optical ranging based on the time of flight between the emission of a laser beam and the detection of its reflection. LIDAR has applications in diverse industries, including, for example, automotive, where it is used as a triggering device to activate emergency brakes.

[0039] It will further be appreciated that the techniques disclosed herein may be implemented by a non-transitory storage medium that stores instructions readable and executable by an electronic data processing device to perform the techniques disclosed. Such non-transitory storage media may comprise cloud-based storage media such as hard drives or other magnetic storage media, optical disks or other optical storage media, RAID disk arrays, flash memory or other non-volatile electronic storage media.

[0040] The present invention has been described with reference to preferred embodiments. Modifications and alterations may occur to others upon reading and understanding the preceding detailed description. It is intended that these exemplary embodiments be construed as including all such modifications and alterations insofar as they come within the scope of the claims and equivalents thereof.

Claims

1. An array of cells, each including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The trigger network comprises a network of OR gates connecting cells of the array to the trigger lines.

2. The photodetector of claim 1 , further comprising a time stamp circuit configured to assign a time stamp to a trigger pulse that passes through the pulse width filter.

3. The photodetector of claim 2 , wherein the time stamp circuit comprises a time-to-digital converter.

4. 4. The photodetector of claim 1, further comprising an integration circuit configured to accumulate a count of the single photon avalanche diode breakdown events in the array of cells over an integration time period triggered by a trigger pulse passing through the pulse width filter.

5. 5. The photodetector of claim 1, further comprising energy based validation logic configured to validate the pulse on the trigger line passing the pulse width filter, and wherein in response to the validation failing, the photodetector resets.

6. An array of cells, each including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The pulse width filter includes: a starved inverter having four transistors; a gate oxide capacitor pair; an inverting Schmitt trigger configured to prevent voltage oscillations when the voltage on the capacitor pair reaches a predetermined voltage level; A photodetector having 7. An array of cells, each cell including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The pulse width filter includes: A starved inverter; A capacitor pair; Inverting Schmitt Trigger and A photodetector having 8. An array of cells, each cell including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The trigger network includes: a starved inverter configured to delay a rising edge of a trigger signal but not a falling edge; a Schmitt trigger configured to receive an output of the starved inverter; (i) a first input signal having the trigger signal; (ii) a second input signal having the output signal of the Schmitt trigger; and an AND gate configured to output a pulse width filtered signal by receiving the 1. A photodetector comprising: a pulse generator having a variable width pulse generator including:

9. An array of cells, each cell including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The trigger network includes: a starved inverter configured to delay a rising edge of a trigger signal but not a falling edge; a Schmitt trigger configured to receive an output of the starved inverter; a static delay element configured to receive the trigger signal and generate an output signal that is statically delayed by compensating for an internal delay of the Schmitt trigger; (i) a first input signal having the statically delayed output signal; (ii) a second input signal having the output signal of the Schmitt trigger; an AND gate configured to output a pulse width filtered signal by receiving the a pulse generator having a variable width pulse generator having a pulse width of 100 kHz; 10. An array of cells, each cell including a single-photon avalanche diode reverse biased above a breakdown voltage of the single-photon avalanche diode; a trigger network configured to generate a pulse on a trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; having The trigger network includes: a starved inverter configured to delay a rising edge of a trigger signal but not a falling edge; a Schmitt trigger configured to receive an output of the starved inverter; a plurality of static delay elements configured to receive the trigger signal; a multiplexer configured to receive outputs of the plurality of static delay elements; (i) a first input signal having an output of the multiplexer; (ii) a second input signal having the output signal of the Schmitt trigger; an AND gate configured to output a pulse width filtered signal by receiving the 1. A photodetector having a pulse generator comprising a variable width pulse generator including:

11. A light detection and ranging system comprising a light detector according to any one of the preceding claims.

12. A positron emission tomography system comprising one or more PET detector rings comprising a photodetector according to any one of claims 1 to 10.

13. using a trigger network to generate a pulse on a trigger line in response to a single photon avalanche diode of the array of cells undergoing breakdown; using a pulse width filter to reject pulses on the trigger line whose pulse width is less than a threshold width; having The method of claim 1, wherein the trigger network comprises a network of OR gates connecting cells of the array to the trigger lines.

14. 14. The method of claim 13, wherein each of the cells comprises a single-photon avalanche diode that is reverse biased above a breakdown voltage of the single-photon avalanche diode.

15. using a time stamp circuit to assign a time stamp to a trigger pulse passing through said pulse width filter.

15. The method of claim 13 or 14, further comprising:

16. accumulating, with an integration circuit, a count of single photon avalanche diode breakdown events in the array of cells over an integration time period triggered by a trigger pulse passing through the pulse width filter.

16. The method of claim 13, further comprising:

17. 1. A trigger network for a silicon photomultiplier tube having an array of cells each having a single photon avalanche diode reverse biased above a breakdown voltage of the single photon avalanche diode, the trigger network comprising: a network of OR gates connecting cells of the array to a trigger line, the network of OR gates generating a pulse on the trigger line in response to the single photon avalanche diodes of the array undergoing breakdown; a pulse width filter configured to block pulses on the trigger line having a pulse width less than a threshold width; A trigger network having:

18. 20. A positron emission tomography system having one or more PET detector rings with the trigger network of claim 17.

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