Current detection circuit and load drive control device equipped with the same

Abstract

To reduce current detection errors at a current detection circuit as much as possible.SOLUTION: A current detection circuit 2 includes: a detection resistor Rs provided between an output of a driver circuit 14 and a load; a power supply circuit 4 that operates between a first power supply and a virtual ground potential VIG and generates a second power supply having a predetermined voltage difference to the virtual ground potential VIG; and a signal processing circuit 20 that operates between the second power supply and the virtual ground potential VIG and generates a detection signal corresponding to voltage generated at the detection resistor Rs. A virtual ground line NIG for supplying the virtual ground potential VIG is connected between the output of the driver circuit 14 and the detection resistor Rs.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The technology disclosed herein belongs to the technical field relating to a current detection circuit and a load drive control device including the same. [Background technology]

[0002] Driver ICs (load drive control devices) that output drive current to loads (e.g. solenoid valves) mounted on vehicles are required to control the drive current to a constant level with high precision. A known method of controlling the drive current is to detect the drive current using a detection resistor and perform feedback control based on the detected current. In this feedback control, it is extremely important to detect the drive current with high precision.

[0003] Patent Document 1 discloses an electronic control unit that controls the current supply to a solenoid valve that controls the opening and closing of an automobile clutch, based on the value of a current flowing through a detection resistor provided between the solenoid valve and a solenoid driver.

[0004] Furthermore, in Patent Document 2, in Example 9 (see FIG. 16), an example is shown in which a current detection means is inserted in a phase current path, and the potential downstream of the current detection means is set as an analog system virtual ground potential of an amplification means (amplifier) ​​for current detection and an analog / digital conversion means (AD converter). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2017-129528 A [Patent Document 2] Patent No. 5188465 Summary of the Invention [Problem to be solved by the invention]

[0006] Here, for example, in the configuration of Fig. 3 of Patent Document 1, the difference voltage of the sense resistors does not fluctuate greatly, but the absolute value of the voltage generated in the sense resistors fluctuates greatly. As a result, the input common mode voltage (average voltage of N1 and N3) fluctuates greatly with respect to the output common mode voltage (average voltage of N2 and N4). Here, since the CMRR (Common-Mode Rejection Ratio) of the amplifier is finite, there is a problem in that an amplification error occurs due to the above-mentioned common mode fluctuation, and this amplification error appears as an error in current detection.

[0007] In Patent Document 2, an amplifying means (amplifier) ​​and an analog / digital converting means (AD converter) are provided in a region surrounded by an insulator layer formed on an SOI (Silicon on Insulator) substrate. However, the SOI process requires special steps, which results in high manufacturing costs.

[0008] 16 of Patent Document 2, the current flowing in a circuit that operates between the analog power supply generated by the power supply circuit and the analog virtual ground potential (for example, the amplifying means 12 and the analog / digital converting means 13 of Patent Document 2) flows to the load without passing through the current detecting means. This current that flows to the load without passing through the current detecting means is not detected by the current detecting means, which causes a detection error.

[0009] The technology disclosed herein has been made in consideration of these points, and its purpose is to provide a technique for eliminating current detection errors in current detection circuits as much as possible without using an SOI process. [Means for solving the problem]

[0010] In order to solve the above problem, the technology disclosed herein targets a current detection circuit that detects a current output from a driver circuit to a load, and includes a detection resistor provided between the output of the driver circuit and the load, a power supply circuit that operates between a first power supply and a virtual ground potential and generates a second power supply having a predetermined voltage difference between the first power supply and the virtual ground potential, and a signal processing circuit that operates between the second power supply and the virtual ground potential and generates a detection signal corresponding to the voltage generated in the detection resistor, and a virtual ground line for supplying the virtual ground potential is connected between the output of the driver circuit and the detection resistor.

[0011] According to this embodiment, the second power supply is generated by a power supply circuit that operates between the first power supply and the virtual ground potential, and the signal processing circuit is operated between this second power supply and the virtual ground potential, so that amplification errors due to common mode fluctuations are less likely to occur. Furthermore, since the virtual ground line is connected between the output of the driver circuit and the detection resistor, the consumption current of the signal processing circuit flows in addition to the output current of the driver circuit through the detection resistor. This makes it possible to reduce current detection errors compared to the technology of Patent Document 2.

[0012] In the above current detection circuit, the power supply circuit may generate, in addition to the second power supply, a third power supply that is isolated from the second power supply and has a predetermined voltage difference between the third power supply and the virtual ground potential, and the signal processing circuit may include an analog circuit that operates between the second power supply and the virtual ground potential, and a digital circuit that operates between the third power supply and the virtual ground potential.

[0013] In the above current detection circuit, the power supply circuit generates, in addition to the second power supply, a third power supply that is isolated from the second power supply and has a predetermined voltage difference between the second power supply and the virtual ground potential, the signal processing circuit includes an amplifier that amplifies and outputs a voltage generated in the detection resistor, and an AD converter that converts the amplified output signal of the amplifier into a digital signal, the amplifier and a circuit included in the AD converter that outputs continuous values ​​operate between the second power supply and the virtual ground potential, and a circuit included in the AD converter that outputs discrete two values ​​operates between the third power supply and the virtual ground potential.

[0014] By separating the power supply into a second power supply for analog circuits and a third power supply for digital circuits, the scale of the circuits supplied by each power supply can be reduced. Similarly, by separating the power supply into a second power supply for circuits that output continuous values ​​and a third power supply for circuits that output discrete binary values, the scale of the circuits supplied by each power supply can be reduced. This reduces the capacitance added between the fixed power supplies, improving tracking. In other words, the current detection error of the current detection circuit can be eliminated by ingenious circuit configuration without using an SOI process.

[0015] In the above current detection circuit, the power supply circuit may include a reference voltage generation unit that operates between the first power supply and the virtual ground potential and generates a reference voltage, and a power supply separation unit that generates the second power supply and the third power supply based on the reference voltage, and the second power supply and the third power supply may be separated at a position closer to the reference voltage generation unit than the signal processing circuit.

[0016] This makes it possible to eliminate as much as possible the influence (eg, the influence of resistance components) of the power supply lines of the other power supplies in the second and third power supplies.

[0017] Another aspect of the technology disclosed herein is directed to a load drive control device, and is characterized in that it comprises a driver circuit that outputs a current to a load, a current detection circuit described in any of the above-mentioned aspects that detects the current output from the driver circuit to the load, and a controller that outputs a control signal for driving the driver circuit based on the detection result of the current detection circuit and a predetermined target current.

[0018] According to this embodiment, similarly to the above current detection circuit, amplification errors due to common mode fluctuations are less likely to occur, and the current detection error of the current detection circuit can be reduced compared to the technique of Patent Document 2. Effect of the Invention

[0019] As described above, according to the technique disclosed herein, it is possible to provide a current detection circuit in which current detection errors are eliminated as much as possible. [Brief description of the drawings]

[0020] [Figure 1] FIG. 1 is a diagram showing a schematic configuration of a load drive control device (driver IC) according to an embodiment; [Diagram 2] A block diagram showing the configuration of a current detection circuit. [Figure 3A] FIG. 1 is a diagram showing an example of a block configuration of a current detection circuit and an example of a power supply circuit; [Figure 3B] FIG. 1 is a diagram showing a block configuration example of a current detection circuit and another example of a power supply circuit; [Figure 3C] FIG. 1 is a diagram showing a block configuration example of a current detection circuit and another example of a power supply circuit; [Figure 3D] FIG. 1 is a diagram showing a block configuration example of a current detection circuit and another example of a power supply circuit; [Figure 4] A diagram to explain the difference between a single-ended amplifier and a fully differential amplifier. [Diagram 5] FIG. 1 is a diagram showing a block configuration example of a current detection circuit and another example of a power supply circuit; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Exemplary embodiments will now be described in detail with reference to the drawings.

[0022] 1 is a schematic diagram showing the configuration of a driver IC (Integrated Circuit) 1 as a load drive control device according to this embodiment. The driver IC 1 is mounted on a vehicle, for example, and is used to drive and control a load (hereinafter simply referred to as a load) such as an actuator mounted on the vehicle.

[0023] The driver IC1 includes a plurality of driver channels CH1 to CHn (n is an integer of 2 or more) and a main control unit 11 that controls the plurality of driver channels CH1 to CHn in an integrated manner. In the following description, when there is no need to distinguish between the plurality of driver channels CH1 to CHn, they will be described as driver channels CH.

[0024] 1 shows an example in which a solenoid valve 100 for adjusting the hydraulic pressure of a transmission mounted on a vehicle is connected to an output terminal PL of a driver channel CH1. In this case, the solenoid valve 100 corresponds to the load to be controlled. In the following, the solenoid valve 100 is described as the load. Note that the load is not limited to the solenoid valve 100 of the vehicle. For example, the technology disclosed herein is applicable to actuator control in consumer devices and industrial devices, high-voltage DC / DC converters, and the like.

[0025] The main control unit 11 receives control information of the loads connected to each driver channel CH from an ECU (Electronic Control Unit, not shown) mounted on the vehicle. The main control unit 11 provides each driver channel CH with control information for electrically controlling the loads connected thereto, based on the control information received from the ECU and the current detected by the current detection circuit 2. In addition, the main control unit 11 has a function of notifying the ECU of an abnormality when a signal indicating an abnormality is received from each driver channel.

[0026] Each driver channel CH includes a channel control unit 12, a pre-driver 13, a driver circuit 14 for driving a solenoid valve 100 connected to an output terminal PL, and a current detection circuit 2 for detecting a current output from the driver circuit 14 to the solenoid valve 100. The channel control unit 12 outputs a control signal for controlling the driver circuit 14 to the pre-driver 13 based on control information from the main control unit 11 and the internal state of the channel. The pre-driver 13 drives the driver circuit 14 based on the control signal received from the channel control unit 12. The channel control unit 12 is an example of a controller that outputs a control signal for driving the driver circuit 14.

[0027] The driver circuit 14 includes a half-bridge circuit in which an N-type high-side transistor Q1 and an N-type low-side transistor Q2 are connected in series between a power supply terminal VSH and a ground terminal VSL. The power supply terminal VSH is connected to, for example, a vehicle battery (not shown) and is supplied with a power supply VB from the battery. The ground terminal VSL is grounded to, for example, the ground of the vehicle.

[0028] A connection line N1 connecting the high-side transistor Q1 and the low-side transistor Q2 is connected to one end of a detection resistor Rs, the other end of which is connected to the output terminal PL via a connection line N2.

[0029] A drive signal from the pre-driver 13 is given to the gates of the high-side transistor Q1 and the low-side transistor Q2, and the high-side transistor Q1 and the low-side transistor Q2 are driven to turn on / off so that their on-periods do not overlap. This causes a drive current to be supplied from the driver circuit 14 to the solenoid valve 100 via the detection resistor Rs, thereby controlling the operation of the solenoid valve 100. Note that the configuration of the driver circuit 14 is not limited to that shown in FIG. 1, and other configurations may be used.

[0030] <Current detection circuit> 2, the current detection circuit 2 includes a detection resistor Rs provided between the driver circuit 14 and the solenoid valve 100, a power supply circuit 4 that operates between a power supply VCC1 supplied to a power supply terminal VCP and a virtual ground potential VIG, and a signal processing circuit 20 that generates a detection signal DOUT corresponding to the voltage generated in the detection resistor Rs. A virtual ground line NIG for supplying the virtual ground potential VIG is connected to a connection line N1 that connects the output of the driver circuit 14 and the detection resistor Rs.

[0031] The detection resistor Rs is used to detect the driving state of the solenoid valve 100 and perform feedback control.

[0032] The resistance value of the detection resistor Rs can be set arbitrarily and is not particularly limited. For example, when the detection resistor Rs is set to 0.1 [Ω] and a current of 1 [A] is output from the driver circuit 14, a voltage difference of 0.1 [V] is generated across the detection resistor.

[0033] A high voltage power supply is supplied to the power supply terminal VCP as a power supply VCC1 from a charge pump (not shown) via a power supply terminal VSH. The power supply VCC1 is an example of a first power supply.

[0034] -Signal processing circuit- The signal processing circuit 20 comprises a first circuit group 31 which includes circuits that output continuous values ​​and / or analog circuits, and a second circuit group 32 which includes circuits that output discrete binary values ​​such as HIGH / LOW and / or digital circuits.

[0035] The first circuit group 31 includes, for example, an amplifier 21, a switched capacitor 222, an integrator amplifier 223, and a current distribution circuit 27, which will be described later. Each power supply node of the first circuit group 31 is connected to a first power supply line LP21, and each ground node is connected to a virtual ground line NIG. In other words, the first circuit group 31 operates between a system power supply VA2, which will be described later and is supplied to the first power supply line LP21, and a temporary virtual ground potential VIG.

[0036] The second circuit group 32 includes, for example, a control signal generating unit 221, a comparator 224, and a level shifter 25, which will be described later. Each power supply node of the second circuit group 32 is connected to a second power supply line LP22, and each ground node of the second circuit group 32 is connected to a virtual ground line NIG. In other words, the second circuit group 32 operates between a system power supply VA3, which will be described later, and a temporary virtual ground potential VIG.

[0037] A specific configuration example of the current detection circuit 2 will be described in more detail below with reference to FIGS.

[0038] 3 (FIGS. 3A to 3D) shows a block configuration example of the current detection circuit 2, and a specific circuit configuration example of the power supply circuit 4. In the following description, when there is no need to distinguish between FIGS. 3A to 3D, for example, when describing a common circuit, the circuit may simply be referred to as FIG. 3.

[0039] 3A to 3C, the signal processing circuit 20 includes an amplifier 21 that amplifies the voltage generated across the detection resistor Rs, an AD converter 22 that converts the output of the amplifier 21 into a digital signal, a level shifter 25, and a current distribution circuit 27.

[0040] -amplifier- The amplifier 21 is, for example, a fully differential amplifier, which operates between a system power supply VA2 and a virtual ground potential VIG described later, and amplifies and outputs a differential voltage generated across the detection resistor Rs. That is, a connection line N1 connected to an upstream node of the detection resistor Rs and a connection line N2 connected to a downstream node of the detection resistor Rs are connected to the input of the amplifier 21. Note that, as shown in FIG. 3D, the amplifier 21 can be omitted in the signal processing circuit 20, and in that case, the connection lines N1 and N2 are directly connected to the AD converter 22.

[0041] Figure 4 is a diagram for explaining the difference in output voltage with respect to input voltage between a single-ended amplifier and a fully differential amplifier. In Figure 4, the upper part shows the input / output characteristics of a single-ended amplifier, and the lower part shows the input / output characteristics of a fully differential amplifier. As shown by the dashed straight lines in the upper and lower parts of Figure 4, in an ideal state where the output voltage is 0 [V] when the input voltage is 0 [V], the output voltage changes linearly with respect to the input voltage in the region where the input voltage is 0 [V] or more in both the single-ended and fully differential types.

[0042] Here, in this embodiment, since the connection line N1 is set to the virtual ground potential VIG, the input potential to the amplifier 21 becomes a negative potential with respect to the virtual ground potential. If the absolute value of the negative potential becomes large, a problem with the withstand voltage may occur. Therefore, for example, it is preferable to adjust the resistance value of the detection resistor Rs so that the absolute value of the negative potential becomes small, for example, a maximum of 300 [mV] or less. In this case, if a single-end amplifier is used, a dead zone may occur when the input potential is small, as in the area surrounded by a dashed circle in the upper part of FIG. 4. In contrast, if a fully differential method is used, it is possible to handle a small input potential near 0 [V] (see the lower part of FIG. 4). As a result, even if the input of the amplifier is small, near 0 [V], an amplified signal (analog detection signal) that is accurately amplified according to the voltage across the detection resistor Rs is input to the AD converter 22 in the subsequent stage.

[0043] -AD converter- 3 shows an example in which a switched-capacitor type delta-sigma modulator (DSM: Delta-Sigma Modulator) is used as the AD converter 22. The delta-sigma modulator is, for example, a fully differential type modulator.

[0044] Specifically, in the AD converter 22, the analog detection signal output from the amplifier 21 is sampled by the switched capacitor 222. The voltage sampled by the switched capacitor 222 is integrated by the integrator amplifier 223, and converted into a pulse train by comparing the magnitude with a reference voltage in the comparator 224. The output of the comparator 224 is then level-converted by the level shifter 25 to a signal level corresponding to the main control unit 11 in the subsequent stage, and is output as the detection signal DOUT. The control signal generating unit 221 is a block that generates a control signal for controlling the AD converter 22. Also, the current distribution circuit 27 is a circuit that generates a current for the level shifter 25.

[0045] -Power supply circuit- As a configuration common to Figs. 3A to 3D, the power supply circuit 4 includes a reference voltage generating unit 41 that operates between a power supply VCC1 and a virtual ground potential VIG and generates a reference voltage (hereinafter referred to as a reference voltage VA1), and a power supply separating unit 42 that generates power supplies VA2 and VA3 that are separated from each other based on the reference voltage VA1. The power supply VA2 is an example of a second power supply, and the power supply VA3 is an example of a third power supply. When the driver circuit 14 controls the current flowing through the solenoid valve 100, the virtual ground potential VIG fluctuates. As a result, the reference voltage VA1 having a predetermined voltage difference from the virtual ground potential VIG fluctuates, and the power supply generated from the reference voltage VA1 also fluctuates according to the fluctuation of the reference voltage VA1.

[0046] As shown in Fig. 2, one power supply system VA2 generated by the power supply separation unit 42 is supplied to the first circuit group 31 via the first power line LP21, and the other power supply system VA3 is supplied to the second circuit group 32 via the second power line LP22. In Fig. 3, of the signal processing circuit 20, circuits belonging to the first circuit group 31 are shown in white, and circuits belonging to the second circuit group 32 are shown in hatching.

[0047] In this way, in the power supply circuit 4, by separating the power supply system VA2 that supplies power to the first circuit group 31 from the power supply system VA3 that supplies power to the second circuit group 32, it is possible to reduce the influence of the parasitic capacitance Cf (indicated by a dashed line in the drawing) between the power supply and the fixed voltage (substrate). In particular, it is important to improve the responsiveness of the power supply supplied to the first circuit group 31 to power supply fluctuations.

[0048] More specifically, when a signal processing circuit includes an analog circuit and a digital circuit, if the analog circuit and the digital circuit are operated by a single power supply output from a power supply circuit, the capacitance between the fixed power supplies added to the power supply may become large depending on the circuit size and configuration. The use of an SOI process can eliminate the concern of the above-mentioned large capacitance, but as mentioned above, the SOI process requires special steps, which results in a problem of high manufacturing costs. Therefore, by supplying the power separately to the power supply for the first circuit group 31 and the power supply for the second circuit group 32, the size of the circuits to which each power supply is supplied can be reduced. This reduces the capacitance between the fixed power supplies added, and improves tracking.

[0049] A more specific configuration will be described below with reference to FIGS. 3A to 3D.

[0050] (About the configuration of Fig. 3A) The reference voltage generating unit 41 has a configuration in which a current source 411 and a resistor 413 are connected in series between a power supply terminal VCP and a virtual ground line NIG. A reference voltage VA1 is output from a node between the current source 411 and the resistor 413.

[0051] The power supply separation unit 42 includes a voltage follower circuit 421 having one input connected to a node between the current source 411 and the resistor 413 and generating a system power supply VA2 from a reference voltage VA1. An output of the voltage follower circuit 421 is connected to a first power supply line LP21 for supplying the system power supply VA2 and the other input of the voltage follower circuit 421.

[0052] The first power supply line LP21 is connected to the power supply nodes of the amplifier 21, the switched capacitor 222, the integrator amplifier 223 and the current distribution circuit 27, which belong to the first circuit group 31.

[0053] Furthermore, the power supply separation unit 42 includes a separation resistor 422 provided on a second power supply line LP22 branched off from the first power supply line LP21. The separation resistor 422 resistively separates the second power supply line LP22 from the first power supply line LP21. As a result, the power supply separation unit 42 generates a power supply system VA3 that is separated from the power supply system VA2 and has a predetermined voltage difference with respect to the virtual ground potential VIG.

[0054] The second power line LP22 branches off at a base position close to the power supply circuit 4 of the first power line LP21. The separation resistor 422 is provided at a position close to the branch point of the second power line LP22 with the first power line LP21. In other words, the branch point of the first power line LP21 and the second power line LP22 branches off at a position closer to the power supply circuit 4 side than the signal processing circuit 20, and the separation resistor 421 is provided at a position closer to the branch point side than the signal processing circuit 20. This makes it possible to reduce the common resistance component of the first power line LP21 and the second power line LP22.

[0055] The power supply circuit 4 supplies the output power of the voltage follower circuit 412 directly to the first circuit group 31, which is a so-called high-importance circuit group that requires relatively high accuracy, such as a circuit that outputs continuous values, via the first power line LP21. In this way, the influence of the second circuit group 32 on the first circuit group 31 can be suppressed, and a more stable power supply with good tracking properties can be supplied to the first circuit group 31, which is a high-importance circuit group.

[0056] On the other hand, the second circuit group 32, which is a so-called less important circuit group that does not require a relatively high level of precision, such as a circuit that outputs discrete values ​​such as HIGH / LOW, is supplied with power from the system power supply VA3 via a second power supply line LP22 that is branched off from the first power supply line LP21 and separated by a resistor.

[0057] (About the configuration of Fig. 3B) The reference voltage generating unit 41 has the same configuration as that in FIG. 3A, and therefore a description thereof will be omitted here.

[0058] The power supply separation unit 42 includes a voltage follower circuit 421 having one input connected to a node between the current source 411 and the resistor 413 and generating a system power supply VA2 from a reference voltage VA1, and a voltage follower circuit 423 having one input connected to a node between the current source 411 and the resistor 413 and generating a system power supply VA3 from the reference voltage VA1.

[0059] The output of the voltage follower circuit 421 is connected to a first power supply line LP21 for supplying the system power supply VA2, and to the other input of the voltage follower circuit 421.

[0060] The output of the voltage follower circuit 423 is connected to a second power line LP22 for supplying the system power supply VA3 and the other input of the voltage follower circuit 423.

[0061] As a result, also in FIG. 3B, the power supply separator 42 generates the power supply system VA2 and the power supply system VA3 which are separated from each other based on the reference voltage and have a predetermined voltage difference with respect to the virtual ground potential VIG.

[0062] (About the configuration of Fig. 3C) The reference voltage generating unit 41 has the same configuration as that in FIG. 3A, and therefore a description thereof will be omitted here.

[0063] The power supply separation unit 42 includes a voltage follower circuit 424 having one input connected to a node between the current source 411 and the resistor 413, an N-type transistor 425 provided between the power supply terminal VCP and the first power supply line LP21, and an N-type transistor 426 provided between the power supply terminal VCP and the second power supply line LP22. The output of the voltage follower circuit 424 is connected to the gates of the transistor 425 and the transistor 426. The first power supply line LP21 (the source of the transistor 425) is connected to the other input of the voltage follower circuit 424.

[0064] As a result, also in FIG. 3C, the power supply separator 42 generates the system power supplies VA2 and VA3 which are separated from each other based on the reference voltage and have a predetermined voltage difference with respect to the virtual ground potential.

[0065] (About the configuration of Fig. 3D) The reference voltage generating unit 41 has a configuration in which a resistor 415 and a Zener diode 416 are connected in series between a power supply terminal VCP and a virtual ground line NIG. A reference voltage VA1 is output from a node between the resistor 415 and the Zener diode 416.

[0066] The power supply isolation section 42 includes an N-type transistor 427 provided between the power supply terminal VCP and the first power supply line LP21, and an isolation resistor 428 provided on a second power supply line LP22 branched off from the first power supply line LP21, and resistively isolating the second power supply line LP22 from the first power supply line LP21.

[0067] As a result, also in FIG. 3D, the power supply separator 42 generates the system power supplies VA2 and VA3 which are separated from each other based on the reference voltage and have a predetermined voltage difference with respect to the virtual ground potential.

[0068] 3A, the branch point of the first power line LP21 and the second power line LP22 is branched at a position closer to the power supply circuit 4 side than the signal processing circuit 20, and the separation resistor 421 is provided at a position closer to the branch point side than the signal processing circuit 20. This makes it possible to reduce the common resistance component of the first power line LP21 and the second power line LP22.

[0069] The configuration of the power supply circuit 4 is not particularly limited, and may be a configuration other than that shown in Fig. 3A to Fig. 3D. Although not shown, for example, the power supply separation unit 42 may generate three or more separated power supply systems, and each power supply system may be supplied to a different circuit.

[0070] 3, the connection line N1 connecting the output of the driver circuit 14 and the detection resistor Rs is connected to the virtual ground line NIG, the first circuit group 31 operates between the system power supply VA2 and the virtual ground potential VIG, and the second circuit group 32 operates between the system power supply VA3 and the virtual ground potential VIG. This makes it possible to reduce the difference in average voltage between the input stage and the output stage of the amplifier 21 compared to the conventional configuration such as that of the cited document 1, thereby making it possible to reduce current detection errors caused by common-mode voltage fluctuations.

[0071] Moreover, in addition to the output current of the driver circuit 14, the current consumed by the amplifier 21 and the AD converter 22 also flows through the detection resistor Rs. This makes it possible to realize more accurate current detection compared to the conventional technology (for example, Patent Document 2).

[0072] Furthermore, in this embodiment, the internal analog power supply VA is separated into two systems in the power supply circuit 4, and the power is distributed and supplied according to the circuit type. This makes it possible to reduce the capacitance of the fixed voltage applied to each power supply, and to minimize the detection error of the current detection circuit 2 without using an expensive process such as circuit separation on an SOI (Silicon on Insulator) substrate.

[0073] In addition, if the parasitic capacitance of the power supply is small, the ability to follow power supply fluctuations can be improved. In this embodiment, when the driver circuit 14 controls the current flowing through the solenoid valve 100, the virtual ground potential VIG fluctuates, which causes the internal analog power supply VA to fluctuate. Therefore, high ability to follow power supply fluctuations is extremely important in eliminating current detection errors.

[0074] (Modification) 3, the power supply separator 42 generates the power supply system VA2 and the power supply system VA3 that are separated from each other based on a reference voltage, but the present invention is not limited to this. For example, as shown in FIG. 5, the power supply system VA2 generated by the power supply separator 42 may be supplied to both the first circuit group 31 and the second circuit group 32 of the signal processing circuit 20.

[0075] More specifically, the power supply circuit 4 in Fig. 5 includes a reference voltage generating section 41 and a power supply separating section 42. The reference voltage generating section 41 has the same configuration as in Fig. 3A, and therefore a description thereof will be omitted here.

[0076] The power supply separation unit 42 includes a voltage follower circuit 429, one input of which is connected to a node between the current source 411 and the resistor 413. The output of the voltage follower circuit 429 is connected to a power supply line LP2 for supplying an internal analog power supply VA and the other input of the voltage follower circuit 421. This internal analog power supply VA is then supplied to the first circuit group 31 and the second circuit group 32 of the signal processing circuit 20. That is, the power supply circuit 4 supplies the internal analog power supply VA to the signal processing circuit 20, that is, the amplifier 21, the AD converter 22, the level shifter 25, and the current distribution circuit 27.

[0077] 5, similarly to Fig. 3, the connection line N1 connecting the output of the driver circuit 14 and the detection resistor Rs is connected to the virtual ground line NIG, and the signal processing circuit 20 is operated between the internal analog power supply VA and the virtual ground potential VIG. This makes it possible to reduce the difference in average voltage between the input stage and the output stage of the amplifier 21, compared to the conventional configuration such as that in the cited document 1, and therefore makes it possible to reduce current detection errors caused by common-mode voltage fluctuations.

[0078] Moreover, in addition to the output current of the driver circuit 14, the current consumed by the amplifier 21 and the AD converter 22 also flows through the detection resistor Rs. This makes it possible to realize more accurate current detection compared to the conventional technology (for example, Patent Document 2).

[0079] To summarize the above, the driver IC of the present disclosure comprises a driver circuit 14 that outputs current to the solenoid valve 100, a current detection circuit 2 that detects the current output from the driver circuit 14 to the solenoid valve 100, and a channel control unit 12 that outputs a control signal for driving the driver circuit 14 based on the detection result of the current detection circuit 2 and a predetermined target current.

[0080] The current detection circuit 2 includes a detection resistor Rs provided between the output of the driver circuit 14 and the solenoid valve 100, a power supply circuit that operates between a power supply VCC1 and a virtual ground potential VIG and generates a second power supply (system power supplies VA2, VA3 or an internal analog power supply VA) having a predetermined voltage difference with respect to the virtual ground potential VIG, and a signal processing circuit 20 that operates between the second power supply and the virtual ground potential VIG and generates a detection signal corresponding to the voltage generated in the detection resistor Rs. A virtual ground line NIG for supplying the virtual ground potential VIG is connected between the output of the driver circuit 14 and the detection resistor Rs.

[0081] As a result, compared to the conventional configuration such as that of Reference 1, the difference in average voltage between the input stage and the output stage of amplifier 21 can be made smaller, thereby reducing current detection errors caused by common-mode voltage fluctuations.

[0082] Moreover, in addition to the output current of the driver circuit 14, the current consumed by the amplifier 21 and the AD converter 22 also flows through the detection resistor Rs. This makes it possible to realize more accurate current detection compared to the conventional technology (for example, Patent Document 2).

[0083] The above-mentioned embodiment is merely an example, and the scope of the present disclosure should not be interpreted as being limited. The scope of the present disclosure is defined by the scope of the claims, and various modifications, substitutions, additions, omissions, etc. that fall within the scope of the claims are all within the scope of the present disclosure. For example, the circuits and configurations shown in different drawings in the above embodiment may be appropriately combined to form another embodiment, and the same effect can be obtained. [Industrial Applicability]

[0084] The technology disclosed herein is extremely useful in that it can eliminate current detection errors in a current detection circuit and a load drive control device including the same without using an SOI process. [Explanation of symbols]

[0085] 1 Driver IC (load drive control device) 2 Current detection circuit 4 Power supply circuit 12 Channel control unit (controller) 14 Driver circuit 21 Amplifier 22 A / D converter 41 Reference voltage generator 42 Power separation section 100 Solenoid valve (load) LP21 1st power line LP22 2nd power line NIG Virtual ground wire Rs Detection resistor VA2 grid power supply (second power supply) VA3 System power supply (3rd power supply) VCC1 power supply (1st power supply) VIG Virtual ground potential

Claims

1. A current detection circuit for detecting a current output from a driver circuit to a load, a sense resistor provided between the output of the driver circuit and the load; a power supply circuit that operates between a first power supply and a virtual ground potential and generates a second power supply having a predetermined voltage difference with respect to the virtual ground potential; a signal processing circuit that operates between the second power supply and the virtual ground potential and generates a detection signal corresponding to a voltage generated across the detection resistor; 2. A current detection circuit comprising: a node for supplying the virtual ground potential; connected between an output of the driver circuit and the detection resistor;

2. the power supply circuit generates, in addition to the second power supply, a third power supply that is separated from the second power supply and has a predetermined voltage difference with respect to the virtual ground potential; The signal processing circuit includes: an analog circuit operating between the second power supply and the virtual ground potential; 2. The current sensing circuit of claim 1, further comprising a digital circuit operating between the third power supply and the virtual ground potential.

3. the power supply circuit generates, in addition to the second power supply, a third power supply that is separated from the second power supply and has a predetermined voltage difference with respect to the virtual ground potential; the signal processing circuit includes an amplifier that amplifies and outputs a voltage generated across the detection resistor, and an AD converter that converts the amplified output signal of the amplifier into a digital signal; a circuit for outputting a continuous value included in the amplifier and the AD converter operates between the second power supply and the virtual ground potential; 2. The current detection circuit according to claim 1, wherein a circuit included in the AD converter that outputs a discrete binary value operates between the third power supply and the virtual ground potential.

4. the power supply circuit includes a reference voltage generating unit that operates between the first power supply and the virtual ground potential and generates a reference voltage, and a power supply separating unit that generates the second power supply and the third power supply based on the reference voltage; 4. The current detection circuit according to claim 2, wherein the second power supply and the third power supply are separated at a position closer to the reference voltage generating unit than the signal processing circuit is to the signal processing circuit.

5. A driver circuit that outputs a current to a load; a current detection circuit for detecting a current output from the driver circuit to a load according to claim 1; a controller that outputs a control signal for driving the driver circuit based on a detection result of the current detection circuit and a predetermined target current.

6. Further comprising an amplifier for amplifying a voltage generated across the detection resistor, 2. The current detection circuit according to claim 1, wherein the resistance value of the detection resistor is set so that the absolute value of a negative potential with respect to the virtual ground potential as an input potential to the amplifier is equal to or less than a predetermined voltage.

7. Further comprising an amplifier for amplifying a voltage generated across the detection resistor, 2. The current sensing circuit of claim 1, wherein the amplifier is a fully differential amplifier.

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