Semiconductor Device

By adopting a multi-layer structure of metal oxide and an oxidized semiconductor layer in an oxidized semiconductor transistor, the problems of fluctuations in electrical characteristics and low reliability of existing oxidized semiconductor transistors are solved, and stable electrical characteristics and high reliability are achieved.

JP7659091B2Active Publication Date: 2025-04-08SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2024000075
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2010-04-02
Filing Date
2024-01-04
Publication Date
2025-04-08
Estimated Expiration
2031-03-31

AI Technical Summary

Technical Problem

The existing transistors using oxidized semiconductors are prone to fluctuations in electrical characteristics, resulting in low reliability, and it is difficult to effectively suppress the drift problem of threshold voltage under light.

Method used

Using a multi-layer structure consisting of metal oxide and an oxidized semiconductor layer, an electrical contact between the oxidized semiconductor layer and the metal oxide layer is formed to form a metal oxide layer with the same composition, which is separated from the oxidized semiconductor layer as a dielectric layer, thereby inhibiting the capture of charge at these interfaces.

Benefits of technology

The charge trapping between the oxidized semiconductor layer and the dielectric layer is effectively suppressed, the electrical characteristics of the transistor are stabilized, and its reliability is improved.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To achieve high reliability by giving stabilized electrical characteristics to a semiconductor device using an oxide semiconductor.SOLUTION: A semiconductor device has an insulating film, a first metal oxide film on the insulating film in contact therewith, an oxide semiconductor film partially in contact with the first metal oxide film, a source electrode and a drain electrode for connection electrically with the oxide semiconductor film, a second metal oxide film partially in contact with the oxide semiconductor film, a gate insulator film on the second metal oxide film in contact therewith, and a gate electrode on the gate insulator film.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This term refers to devices in general, and electro-optical devices, semiconductor circuits, and electronic equipment are all classified as semiconductor devices. [Background technology]

[0003] A technology for constructing transistors using a semiconductor thin film formed on a substrate with an insulating surface. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in such electronic devices. Silicon-based semiconductor materials are widely known, but oxide semiconductors are also attracting attention as other materials. is.

[0004] For example, a semiconductor with an electron carrier concentration of 10 18 / cm 3 Less than The amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) is used. A transistor in which this is used has been disclosed (see Patent Document 1).

[0005] Transistors using oxide semiconductors have higher performance than transistors using amorphous silicon. They are faster than silicon-based transistors and easier to manufacture than polysilicon transistors. However, it is known that the electrical characteristics of the devices are easily fluctuated and their reliability is low. The threshold voltage of a transistor varies before and after the BT test. Patent Documents 2 and 3 disclose the following: In order to suppress the shift, a layer is provided on at least one of the upper surface and the lower surface of the oxide semiconductor layer. A technology has been developed to prevent charge trapping at the interface of an oxide semiconductor layer by using an interface stabilization layer. As shown. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2006-165528 A [Patent Document 2] JP 2010-16347 A [Patent Document 3] JP 2010-16348 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, the transistors disclosed in Patent Document 2 and Patent Document 3 are not interface stabilized. The layer used is a layer having the same properties as the gate insulating layer and the protective layer, and the interface with the active layer is Since the charge transport at the interface between the active layer and the interface stabilization layer cannot be maintained in a good condition, In particular, it is difficult to suppress the wrap around the interface stabilization layer and the active layer when the band gap is equal. When a capacitor has a large capacitance, charge build-up can easily occur.

[0008] Therefore, it is believed that transistors including oxide semiconductors still have sufficient reliability. I can't say.

[0009] In view of such problems, a method for imparting stable electrical characteristics to a semiconductor device using an oxide semiconductor is provided. One of the objectives is to achieve high reliability. [Means for solving the problem]

[0010] One embodiment of the disclosed invention is a semiconductor device comprising an insulating film such as a gate insulating film or a protective insulating film and an active layer. The oxide semiconductor films are not in direct contact with each other, but are provided with a metal oxide film between them. The present invention relates to a method for manufacturing a semiconductor device, comprising the steps of: forming a metal oxide film having a thickness of 100 nm to 150 nm; That is, one embodiment of the disclosed invention is a metal oxide film and an oxide semiconductor. An insulating film made of a different component from the conductor film, a metal oxide film, and an oxide semiconductor film are laminated. Here, the term "component similar to that of the oxide semiconductor film" means a component similar to that of the oxide semiconductor film. It means that it contains one or more metal elements selected from the constituent elements.

[0011] By providing such a laminated structure, it is possible to reduce the electric current generated due to the operation of the semiconductor device. The oxide semiconductor film is preferably formed on the insulating film by a metal oxide layer. This effect can be achieved by using a material that is compatible with the oxide semiconductor film. By providing a metal oxide film in contact with an oxide semiconductor film, the operation of a semiconductor device can be improved. Charges and the like that may be generated due to the above are trapped at the interface between the oxide semiconductor film and the metal oxide film. and an insulating film made of a material that can form a charge trapping center at the interface. is present in a state in contact with the metal oxide film, This is due to the mechanism by which the charge can be trapped as described above.

[0012] In other words, when a large amount of charge is generated in a metal oxide film alone, the oxide semiconductor film is not uniform. It becomes difficult to suppress the trapping of charges at the interface of the metal oxide film. By providing the insulating film, charges are preferentially captured at the interface between the metal oxide film and the insulating film, Since it is possible to suppress the trapping of charges at the interface between the oxide semiconductor film and the metal oxide film, As described above, the effect of one aspect of the disclosed invention is that the insulating film, the metal oxide film, and the acid The metal oxide film and the oxide semiconductor film are laminated. It can be said that the effect produced by the laminated structure of the conductive film is different in nature.

[0013] The trapping of charges at the interface of the oxide semiconductor film is suppressed, and the trapping center of the charges is located in the oxide semiconductor film. The above-mentioned effect of being able to keep the semiconductor film away from the semiconductor device prevents malfunctions of the semiconductor device. This makes it possible to suppress the generation of noise and improve the reliability of the semiconductor device.

[0014] In addition, from the above-mentioned mechanism, it is desirable that the metal oxide film has a sufficient thickness. When the metal oxide film is thin, the effect of charges trapped at the interface between the metal oxide film and the insulating film For example, a metal oxide film has a larger thickness than an oxide semiconductor film. It is preferable to make the

[0015] The insulating metal oxide film is connected to the source electrode and the drain electrode and the oxide semiconductor. Since the oxide film is formed in a manner that does not interfere with the connection between the source electrode or drain electrode and the oxide film, An increase in resistance can be prevented compared to when a metal oxide film exists between the semiconductor film and the semiconductor film. Therefore, deterioration in the electrical characteristics of the transistor can be suppressed.

[0016] In the thin film formation process of oxide semiconductors, the stoichiometric composition is changed due to an excess or deficiency of oxygen. If there is a deviation from the normal state or if hydrogen or moisture that forms electron donors gets mixed in, the electrical conductivity This phenomenon is a major problem for transistors using oxide semiconductors. Therefore, hydrogen, moisture, hydroxyl groups or hydrides (hydrogen compounds) are the cause of fluctuations in the mechanical properties. The impurities such as SiO 2 are intentionally removed from the oxide semiconductor, and the oxide semiconductor is By supplying oxygen, which is the main component of oxide semiconductors, the amount of oxygen decreases at the same time. In this way, the oxide semiconductor film is highly purified and made electrically i-type (intrinsic).

[0017] An i-type (intrinsic) oxide semiconductor is an oxide semiconductor that has n-type impurities, i.e., hydrogen, removed from it. By purifying the oxide semiconductor to minimize the amount of impurities other than the main component, i-type i-type (intrinsic) oxide semiconductors or oxide semiconductors that are as close to i-type (intrinsic) as possible. be.

[0018] In the step of making the oxide semiconductor film i-type, It is also possible to simultaneously convert the metal oxide film into an i-type film. The metal oxide films provided on the upper and lower surfaces of the metal oxide semiconductor film are resistant to impurities such as moisture and hydrogen. It is preferable that the metal oxide film is one in which the conductivity is sufficiently reduced and which is electrically i-type.

[0019] A transistor including a highly purified oxide semiconductor film has a low threshold voltage, an on-state current, and the like. The electrical characteristics of the transistors are almost temperature-dependent. There is also little fluctuation.

[0020] One embodiment of the disclosed invention is a semiconductor device including an insulating film and a first metal oxide film on the insulating film and in contact with the insulating film. a first metal oxide film and an oxide semiconductor film that is in contact with the first metal oxide film; A source electrode and a drain electrode are electrically connected to the oxide semiconductor film, and a second gold film is partially in contact with the oxide semiconductor film. a gate insulating film on the second metal oxide film and in contact with the second metal oxide film. The semiconductor device has a gate insulating film and a gate electrode on the gate insulating film.

[0021] In the above, the first metal oxide film and the second metal oxide film have a structure of an oxide semiconductor film. The first metal oxide film and the second metal oxide film may be formed of a metal oxide material. The energy gap of the oxide semiconductor film may be larger than that of the oxide semiconductor film. The energy of the bottom of the conduction band of the first metal oxide film and the second metal oxide film is , which may be higher than the minimum energy of the conduction band of the oxide semiconductor film.

[0022] In the above, the first metal oxide film and the second metal oxide film are made of gallium oxide. The ratio of the constituent elements of the first metal oxide film and the second metal oxide film may be In some cases, the ratio of the constituent elements of the metal oxide film is equal. The gate insulating film may be made of silicon oxide or hafnium oxide. It may consist of

[0023] In the above, the second metal oxide film covers the source electrode and the drain electrode, The oxide semiconductor film may be provided in contact with the first metal oxide film. The first metal oxide film may be surrounded by a first metal oxide film and a second metal oxide film.

[0024] In the above, the side end portion in the channel length direction of the oxide semiconductor film and the first metal oxide film In addition, the side end portions of the oxide semiconductor film in the channel length direction may coincide with each other. A side end portion in the channel length direction of the first metal oxide film may coincide with a side end portion in the channel length direction of the second metal oxide film.

[0025] In the above, a second insulating film is provided to cover the gate insulating film and the gate electrode. In some cases, a conductive film is provided under the oxide semiconductor film.

[0026] In the above, the transistor width is determined by the distance between the source electrode and the drain electrode. The channel length L of the transistor is 10 nm or more and 10 μm or less, for example, 0.1 μm to 0.5 μm. Of course, the channel length L may be 1 μm or more. The channel width W can also be set to 10 nm or more. Effect of the Invention

[0027] According to one embodiment of the present invention, a transistor having stable electrical characteristics is provided.

[0028] According to one embodiment of the present invention, a transistor having favorable electrical characteristics and high reliability is provided. A semiconductor device is provided. [Brief description of the drawings]

[0029] [Figure 1] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 13 is a band diagram of a transistor including an oxide semiconductor film and a metal oxide film. [Diagram 3] 1A to 1C are diagrams illustrating one embodiment of a semiconductor device. [Figure 4] 1A to 1C are diagrams illustrating an example of a manufacturing process of a semiconductor device. [Diagram 5] 1A to 1C are diagrams illustrating an example of a manufacturing process of a semiconductor device. [Figure 6] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 7] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 8] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 9]1A to 1C illustrate one embodiment of a semiconductor device. [Figure 10] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and it is understood by those skilled in the art that various changes can be made in form and detail. The present invention is not limited to the description of the following embodiments. It is not something that is done.

[0031] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the present specification does not indicate the order of the invention. It does not indicate the name.

[0032] (Embodiment 1) In this embodiment mode, one embodiment of a semiconductor device and a manufacturing method thereof will be described with reference to FIGS. This will be explained using:

[0033] <Configuration Example of Semiconductor Device> FIG. 1 illustrates a transistor 110 as an example of a semiconductor device according to one embodiment of the disclosed invention. 1A is a plan view, and FIG. 1B and FIG. 1C is a cross-sectional view of the AB section and the CD section in FIG. 1A, respectively. Note that in FIG. 1A, components of the transistor 110 are not shown in order to avoid complication. 2, a portion of the metal oxide film 210 is omitted.

[0034] The transistor 110 shown in FIG. 1 includes an insulating film 202, a first metal oxide The film 204, the oxide semiconductor film 206, the source electrode 208a, the drain electrode 208b, the second It includes a metal oxide film 210 , a gate insulating film 212 , and a gate electrode 214 .

[0035] In the transistor shown in FIG. 1, the second metal oxide film 210 is and a second metal oxide film 204. In FIG. 1, the first metal oxide film 204 and the second metal oxide film The oxide semiconductor film 206 is in contact with the oxide semiconductor film 210 in a region where the oxide semiconductor film 206 is not present. The oxide semiconductor film 206 is formed on the first metal oxide film 204 and the second metal oxide film 210. Surrounded.

[0036] Here, the first metal oxide film 204 and the second metal oxide film 210 are made of an oxide semiconductor film. It is preferable to use an oxide having the same composition as that of the oxide semiconductor film 206. The film is made of an oxide of one or more metal elements selected from the constituent elements. The material is compatible with the oxide semiconductor film 206, and is used as the first metal oxide film 204 and the second metal oxide film 205. By using the metal oxide film 210, the state of the interface with the oxide semiconductor film can be kept good. In other words, the above-mentioned materials can be used for the first metal oxide film 204 and the second metal oxide film 205. By using the oxide semiconductor film 210, the interface between the oxide semiconductor film and the metal oxide film in contact therewith (here, The interface between the first metal oxide film 204 and the oxide semiconductor film 206 or the second metal oxide film Therefore, the trapping of charges at the interface between the oxide semiconductor film 210 and the oxide semiconductor film 206 can be suppressed. It is.

[0037] The first metal oxide film 204 and the second metal oxide film 210 are both made of oxide semiconductors. Since the oxide semiconductor film 206 is made of the same material as the oxide semiconductor film 207, the oxide semiconductor film 206 is not formed in the region where the oxide semiconductor film 206 is not formed. In the case where the first metal oxide film 204 and the second metal oxide film 210 are in contact with each other, In addition, the adhesion of the constituent elements of the first metal oxide film 204 can be improved. It is more desirable to make the ratio equal to the ratio of the constituent elements of the second metal oxide film 210.

[0038] Since the oxide semiconductor film 206 is used as an active layer, the first metal oxide film 204 The energy gap of the second metal oxide film 210 is larger than that of the oxide semiconductor film 206. In addition, the first metal oxide film 204 and the oxide semiconductor Between the first metal oxide film 210 and the oxide semiconductor film 206 or between the second metal oxide film 210 and the oxide semiconductor film 206, At the very least, carriers do not flow out of the oxide semiconductor film 206 at room temperature (20° C.). For example, the first metal oxide film 204 and the second metal The energy difference between the bottom of the conduction band of the oxide film 210 and the bottom of the conduction band of the oxide semiconductor film 206 or the top of the valence band of the first metal oxide film 204 or the second metal oxide film 210 The energy difference between the upper end of the valence band of the oxide semiconductor film 206 and the upper end of the valence band of the oxide semiconductor film 206 is 0.5 eV or more. It is preferable that the electron transport coefficient is 0.7 eV or more, and more preferable that the electron transport coefficient is 0.7 eV or more. It is also preferable that the electron transport coefficient is 1.5 eV or less. It is.

[0039] Specifically, for example, an In-Ga-Zn-O-based material is used for the oxide semiconductor film 206. In this case, the first metal oxide film 204 and the second metal oxide film 205 are made of a material containing gallium oxide. The oxide film 210 may be formed by using gallium oxide and In-Ga-Zn-O-based materials. The energy barrier when these are in contact is approximately 0.8 eV on the conduction band side and approximately The value is 0.9 eV.

[0040] Gallium oxide is GaO x Also written as stoichiometric excess of oxygen. For example, it is preferable to set the value of x to 1.4 or more and 2.0 or less. It is preferable that the value of x is 1.5 or more and 1.8 or less. However, gallium oxide The film contains group 3 elements such as yttrium, group 4 elements such as hafnium, and aluminum. Contains impurity elements other than hydrogen, such as group 13 elements, group 14 elements such as silicon, and nitrogen. By doing so, the energy gap of gallium oxide can be expanded to improve the insulating properties. The energy gap of a gallium oxide film that does not contain any impurities is 4.9 eV. For example, by including more than 0 atomic percent and up to about 20 atomic percent, the energy gap The gap can be expanded to about 6 eV.

[0041] From the viewpoint of reducing the source of charge generation and trapping centers, the water in the metal oxide film is It is desirable to have sufficiently reduced impurities such as silicon and water. This idea is common to the reduction of impurities in conductive films.

[0042] The insulating film 202 and the gate insulating film 212 are formed of a first metal oxide film 204 and a second metal oxide film 205. By contacting the metal oxide film 210, a charge trapping center may be formed at the interface. It is preferable to use such a material for the insulating film 202 and the gate insulating film 212. As a result, the charges are transferred to the interface between the insulating film 202 and the first metal oxide film 204 or to the gate insulating film 206. The first metal oxide film 210 is trapped at the interface between the insulating film 212 and the second metal oxide film 210. Charge trapping at the interface between the second metal oxide film 210 and the oxide semiconductor film 204 or Therefore, charge trapping at the interface with the oxide semiconductor film 206 can be sufficiently suppressed. However, there are many charge trapping centers at the interface between the gate insulating film 212 and the second metal oxide film 210. If multiple transistors are formed, the transistor characteristics may worsen. The charge trapping is small compared to the interface between the oxide semiconductor film 206 and the second metal oxide film 210. It is preferable that the center is easily formed.

[0043] Specifically, the insulating film 202 and the gate insulating film 212 are made of silicon oxide, silicon nitride, Aluminum oxide, aluminum nitride, a mixture of these, etc. may be used. For example, The first metal oxide film 204 and the second metal oxide film 210 are made of a material containing gallium oxide. In this case, the insulating film 202 and the gate insulating film 212 are made of silicon oxide, silicon nitride, or the like. In addition, the first metal oxide film 204 and the second metal oxide film 21 are preferably used. 0, the energy gap of the insulating film 202 and the gate insulating film 212 is The energy gap of the metal oxide film 204 and the second metal oxide film 210 is larger than that of the metal oxide film 204 and the second metal oxide film 210. desirable.

[0044] In addition, the interface between the insulating film 202 and the first metal oxide film 204 or the gate insulating film 21 Therefore, a charge trapping center can be formed at the interface between the first metal oxide film 210 and the second metal oxide film 210. In this case, the materials of the insulating film 202 and the gate insulating film 212 do not need to be limited to those mentioned above. In addition, the interface between the insulating film 202 and the first metal oxide film 204 or the interface between the gate insulating film 212 and A treatment may be performed to form a charge trap center at the interface with the second metal oxide film 210. Such treatments include, for example, plasma treatment and element addition treatment (ion implantation, etc.). There is.

[0045] A second insulating film may be further provided on the transistor 110. In order to electrically connect the source electrode 208a and the drain electrode 208b to the wiring, an insulating film 2 02, a first metal oxide film 204, a second metal oxide film 210, a gate insulating film 212, etc. An opening may be formed in the oxide semiconductor film 206. The oxide semiconductor film 206 may be processed into an island shape. It is preferable that the islands are arranged in an island shape, but they do not have to be arranged in an island shape.

[0046] FIG. 2 shows the above-mentioned transistor 110, that is, the insulating film, the metal oxide, and the like, arranged from the gate electrode GE side. Energy in a structure in which a nitride film, an oxide semiconductor film, a metal oxide film and an insulating film are bonded -band diagram (schematic diagram), E F is the Fermi level of the oxide semiconductor film. Assuming an ideal situation in which the insulating film, metal oxide film, and oxide semiconductor film are all intrinsic, The insulating film is made of silicon oxide (SiO x ) (Band gap Eg8eV~9eV) , and gallium oxide (GaO x ) (band gap Eg 4.9 eV), As an oxide semiconductor film (OS), an In-Ga-Zn-O-based non-single crystal film (band gap Eg 3.15 eV). The energy difference between the vacuum level and the conduction band edge of gallium oxide is 0.95 eV. The energy difference between the vacuum level and the conduction band of the In-Ga-Zn-O non-single crystal film is 3.5 eV. The energy difference at the lower end is 4.3 eV.

[0047] As shown in FIG. 2, the gate electrode side (channel side) of the oxide semiconductor film is made of an oxide semiconductor and There are energy barriers of about 0.8 eV and about 0.95 eV at the interfaces with the metal oxide. Similarly, the oxide semiconductor film is also provided on the back channel side (opposite side to the gate electrode). There are energy barriers of about 0.8 eV and about 0.95 eV at the interfaces between the metal and the metal oxide. Such an energy barrier exists at the interface between an oxide semiconductor and a metal oxide. This prevents the carriers from moving at the interface, so the carriers They move through the oxide semiconductor without moving from the body to the metal oxide. As shown in Figure 2, The oxide semiconductor film, the metal oxide layer, and the insulating layer are formed such that the oxide semiconductor film is thicker than the oxide semiconductor. Materials with gradually increasing band gaps (insulating films have a larger band gap than metal oxide films) Such beneficial results can be obtained when the ferroelectric material is sandwiched between two ferroelectric materials (the ferroelectric material is larger).

[0048] 3A to 3G show cross-sectional views of transistors having different structures from the transistor 110. 3A to 3G show a surface structure of a transistor according to one embodiment of the disclosed invention. A top-gate transistor is shown as an example.

[0049] The transistor 120 shown in FIG. 3A includes an insulating film 202, a first metal oxide film 204, An oxide semiconductor film 206, a source electrode 208a, a drain electrode 208b, a second metal oxide The transistor 110 has the same structure as the transistor 110 in that it includes a film 210, a gate insulating film 212, and a gate electrode 214. The transistor 120 is different from the transistor 110 in that the oxide semiconductor film 20 6 is a position where the source electrode 208a and the drain electrode 208b are connected. In the transistor 120, the source electrode 208a and the drain electrode 208b are formed under the oxide semiconductor film 206. The other components are the same as those of the transistor 11 in FIG. 0. For details, please refer to the description of FIG. 1.

[0050] The transistor 130 shown in FIG. 3B is similar to the transistor 130 shown in FIG. 3A in that it includes the above-mentioned components. The transistor 130 and the transistor 120 are the same. The difference is that the insulating film 202 has a convex shape, and the oxide semiconductor film 206 is a first metal oxide. The point is not completely covered by the metal oxide film 204 and the second metal oxide film 210. The other components are the same as those in FIG. 3(A).

[0051] The transistor 140 shown in FIG. 3C is similar to the transistor 140 shown in FIG. 3B in that it includes the above-mentioned components. The transistor 140 and the transistor 130 are the same. The difference is that the insulating film 202 has a flat shape, and the first metal oxide film 204 has a convex shape. In addition, when the substrate 200 has the function of the insulating film 202, the insulating film 202 is set. The other components are the same as those in FIG.

[0052] The transistor 150, the transistor 160, and the transistor 1 and 2, the transistor 170 and the transistor 180 are the same as those in FIG. The transistor 110, the transistor 120, and the transistor The difference between the first metal oxide film and the second metal oxide film is that the first metal oxide film is a The question is whether the second metal oxide film 204 or the second metal oxide film 210 is processed into an island shape. The components are the same as those in FIG. 1 and FIG. 3(A) to FIG. 3(C).

[0053] <Example of the transistor manufacturing process> Hereinafter, a manufacturing process of the transistor shown in FIG. 1 or FIG. 3A will be described with reference to FIGS. An example of the above will be described.

[0054] <Fabrication process of transistor 110> An example of a manufacturing process of the transistor 110 shown in FIG. 1 will be described with reference to FIGS. Note that the manufacturing process of the transistor 150 shown in FIG. The first metal oxide film 204 and the like are processed to match the shape of the conductor film 206. The manufacturing process is the same as that of the transistor 110.

[0055] First, an insulating film 202 is formed on a substrate 200, and a first A metal oxide film 204 is formed (see FIG. 4(A)).

[0056] There is no particular restriction on the material of the substrate 200, but it should be at least strong enough to withstand the subsequent heat treatment. It is necessary to have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate A substrate such as a silicon substrate or a sapphire substrate can be used as the substrate 200. Single crystal semiconductor substrates such as silicon, polycrystalline semiconductor substrates, compounds such as silicon germanium It is also possible to apply a solid semiconductor substrate, SOI substrate, etc., and a semiconductor element is formed on these substrates. The substrate 200 may be provided with a semiconductor device.

[0057] A flexible substrate may be used as the substrate 200. When providing the transistor, the transistor may be directly formed on the flexible substrate, or the transistor may be formed on another substrate. After the transistor is formed, it may be peeled off and transferred to a flexible substrate. In order to peel off the transistor and transfer it to a flexible substrate, a peeling layer must be formed between the other substrate and the transistor. It is advisable to form a separation layer.

[0058] The insulating film 202 is in contact with the first metal oxide film 204, and the insulating film 202 is formed at the interface with the first metal oxide film 204. It is preferable to use a material in which a charge trapping center can be formed. By using the second metal oxide film 204, the electric charge is trapped at the interface between the insulating film 202 and the first metal oxide film 204. Therefore, charge trapping at the interface between the first metal oxide film 204 and the oxide semiconductor film 206 is sufficiently prevented. It will be possible to suppress it.

[0059] Specifically, the insulating film 202 may be made of silicon oxide, silicon nitride, aluminum oxide, or nitride. For example, the first metal oxide film may be made of aluminum oxide, a mixture of these materials, or the like. When the material containing gallium oxide is used for the insulating film 204, the insulating film 202 is preferably made of silicon oxide or It is preferable to use silicon nitride or the like. In this regard, the energy gap of the insulating film 202 is smaller than the energy gap of the first metal oxide film 204. It is desirable for the size to be larger than the cap.

[0060] In addition, a charge trapping center is formed at the interface between the insulating film 202 and the first metal oxide film 204. If it is possible to do so, the material of the insulating film 202 does not need to be limited to the above. In this process, a charge trapping center is formed at the interface between the insulating film 202 and the first metal oxide film 204. Such treatments include, for example, plasma treatment and element addition treatment ( (e.g., ion implantation).

[0061] The method for producing the insulating film 202 is not particularly limited, but may be, for example, a plasma CVD method or a sputtering method. The insulating film 202 can be formed by a film forming method such as a deposition method. The insulating film 2 may have a single layer structure or a multilayer structure including the above-mentioned materials.

[0062] In addition, when the substrate 200 contains the insulating material as described above, the substrate 200 can be treated as the insulating film 202. In other words, the insulating film 202 referred to here In this case, the substrate 200 is made of silicon oxide or the like. It is more desirable that:

[0063] The first metal oxide film 204 is made of an oxide having the same components as the oxide semiconductor film 206. Such a material is compatible with the oxide semiconductor film 206, and it is preferable to use the material as the first By using the above-mentioned metal oxide film 204, the state of the interface with the oxide semiconductor film can be kept good. In other words, by using the above-mentioned material for the first metal oxide film 204, The interface between the oxide semiconductor film and the metal oxide film in contact therewith (here, the first metal oxide film 204 Therefore, it is possible to suppress the trapping of charges at the interface between the oxide semiconductor film 206 and the semiconductor layer 208. .

[0064] Since the oxide semiconductor film 206 is used as an active layer, the first metal oxide film 204 The energy gap of the oxide semiconductor film 206 is larger than that of the oxide semiconductor film 206. In addition, at least a thin film of at least about 100 nm is required between the first metal oxide film 204 and the oxide semiconductor film 206. At room temperature (20° C.), the energy is low enough that carriers do not flow out of the oxide semiconductor film 206. For example, the lower end of the conduction band of the first metal oxide film 204 and The energy difference between the lower end of the conduction band of the oxide semiconductor film 206 and the lower end of the conduction band of the first metal oxide film The energy difference between the top of the valence band of the oxide semiconductor film 204 and the top of the valence band of the oxide semiconductor film 206 is It is desirable that the value is 0.5 eV or more, and more desirable that the value is 0.7 eV or more. It is desirable that the electron density be 5 eV or less.

[0065] From the viewpoint of reducing the source of charge generation and trapping centers, the water in the metal oxide film is It is desirable to have sufficiently reduced impurities such as silicon and water. This idea is common to the reduction of impurities in conductive films.

[0066] There is no particular limitation on the method for producing the first metal oxide film 204. For example, a plasma CVD method or The first metal oxide film 204 can be formed by a film forming method such as a sputtering method. In addition, the sputtering method is suitable because it is less likely to be contaminated by hydrogen or water. On the other hand, in terms of improving the quality of the film, plasma CVD and other methods are appropriate.

[0067] Next, an oxide semiconductor film is formed over the first metal oxide film 204. The oxide semiconductor film 206 is processed into an island-shaped oxide semiconductor film 206 (see FIG. 4B).

[0068] It is preferable to form the oxide semiconductor film by a method that does not easily allow hydrogen, water, or the like to enter the film. For example, The oxide semiconductor film can be formed by a method such as sputtering. The thickness of the oxide semiconductor film is preferably 3 nm to 30 nm. For example, if the film thickness is 50 nm or more, the transistor may become normally on. The insulating film 202, the first metal oxide film 204, and the oxide semiconductor film are It is preferable to form the films continuously without exposing them to the air.

[0069] The material used for the oxide semiconductor film is the quaternary metal oxide In-Sn-Ga-Z nO system, and ternary metal oxides such as In-Ga-Zn-O system and In-Sn-Zn-O system , In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn- Al-Zn-O system, binary metal oxides In-Zn-O system, Sn-Zn-O system, A l-Zn-O series, Zn-Mg-O series, Sn-Mg-O series, In-Mg-O series, In-Ga In-O system, and single element metal oxides such as In-O system, Sn-O system, and Zn-O system are used. In addition, the above materials may contain SiO2. A-Zn-O-based material is a material containing indium (In), gallium (Ga), and zinc (Zn). The composition ratio is not particularly important. It may contain elements other than those.

[0070] The oxide semiconductor film has the chemical formula InMO3(ZnO) m Materials expressed as (m>0) Here, M is selected from Ga, Al, Mn and Co. For example, M may be Ga, Ga and Al, Ga and and Mn, or Ga and Co, etc. can be used.

[0071] In this embodiment, the oxide semiconductor film is formed using a SiO2-based oxide semiconductor film forming method. The film is formed by a sputtering method using a target.

[0072] When using an In-Ga-Zn-O-based material as an oxide semiconductor, the target to be used is For example, the composition ratio is In2O3:Ga2O3:ZnO=1:1:1 [mol A target for forming an oxide semiconductor film having a thickness of 100 nm to 150 nm can be used. The composition and composition need not be limited to those described above. For example, In2O3:Ga2O3:ZnO=1: A target for forming an oxide semiconductor film having a composition ratio of 1:2 (molar ratio) can also be used.

[0073] In addition, when using an In-Zn-O-based material as an oxide semiconductor, the target used The composition ratio is In:Zn=50:1 to 1:2 in atomic ratio (In2O3 In:ZnO=25:1 to 1:4, preferably In:Zn=20:1 to 1:1 (in terms of molar ratio) In2O3:ZnO=10:1 to 1:2), and more preferably In:Zn=15 :1 to 1.5:1 (converted to a molar ratio of In2O3:ZnO=15:2 to 3:4) For example, the target used for forming an In-Zn-O-based oxide semiconductor has an atomic ratio of In When Zn:O=X:Y:Z, Z>1.5X+Y.

[0074] The filling rate of the oxide target is 90% or more and 100% or less, preferably 95% or more and 99% or less. 9% or less. By using a target for oxide semiconductor film formation with a high filling rate, This is because the oxide semiconductor film can be a dense film.

[0075] The film formation atmosphere is a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare The oxide semiconductor film may be heated in a mixed atmosphere of hydrogen, water, or hydroxide. In order to prevent contamination by impurities such as hydrogen, water, hydroxyl groups, and hydrides, It is preferable to use an atmosphere using a high purity gas that has been thoroughly removed.

[0076] For example, the oxide semiconductor film can be formed as follows.

[0077] First, the substrate 200 is held in a film-forming chamber maintained in a reduced pressure state, and the substrate temperature is increased to 100° C. or higher. The temperature is set to 600° C. or less, preferably 200° C. to 400° C. The substrate 200 is heated. By forming the oxide semiconductor film in the above-mentioned manner, the impurity concentration in the oxide semiconductor film can be reduced. In addition, damage to the oxide semiconductor film caused by sputtering can be reduced. It is.

[0078] Next, the remaining moisture in the film formation chamber is removed, and impurities such as hydrogen and moisture are sufficiently removed. A high-purity gas containing the above-mentioned gas was introduced, and an oxide semiconductor film was formed on the substrate 200 using the above-mentioned target. In order to remove the residual moisture in the deposition chamber, a cryopump or an ion pump is used as an exhaust means. It is preferable to use an adsorption type vacuum pump such as a suction pump or a titanium sublimation pump. The exhaust means may be a turbo pump with a cold trap added. The deposition chamber evacuated using a cryopump is filled with gases such as hydrogen molecules and water (H2O). Compounds containing hydrogen atoms (and more preferably compounds containing carbon atoms) are removed. Therefore, the concentration of impurities contained in the oxide semiconductor film formed in the deposition chamber can be reduced.

[0079] As an example of the deposition conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 P. a, DC power supply is 0.5 kW, deposition atmosphere is oxygen (oxygen flow rate 100%) In addition, when a pulsed DC power supply is used, the powdery material (particles) generated during film formation can be easily removed. This is preferable because it can reduce the amount of deposition of the film (also called "articles" or "dust") and the variation in film thickness is also reduced.

[0080] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced. The reverse sputtering is performed to generate plasma by sputtering the first metal oxide film 204. It is preferable to remove the powdery material (also called particles or dust) that is stuck to the surface. is a method of modifying the surface of the substrate by applying a voltage to the substrate and forming plasma in the vicinity of the substrate. In place of argon, gas such as nitrogen, helium, or oxygen may be used.

[0081] The oxide semiconductor film is processed by forming a mask having a desired shape on the oxide semiconductor film. The above-mentioned mask can be used for the etching of the oxide semiconductor film. The insulating layer 11 can be formed by using a method such as lithography. Alternatively, the insulating layer 11 can be formed by using an inkjet method. Any method may be used to form the mask. By carrying out the above steps in combination with the processing of the metal oxide film 204, the transistor shown in FIG. 150 can be created.

[0082] Note that the etching of the oxide semiconductor film can be either dry etching or wet etching. Of course, these may be used in combination.

[0083] After that, the oxide semiconductor film is preferably subjected to heat treatment (first heat treatment). The first heat treatment is performed to remove excess hydrogen (including water and a hydroxyl group) in the oxide semiconductor film. In addition, the structure of the oxide semiconductor film can be adjusted, and defect levels in the energy gap can be reduced. The temperature of the first heat treatment is 250° C. or higher and 650° C. or lower, preferably 450° C. or higher and 600° C. or lower. ° C. or less. The temperature of the first heat treatment is preferably lower than the distortion point of the substrate.

[0084] Furthermore, the first heat treatment removes excess hydrogen (water, etc.) from the first metal oxide film 204. It is also possible to remove the hydroxyl group.

[0085] The heat treatment is carried out, for example, by placing the workpiece in an electric furnace using a resistance heating element and heating the workpiece in a nitrogen atmosphere. The oxide semiconductor film is not exposed to the air during this process. Be careful not to let water or hydrogen get into the container.

[0086] The heat treatment device is not limited to an electric furnace, but may be a device that uses heat conduction or heat radiation from a medium such as a heated gas. For example, a device that heats the workpiece by irradiation may be used. Rapid Thermal Anneal (GRTA) equipment, Gas Rapid Thermal Anneal (GRTA) equipment RTA (Rapid Thermal Anneal) equipment l) Equipment can be used. LRTA equipment includes halogen lamps, metal halide lamps, etc. xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure mercury lamp It is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a The GRTA device is a device that performs heat treatment using high-temperature gas. An inert gas that does not react with the workpiece during heat treatment, such as a rare gas such as benzene or nitrogen. is used.

[0087] For example, in the first heat treatment, the workpiece is placed in a heated inert gas atmosphere and heated for several minutes. After heating for 10 minutes, the workpiece may be removed from the inert gas atmosphere and subjected to GRTA treatment. GRTA treatment enables high-temperature heat treatment in a short time. The present invention can be applied even to temperature conditions exceeding 1000°C. The first heat treatment may be performed in an atmosphere containing oxygen. This is because the defect level in the energy gap caused by oxygen vacancies can be reduced. do.

[0088] The inert gas atmosphere is nitrogen or a rare gas (helium, neon, argon It is preferable to use an atmosphere that contains, as its main component, hydrogen, water, etc. For example, nitrogen and rare gases such as helium, neon, and argon introduced into a heat treatment device. The purity of is 6N (99.9999%) or more, preferably 7N (99.99999%) or more. (That is, the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less).

[0089] In either case, the first heat treatment reduces impurities and produces an i-type (intrinsic) semiconductor or By forming an oxide semiconductor film that is as close as possible to a type semiconductor, a transistor with extremely excellent characteristics can be obtained. It is possible to realize the star.

[0090] By the way, the above-mentioned heat treatment (first heat treatment) has the effect of removing hydrogen, water, etc. This heat treatment can also be called a dehydration treatment or a dehydrogenation treatment. The dehydrogenation treatment is performed, for example, after the oxide semiconductor film is processed into an island shape. In addition, such dehydration and dehydrogenation treatments can be carried out not only once. It is acceptable to repeat the procedure multiple times.

[0091] Note that in this embodiment, the oxide semiconductor film is processed into an island shape and then the first heat treatment is performed. However, the present invention is not limited to the above embodiment. After the above, the oxide semiconductor film may be processed.

[0092] Next, a source electrode and a A conductive film is formed to form the drain electrode (including wiring formed in the same layer). The conductive film is then processed to form a source electrode 208a and a drain electrode 208b. (See FIG. 4C). Note that the end of the source electrode 208a and the drain electrode The distance between the end of 208b determines the channel length L of the transistor. .

[0093] The conductive film used for the source electrode 208a and the drain electrode 208b is, for example, A metal film containing an element selected from the group consisting of I, Cr, Cu, Ta, Ti, Mo, and W, or the above-mentioned Metal nitride films containing elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) ) can be used. In addition, either the upper or lower side of a metal film such as Al or Cu can be used. Both are made of high melting point metal films such as Ti, Mo, W, etc. or their metal nitride films (titanium nitride film A laminated structure of a metal film (a molybdenum nitride film, a tungsten nitride film, etc.) may be used.

[0094] The conductive film used for the source electrode 208a and the drain electrode 208b is a conductive gold film. The conductive metal oxide may be indium oxide (In2O3). , tin oxide (SnO2), zinc oxide (ZnO), indium oxide tin oxide alloy (In2O 3-SnO2, abbreviated as ITO), indium oxide zinc oxide alloy (In2O3-ZnO ) or a material obtained by incorporating silicon oxide into these metal oxide materials can be used.

[0095] The conductive film can be processed by etching using a resist mask. The exposure to light used in forming the resist mask used in etching is ultraviolet light, KrF laser light, or ArF A laser beam or the like may be used.

[0096] In addition, when performing exposure with a channel length L of less than 25 nm, for example, several nm to several tens of nm Using extreme ultraviolet light with an extremely short wavelength of 1.5 m, It is recommended to perform exposure when forming a resist mask. Exposure to extreme ultraviolet light has high resolution and focal depth. Therefore, the channel length L of the transistor to be formed later can be reduced. This makes it possible to increase the operating speed of the circuit.

[0097] In addition, etching is performed using a resist mask formed by a so-called multi-tone mask. The resist mask formed using the multi-tone mask has a plurality of film thicknesses. The shape can be further changed by ashing, It can be used in multiple etching processes to process the pattern. A multi-tone mask is used to create resist masks that correspond to at least two different patterns. In other words, the process can be simplified.

[0098] Note that when the conductive film is etched, part of the oxide semiconductor film 206 is etched, and a groove is formed. In some cases, the oxide semiconductor film may have a recess (depression).

[0099] Then, plasma treatment is performed using gases such as N2O, N2, or Ar to expose the Water adsorbed on the surface of the oxide semiconductor film may be removed by performing a plasma treatment. In this case, the oxide semiconductor film 206 is not exposed to the air after the plasma treatment. It is desirable to form a second metal oxide film 210 in contact with the portion.

[0100] Next, a semiconductor oxide film is formed on the source electrode 208a and the drain electrode 208b. A second metal oxide film 210 is formed in contact with a part of 206, and then a second metal The gate insulating film 212 is formed so as to be in contact with the oxide film 210 (see FIG. 4(D)).

[0101] The second metal oxide film 210 is similar to the first metal oxide film 204 and will not be described in detail. Omitted.

[0102] The gate insulating film 212 is similar to the insulating film 202. However, Considering that the material functions as an insulating film, materials with a high relative dielectric constant such as hafnium oxide are used. However, even in this case, it is necessary to bring the second metal oxide film 210 into contact with the second metal oxide film 210. Therefore, it is desirable to use a material in which a charge trapping center can be formed at the interface. There is no such thing.

[0103] After the second metal oxide film 210 is formed or after the gate insulating film 212 is formed, The temperature of the second heat treatment is preferably 250° C. or more and 700° C. or less. The temperature of the second heat treatment is preferably 450° C. or higher and 600° C. or lower. It is preferable to set it to full.

[0104] The second heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably Air at less than 1 ppm, preferably less than 10 ppb), or rare gases (argon, helium The above-mentioned atmospheres of nitrogen, oxygen, ultra-dry air, rare gas, etc. may be used. It is preferable that the gas does not contain water, hydrogen, etc. Or the purity of the rare gas is 6N (99.9999%) or more, preferably 7N (99.999 99%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). is preferred.

[0105] In the second heat treatment, the oxide semiconductor film 206 and the second metal oxide film 210 are Therefore, the dehydration (or dehydrogenation) process reduces Oxygen, one of the main components of oxide semiconductors that may be damaged, is The second metal oxide film 210 containing the metal oxide can be supplied to the oxide semiconductor film. As a result, charge trapping centers in the oxide semiconductor film can be reduced.

[0106] In addition, the first metal oxide film 204 or the second metal oxide film 21 is heated by this heat treatment. At the same time, impurities in 0 are also removed, resulting in high purification.

[0107] Note that there is no particular limitation on the timing of the second heat treatment as long as it is performed after the oxide semiconductor film 206 is formed. For example, the second heat treatment may be performed after the gate electrode 214 is formed. The second heat treatment may be performed after the first heat treatment, or the first heat treatment may be performed in combination with the second heat treatment. Alternatively, the second heat treatment may serve as the first heat treatment.

[0108] As described above, by applying at least one of the first heat treatment and the second heat treatment, oxidation The semiconductor film 206 is highly purified so that it contains as few impurities as possible other than its main components. In the highly purified oxide semiconductor film 206, carriers derived from donors are extremely The carrier concentration is 1×10 14 / cm 3 Less than 1x1 0 12 / cm 3 less than 1×10 11 / cm 3 is less than.

[0109] Thereafter, the gate electrode 214 is formed (see FIG. 4(E)). Butan, Titanium, Tantalum, Tungsten, Aluminum, Copper, Neodymium, Scandium The insulating layer 11 can be formed by using metal materials such as those mentioned above or alloy materials containing these as main components. The gate electrode 214 may have a single layer structure or a multilayer structure.

[0110] Through the above steps, the transistor 110 is formed.

[0111] <Fabrication process of transistor 120> 5A to 5E, a manufacturing process of the transistor 120 shown in FIG. Note that the manufacturing process of the transistor 160 shown in FIG. The second metal oxide film 210 is processed to match the shape of the metal oxide semiconductor film 206. The manufacturing process is the same as that of the transistor 120 .

[0112] First, an insulating film 202 is formed on a substrate 200, and a first A metal oxide film 204 is formed (see FIG. 5A). Please refer to the description of the manufacturing process of 0.

[0113] Next, a source electrode and a drain electrode (the same layer as this) are formed on the first metal oxide film 204. A conductive film for forming a semiconductor device (including wiring formed by the method described above) is formed, and the conductive film is processed to form a semiconductor device. A source electrode 208a and a drain electrode 208b are formed (see FIG. 5(B)). For this, the description of the manufacturing process of the transistor 110 can be referred to.

[0114] Next, a source electrode 208a and a drain electrode 208 are formed on the first metal oxide film 204. b) forming an oxide semiconductor film connected to the first oxide semiconductor layer; and Then, a thin film 206 is formed (see FIG. 5(C)). For details, see the fabrication of the transistor 110. Please refer to the description of the process.

[0115] Next, a semiconductor oxide film is formed on the source electrode 208a and the drain electrode 208b. A second metal oxide film 210 is formed in contact with a part of 206, and then a second metal A gate insulating film 212 is formed so as to be in contact with the oxide film 210 (see FIG. 5(D)). For details, the description of the manufacturing process of the transistor 110 can be referred to.

[0116] After that, the gate electrode 214 is formed (see FIG. 5(E)). The description of the manufacturing process of the star 110 can be referred to.

[0117] Through the above steps, the transistor 120 is formed.

[0118] The transistor according to this embodiment has an oxide semiconductor film formed on an upper surface and a lower surface. A metal oxide film made of the same component as the semiconductor film is laminated, and the metal oxide film is then deoxidized. The surface opposite to the surface in contact with the metal oxide semiconductor film is provided with a metal oxide film and a layer different from the oxide semiconductor film. In this way, an insulating film made of a material having good compatibility with the oxide semiconductor film is provided in contact with the oxide semiconductor film. The metal oxide film made of the material is in contact with the oxide semiconductor film, Charges that may be generated due to the operation of the semiconductor device or the like are transferred between the oxide semiconductor film and the metal oxide film. The material used is one that suppresses charge capture at the interface and allows charge capture centers to form at the interface. By providing an insulating material having such a structure in contact with the metal oxide film, the metal oxide The charge can be trapped at the interface between the film and the insulator. This reduces the effect of charges on the oxide semiconductor film, and reduces charge trapping at the oxide semiconductor film interface. It is possible to suppress the threshold voltage fluctuation of the transistor caused by the above.

[0119] In addition, the oxide semiconductor film used for the active layer of the transistor is decomposed by hydrogen, moisture, and the like through heat treatment. Impurities such as hydroxyl groups or hydrides (also called hydrogen compounds) are removed from the oxide semiconductor. The main component material of the oxide semiconductor, which is also reduced during the impurity removal process, By supplying oxygen as a material, the oxide semiconductor film is highly purified and electrically becomes i-type ( The transistor including the highly purified oxide semiconductor film is The change in electrical characteristics of the capacitor is suppressed, and the capacitor is electrically stable.

[0120] When charges are trapped at the interface of the oxide semiconductor film, the threshold voltage of the transistor (For example, if a positive charge is trapped in the back channel, the The threshold voltage shifts in the negative direction. One of the causes of this charge trapping is the positive ionization. A model of the movement and trapping of on (or the atoms responsible for it) can be postulated. In a transistor using an oxide semiconductor, In the disclosed invention, a highly purified oxide semiconductor is used, and Since this structure is in contact with a laminated structure of a metal oxide film and an insulating film, This even suppresses the charge trapping caused by hydrogen in the above-mentioned The model is believed to be valid when the ionization rate of hydrogen is, for example, around 10%.

[0121] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0122] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0123] (Embodiment 2) A semiconductor device (display device) having a display function using the transistor described in Embodiment 1 In addition, a part or the whole of a driver circuit including a transistor can be manufactured. The body can be integrally formed on the same substrate as the pixel portion to form a system-on-panel.

[0124] In FIG. 6A, a pixel portion 4002 is provided on a first substrate 4001. A sealant 4005 is provided on the substrate 4002, and the substrate 4002 is sealed with a second substrate 4006. In (A), the area surrounded by the sealant 4005 on the first substrate 4001 A single crystal semiconductor film or a polycrystalline semiconductor film is formed on a separately prepared substrate in a region different from the above. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are mounted on the substrate. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel portion 4002 are formed. The various signals and potentials are applied to the flexible printed circuit board (FPC). It is supplied by FPC4018a and FPC4018b.

[0125] In FIG. 6B and FIG. 6C, the pixel portion 40 is provided on the first substrate 4001. A sealant 4005 is provided so as to surround the gate electrode 4002 and the scanning line driver circuit 4004. In addition, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line driver circuit 4004. Therefore, the pixel portion 4002 and the scanning line driver circuit 4004 are formed on the first substrate 400. The display element is sealed by a sealant 4005 and a second substrate 4006. In FIG. 6B and FIG. 6C, the sealant 4005 on the first substrate 4001 In a region different from the region surrounded by the insulating film, a single crystal semiconductor film or A signal line driver circuit 4003 formed of a polycrystalline semiconductor film is mounted on the substrate 4001. In FIG. 6C, a signal line driver circuit 4003 and a scanning line driver circuit Various signals and potentials given to the pixel portion 4002 or the FPC 4018 are is being supplied.

[0126] In addition, in FIG. 6B and FIG. 6C, a signal line driver circuit 4003 is separately formed. 10, the scanning lens 4001 is mounted on the first substrate 4001, but the present invention is not limited to this configuration. A signal line driver circuit may be formed separately and mounted, or a part of a signal line driver circuit or a scanning line driver circuit may be mounted. Alternatively, only a part of the path may be formed separately and implemented.

[0127] The method of connecting the separately formed drive circuit is not particularly limited, and may be any method such as COG ( hip on glass method, wire bonding method, or TAB (Tape The Automated Bonding method can be used. This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are mounted by the COG method. FIG. 6B shows an example of mounting a signal line driver circuit 4003 by the COG method. C) is an example in which the signal line driver circuit 4003 is mounted by the TAB method.

[0128] The display device includes a panel in which a display element is sealed, and a controller for the panel. This includes modules in which ICs, etc., including lasers, are mounted.

[0129] In this specification, the term "display device" refers to an image display device, a display device, or Refers to light sources (including lighting devices). Also refers to connectors, such as FPC or TAB tape. or a module with TCP attached, a printed wiring board on the tip of TAB tape or TCP A module with a display element or a display device with an IC (integrated circuit) directly mounted on it using the COG method. The display device includes all installed modules.

[0130] In addition, the pixel portion and the scanning line driver circuit provided on the first substrate include a plurality of transistors. The transistor shown in Embodiment 1 can be used.

[0131] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, and the like. A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. Luminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium in which the contrast changes depending on the effect can also be used.

[0132] One embodiment of a semiconductor device will be described with reference to FIGS. This corresponds to the cross-sectional view at MN in (B).

[0133] As shown in FIGS. 7 to 9, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 401 6, and the connection terminal electrode 4015 and the terminal electrode 4016 are The electrode 4014 is electrically connected to a terminal via an anisotropic conductive film 4019 .

[0134] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 4016 denotes the source and drain electrodes of the transistors 4010 and 4011. It is formed from the same conductive film as the electrodes.

[0135] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 7 to 9, the transistors included in the pixel portion 4002 are 4010 and a transistor 4011 included in the scanning line driver circuit 4004. is doing.

[0136] In this embodiment, the transistors 4010 and 4011 are The transistor shown in FIG. 1 can be applied to the transistor 4010. The variation in electrical characteristics of the 4011 is suppressed, and the 4011 is electrically stable. As the semiconductor device of this embodiment shown in FIG. 9, a highly reliable semiconductor device can be provided. Cut.

[0137] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display an image, and various display elements can be used. can be used.

[0138] FIG. 7 shows an example of a liquid crystal display device using a liquid crystal element as a display element. The liquid crystal element 4013 includes a first electrode layer 4030, a second electrode layer 4031, and The liquid crystal layer 4008 is sandwiched between insulating layers that function as alignment layers. The second electrode layer 4031 is provided on the second substrate 4. 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 are disposed on the liquid crystal layer 4008 The structure is such that the electrodes are laminated via a gap.

[0139] The columnar spacers 4035 are obtained by selectively etching the insulating film. The layer 4008 is provided to control the thickness (cell gap) of the layer 4008. A laser may also be used.

[0140] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, etc. Liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials can exhibit cholesteric, smectic, cubic, and chromatic phases depending on the conditions. It shows an isotropic phase, an isotropic phase, etc.

[0141] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of the cholesteric liquid crystal is increased, the cholesteric phase transitions to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to improve the chirality, a liquid crystal composition containing a chiral agent of several weight percent or more is used for the liquid crystal layer. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 1 msec or less. Since the liquid crystal display is short and optically isotropic, no alignment treatment is required, and the viewing angle dependency is small. Since there is no need to provide a counter film, rubbing treatment is also unnecessary. This can prevent electrostatic damage caused by electrostatic discharge, and can reduce defects and damage to liquid crystal display devices during the manufacturing process. Therefore, the productivity of the liquid crystal display device can be improved.

[0142] The specific resistivity of the liquid crystal material is 1×10 9 Ω cm or more, preferably 1×10 11 Ω cm or more, and more preferably 1×10 12 Ω·cm or more. The resistivity values ​​in the specification are values ​​measured at 20°C.

[0143] The size of the storage capacitor provided in the liquid crystal display device is determined by the capacitance of the transistor arranged in the pixel portion. The charge is set so that it can be held for a certain period of time, taking into account factors such as the leakage current. By using a transistor having a semiconductor film, the liquid crystal capacitance of each pixel is It is sufficient to provide a storage volume having a size of 1 / 3 or less, preferably 1 / 5 or less, of the capacity of the do.

[0144] The transistor including the purified oxide semiconductor film used in this embodiment has an off-state Therefore, the current value in the OFF state (off-state current value) can be reduced. The signal retention time can be extended, and the write interval can also be set longer when the power is on. This reduces the frequency of refresh operations, which is effective in reducing power consumption. To bear fruit.

[0145] In addition, the transistor including the purified oxide semiconductor film used in this embodiment has the following characteristics: Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using such a transistor in a pixel portion of a display device, a high-quality image can be provided. In addition, the above transistors are separately manufactured for a driver circuit portion and a pixel portion on the same substrate. This makes it possible to reduce the number of components in the liquid crystal display device.

[0146] There are two types of LCD displays: TN (Twisted Nematic) mode, IPS (In- Plane-Switching mode, FFS (Fringe Field Switching) mode tching) mode, ASM(Axially Symmetric aligned) Micro-cell) mode, OCB(Optical Compensated) Birefringence mode, FLC (Ferroelectric Liquid id Crystal) mode, AFLC (AntiFerroelectric Li quid Crystal mode etc. can be used.

[0147] In addition, normally black type liquid crystal display devices, for example, those using a vertical alignment (VA) mode The vertical alignment mode is a mode in which the liquid crystal display panel is arranged in a vertical alignment state. This is a method for controlling the arrangement of liquid crystal molecules, and is used to display the liquid crystal on the panel surface when no voltage is applied. In this method, the liquid crystal molecules are oriented vertically. There are several types of vertical alignment modes: For example, MVA (Multi-domain Vertical Alignment) ent) mode, PVA (Patterned Vertical Alignment ) mode, ASV (Advanced Super View) mode, etc. Also, a pixel can be divided into several regions (subpixels), Multi-domain or multi-domain designs that are designed to flip molecules in different directions A method called "a method for reducing the amount of oxygen in the water" can be used.

[0148] In addition, in display devices, black matrices (light-shielding layers), polarizing members, phase difference members, reflectors, Optical members (optical substrates) such as anti-reflection members are provided as appropriate. For example, a polarizing substrate and a phase A circularly polarized light source such as a backlight or a sidelight may be used as the light source. may also be used.

[0149] In addition, multiple light-emitting diodes (LEDs) are used as backlights to display the image in a time-division format. It is also possible to use the field sequential driving method. By applying the Shar driving method, color display is achieved without using color filters. It is possible.

[0150] In addition, the display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (RGB=RGB). The color is not limited to the three colors RGBW (W stands for white). ) or RGB plus one or more colors such as yellow, cyan, or magenta. The size of the display area may be different for each dot of the color element. The present invention is not limited to color display devices, but can also be applied to monochrome display devices. It is also possible.

[0151] In addition, a light-emitting device using electroluminescence is used as a display element included in the display device. The light-emitting element that utilizes electroluminescence can be applied to a light-emitting material They are classified according to whether the material is an organic compound or an inorganic compound. The latter is called an inorganic EL element.

[0152] In an organic EL element, electrons and positive electrodes are released from a pair of electrodes by applying a voltage to the light-emitting element. The holes are then injected into a layer containing a light-emitting organic compound, and a current is passed through them. The recombination of carriers (electrons and holes) causes light-emitting organic compounds to form excited states. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0153] Inorganic EL elements are classified into dispersion type inorganic EL elements and thin film type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The emission mechanism is a donor-based ion exchange reaction that utilizes the donor and acceptor levels. This is an acceptor recombination type emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism is the inner shell electron transition of metal ions. This is a localized light emission that utilizes organic EL elements. do.

[0154] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. Then, a transistor and a light emitting element are formed on the substrate, and light is emitted from the opposite side of the substrate. Top emission, bottom emission, and side emission. There are light emitting devices with a double-sided emission structure that emits light from the side, and light emitting devices with any emission structure are suitable. It can be used.

[0155] An example of a light-emitting device using a light-emitting element as a display element is shown in FIG. The transistor 4513 is electrically connected to the transistor 4010 provided in the pixel portion 4002. The light-emitting element 4513 includes a first electrode layer 4030, an electroluminescent layer 4511, a second The electrode layer 4031 has a laminated structure, but is not limited to the structure shown in the figure. The configuration of the light emitting element 4513 can be changed appropriately according to the direction of the light to be extracted from the light emitting element 4513. .

[0156] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030 using a resin material, and the side wall of the opening is continuous. It is preferable to form the inclined surface so as to have a certain curvature.

[0157] The electroluminescent layer 4511 may be composed of a single layer or a plurality of layers may be laminated. It doesn't matter whether it is completed or not.

[0158] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513, the second electrode A protective film may be formed on the layer 4031 and the partition wall 4510. The protective film may be a silicon nitride film. Con film, silicon oxynitride film, DLC (Diamond-Like Carbon) film, etc. In addition, the first substrate 4001, the second substrate 4006, and the sheet The space sealed by the sealing material 4005 is sealed with a filling material 4514. A protective film (lamination) that is highly airtight and has little outgassing so that it is not exposed to the outside air. packaging (enclosure) in a covering material (such as a protective film or ultraviolet curing resin film) is preferred.

[0159] Filler 4514 can be inert gas such as nitrogen or argon, or ultraviolet curing resin. Alternatively, thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, poly Imide, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA ( Ethylene vinyl acetate) can be used. For example, if nitrogen is used as the filler, good.

[0160] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. ), retardation plates (lambda / 4 plates, lambda / 2 plates), color filters, and other optical films are appropriately installed. Alternatively, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. It is possible to apply an anti-glare treatment that can diffuse reflected light and reduce glare.

[0161] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display device (electrophoretic display). It has the same readability as paper, consumes less power than other display devices, and can be made thin and light. This has the advantage that:

[0162] The electrophoretic display device may have various configurations, but the first particles have a positive charge. and a second particle having a negative charge are mixed into a solvent or solute. By applying an electric field to the microcapsules, By moving the particles in a capsule in opposite directions, only the color of the particles that have gathered on one side is displayed. In addition, the first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (including colorless). (Mm).

[0163] In this way, electrophoretic displays are devices in which materials with high dielectric constants move to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect.

[0164] The microcapsules dispersed in a solvent are called electronic ink. This electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. In addition, a color display is possible by using a color filter or particles having a pigment.

[0165] The first particles and the second particles in the microcapsules are made of a conductive material and an insulating material. , semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic materials and magnetophoretic materials, or a composite material of these materials. can be used.

[0166] In addition, display devices using the twist ball display method can also be used as electronic paper. The twist ball display method uses black and white spherical particles as display elements. The electrode layer is disposed between the first electrode layer and the second electrode layer, and the first electrode layer and A display method in which a potential difference is generated in the second electrode layer to control the orientation of the spherical particles. It is law.

[0167] FIG. 9 shows an active matrix electronic paper as one mode of a semiconductor device. The electronic paper of No. 9 is an example of a display device using the twisting ball display method.

[0168] A first electrode layer 4030 connected to a transistor 4010 and a second electrode layer 4006 Between the second electrode layer 4031 and the black area 4615a and the white area 4615b, A spherical particle 4613 is provided having a cavity 4612 around which the cavity is filled with liquid. The spherical particles 4613 are filled with a filler 4614 such as resin. The electrode layer 4031 corresponds to a common electrode (opposite electrode). The wire is electrically connected to the

[0169] In addition, in FIG. 7 to FIG. 9, the first substrate 4001 and the second substrate 4006 are made of Ga. In addition to the glass substrate, a substrate having flexibility can also be used. For example, a transparent plastic substrate can be used. As for plastic, FRP (Fibre Plastics) can be used. Ass-Reinforced Plastics) plate, PVF (Polyvinyl Fluoride) A film, a polyester film or an acrylic resin film can be used. In addition, aluminum foil is sandwiched between PVF film or polyester film. Ports can also be used.

[0170] The insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material. In addition, acrylic resin, polyimide, benzocyclobutene resin, polyamide, epoxy resin The use of a heat-resistant organic insulating material such as the above is suitable for the planarizing insulating film. In addition to the above organic insulating materials, low-k materials, siloxane resins, and PSG (phosphorus glass), BPSG (boron phosphorus glass), etc. can be used. The insulating layer may be formed by stacking a plurality of insulating films made of the above-mentioned materials.

[0171] The method for forming the insulating layer 4021 is not particularly limited. Depending on the material, the insulating layer 4021 may be formed by a sputtering method, Spin coating, dipping, spray coating, droplet ejection (inkjet method, screen Printing by means of a combination of techniques such as roll coating, card printing, offset printing, etc. The insulating layer 4021 can also be formed by using ten-coating, knife coating, etc. do.

[0172] A display device transmits light from a light source or a display element to perform display. The thin films such as the substrate, insulating film, and conductive film provided in the pixel area are all in the visible light wavelength range. It is translucent to

[0173] A first electrode layer and a second electrode layer (a pixel electrode layer and a common electrode layer) that apply a voltage to the display element , counter electrode layer, etc.) are determined by the direction of the light to be extracted, the location of the electrode layer, The light transmitting property or the light reflecting property can be selected depending on the pattern structure of the electrode layer.

[0174] The first electrode layer 4030 and the second electrode layer 4031 are made of indium tungsten oxide. Oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide (ITO) ), indium zinc oxide, indium tin oxide doped with silicon oxide, etc. A conductive material having such a property can be used.

[0175] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum (Mo). Mo, Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium ( Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Metals such as tungsten (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) or its alloy or nitride. can.

[0176] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer may be a conductive composition containing a conductive polymer. For this purpose, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, Or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or Derivatives and the like.

[0177] In addition, since transistors are easily damaged by static electricity, etc., It is preferable to provide a protection circuit using a non-linear element.

[0178] As described above, by using the transistor described in Embodiment 1 as an example, a highly reliable semiconductor device can be obtained. The semiconductor device can be provided by using the transistor exemplified in the first embodiment. Not only semiconductor devices with display functions, but also power devices mounted on power supply circuits, LSI semiconductor integrated circuits such as semiconductor devices having an image sensor function for reading information of an object, The present invention can be applied to semiconductor devices having various functions.

[0179] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0180] (Embodiment 3) The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). The electronic device can be, for example, a television device (television or television (also called digital receivers), computer monitors, digital cameras, digital video cameras, etc. Cameras such as digital cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) (c) Portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the liquid crystal display device described in the above embodiment include: He explains.

[0181] FIG. 10A shows a notebook personal computer, which includes a main body 3001 and a housing 30 The embodiment is composed of a display unit 3002, a keyboard 3004, etc. Alternatively, by applying the semiconductor device described in Embodiment 2, a highly reliable notebook type It may be a personal computer.

[0182] FIG. 10B shows a portable digital assistant (PDA), and a main body 3021 includes a display unit 3023 and An external interface 3025 and an operation button 3024 are provided. The stylus 3022 is an accessory for the function. By applying this semiconductor device, a more reliable personal digital assistant (PDA) can be achieved. This can be done.

[0183] FIG. 10C shows an example of an electronic book. For example, an electronic book 2700 has a housing 2 The device is made up of two housings, housing 2701 and housing 2703. 03 is integrated with an axis portion 2711, and performs opening and closing operations around the axis portion 2711. This configuration makes it possible to operate like a paper book. .

[0184] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display unit (display unit 2705 in FIG. 10C) and An image can be displayed on the display unit (display unit 2707 in FIG. 10C). By applying the semiconductor device described in the first or second embodiment, a highly reliable electronic book can be obtained. The number of registered employees can be set at 2,700.

[0185] FIG. 10C shows an example in which an operating unit and the like are provided in the housing 2701. For example, In the housing 2701, a power supply 2721, operation keys 2723, a speaker 2725, etc. are arranged. The operation keys 2723 can be used to turn pages. A keyboard, a pointing device, etc. may be provided on one side. On the back and sides of the device, there are external connection terminals (earphone terminal, USB terminal, etc.), a recording medium insertion port, etc. Furthermore, the electronic book 2700 may have a function as an electronic dictionary. It may be configured such that

[0186] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. It is also possible.

[0187] FIG. 10D shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 includes a display panel 2802, a speaker 2803, a microphone, and a microphone array. Phone 2804, pointing device 2806, camera lens 2807, external connection The housing 2800 is also provided with a terminal 2808 and the like. It is equipped with a solar cell 2810, an external memory slot 2811, etc. Also, an antenna The semiconductor device shown in the first or second embodiment is built in the housing 2801. By applying the device, a highly reliable mobile phone can be obtained.

[0188] The display panel 2802 is equipped with a touch panel, and in FIG. The multiple operation keys 2805 are indicated by dotted lines. It also includes a boost circuit to boost the input voltage to the voltage required by each circuit.

[0189] The display direction of the display panel 2802 changes appropriately depending on the usage mode. The camera lens 2807 is located on the same surface as the camera 2802, so video calls are possible. The speaker 2803 and the microphone 2804 are not limited to voice calls, The housing 2800 and the housing 2801 can be slid apart. As shown in Fig. 10(D), the unfolded state can be folded up into a folded state, making it easy to carry. It is possible to make the device compact enough to meet the requirements.

[0190] The external connection terminal 2808 can be used to connect to various cables such as an AC adapter and a USB cable. It is possible to charge the battery and to communicate with a personal computer, etc. A recording medium can be inserted into the external memory slot 2811 for storing and transferring a larger amount of data. We can handle it.

[0191] In addition to the above functions, it also has infrared communication function, TV reception function, etc. Good too.

[0192] FIG. 10(E) shows a digital video camera, which includes a main body 3051 and a display unit (A) 3057. , eyepiece 3053, operation switch 3054, display unit (B) 3055, battery 3056 The semiconductor device shown in the first or second embodiment is By using this, a highly reliable digital video camera can be obtained.

[0193] FIG. 10(F) shows an example of a television device. The television device 9600 is A display portion 9603 is incorporated in the housing 9601. In addition, in this example, the housing 9601 is supported by a stand 9605. The semiconductor device shown in the first or second embodiment is applied. This makes it possible to provide a highly reliable television set.

[0194] The television device 9600 can be operated using an operation switch provided on the housing 9601 or a separate remote control. This can be done by a remote control device. A display unit for displaying information output from the input unit may be provided.

[0195] The television device 9600 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .

[0196] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination. [Explanation of symbols]

[0197] 110 Transistor 120 Transistor 130 Transistor 140 Transistor 150 Transistors 160 Transistors 170 Transistors 180 Transistors 200 boards 202 Insulating film 204 Metal oxide film 206 Oxide Semiconductor Film 208a Source electrode 208b Drain electrode 210 Metal oxide film 212 Gate insulating film 214 Gate electrode 2700 e-books 2701 Case 2703 Case 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation key 2725 Speaker 2800 Chassis 2801 Case 2802 Display Panel 2803 Speaker 2804 Microphone 2805 Operation key 2806 Pointing Device 2807 Camera lenses 2808 External connection terminal 2810 Solar Cell 2811 External memory slot 3001 Main unit 3002 Case 3003 Display section 3004 Keyboard 3021 Main unit 3022 Stylus 3023 Display section 3024 Operation button 3025 External Interface 3051 Main unit 3053 Eyepiece 3054 Operation switch 3055 Display section (B) 3056 Battery 3057 Display section (A) 4001 Substrate 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 Substrate 4008 Liquid crystal layer 4010 Transistor 4011 Transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4018a FPC 4018b FPC 4019 Anisotropic conductive film 4021 Insulation layer 4030 Electrode layer 4031 Electrode layer 4032 Insulating film 4033 Insulating film 4035 Spacer 4510 Bulkhead 4511 Electroluminescent layer 4513 Light emitting element 4514 Filling material 4612 Cavity 4613 Spherical particles 4614 Filling material 4615a Black area 4615b White area 9600 Television Equipment 9601 Case 9603 Display section 9605 Stand

Claims

1. an insulating film on a substrate; a first oxide film having a region on the insulating film; a first conductive film having a region on the first oxide film; a second conductive film having an area on the first oxide film; an oxide semiconductor film having a region on the first oxide film; a second oxide film having a region on the oxide semiconductor film; and a third conductive film having an area on the second oxide film; The insulating film includes nitrogen and silicon, the second oxide film has the same material as the first oxide film; the oxide semiconductor film contains indium, gallium, and zinc; the oxide semiconductor film has a channel formation region of a transistor, the first conductive film has a region functioning as one of a source electrode and a drain electrode of the transistor, the second conductive film has a region functioning as the other of the source electrode and the drain electrode of the transistor, the third conductive film has a region that functions as a gate electrode of the transistor, the second oxide film has a region in contact with an upper surface of the oxide semiconductor film, the oxide semiconductor film has a region in contact with an upper surface of the first oxide film, the oxide semiconductor film has a region in contact with a top surface of the first conductive film and a region in contact with a side surface of the first conductive film; the oxide semiconductor film has a region in contact with a top surface of the second conductive film and a region in contact with a side surface of the second conductive film; the third conductive film has a region overlapping with the oxide semiconductor film with the second oxide film interposed therebetween; the second oxide film has a region that does not overlap with the third conductive film, the first conductive film has a region that does not overlap with the second oxide film; the second conductive film has a region that does not overlap with the second oxide film, the second oxide film is not in contact with the first conductive film, the second oxide film is not in contact with the second conductive film.

2. an insulating film on a substrate; a first oxide film having a region on the insulating film; a first conductive film having a region on the first oxide film; a second conductive film having an area on the first oxide film; an oxide semiconductor film having a region on the first oxide film; a second oxide film having a region on the oxide semiconductor film; and a third conductive film having an area on the second oxide film; The insulating film includes nitrogen and silicon, the second oxide film has the same material as the first oxide film; the oxide semiconductor film contains indium, gallium, and zinc; the oxide semiconductor film has a channel formation region of a transistor, the first conductive film has a region functioning as one of a source electrode and a drain electrode of the transistor, the second conductive film has a region functioning as the other of the source electrode and the drain electrode of the transistor, the third conductive film has a region that functions as a gate electrode of the transistor, the second oxide film has a region in contact with an upper surface of the oxide semiconductor film, the oxide semiconductor film has a region in contact with an upper surface of the first oxide film, the oxide semiconductor film has a region in contact with a top surface of the first conductive film and a region in contact with a side surface of the first conductive film; the oxide semiconductor film has a region in contact with a top surface of the second conductive film and a region in contact with a side surface of the second conductive film; the third conductive film has a region overlapping with the oxide semiconductor film with the second oxide film interposed therebetween; a width of the second oxide film is greater than a width of the third conductive film in a cross-sectional view of the transistor in a channel length direction; the first conductive film has a region that does not overlap with the second oxide film; the second conductive film has a region that does not overlap with the second oxide film, the second oxide film is not in contact with the first conductive film, the second oxide film is not in contact with the second conductive film.

3. an insulating film on a substrate; a first oxide film having a region on the insulating film; a first conductive film having a region on the first oxide film; a second conductive film having an area on the first oxide film; an oxide semiconductor film having a region on the first oxide film; a second oxide film having a region on the oxide semiconductor film; and a third conductive film having an area on the second oxide film; The insulating film includes nitrogen and silicon, the second oxide film has the same material as the first oxide film; the first oxide film has a region having a thickness larger than that of the oxide semiconductor film; the second oxide film has a region having a thickness larger than that of the oxide semiconductor film; the oxide semiconductor film contains indium, gallium, and zinc; the oxide semiconductor film has a channel formation region of a transistor, the first conductive film has a region functioning as one of a source electrode and a drain electrode of the transistor, the second conductive film has a region functioning as the other of the source electrode and the drain electrode of the transistor, the third conductive film has a region that functions as a gate electrode of the transistor, the second oxide film has a region in contact with an upper surface of the oxide semiconductor film, the oxide semiconductor film has a region in contact with an upper surface of the first oxide film, the oxide semiconductor film has a region in contact with a top surface of the first conductive film and a region in contact with a side surface of the first conductive film; the oxide semiconductor film has a region in contact with a top surface of the second conductive film and a region in contact with a side surface of the second conductive film; the third conductive film has a region overlapping with the oxide semiconductor film with the second oxide film interposed therebetween; the second oxide film has a region that does not overlap with the third conductive film, the first conductive film has a region that does not overlap with the second oxide film; the second conductive film has a region that does not overlap with the second oxide film, the second oxide film is not in contact with the first conductive film, the second oxide film is not in contact with the second conductive film.

4. an insulating film on a substrate; a first oxide film having a region on the insulating film; a first conductive film having a region on the first oxide film; a second conductive film having an area on the first oxide film; an oxide semiconductor film having a region on the first oxide film; a second oxide film having a region on the oxide semiconductor film; and a third conductive film having an area on the second oxide film; The insulating film includes nitrogen and silicon, the second oxide film has the same material as the first oxide film; the first oxide film has a region having a thickness larger than that of the oxide semiconductor film; the second oxide film has a region having a thickness larger than that of the oxide semiconductor film; the oxide semiconductor film contains indium, gallium, and zinc; the oxide semiconductor film has a channel formation region of a transistor, the first conductive film has a region functioning as one of a source electrode and a drain electrode of the transistor, the second conductive film has a region functioning as the other of the source electrode and the drain electrode of the transistor, the third conductive film has a region that functions as a gate electrode of the transistor, the second oxide film has a region in contact with an upper surface of the oxide semiconductor film, the oxide semiconductor film has a region in contact with an upper surface of the first oxide film, the oxide semiconductor film has a region in contact with a top surface of the first conductive film and a region in contact with a side surface of the first conductive film; the oxide semiconductor film has a region in contact with a top surface of the second conductive film and a region in contact with a side surface of the second conductive film; the third conductive film has a region overlapping with the oxide semiconductor film with the second oxide film interposed therebetween; a width of the second oxide film is greater than a width of the third conductive film in a cross-sectional view of the transistor in a channel length direction; the first conductive film has a region that does not overlap with the second oxide film; the second conductive film has a region that does not overlap with the second oxide film, the second oxide film is not in contact with the first conductive film, the second oxide film is not in contact with the second conductive film.

5. In any one of claims 1 to 4, the first conductive film has a region overlapping with the oxide semiconductor film and a region not overlapping with the oxide semiconductor film, the second conductive film has a region overlapping with the oxide semiconductor film and a region not overlapping with the oxide semiconductor film.

6. In any one of claims 1 to 5, the energy of the conduction band minimum of the first oxide film is higher than the energy of the conduction band minimum of the oxide semiconductor film, The semiconductor device in which the energy of the bottom of the conduction band of the second oxide film is higher than the energy of the bottom of the conduction band of the oxide semiconductor film.

7. In any one of claims 1 to 6, the first conductive film and the second conductive film contain molybdenum; The third conductive film has a laminated structure containing titanium and aluminum.

8. In any one of claims 1 to 7, a second insulating film having a region on the third conductive film; The second insulating film comprises an organic insulating material.

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