Semiconductor device and control system

Abstract

To provide a semiconductor device that makes it possible to significantly reduce area of a circuit for driving a power transistor.SOLUTION: A semiconductor device comprises: a galvanic isolator; a transmission circuit for transmitting a transmission signal via the galvanic isolator; a reception circuit for receiving a reception signal corresponding to the transmission signal via the galvanic isolator; an encoding circuit for encoding two input signals to generate the transmission signal; and a decoding circuit for decoding the two input signals from the reception signal.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a control system using a galvanic isolator. [Background technology]

[0002] Power transistors (power MOSFETs and IGBTs) are used in devices that operate at high voltages, such as motors, power conversion devices, and lighting devices. On the other hand, the MCUs (Micro Controller Units) that control the power transistors operate at low voltages. Galvanic isolators (hereafter referred to as isolators), such as capacitors and transformers, are used for communication between such power transistors and MCUs.

[0003] In recent years, with the spread of electric vehicles (EVs) and hybrid electric vehicles (HEVs), there has been a demand for miniaturization of systems using isolators.

[0004] Patent Document 1 discloses a technique relating to an on-chip transformer in which a transformer is formed on a semiconductor chip.

[0005] Patent Document 2 describes a technique for miniaturizing an on-chip transformer and an on-chip capacitor. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 5504903 [Patent Document 2] Patent No. 5375952 Summary of the Invention [Problem to be solved by the invention]

[0007] Control using PWM (Pulse Width Modulation) signals is widely used to control loads such as motors and lighting devices (control of rotation speed and brightness). For example, when controlling a three-phase (U, V, W phase) motor with PWM, six power transistors (U, V, W, U-bar, V-bar, W-bar) are required (see Figs. 21 and 22 of Patent Document 2). In this case, six isolators are also required. One transformer occupies a chip area of ​​300 to 400 μm in diameter (or twice this). Furthermore, other circuits cannot be placed within a few hundred μm around the transformer. If the number of isolators increases, it becomes difficult to miniaturize the semiconductor chip on which the isolators are mounted.

[0008] Patent Document 2 discloses a technology to reduce the number of isolators by MUXing and DEMUXing the signals on the low side (U-bar, V-bar, W-bar) (Fig. 25 of Patent Document 2). However, since multi-bit signals are transmitted and received collectively, this leads to communication delays. In addition, it is difficult to respond when the input signal changes during transmission and reception of multi-bit signals. Therefore, the technology disclosed in Patent Document 2 is difficult to apply to control that requires real-time performance. [Means for solving the problem]

[0009] A semiconductor device according to one embodiment includes a galvanic isolator, a transmitting circuit that transmits a transmitting signal via the galvanic isolator, a receiving circuit that receives a receiving signal corresponding to the transmitting signal via the galvanic isolator, a coding circuit that codes two input signals and generates a transmitting signal, and a decoding circuit that decodes the two input signals from the receiving signal. Effect of the Invention

[0010] According to the embodiment, it is possible to significantly reduce the area of ​​the circuit for driving the power transistor and to reduce the amount of wire bonding. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram of a semiconductor device according to a first embodiment. [Diagram 2] FIG. 2 is a timing chart for explaining the operation of the semiconductor device according to the first embodiment. [Diagram 3] FIG. 3 is a block diagram of the three-phase motor control system according to the first embodiment. [Figure 4] FIG. 4 is a flowchart illustrating the operation of the semiconductor device according to the modification of the first embodiment. [Diagram 5] FIG. 5 is a block diagram of a semiconductor device according to the second embodiment. [Figure 6] FIG. 6 is a timing chart for explaining the operation of the semiconductor device according to the second embodiment. [Figure 7] FIG. 7 is a timing chart for explaining the operation of the semiconductor device according to the third embodiment. [Figure 8] FIG. 8 is a timing chart for explaining the operation of the semiconductor device according to the third embodiment. [Figure 9] FIG. 9 is a timing chart for explaining the operation of the semiconductor device according to the third embodiment. [Figure 10] FIG. 10 is a block diagram of a control system according to the fourth embodiment. [Figure 11] FIG. 11 is a block diagram of a control system according to the fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] A semiconductor device and a control system according to an embodiment will be described in detail below with reference to the drawings. In the specification and drawings, the same or corresponding components are denoted by the same reference numerals, and duplicated descriptions are omitted. In the drawings, components may be omitted or simplified for convenience of explanation. At least a portion of each embodiment may be combined with each other in any desired manner.

[0013] [Embodiment 1] Fig. 1 is a block diagram of a semiconductor device 100 according to the first embodiment. The semiconductor device 100 is a device for controlling a high-side switch (power transistor) and a low-side switch (power transistor) that drive a load such as a motor by PWM. As shown in Fig. 1, the semiconductor device 100 has a coding circuit (Code) 1, a transmission circuit (Tx) 2, an isolator 3, a reception circuit (Rx) 4, a decoding circuit (Decode) 5, and driver circuits 6 and 7.

[0014] The encoding circuit 1 is a circuit that generates one output signal by encoding a PWM_H signal for driving a high-side switch and a PWM_L signal for driving a low-side switch, both of which are generated by an external MCU or the like.

[0015] The transmission circuit 2 is a circuit that transmits the output signal of the encoding circuit 1 to the isolator 3. The reception circuit 4 is a circuit that outputs the signal received by the isolator 3 to the decoding circuit 5. The transmission circuit 2, the isolator 3, and the reception circuit 4 are similar to conventional ones (e.g., Patent Documents 1 and 2), and therefore detailed description thereof will be omitted.

[0016] The isolator 3 is a galvanic isolator formed of a capacitor, a transformer, and the like.

[0017] The decoding circuit 5 is a circuit that generates two output signals (PWM_H, PWM_L) by decoding the encoded signal received via the isolator 3 and the receiving circuit 4.

[0018] The driver circuits 6 and 7 are circuits that generate signals OUT_H and OUT_L for driving the high-side switch and the low-side switch, based on the signal decoded by the decoding circuit 5.

[0019] Next, a detailed explanation will be given of the operations of the encoding circuit 1 and the decoding circuit 5. FIG.

[0020] In FIG. 2, the PWM_H signal changes from on (Hi), off (Lo), to on. The PWM_L signal changes from off, on, to off. In PWM control, a dead time is provided, and PWM_H and PWM_L are not on at the same time. The dead time is provided between the point where the PWM_H signal changes from on to off and the point where the PWM_L signal changes from off to on. Similarly, a dead time is provided between the point where the PWM_L signal changes from on to off and the point where the PWM_H signal changes from off to on. Therefore, the signals input to the encoding circuit 1 are (PWM_H, PWM_L)=(L, H), (L, L), (H, L). Here, (PWM_H, PWM_L)=(L, H) is defined as state 1, (PWM_H, PWM_L)=(L, L) is defined as state 2, and (PWM_H, PWM_L)=(H, L) is defined as state 3.

[0021] In the first embodiment, the encoding circuit 1 detects the state of the input signal and expresses the detected state by the number of pulses within a predetermined period. Specifically, as shown in Fig. 2, state 1 is expressed by one pulse, state 2 by two pulses, and state 3 by three pulses.

[0022] Each pulse signal generated by the encoding circuit 1 is input to the decoding circuit 5 via the transmitting circuit 2, the isolator 3, and the receiving circuit 4.

[0023] The decoding circuit 5 decodes the original PWM_H and PWM_L signals based on the input pulse signal. The decoding operation is the reverse of the encoding operation. That is, the decoding circuit 5 detects the state from the number of pulses of the input signal and generates an output signal according to the detected state. Specifically, as shown in FIG. 2, if the number of pulses is 1, it is state 1, and a signal with (PWM_H, PWM_L)=(L, H) is generated. If the number of pulses is 2, it is state 2, and a signal with (PWM_H, PWM_L)=(L, L) is generated. If the number of pulses is 3, it is state 3, and a signal with (PWM_H, PWM_L)=(H, L) is generated.

[0024] 3 is a diagram illustrating an application of the semiconductor device 100 to a three-phase motor control system 200. As shown in FIG. 3, the three-phase motor control system 200 includes an inverter 201, an insulated gate driver 202, an MCU (Micro Control Unit) 203, and a three-phase motor 204.

[0025] The inverter 201 has high-side switches (power transistors) 211-213 and low-side switches (power transistors) 214-216 for driving a three-phase motor 204. The high-side switches 211, 212, and 213 are U-phase, V-phase, and W-phase switches, respectively. The low-side switches 214, 215, and 216 are U_bar-phase, V_bar-phase, and W_bar-phase switches, respectively.

[0026] The insulated gate driver 202 is equipped with three sets of the semiconductor device 100 shown in Fig. 1. That is, the encoding circuit 221, the isolator 222, the decoding circuit 223, and the driver circuits 224 and 225 are gate drivers for the U / U_bar phase. The encoding circuit 226, the isolator 227, the decoding circuit 228, and the driver circuits 229 and 230 are gate drivers for the V / V_bar phase. The encoding circuit 231, the isolator 232, the decoding circuit 233, and the driver circuits 234 and 235 are gate drivers for the W / W_bar phase. Note that in Fig. 3, the transmitting circuit and the receiving circuit of the semiconductor device 100 are omitted because they are built into the encoding circuit and the decoding circuit, respectively.

[0027] Here, the insulated gate driver 202 is configured as one semiconductor package mounting the first and second semiconductor chips. The first semiconductor chip is mounted with the encoding circuits 221, 226, 231 and the isolators 222, 227, 232, and the second semiconductor chip is mounted with the decoding circuits 223, 228, 233 and the driver circuits 224, 225, 229, 230, 234, 235. Alternatively, the first semiconductor chip may be mounted with the encoding circuits 221, 226, 231, and the second semiconductor chip may be mounted with the isolators 222, 227, 232, the decoding circuits 223, 228, 233, and the driver circuits 224, 225, 229, 230, 234, 235. Alternatively, the insulated gate driver 202 may be configured as one semiconductor package mounting the first to third semiconductor chips. In this case, encoding circuits 221, 226, and 231 are mounted on the first semiconductor chip, isolators 222, 227, and 232 are mounted on the second semiconductor chip, and decoding circuits 223, 228, and 233 and driver circuits 224, 225, 229, 230, 234, and 235 are mounted on the third semiconductor chip.

[0028] The MCU 203 generates three-phase PWM signals and supplies them to an insulated gate driver so that the three-phase motor 204 operates as desired. In practice, the MCU 203 generates the PWM signals while detecting the rotation angle and current of the three-phase motor 204 with a sensor. A method for generating the PWM signals is a common technique, so a description thereof will be omitted.

[0029] As is clear from Figure 3, whereas previously six sets of transmitter circuits, isolators, and receiver circuits were required for three phases, only three sets are required.

[0030] (effect) As described above, the semiconductor device 100 according to the first embodiment is provided with an encoding circuit that encodes signals according to the states of the PWM_H and PWM_L signals, and a decoding circuit that decodes the encoded signals. This makes it possible to significantly reduce the area of ​​the circuit for driving the power transistors and reduce the amount of wire bonding.

[0031] The present disclosure is not limited to the above-mentioned embodiment. For example, the above-mentioned states 1 to 3 may be encoded not by the number of pulses in a predetermined period, but by the frequency of the pulses, the amplitude of the pulses, or a combination of different pulses.

[0032] [Variations] FIG. 4 is a modification of the first embodiment. In the first embodiment, the encoding circuit 1 generates a pulse signal in accordance with a change in the state of the input signal. In this modification, the encoding circuit 1 generates a pulse signal indicating a state even when there is no change in the state of the input signal. In FIG. 4, a pulse indicating state 1 is generated in the middle of state 1 ((PWM_H, PWM_L)=(L, H)). That is, in this modification, a one-pulse signal is generated three times: when changing to state 1, in the middle of state 1, and when changing from state 1. The second pulse may be generated after a predetermined time has elapsed since the first pulse was generated.

[0033] (effect) In this modification, even when there is no change in the state of the input signal, a pulse signal indicating the state is generated, which makes it possible to prevent the occurrence of a state discrepancy between the transmitting side (encoding circuit side) and the receiving side (decoding circuit side).

[0034] [Embodiment 2] 5 is a block diagram of a semiconductor device 100a according to the second embodiment. The difference from the first embodiment is that a state machine 8 is added. Also, in the second embodiment, the operations of the encoding circuit 1 and the decoding circuit 5 are different from those in the first embodiment.

[0035] As described in the first embodiment, the PWM_H and L signals used in motor control, inverters, and power supply circuits are provided with dead times, and changes in the PWM_H and L signals are limited to state transitions as shown in the lower diagram of FIG. 5. In the second embodiment, these state transitions are expressed by increments and decrements. That is, the transitions from state 1 to state 2 and from state 2 to state 3 are increments, and the transitions from state 3 to state 2 and from state 2 to state 1 are decrements. The encoding circuit 1 generates signals corresponding to the increments and decrements of PWM_H and L.

[0036] FIG. 6 is a timing chart for explaining the operation of the encoding circuit 1, the decoding circuit 5, and the state machine 8. In the second embodiment, the encoding circuit 1 expresses increment and decrement by the direction of the current pulse flowing through the transformer (isolator 3). The voltage appearing in the receiving coil of the transformer is proportional to the di / dt of the current flowing through the transmitting coil. The direction of the pulse appearing in the receiving coil is determined by the direction of the current when the current flowing through the transmitting coil is started. When the current flowing through the transmitting coil is stopped and set to zero, a pulse in the opposite direction appears in the receiving coil. The encoding circuit 1 expresses increment and decrement by utilizing these phenomena. That is, as shown in FIG. 5, an increment is performed by passing a current through the transmitting coil in the direction of the solid arrow and then setting the current to zero. A pulse having a positive potential difference appears in the receiving coil in the direction of the solid arrow, and then a pulse in the opposite direction appears. A decrement is performed by passing a current through the transmitting coil in the direction of the dashed arrow and then setting the current to zero. A pulse with a positive potential difference in the direction of the dashed arrow appears in the receiving coil, and then a pulse in the opposite direction appears. Note that in Figure 6, a pulse with a positive potential difference in the direction of the solid arrow in the receiving coil is represented as a positive pulse, and a pulse with a positive potential difference in the direction of the dashed arrow is represented as a negative pulse.

[0037] The decoding circuit 5 decodes the increment / decrement based on the input pulse signal. The state machine 8 restores the original PWM_H and PWM_L signals based on the increment / decrement (performs the operation shown in the lower diagram of FIG. 5). The state machine 8 needs to have an initial state (one of states 1 to 3) predetermined, or to be notified of the state by the transmitting side.

[0038] (effect) When the second embodiment is applied to a three-phase motor control system or the like, the circuit area can be significantly reduced as in the first embodiment. Furthermore, since the signals to be encoded / decoded are short signals (signals with a small number of pulses), it is possible to reduce the latency and power required for transmitting and receiving signals.

[0039] [Embodiment 3] The semiconductor device according to the third embodiment is similar to that according to the second embodiment. In the third embodiment, the operations of the encoding circuit 1 and the decoding circuit 5 are different from those in the second embodiment. As described above, in the second embodiment, it is necessary to determine the initial state of the state machine 8 (one of states 1 to 3) in advance, or to notify the state of the transmitting side. Therefore, in the third embodiment, a function of notifying the state itself is added.

[0040] FIG. 7 is a timing chart for explaining the operation of the encoding circuit 1 and the decoding circuit 5. As in the second embodiment, the encoding circuit 1 generates a signal corresponding to an increment and a signal corresponding to a decrement of PWM_H and L. However, the encoding circuit 1 doubles the pulse when transitioning to state 1 or state 3. That is, as shown in FIG. 7, the transition from state 3 to state 2 generates pulses (one pulse on the negative side and one pulse on the positive side) indicating a decrement similar to that in the second embodiment, and the transition from state 1 to state 2 generates pulses (one pulse on the positive side and one pulse on the negative side) indicating an increment similar to that in the second embodiment. Then, the transition from state 2 to state 1 generates two pulses indicating a decrement, and the transition from state 2 to state 3 generates two pulses indicating an increment. This makes it possible to determine which state the transmitting side is in, and to suppress mismatches between the states of the transmitting side and the receiving side.

[0041] In order to synchronize the states of the transmitting side and the receiving side more accurately, pulses indicating increment / decrement may be transmitted periodically during periods when there are no state transitions. FIG. 8 shows that the above-mentioned duplicated increment / decrement pulses are transmitted during periods when there are no state transitions (periods when state 1 continues, and periods when state 3 continues). During the period when state 1 continues, decrement pulses are transmitted periodically. During the period when state 3 continues, increment pulses are transmitted periodically. This enables the receiving side to periodically grasp the state of the transmitting side.

[0042] The periodically transmitted pulses may be pulses indicating increment / decrement as described in the second embodiment. FIG. 9 shows that the increment / decrement pulses of the second embodiment are transmitted during a period in which there is no state transition (period in which state 1 continues, period in which state 3 continues). On the receiving side, even if a pulse indicating decrement is transmitted during a period in which state 1 continues (after receiving a doubled decrement pulse indicating a transition to state 1), no further state transition is made from state 1. Similarly, even if a pulse indicating increment is transmitted during a period in which state 3 continues (after receiving a doubled increment pulse indicating a transition to state 3), no further state transition is made from state 3. Therefore, the receiving side can normally detect the state of the transmitting side.

[0043] When transmitting a pulse during state 2, it is sufficient to transmit a pulse indicating the increment or decrement of embodiment 2, i.e., a non-duplicated pulse. On the receiving side, when a non-duplicated pulse is received during state 2 (after receiving a decrement pulse from state 3 or an increment pulse from state 1), it is possible to detect the state of the transmitting side by interpreting this as maintaining state 2.

[0044] (effect) In the third embodiment, it is possible to obtain the same effect as in the second embodiment, and to suppress discrepancies between the states of the transmitting side and the receiving side.

[0045] [Embodiment 4] 10 is a diagram in which the semiconductor device 100 according to the first embodiment is applied to a power supply circuit (a step-down converter, a step-up converter, or a step-up / step-down converter) 400, which is another control system. As shown in FIG. 10, the power supply circuit 400 has a coil 401, a high-side switch (power transistor) 402, a low-side switch (power transistor) 403, a gate driver 404, and a controller 405.

[0046] 1, and includes an encoding circuit 406, an isolator 407, a decoding circuit 408, and driver circuits 409 and 410. Note that in Fig. 10, the transmitting circuit and the receiving circuit of the semiconductor device 100 are omitted since they are incorporated in the encoding circuit 406 and the decoding circuit 408, respectively.

[0047] In a synchronous rectification type step-down or step-up converter, the high-side switch 402 and the low-side switch 403 are turned on / off complementarily and are never turned on at the same time. Therefore, by using the encoding circuit 406 and the decoding circuit 408 that perform the same operation as in the first embodiment, it is possible to significantly reduce the area of ​​the power supply circuit.

[0048] It is possible to apply not only the first embodiment but also the same semiconductor device as in the second and third embodiments to the power supply circuit 400.

[0049] (effect) As described above, by applying the semiconductor device according to the first to third embodiments to a power supply circuit, it is possible to obtain the same effects as those of the first to third embodiments in the power supply circuit.

[0050] [Embodiment 5] 11 is a diagram illustrating an application of the semiconductor device 100 according to the first embodiment to an isolated converter 500, which is another control system. As shown in FIG. 11, the isolated converter 500 includes a transformer 501, a bridge circuit 502, a gate driver 503, and a controller 504.

[0051] 1, that is, encoding circuits 505 and 510, isolators 506 and 511, decoding circuits 507 and 512, and driver circuits 508, 409, 513 and 514. In addition, in Fig. 11, the transmitting circuit and the receiving circuit of the semiconductor device 100 are omitted because they are built into the encoding circuits 505 and 510 and the decoding circuits 507 and 512, respectively.

[0052] The bridge circuit 502 may be a full-bridge circuit or a half-bridge circuit. In the case of a half-bridge circuit (one high-side switch and one low-side switch), the gate driver 503 has the same configuration as that in FIG.

[0053] In the fifth embodiment, four sets of a transmission circuit, an isolator, and a reception circuit are conventionally required, but only two sets are required (in the case of a full-bridge circuit, and in the case of a half-bridge circuit, one set of circuits is sufficient, whereas two sets were conventionally required).

[0054] Although the semiconductor device 100 is applied to a bridge circuit on the power transmitting side (primary side) in FIG. 11, it may also be used to drive the gate of a synchronous rectifying power transistor on the power receiving side (secondary side).

[0055] Further, not only the first embodiment but also the same semiconductor device as the second and third embodiments can be applied to the isolated converter 500.

[0056] (effect) As described above, by applying the semiconductor device according to the first to third embodiments to an isolated converter, it is possible to obtain the same effects as those of the first to third embodiments in the isolated converter.

[0057] The present disclosure is not limited to the above-described embodiment, and may be modified in various ways without departing from the spirit of the present disclosure. For example, when the encoding circuit detects a prohibited pattern for two input signals, an error may be notified to the MCU. Alternatively, when a prohibited pattern is detected, both the high-side switch and the low-side switch may be turned off. Prohibited patterns include the following: When (PWM_H, PWM_L)=(H, H), if (PWM_H, PWM_L)=(H, L) or (L, H) continues for a certain period of time or more, the certain period of time may be determined by the PWM frequency (for example, when the PWM frequency is 5 KHz, the certain period of time is 200 us).

[0058] Furthermore, when the decoding circuit detects a specific abnormal state, it may notify the MCU of an error, or may turn off both the high-side switch and the low-side switch. Abnormal states are as follows: The received signal does not change for a certain period of time (e.g., 200 us); The received signal has an undefined code or signal pattern; The received signal exhibits an undefined state transition. An undefined state transition is a transition to state 1 or state 3 without passing through state 2 (i.e., a case where no dead time is provided). Alternatively, in the second embodiment, it is a case where a decrement is received from state 1, or an increment is received from state 3. [Explanation of symbols]

[0059] 1 Encoding circuit 2. Transmitter Circuit 3. Galvanic Isolators 4. Receiving circuit 5 Decoding circuit 6, 7 Driver circuit 8. State Machines 100, 100a Semiconductor device 200 3-phase motor control system 201 Inverter 202 Isolated Gate Driver 203 MCU 204 Motor 211~213 High-side switches (power transistors) 214~216 Low-side switches (power transistors) 221, 226, 231 encoding circuit 222, 227, 232 Galvanic Isolators 223, 228, 233 Decoding circuit 224, 225, 229, 230, 234, 235 Driver circuits 400 Power circuit 401 Coil 402 High-side switch (power transistor) 403 High-side switch (power transistor) 404 Gate Driver 405 Controller 406 Encoding circuit (including transmission circuit) 407 Galvanic Isolator 408 Decoding circuit (including receiving circuit) 409, 410 Driver circuit 500 Isolated Converter 501 Transformer 502 Bridge circuit 503 Gate Driver 504 Controller 505, 510 Encoding circuit (including transmission circuit) 506, 511 Galvanic Isolators 507, 512 Decoding circuit (including receiving circuit) 508, 509, 513, 514 Driver circuit

Claims

1. Galvanic isolators; a transmission circuit that transmits a transmission signal through the galvanic isolator; a receiving circuit that receives a receiving signal corresponding to the transmitting signal via the galvanic isolator; a coding circuit for coding two input signals to generate the transmission signal; a decoding circuit for decoding the two input signals from the received signal; having The two input signals have a plurality of states according to combinations of their respective values; The encoding circuit generates the transmission signal based on state transitions of the plurality of states; the decoding circuit decodes the two input signals based on state transitions of the plurality of states indicated by the received signal; the plurality of states includes a first state, a second state, and a third state; the encoding circuit generates an increment signal and a decrement signal as the transmission signal based on a state transition from the first state to the third state; the increment signal indicates either a state transition from the first state to the second state or a state transition from the second state to the third state; the decrement signal indicates either a state transition from the third state to the second state or a state transition from the second state to the first state. Semiconductor device.

2. the encoding circuit expresses the plurality of states by at least one of a number of pulses, a frequency of pulses, an amplitude of pulses, and a combination of different pulses; The semiconductor device according to claim 1 .

3. the encoding circuit generates the transmission signal based on state transitions of the plurality of states when the states of the two input signals change and when there is no change in the state for a predetermined time after the state change. The semiconductor device according to claim 1 .

4. the increment signal is a signal that causes a current to flow in a first direction through the galvanic isolator; The decrement signal causes the galvanic isolator to flow a current in a second direction. The semiconductor device according to claim 1 .

5. the encoding circuit duplicates the decrement signal when the two input signals transition to the first state, and duplicates the increment signal when the two input signals transition to the third state; the decoding circuit detects the states of the two input signals by the duplicated increment signal and the duplicated decrement signal; The semiconductor device according to claim 4.

6. the encoding circuit generates the duplicated decrement signal when there is no state transition for a predetermined time after the transition to the first state, and generates the duplicated increment signal when there is no state transition for a predetermined time after the transition to the third state. The semiconductor device according to claim 5 .

7. the encoding circuit generates the decrement signal when there is no state transition for a predetermined time after the transition to the first state, and generates the increment signal when there is no state transition for a predetermined time after the transition to the third state. The semiconductor device according to claim 5 .

8. the encoding circuit generates either the increment signal or the decrement signal when there is no state transition for a predetermined time after the transition to the second state; when the decoding circuit receives either the increment signal or the decrement signal after transitioning to the second state, the decoding circuit determines that the two input signals are maintaining the second state. The semiconductor device according to claim 5 .

9. The two input signals are a PWM signal for a high-side switch that is PWM-controlled, and a PWM signal for a low-side switch that is PWM-controlled. The semiconductor device according to claim 1 .

10. the encoding circuit performs a predetermined process when it detects a prohibited state in the two input signals; The semiconductor device according to claim 1 .

11. When the decoding circuit detects an abnormal state in the received signal, the decoding circuit performs a predetermined process. The semiconductor device according to claim 1 .

12. a high-side switch and a low-side switch for driving a load; a controller that outputs a first PWM signal for controlling the high-side switch and a second PWM signal for controlling the low-side switch; a gate driver that drives the high-side switch and the low-side switch based on the first PWM signal and the second PWM signal; The gate driver includes: Galvanic isolators; a transmission circuit that transmits a transmission signal through the galvanic isolator; a receiving circuit that receives a receiving signal corresponding to the transmitting signal via the galvanic isolator; a coding circuit that codes the first PWM signal and the second PWM signal to generate the transmission signal; a decoding circuit for decoding the first PWM signal and the second PWM signal from the received signal; a first driver circuit that drives the high-side switch based on the decoded first PWM signal; a second driver circuit that drives the low-side switch based on the decoded second PWM signal. Control system.

13. the first PWM signal and the second PWM signal have a plurality of states according to combinations of their respective values; the encoding circuit generates the transmission signal based on the plurality of states; the decoding circuit decodes the first PWM signal and the second PWM signal based on the plurality of states indicated by the received signal; 13. The control system of claim 12.

14. the first PWM signal and the second PWM signal have a plurality of states according to combinations of their respective values; The encoding circuit generates the transmission signal based on state transitions of the plurality of states; the decoding circuit decodes the first PWM signal and the second PWM signal based on state transitions of the plurality of states indicated by the received signal; 13. The control system of claim 12.

15. the plurality of states includes a first state, a second state, and a third state; the encoding circuit generates an increment signal and a decrement signal as the transmission signal based on a state transition from the first state to the third state; the increment signal indicates either a state transition from the first state to the second state or a state transition from the second state to the third state; the decrement signal indicates either a state transition from the third state to the second state or a state transition from the second state to the first state.

15. The control system of claim 14.

16. the increment signal is a signal that causes a current to flow in a first direction through the galvanic isolator; The decrement signal causes the galvanic isolator to flow a current in a second direction.

16. The control system of claim 15.

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