Display device

Abstract

To provide a novel semiconductor device having an oxide semiconductor film.SOLUTION: A semiconductor device includes a first transistor 100 and a second transistor 150. The first transistor includes: a first gate electrode 104; a first insulating film 106 formed thereon; a first oxide semiconductor film 108 formed thereon; a source electrode 112a and a drain electrode 112b electrically connected to the first oxide semiconductor film; second insulating films 114 and 116 on the first oxide semiconductor film; and a second oxide semiconductor film 120a serving as a second gate electrode formed thereon; and a third insulating film 118 on the second oxide semiconductor film. The second transistor includes: a third oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d which are formed on the second insulating films; a fourth insulating film 152 on the channel region; a third gate electrode 154 formed thereon; and a third insulating film on the source region and the drain region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor film. Another embodiment of the present invention relates to a display device including the semiconductor device. The present invention relates to a method for manufacturing a semiconductor device having a conductor film.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. process, machine, manufacture, or composition of matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices. Silicon is a semiconductor thin film that can be used in transistors. Semiconductor materials such as silicon are widely known, but oxide semiconductors are also attracting attention. It is being watched.

[0005] For example, a transistor with a self-aligned top gate structure is fabricated using an oxide semiconductor. A technique for doing this has been disclosed (see Patent Document 1). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2009-278115 A Summary of the Invention [Problem to be solved by the invention]

[0007] As a transistor having an oxide semiconductor film, for example, an inverted staggered type (bottom gate structure) The oxide semiconductor When a transistor having a thin film is applied to a display device, it is preferable to use an inverted type transistor rather than a staggered type transistor. The manufacturing process of staggered transistors is relatively simple and the manufacturing costs are reduced. Therefore, it is often used.

[0008] However, as the screen size of a display device increases or the image quality of a display device increases (for example, 4k x 2k (horizontal pixels = 3840 pixels, vertical pixels = 2160 pixels) or 8 k×4k (horizontal pixel count = 7680 pixels, vertical pixel count = 4320 pixels) As the technology for high-definition display devices advances, the gate and source voltages of inverted staggered transistors will There is a parasitic capacitance between the gate electrode and the drain electrode, which causes a large signal delay, etc. This causes a problem of degradation of the image quality of the display device. In the case of a staggered transistor, the area occupied by the transistor may be larger than that of a staggered transistor. There is a match.

[0009] In view of the above problems, one embodiment of the present invention provides a novel semiconductor device having an oxide semiconductor film. Another object of the present invention is to provide a novel semiconductor device. It is an object of the present invention to provide a method for producing a body device. One of the objects of the present invention is to provide a novel display device.

[0010] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above may be solved by the specification. The above problems are obvious from the description of the specification, etc., and no other problems can be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor device including a first transistor and a second transistor. The first transistor includes a first gate electrode and a first gate electrode. An insulating film, a first oxide semiconductor film on the first insulating film, and a first oxide semiconductor film electrically connected to the first insulating film. a source electrode electrically connected to the first oxide semiconductor film; and a drain electrode electrically connected to the first oxide semiconductor film. A second insulating film on the first oxide semiconductor film, and a second gate electrode on the second insulating film. a second oxide semiconductor film capable of suppressing a thermal expansion of the semiconductor layer; and a third insulating film over the second oxide semiconductor film. The second transistor has a channel region, a source region, and a drain region on the second insulating film. a third oxide semiconductor film including a fourth insulating film on the channel region; and a third oxide semiconductor film on the fourth insulating film. a gate electrode and a third insulating film on the source region and the drain region. It is located.

[0012] Another embodiment of the present invention is a display device including a driver circuit portion and a pixel portion, The driver circuit portion has a first transistor, the pixel portion has a second transistor, and the first The transistor includes a first gate electrode, a first insulating film on the first gate electrode, and a first a first oxide semiconductor film on an insulating film; and a source a drain electrode electrically connected to the first oxide semiconductor film; a second insulating film on the semiconductor film; and a second oxide film on the second insulating film that functions as a second gate electrode. a second insulating film on the second oxide semiconductor film; and a second transistor. A third oxide film including a channel region, a source region, and a drain region is formed on the second insulating film. a fourth insulating film on the semiconductor film, a channel region, and a third gate electrode on the fourth insulating film; and a third insulating film on the source region and the drain region.

[0013] In the above aspect, the first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film The oxide semiconductor film is made of In, M (M is Al, Ga, Y, or Sn), Zn, and In the above embodiment, the first oxide semiconductor film, the second oxide semiconductor film, At least one of the first oxide semiconductor film and the third oxide semiconductor film has a multilayer structure. In the above embodiment, the first oxide semiconductor film, the second oxide semiconductor film, and At least one of the first oxide semiconductor film and the second oxide semiconductor film has a crystal portion, and the crystal portion has a c-axis alignment. It is preferable that the fusion protein has tropism.

[0014] In the above embodiment, the first gate electrode and the second gate electrode are electrically connected. It is preferable if this is done.

[0015] In the above embodiment, the second transistor further includes a transistor electrically connected to the source region. and a drain electrode electrically connected to the drain region. I wish.

[0016] In the above aspect, the third insulating film contains either or both of hydrogen and nitrogen. It is preferable to have

[0017] Another embodiment of the present invention is a display module including the above display device and a touch sensor. Another aspect of the present invention is a semiconductor device according to any one of the above aspects. An electronic device having the above display device or the above display module, and an operation key or a battery. It is a vessel. Effect of the Invention

[0018] According to one embodiment of the present invention, a novel semiconductor device including an oxide semiconductor film can be provided. According to one embodiment of the present invention, a method for manufacturing a novel semiconductor device can be provided. According to one embodiment of the present invention, a novel display device can be provided.

[0019] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0020] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 2] 1 is a cross-sectional view illustrating a semiconductor device. [Diagram 3] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 4] 1 is a cross-sectional view illustrating a semiconductor device. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 6] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 7] FIG. 2 is a diagram for explaining a band structure. [Figure 8] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 9] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 10] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 11] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 12] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 13] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 15] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 16] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 18] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 19] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 20]1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 22] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 23] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 24] 1 is a cross-sectional view illustrating a semiconductor device. [Diagram 25] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 26] 1A and 1B are diagrams illustrating structural analyses of a CAAC-OS and a single crystal oxide semiconductor by XRD, and diagrams showing selected-area electron diffraction patterns of a CAAC-OS. [Figure 27] Cross-sectional TEM image and planar TEM image of CAAC-OS, and their image analysis images. [Figure 28] Electron diffraction pattern of nc-OS and cross-sectional TEM image of nc-OS. [Figure 29] Cross-sectional TEM image of a-like OS. [Diagram 30] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Diagram 31] 1A and 1B are a block diagram illustrating one embodiment of a display device and a circuit diagram illustrating one embodiment of a pixel. [Diagram 32] 1A and 1B are a top view and a circuit diagram illustrating one embodiment of a display device. [Diagram 33] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 34] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 35] FIG. 1 is a circuit diagram illustrating one embodiment of a display device. [Diagram 36] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 37] 2A to 2C are diagrams illustrating a circuit configuration of a resistor element and a top view and a cross section of the resistor element. [Figure 38] 3A and 3B are a circuit diagram and a schematic cross-sectional view illustrating a sensor circuit portion. [Figure 39] 1A and 1B are a top view and a cross-sectional view illustrating a display device. [Diagram 40]FIG. 1 is a perspective view showing an example of a touch panel. [Diagram 41] FIG. 2 is a schematic cross-sectional view illustrating an example of an outer periphery and a terminal portion of a display device. [Diagram 42] FIG. 2 is a schematic cross-sectional view illustrating an example of a terminal portion of a display device. [Diagram 43] FIG. 1 is a cross-sectional view showing an example of a display device. [Diagram 44] FIG. 1 is a cross-sectional view showing an example of a touch sensor. [Diagram 45] FIG. 1 is a cross-sectional view showing an example of a touch panel. [Figure 46] 3A and 3B are a block diagram and a timing chart of a touch sensor. [Figure 47] Circuit diagram of a touch sensor. [Figure 48] 1A to 1C are diagrams illustrating a manufacturing process of a display device using a lateral electric field mode liquid crystal element. [Figure 49] 1A to 1C are diagrams illustrating displays on a display device according to one embodiment of the present invention. [Figure 50] 1A to 1C are diagrams illustrating displays on a display device according to one embodiment of the present invention. [Figure 51] 1A to 1C are diagrams illustrating an example of a display method on a display device according to an embodiment. [Figure 52] 1A to 1C are diagrams illustrating an example of a display method on a display device according to an embodiment. [Diagram 53] FIG. 2 is a diagram illustrating a display module. [Figure 54] 1A to 1C are diagrams illustrating electronic devices. [Figure 55] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Hereinafter, the embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the above description, and the embodiments and details thereof are not limited to those described above without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the embodiments described below. It is not to be construed as being limited to the content.

[0022] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily shown in order to facilitate understanding. The actual position, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0023] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. Therefore, for example, "first" should be changed to "second " or "third" can be used as appropriate. The ordinal numbers used to identify an aspect of the present invention may not match those used in the present invention. There is a match.

[0024] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used. The relationship is used for convenience in describing the drawings. The dimensions change depending on the direction in which each component is depicted. It is not limited to words and phrases, and can be rephrased appropriately depending on the situation.

[0025] In addition, in this specification and the like, when explaining the configuration of the invention using drawings, The reference numerals are used commonly among different drawings.

[0026] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device.

[0027] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is low enough, the material may have the properties of an insulator. The boundary between "insulators" and "insulators" is unclear, and it may not be possible to strictly distinguish them. In some cases, the term "semiconductor" in the above can be replaced with "insulator." In some cases, the term "insulator" in the specification can be replaced with "semiconductor." In some cases, the term "insulator" in this specification can be rephrased as "semi-insulator." .

[0028] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor". The boundary between the term "conductor" and the term "electrical conductor" is unclear, and it may not be possible to strictly distinguish between them. In some cases, the term "semiconductor" in the above can be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0029] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A current flows through the drain, the channel region, and the source. In this specification and the like, the channel region refers to a region through which a current mainly flows. The flow area.

[0030] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0031] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is on, the gate electrode overlaps with the semiconductor (the part through which current flows). The source region or the channel region This refers to the distance between the drain (drain region or drain electrode) and the In the transistor, the channel length does not necessarily have the same value in all regions. The channel length of a transistor may not be determined to a single value. In the detailed description, the channel length is any one of the values, maximum The value may be the minimum or average value.

[0032] The channel width is the width of the semiconductor (or transistor) when it is in the on state. The area where the gate electrode overlaps with the electrode (the area where the current flows) forms a channel. This refers to the length of the part of the region where the source and drain face each other. In a transistor, the channel width does not necessarily have the same value in all regions. That is, The channel width of a transistor may not be determined to a single value. In the fine print, the channel width is any one of the values ​​in the region where the channel is formed, the maximum The value may be the minimum or average value.

[0033] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0034] Also, a voltage is a voltage between a certain potential and a reference potential (such as ground potential (GND) or source potential). Therefore, voltage can be replaced with electric potential. be.

[0035] In this specification and the like, a silicon oxynitride film is a film having a composition containing more oxygen than nitrogen. It refers to a film with a high content of oxygen, preferably 55 atomic % to 65 atomic % and 1 % to 20 atomic %, silicon is 25 atomic % to 35 atomic %, hydrogen is 0.1 atomic % The silicon oxide nitride film is a film containing silicon dioxide in a range of 10 atomic % or more. The nitrogen content is preferably 55 atomic % or more. 5 atomic % or less, oxygen is 1 atomic % to 20 atomic % or less, silicon is 25 atomic % to 35 atomic % %, and hydrogen at a concentration in the range of 0.1 atomic % to 10 atomic %.

[0036] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to:

[0037] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0038] (Embodiment 1) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. The following description will be given with reference to FIGS.

[0039] <1-1. Configuration example 1 of semiconductor device> FIG. 1A illustrates a top view of transistors 100 and 150, which are semiconductor devices according to one embodiment of the present invention. FIG. 1B is a cross-sectional view taken along dashed line X1-X2 in FIG. 1A. FIG. 2(A) corresponds to the cutoff point between the dashed line Y1-Y2 shown in FIG. FIG. 2(B) corresponds to a cross-sectional view of the cross section taken along the dashed line Y3-Y4 in FIG. 1(A). It corresponds to a cross-sectional view of a cross section.

[0040] In addition, in FIG. 1A, in order to avoid complication, transistors 100 and 15 2, some of the components of MOSFET 100 (such as an insulating film that functions as a gate insulating film) are omitted. Note that in the top views of the transistors in the following drawings, the structure is the same as that in FIG. In some cases, some of the components may be omitted. Also, the dashed line X1-X2 direction represents the channel. The longitudinal direction, the dashed line Y1-Y2 direction, and the dashed line Y3-Y4 direction are referred to as the channel width direction. This may be the case.

[0041] As shown in FIGS. 1A and 1B, the semiconductor device of one embodiment of the present invention has a transistor and a transistor-transistor formed on the same substrate. The semiconductor device includes a transistor 100 and a transistor 150. The transistor 100 is a bottom The transistor 150 is a top-gate type (also called a staggered type), and the transistor 150 is a top-gate type (also called a staggered type). The transistors 100 and 150 are also referred to as "tagged" transistors. This will be explained below.

[0042] [Example of the configuration of the first transistor] The transistor 100 includes a conductive film 104 on a substrate 102 and a conductive film 104. an insulating film 106 on the insulating film 106; an insulating film 107 on the insulating film 106; and an oxide semiconductor on the insulating film 107. a conductive film 112a electrically connected to the oxide semiconductor film 108; A conductive film 112b electrically connected to the oxide semiconductor film 108, the oxide semiconductor film 108, the conductive film 11 The insulating films 114 and 116 on the insulating films 112a and 112b, and the oxide semiconductor film 12 on the insulating film 116 0a, and an insulating film 116 and an insulating film 118 over the oxide semiconductor film 120a.

[0043] As shown in FIG. 1B, the transistor 100 has an insulating film 15 on an insulating film 118. 6 may also be included.

[0044] Note that in the transistor 100, the insulating films 106 and 107 The insulating films 114 and 116 function as a first gate insulating film. The insulating film 118 serves as a second gate insulating film for protecting the transistor 100. In this specification and the like, the insulating films 106 and 107 are the insulating film 114 and 116 as a second insulating film, the insulating film 118 as a third insulating film, In the transistor 100, the conductive film 104 may be referred to as a first The oxide semiconductor film 120a functions as a first gate electrode, and the oxide semiconductor film 120b functions as a second gate electrode. The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a , which functions as a drain electrode.

[0045] The oxide semiconductor film 108 includes an oxide semiconductor film 108a and an oxide semiconductor film 108b. The oxide semiconductor film 108a and the oxide semiconductor film 108b are The conductive film 108b is made of In, M (M is Al, Ga, Y, or Sn), Zn, and , has.

[0046] For example, in the oxide semiconductor film 108a, a region in which the atomic ratio of In is larger than the atomic ratio of M is The oxide semiconductor film 108b preferably has a region It is preferable to have a region in which the atomic ratio of In is smaller than that of a.

[0047] The oxide semiconductor film 108a has a region in which the atomic ratio of In is higher than the atomic ratio of M. The field effect mobility (sometimes simply referred to as mobility, or μFE) of the transistor 100 is Specifically, the field effect mobility of the transistor 100 can be increased by 10c m 2 / Vs, and more preferably the field effect mobility of the transistor 100 is greater than 30 cm 2 / Vs can be exceeded.

[0048] For example, the above-mentioned high field effect mobility transistor is used in a driving circuit section of a display device, particularly in a gate A gate driver that generates a gate signal or a source driver that supplies a data signal (especially a demultiplexer connected to the output terminal of the shift register of the source driver) By using the above, a semiconductor device or display device having a narrow frame width (also called a narrow frame) can be provided. It is possible.

[0049] On the other hand, the oxide semiconductor film 108a has a region in which the atomic ratio of In is larger than the atomic ratio of M. In this case, the electrical characteristics of the transistor 100 are likely to vary when exposed to light. In the semiconductor device of one embodiment of the present invention, an oxide semiconductor film 108a is The oxide semiconductor film 108b is formed on the oxide semiconductor film 108a. Since the oxide semiconductor film 108a has a region in which the atomic ratio of In is smaller than that of the oxide semiconductor film 108b, the oxide semiconductor film 108a has a lower Eg than the oxide semiconductor film 108a. Therefore, the stack of the oxide semiconductor film 108a and the oxide semiconductor film 108b The oxide semiconductor film 108 having the structure has an improved resistance to a negative bias stress test using light. This becomes possible.

[0050] In addition, the oxide semiconductor film 108, particularly the channel region of the oxide semiconductor film 108a, Impurities such as hydrogen and moisture are problematic because they affect transistor characteristics. Therefore, in the channel region of the oxide semiconductor film 108a, hydrogen, moisture, and the like are The fewer the impurities, the more preferable. The oxygen vacancies that occur in the oxide semiconductor layer affect the transistor characteristics, which is a problem. When oxygen vacancies are formed in the channel region of the membrane 108a, hydrogen bonds to the oxygen vacancies, A carrier supply source is generated in the channel region of the oxide semiconductor film 108a. When the oxide semiconductor film 108a is formed, the electric characteristics of the transistor 100 including the oxide semiconductor film 108a are changed and replaced. Generally speaking, a shift in the threshold voltage occurs. In the hole region, the fewer the oxygen deficiencies, the more preferable.

[0051] In the transistor 100 of the present invention, the insulating films 107, 114, and 116 are not formed of oxygen or Excess oxygen is added, and the oxygen or the excess oxygen fills the oxygen vacancies in the oxide semiconductor film 108a. In this way, a highly reliable semiconductor device can be realized.

[0052] [Example of the second transistor configuration] The transistor 150 includes a channel region 120b_i on the insulating film 116, a source region 12 The oxide semiconductor film 120b includes a channel region 120b_s and a drain region 120b_d. The insulating film 152 on the region 120b_i, the conductive film 154 on the insulating film 152, and the source region 12 0b_s, and an insulating film 118 on the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. The insulating films 118 and 156 are also provided with a source region An opening 171a reaching the drain region 120b_s and an opening 17 1b is provided on the insulating film 156 so as to cover the openings 171a and 171b. Conductive membranes 158a, 158b are provided.

[0053] In the transistor 150, the insulating film 152 functions as a gate insulating film. In the transistor 150, the conductive film 154 functions as a gate electrode. Note that the insulating film 152 may be referred to as a fourth insulating film.

[0054] In this manner, the semiconductor device according to one embodiment of the present invention includes transistors having at least two structures. One of the transistors is a bottom-gate transistor, as shown in transistor 100. A dual-gate transistor having a back gate electrode, is a top-gate transistor such as transistor 150.

[0055] Note that the oxide semiconductor film 120a of the transistor 100 and the transistor 150 The oxide semiconductor film 120b is formed by processing the same oxide semiconductor film. That is, in the transistor 100, the oxide semiconductor film 120a is a back gate electrode. In the transistor 150, the oxide semiconductor film 120b functions as an active electrode. Therefore, the transistor 100 and the transistor 150 have a function as a conductive layer. By sharing some of the manufacturing processes, transistors with different structures can be provided on the same substrate. This becomes possible.

[0056] By providing transistors with different structures on the same substrate, the degree of integration of a semiconductor device can be increased. Alternatively, by providing transistors with different structures on the same substrate, Each transistor can have a different function. For example, transistors with different structures can be When a semiconductor device having a transistor is used in a display device, one of the transistors (e.g., The transistor 100 is used in the driving circuit section, and the other transistor (for example, transistor 150 ) can be used for the transistor in the pixel portion.

[0057] In FIG. 1, the channel length direction of the transistor 100 and the channel length direction of the transistor 150 The channel length direction of the transistor 100 is the same as that of the transistor 100. The length direction and the channel length direction of the transistor 150 may be different from each other. For example, the channel length direction of the transistor 100 and the channel length direction of the transistor 150 and may be configured to be orthogonal to each other.

[0058] In the transistor 100, an insulating film in contact with the oxide semiconductor film 108, specifically, The insulating film 107 and the oxide semiconductor film 108 are formed below the oxide semiconductor film 108. The insulating film 114 formed above the insulating film 107 contains excess oxygen. By transferring oxygen or excess oxygen from the insulating film 114 to the oxide semiconductor film 108, Therefore, it is possible to reduce oxygen vacancies in the oxide semiconductor film 108. It is possible to suppress the fluctuation of the electrical characteristics of the transistor 100, particularly the fluctuation of the transistor 100 due to light irradiation. become.

[0059] In the transistor 150, an insulating film in contact with the oxide semiconductor film 120b, specifically, Specifically, the insulating film 116 formed under the oxide semiconductor film 120b and the oxide semiconductor film The insulating film 152 formed above the insulating film 120b contains excess oxygen. 6, and oxygen or excess oxygen is transported from the insulating film 152 to the channel region 120b_i. This makes it possible to reduce oxygen vacancies in the channel region 120b_i. In order to suppress the electrical characteristics of the transistor 150, particularly the fluctuation of the transistor 150 due to light irradiation, It is possible.

[0060] In the transistor 100, the oxide semiconductor film 120a is in contact with the insulating film 118. In the transistor 150, the source region 120b_s and the drain region 1 The oxide semiconductor film 120a and the source region 120b_d are in contact with the insulating film 118. s and the drain region 120b_d are in contact with the insulating film 118, Hydrogen contained in the film 118 diffuses into the oxide semiconductor film, and the carrier density of the oxide semiconductor film is increased. That is, the oxide semiconductor film 120a, the source region 120b, s, the drain region 120b_d is made of an oxide conductor (OC). It functions as a stimulant (also called r).

[0061] Here, the oxide conductor will be described. The oxide semiconductor films 120a and 120b are insulating films. Before the step of forming the film 118, the insulating film 118 is formed. After the step of forming the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_s, The drain region 120b_d functions as a conductor.

[0062] The oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d are In order to make the oxide semiconductor film 120a function as a conductor, and forming an oxygen vacancy in the drain region 120b_d, and transferring hydrogen from the insulating film 118 to the oxygen vacancy. When the oxide semiconductor film 120 is doped with ZnO, a donor level is formed near the conduction band. a, the source region 120b_s, and the drain region 120b_d become highly conductive. The oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_s are made conductive. The in-regions 120b_d can each be referred to as an oxide conductor.

[0063] In this embodiment, the oxide semiconductor film 120a, the source region 120b_s, Also, the configuration in which hydrogen is added to the drain region 120b_d from the insulating film 118 is illustrated. However, the present invention is not limited to this. For example, the oxide semiconductor film 120a, the source region 120b_s, The drain region 120b_d may be doped with other impurities to form an oxide conductor. Impurities include, for example, boron, carbon, nitrogen, fluorine, phosphorus, chlorine, helium, and neon. , argon, krypton, and xenon. For example, it can be added by ion doping or plasma treatment. .

[0064] In general, oxide semiconductors have a large energy gap and are therefore transparent to visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. Therefore, the effect of absorption due to donor levels is small in oxide conductors, and they are oxidative to visible light. It has the same level of light transmittance as nitride semiconductors.

[0065] In addition, since the channel region 120b_i is covered with the insulating film 152, the insulating film 118 Therefore, the channel region 120b_i functions as a semiconductor.

[0066] In this manner, the oxide semiconductor film 1 functions as the second gate electrode of the transistor 100. 20a, a channel region 120b_i of a transistor 150, a source region 120b_s of a transistor 150, The drain region 120b_d is formed by processing the same oxide semiconductor film, and the oxide semiconductor This can be achieved by changing the composition of the insulating film that contacts the body membrane.

[0067] In one embodiment of the present invention, the insulating film 107 and the insulating films 114 and 116 are treated with excess acid. In order to incorporate the element, there is no increase in the manufacturing process or the increase in the manufacturing process is very small. Therefore, the productivity of the transistors 100 and 150 can be increased. be.

[0068] Specifically, a sputtering method is used in the step of forming the oxide semiconductor film 108a. In addition, the oxide semiconductor film 108a is formed in an atmosphere containing oxygen gas. Oxygen or excess oxygen is added to the insulating film 107, which is to be the surface on which the film 108a is to be formed.

[0069] In addition, in the step of forming the oxide semiconductor films 120a and 120b, a sputtering method The oxide semiconductor films 120a and 120b are formed in an atmosphere containing oxygen gas using The insulating film 116, which is a surface on which the oxide semiconductor films 120a and 120b are to be formed, is When oxygen or excess oxygen is added to the insulating film 116, The insulating film 114 and the oxide semiconductor film 108 located below the insulating film 6 also contain oxygen or excess oxygen. May be added.

[0070] As described above, the semiconductor device according to one embodiment of the present invention has transistors having two structures over the same substrate. an oxide semiconductor film serving as a back gate electrode of one of the transistors; The oxide semiconductor film serving as an active layer of the other transistor is the same as the oxide semiconductor film By processing the material, it is possible to suppress an increase in the number of manufacturing steps.

[0071] <1-2. Components of Semiconductor Device> The components included in the semiconductor device of this embodiment will be described in detail below.

[0072] [substrate] There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 102. Also, a material such as silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to use a substrate, an SOI substrate, or the like, on which a semiconductor element is provided. The substrate 102 may be a glass substrate. If you have 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large-area substrates such as 10th generation (2950mm x 3400mm), Larger display devices can be manufactured.

[0073] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer is preferably removed from the substrate 102 after a semiconductor device is partially or entirely completed thereon. The transistor 100 can be separated and used for transfer to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0074] [Conductive film functioning as gate electrode, source electrode, and drain electrode] A conductive film 104 functions as a gate electrode, a conductive film 112a functions as a source electrode, A conductive film 112b functions as a drain electrode, and a conductive film 158a functions as a source electrode. The conductive film 158b functioning as the drain electrode is made of chromium (Cr), copper (Cu ), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo ), Tantalum (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Ni A metal element selected from nickel (Ni), iron (Fe), and cobalt (Co), or the above-mentioned gold The alloys are made of metal elements or alloys combining the above-mentioned metal elements. It can be achieved.

[0075] The conductive films 104, 112a, 112b, 158a, and 158b may have a single-layer structure or a double-layer structure. For example, a single layer structure of an aluminum film containing silicon, Two-layer structure with aluminum film laminated on tungsten film, and aluminum film laminated on tungsten film A two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a titanium film, A three-layer structure of an aluminum film and a titanium film on the aluminum film, a titanium film, and the titanium A three-layer structure of a copper film on a titanium film on the copper film and a three-layer structure of a titanium film on the copper film are also included. Titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium Alternatively, an alloy film made by combining one or more of the above metals or a nitride film may be used.

[0076] The conductive films 104, 112a, 112b, 158a, and 158b are made of indium tin oxide. Indium oxide with tungsten oxide, indium oxide with tungsten oxide Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material may also be applied.

[0077] The conductive films 104, 112a, 112b, 158a, and 158b are made of a Cu-X alloy film. (X may be Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti). By using Cu-X alloy film, the manufacturing cost can be reduced because it can be processed by wet etching process. This will make it possible to suppress strikes.

[0078] [First gate insulating film] The insulating films 106 and 107 functioning as the gate insulating film of the transistor 100 are Plasma Enhanced Chemical Vapor Deposition (PECVD) Silicon oxide is deposited by vapor deposition, sputtering, etc. silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film , hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide Tantalum film, magnesium oxide film, lanthanum oxide film, cerium oxide film and neodymium oxide film Each of the insulating films 106 and 107 can be an insulating layer including one or more films. A single-layer insulating film selected from the above materials, or an insulating film having three or more layers, without using a laminated structure. may also be used.

[0079] The insulating film 106 also functions as a blocking film that suppresses oxygen permeation. For example, the insulating films 107, 114, and 116 and / or the oxide semiconductor film 108 may contain an excess of acid. When oxygen is supplied, the insulating film 106 can suppress oxygen permeation.

[0080] Note that the oxide semiconductor film 108 functioning as a channel region of the transistor 100 The insulating film 107 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 1 has a region containing oxygen (an oxygen excess region). The insulating film 107 is capable of releasing oxygen. In order to provide the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Oxygen may be added to the insulating film 107 later.

[0081] When hafnium oxide is used as the insulating film 107, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to the case where silicon oxide is used, the thickness of the insulating film 107 can be made larger, so that the tunnel This reduces the leakage current caused by the current. Furthermore, hafnium oxide, which has a crystalline structure, can be used to realize an amorphous structure. It has a higher relative dielectric constant than hafnium oxide, which has a low off-current. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic. The types are not limited to these.

[0082] In this embodiment, a silicon nitride film is formed as the insulating film 106, and the insulating film 107 is The silicon oxide film is formed as a result of the above. The silicon nitride film has a lower dielectric constant than the silicon oxide film. The film thickness required to obtain the same capacitance as a silicon oxide film is large, so it is suitable for transistors. The gate insulating film of the transistor 150 is made physically thick by including a silicon nitride film. Therefore, the decrease in the dielectric strength of the transistor 100 can be suppressed, and the dielectric strength can be improved. The edge breakdown voltage can be improved and electrostatic breakdown of the transistor 100 can be suppressed.

[0083] [First oxide semiconductor film] For the oxide semiconductor film 108, the above-mentioned materials can be used.

[0084] When the oxide semiconductor film 108a is an In-M-Zn oxide, the In-M-Zn oxide is formed. The atomic ratio of the metal elements in the sputtering target used for this purpose satisfies In>M. It is preferable that the atomic ratio of the metal elements in such a sputtering target is I n:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4 .1 etc.

[0085] In addition, when the oxide semiconductor film 108b is an In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to deposit the film is In≦M. It is preferable that the atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn= 1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, etc. do.

[0086] The oxide semiconductor film 108a and the oxide semiconductor film 108b are made of In-M-Zn oxide. In this case, the sputtering target is a target containing polycrystalline In-M-Zn oxide. It is preferable to use a target containing polycrystalline In-M-Zn oxide. Therefore, the oxide semiconductor films 108a and 108b having crystallinity can be easily formed. Note that the atomic ratio of the oxide semiconductor film 108a to the oxide semiconductor film 108b to be formed is are the atomic ratios of the metal elements contained in the sputtering target. For example, the sputtering of the oxide semiconductor film 108a may vary by about 40%. When the atomic ratio of In:Ga:Zn=4:2:4.1 is used as the target, the film is formed. The atomic ratio of the oxide semiconductor film 108a to be formed is approximately In:Ga:Zn=4:2:3. There are cases.

[0087] The oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2. The energy gap is preferably 5 eV or more, and more preferably 3 eV or more. The off-state current of the transistor 100 can be reduced by using the oxide semiconductor film 108a. In particular, the oxide semiconductor film 108a preferably has an energy gap of 2 eV or more. Preferably, an oxide semiconductor film having a conductivity of 2 eV to 3.0 eV is used as the oxide semiconductor film 108b. When an oxide semiconductor film having an energy gap of 2.5 eV or more and 3.5 eV or less is used, In addition, the oxide semiconductor film 108b has a higher energy density than the oxide semiconductor film 108a. A larger gap is preferred.

[0088] The oxide semiconductor films 108a and 108b each have a thickness of 3n m or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 200 nm or less. More than 50nm.

[0089] In addition, an oxide semiconductor film with low carrier density is used as the oxide semiconductor film 108a. For example, the oxide semiconductor film 108a has a carrier density of 1×10 17 pieces / cm 3 Below, good Preferably 1×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 below, More preferably, 1×10 11 pieces / cm 3 The following applies.

[0090] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the oxide semiconductor film 108a and the oxide semiconductor The carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, and interatomic It is preferable to set the distance, density, etc. appropriately.

[0091] Note that the oxide semiconductor films 108a and 108b each contain impurities. By using an oxide semiconductor film with a low concentration of dopants and a low density of defect states, it is possible to obtain even better electrical properties. In this embodiment, the impurity concentration is low, and A low density of defect levels (low oxygen vacancies) is called high purity intrinsic or substantially high purity intrinsic. Alternatively, they are called true or substantially true. High purity true or substantially high purity true Since the oxide semiconductor film has a small number of carrier generation sources, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be It is rare for the electrical characteristics to become negative at low voltages (also known as normally-on). In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. In addition, the trap density may be low because of the low purity intrinsic or substantially high purity. The intrinsic oxide semiconductor film has a significantly small off-state current and a channel width of 1×10 6 μm Even if the channel length L of the element is 10 μm, the voltage between the source electrode and the drain electrode (drain The off-state current is measured at a voltage between 1V and 10V. below the measurement limit, i.e. 1×10 -13 It is possible to obtain a characteristic of A or less.

[0092] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film is provided with a channel. The transistors in which the regions are formed have small variations in electrical characteristics and are highly reliable. Note that charges trapped in the trap states of the oxide semiconductor film are dissipated. It takes a long time for the charge to reach a certain level, and it can behave as if it were a fixed charge. A transistor in which a channel region is formed in an oxide semiconductor film with a high density of trap states has a high current density. Impurities include hydrogen, nitrogen, alkali metals, or Alkaline earth metals, etc.

[0093] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In this case, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. It can combine with oxygen, which combines with metal atoms, to generate electrons, which are carriers. A transistor using an oxide semiconductor film containing hydrogen has normally-on characteristics. For this reason, it is preferable that the amount of hydrogen in the oxide semiconductor film 108 be reduced as much as possible. Specifically, in the oxide semiconductor film 108, a hydrogen concentration obtained by SIMS analysis is Degrees, 2 x 10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than or equal to 5×1, more preferably 0 17 atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 below Let us assume that.

[0094] In addition, the oxide semiconductor film 108a has a region with a lower hydrogen concentration than the oxide semiconductor film 108b. It is preferable that the oxide semiconductor film 108a has a larger thickness than the oxide semiconductor film 108b. By having a region with a low hydrogen concentration, a highly reliable semiconductor device can be obtained.

[0095] In addition, silicon and carbon, which are Group 14 elements, are contained in the oxide semiconductor film 108a. If the oxide semiconductor film 108a contains oxygen, oxygen vacancies are increased in the oxide semiconductor film 108a, causing the oxide semiconductor film 108a to become n-type. Therefore, the concentrations of silicon and carbon in the oxide semiconductor film 108a and the oxide semiconductor film 10 The concentration of silicon and carbon near the interface with 8b (concentration obtained by SIMS analysis) is 2× 10 18atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0096] In addition, in the oxide semiconductor film 108a, the alkali metal or or alkaline earth metal concentration, 1×10 18 atoms / cm 3 Below, preferably 2x 10 16 atoms / cm 3 The following are the oxides of alkali metals and alkaline earth metals. When it bonds with a semiconductor, carriers may be generated, increasing the off-state current of the transistor. For this reason, the oxide semiconductor film 108a may be It is preferable to reduce the concentration of metalloids.

[0097] When the oxide semiconductor film 108a contains nitrogen, electrons that serve as carriers are generated. The carrier density increases and the oxide semiconductor film containing nitrogen is easily converted to n-type. A transistor using the oxide semiconductor film tends to be normally on. In the present invention, it is preferable that the nitrogen content is reduced as much as possible. For example, it is preferable that the nitrogen content is reduced as much as possible by SIMS analysis. The resulting nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0098] The oxide semiconductor film 108a and the oxide semiconductor film 108b each have a non-single crystal structure. The non-single crystal structure may be, for example, CAAC-OS (C Axis Alias) which will be described later. gned Crystalline Oxide Semiconductor), polyconductor The non-single crystalline structure includes a crystalline structure, a microcrystalline structure, or an amorphous structure. In the non-single crystalline structure, the amorphous structure is the most The defect state density of CAAC-OS is the lowest.

[0099] [Second gate insulating film] The insulating films 114 and 116 function as a second gate insulating film of the transistor 100 . The insulating films 114 and 116 function as base insulating films for the transistor 150. The insulating films 114 and 116 have a function of supplying oxygen to the oxide semiconductor films 108 and 120b. That is, the insulating films 114 and 116 contain oxygen. The insulating film 114 is an insulating film through which light can pass. The insulating film 104 also functions as a film for reducing damage to the oxide semiconductor film 108 when the insulating film 104 is formed.

[0100] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm. Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0101] In addition, it is preferable that the insulating film 114 has a small amount of defects. Typically, the insulating film 114 has a small amount of defects as determined by ESR measurement. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3×10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 114 will The amount of transmission of the light is reduced.

[0102] In the insulating film 114, all of the oxygen that has entered the insulating film 114 from the outside is Some oxygen does not move to the outside of the insulating film 114 and remains in the insulating film 114. At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, In some cases, oxygen may move through the film 114. When the oxide insulating film capable of forming the insulating film 116 is formed over the insulating film 114, The desorbed oxygen can be transferred to the oxide semiconductor film 108 through the insulating film 114. .

[0103] The insulating film 114 is formed using an oxide insulating film having a low density of states caused by nitrogen oxides. Note that the density of states due to the nitrogen oxides can be determined by the valence Energy of the upper edge of the electronic band (Ev_os) and the lower edge of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the gate electrodes of the SiO_O_2 layer and the gate electrodes of the SiO_O_2 layer. Silicon oxynitride film with low emission or aluminum oxynitride film with low emission of nitrogen oxide For example, a tungsten film or the like can be used.

[0104] In addition, the silicon oxynitride film, which emits a small amount of nitrogen oxide, is This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. The amount of emission is 1×10 18 pieces / cm 3 5×10 or more 19 pieces / cm 3 The following is the case. The amount of monia released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or higher and 55°C or lower. This is the amount released by heating at 0℃ or below.

[0105] Nitrogen oxides (NO x (x is 1 or 2), typically NO2 or NO is an insulating film 11 4, etc., in the energy gap of the oxide semiconductor film 108. Therefore, nitrogen oxides are diffused to the interface between the insulating film 114 and the oxide semiconductor film 108. When the level is dispersed, the level may trap electrons on the insulating film 114 side. The trapped electrons remain in the vicinity of the interface between the insulating film 114 and the oxide semiconductor film 108. , the threshold voltage of the transistor is shifted in the positive direction.

[0106] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 116 reacts with ammonia contained in the insulating film 116 during the heat treatment. Therefore, the amount of nitrogen oxide contained in the insulating film 114 is reduced. Electrons are less likely to be trapped at the interface between the oxide semiconductor film 106 and the oxide semiconductor film 108.

[0107] By using the oxide insulating film as the insulating film 114, the threshold voltage of the transistor It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0108] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher and lower than 350° C. By the heat treatment, the insulating film 114 shows the following characteristics in the spectrum obtained by ESR measurement at 100K or less: The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 to 2.002. A second signal with a g value of .003 or less and a third signal with a g value between 1.964 and 1.966, inclusive. A null is observed. Note that the split width of the first signal and the second signal, The split width of the second and third signals is about 5 in the X-band ESR measurement. mT. The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966 The sum of the spin densities of the third signals is 1 × 10 18 spins / cm 3 Less than Generally speaking, it is 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 Less than do.

[0109] The first, second and third signals are the signals caused by nitrogen oxides. That is, it gives a first signal, a second signal, and a third signal. The smaller the total spin density, the smaller the nitrogen oxide content in the oxide insulating film. It can be said that.

[0110] The nitrogen concentration of the oxide insulating film measured by SIMS is 6×10 20 atoms / cm 3 The following is the result.

[0111] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. By forming the oxide insulating film by the VD method, a dense and hard film can be obtained. It can be formed.

[0112] The insulating film 116 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is formed using When heated, some of the oxygen is released. The oxygen content is greater than the stoichiometric composition. The oxide insulating film is formed at temperatures between 100°C and 700°C or between 100°C and 500°C. TDS analysis showed that the amount of oxygen released was 1.0 x 1019 atoms / c m 3 or more, or 3.0×10 20 atoms / cm 3 The oxide insulating film is .

[0113] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or less can be used.

[0114] In addition, it is preferable that the insulating film 116 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5 x 10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the insulating film 116 is preferably an oxide semiconductor compared to the insulating film 114. Since it is separated from the insulating film 108, it may have a higher defect density than the insulating film 114.

[0115] In addition, the insulating films 114 and 116 can be made of the same material, so that the insulating films In some cases, the interface between the film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a dashed line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. For example, the insulating film 114 may have a single-layer structure without being limited thereto.

[0116] [Second Oxide Semiconductor Film and Third Oxide Semiconductor Film] The oxide semiconductor film 120a and the oxide semiconductor film 120b may be formed of the above-described oxide semiconductor. The conductive film 108 can be formed using the same material and the same manufacturing method as the conductive film 108 .

[0117] That is, the oxide semiconductor film 120a and the oxide semiconductor film 120b are For example, the oxide semiconductor film 108 and the oxide semiconductor film The oxide semiconductor film 120a and the oxide semiconductor film 120b contain the same metal element. This makes it possible to reduce manufacturing costs.

[0118] For example, the oxide semiconductor film 120a and the oxide semiconductor film 120b may be formed using In-M- In the case of Zn oxide, the sputtering target used to deposit the In-M-Zn oxide film is The atomic ratio of the metal elements in the sputtering layer preferably satisfies In≧M. The atomic ratio of the metal elements in the target was In:M:Zn=2:1:3, In:M: Examples include Zn=3:1:2 and In:M:Zn=4:2:4.1.

[0119] The oxide semiconductor film 120a and the oxide semiconductor film 120b have a single-layer structure. The oxide semiconductor films 120a and 120b may have a stacked structure of two or more layers. When 0b has a laminated structure, the composition of the sputtering target is not limited to the above. In the case where the oxide semiconductor films 120a and 120b have a stacked structure, The oxide semiconductor film 108 may have a structure similar to that of the oxide semiconductor film 108 (for example, the oxide semiconductor film 108a and the oxide semiconductor film The oxide semiconductor film 108a may be stacked on the oxide semiconductor film 108b. In the case where the semiconductor films 120a and 120b have a laminated structure, the oxide semiconductor film 108b and A stacked structure of the oxide semiconductor film 108a over the oxide semiconductor film 108b may be used.

[0120] [Insulating film that functions as a protective insulating film for transistors] The insulating film 118 functions as a protective insulating film for the transistor 100. 8 indicates a source region 120b_s and a drain region 120b_d of the transistor 150; , and a function of supplying impurities to the source region 120b_s and the drain region 120b_d. Possesses the ability.

[0121] For example, the insulating film 118 contains either hydrogen or nitrogen, or both. The insulating film 118 contains nitrogen and silicon. The insulating film 118 also contains oxygen, hydrogen, water, It has a function of blocking alkali metals, alkaline earth metals, etc. By providing the insulating films 114 and 11, oxygen from the oxide semiconductor film 108 can be diffused to the outside. Diffusion of oxygen contained in the oxide semiconductor film 106 to the outside and intrusion of hydrogen, water, and the like from the outside into the oxide semiconductor film 108 This can prevent the intrusion of the signal.

[0122] The insulating film 118 covers the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_s. The in-region 120b_d has a function of supplying either hydrogen or nitrogen or both. In particular, the insulating film 118 contains hydrogen, and the hydrogen is removed from the oxide semiconductor film 120a and the SiO 2 film. It is preferable that the source region 120b_s and the drain region 120b_d have a function of supplying the The insulating film 118, the oxide semiconductor film 120a, the source region 120b_s, and the drain region By supplying hydrogen to the oxide semiconductor film 120a and the source region 120b_d, b_s and the drain region 120b_d function as electrical conductors.

[0123] The insulating film 118 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. etc.

[0124] Note that the various films described above, such as the conductive film, the insulating film, and the oxide semiconductor film, are formed by sputtering. It can be formed by the CVD method or PECVD method, but other methods such as thermal CVD (Ch Alternatively, the insulating layer may be formed by thermal CVD. As an example of the method, MOCVD (Metal Organic Chemical Vapor Deposition) Deposition method and ALD (Atomic Layer Deposition) method n) method may also be used.

[0125] Thermal CVD is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no additional steps are required.

[0126] In the thermal CVD method, the source gas and the oxidizing agent are fed into the chamber at the same time, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the reactants near or on the substrate under reduced pressure and depositing the reactants on the substrate. You may go.

[0127] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The film is formed by repeatedly introducing the gas into the chamber and reacting it. A reactive gas (such as argon or nitrogen) may be introduced as a carrier gas. For example, two types of At least one type of source gas may be supplied to the chamber in sequence. In order to avoid this, after the reaction of the first raw material gas, an inert gas is introduced, and then the second raw material gas is introduced. Alternatively, instead of introducing an inert gas, the first source gas is exhausted by evacuation. After that, a second source gas may be introduced. The first source gas is adsorbed and reacted with the surface of the substrate. The first layer is formed by the first gas, and the second source gas introduced later is adsorbed and reacted with the first gas, forming the second layer. The order of gas introduction is controlled to obtain a desired thickness. By repeating this process several times until the thin film is completely removed, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times the gas is introduced, allowing precise adjustment of the film thickness. This is possible and is suitable for fabricating miniaturized FETs.

[0128] Thermal CVD methods such as MOCVD can be used to form the conductive film, insulating film, oxide semiconductor film, It is possible to form various films such as metal oxide films. For example, an In-Ga-Zn-O film can be formed. In the case of film formation, trimethylindium (In(CH3)3) and trimethylgallium (G zinc(CH3)3), and dimethylzinc (Zn(CH3)2). , but is not limited to these combinations, and triethylgallium ( Ga(C2H5)3) can also be used, and diethyl zinc (Zn( C2H5)2) can also be used.

[0129] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and liquids containing hafnium precursors (hafnium alkoxides and tetrakisdimethylamide Hafnium (TDMAH, Hf[N(CH3)2]4) and tetrakis(ethylmethylamine) C) Hafnium amide (e.g. hafnium) is vaporized as a raw material gas, and ozone is used as an oxidizer. Two types of gases are used:

[0130] For example, when forming an aluminum oxide film using an ALD deposition system, A liquid containing a catalyst and an aluminum precursor (trimethylaluminum (TMA, Al(CH3) 3) and other) are used as the raw material gas and as the oxidizing agent, H2O. The materials used are tris(dimethylamido)aluminum, triisobutylaluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate) There are some.

[0131] For example, when forming a silicon oxide film using a deposition system that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, the chlorine contained in the adsorbed matter is removed, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0132] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film is formed by sequentially introducing B2H6 gas and WF6 gas. The tungsten film is formed using H2 gas. Note that SiH4 gas is used instead of B2H6 gas. A suction cup may also be used.

[0133] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Z The ZnO layer is formed using n(CH3)2 gas and O3 gas. The order of these layers is The present invention is not limited to this example. In addition, In-Ga-O layers and In-Zn-O layers can be formed by using these gases. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. Alternatively, HO gas obtained by bubbling with an inert gas such as HO may be used. It is preferable to use three gases.

[0134] <1-3. Configuration example 2 of semiconductor device> Next, regarding configurations different from those shown in Figs. 1(A)(B) and 2(A)(B), 3 to 10.

[0135] FIG. 3A illustrates a transistor 100A, which is a semiconductor device of one embodiment of the present invention, and a transistor 3B is a top view of the transistor 150, and FIG. 3B is a top view of the transistor 150 between the dashed dotted line X1-X2 shown in FIG. FIG. 4 corresponds to a cross-sectional view of the cut surface at the dashed line Y1-Y in FIG. FIG. 5A is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. 5B is a top view of the device, transistor 100B, and transistor 150. ) corresponds to a cross-sectional view taken along the dashed line X1-X2 in FIG. 6 corresponds to a cross-sectional view taken along dashed line Y1-Y2 in FIG. 5(A).

[0136] FIG. 9A illustrates a transistor 100C, which is a semiconductor device of one embodiment of the present invention, and 9(A) and a top view of the transistor 150. FIG. 9(B) is a top view of the transistor 150 along the dashed line X1- FIG. 10(A) corresponds to a cross-sectional view of the cut surface taken along the line X2. FIG. 10(B) corresponds to a cross-sectional view taken along the dashed line Y1-Y2 shown in FIG. This corresponds to a cross-sectional view taken along dashed dotted line Y3-Y4.

[0137] The semiconductor device shown in FIGS. 3(A) and 3(B) and FIG. 4 is a semiconductor device shown in FIGS. 1(A) and 1(B) and FIG. A transistor 100A is used instead of the transistor 100 of the semiconductor device shown in FIG. The semiconductor device shown in FIG. 5A, FIG. 5B, and FIG. Instead of the transistor 100 included in the semiconductor device illustrated in FIGS. The transistor 100B is included. In addition, FIGS. 9(A) and 9(B) and FIG. The semiconductor device shown in FIG. 1(B) is the semiconductor device shown in FIG. 1(A)(B) and FIG. 2(A)(B). 1 has a configuration in which a transistor 100C is included instead of the transistor 100 included in the semiconductor device 100.

[0138] Therefore, the description of the transistor 150 described above will be omitted. The details of the transistors 100A, 100B, and 100C will now be described. do.

[0139] [Configuration example of the first transistor (variation 1)] The transistor 100A is the same as the transistor 100 shown above except that an opening 132 is provided. The other configuration is the same as that of the transistor 100, and the same effect is obtained. The following describes the configurations that are different from the transistor 100.

[0140] As shown in FIG. 3A and FIG. 4, an oxide semiconductor film serving as a second gate electrode 120a is an opening 132 provided in the insulating films 106, 107, 114, and 116. 1, is connected to the conductive film 104 which functions as the first gate electrode. The same potential is applied to the oxide semiconductor film 120a.

[0141] In this embodiment, the opening 132 is provided, and the conductive film 104 and the oxide semiconductor film 120a is connected to the opening 1. Alternatively, a plurality of the electrodes 32 may be formed to connect the conductive film 104 and the oxide semiconductor film 120a. Note that the transistor 100 shown in FIGS. In the case where the conductive film 104 and the oxide semiconductor film 120a are not connected to each other, 1 and the oxide semiconductor film 120a can be applied with different potentials.

[0142] As shown in FIG. 3B, the oxide semiconductor film 108 functions as a first gate electrode. The conductive film 104 functions as a second gate electrode, and the oxide semiconductor film 120a functions as a second gate electrode. The second gate electrode is sandwiched between two films that function as gate electrodes. The length in the channel length direction of the oxide semiconductor film 120a functioning as the gate electrode of the The length in the channel width direction is the length in the channel length direction of the oxide semiconductor film 108 and the The length of the insulating film 114 and the length of the insulating film 115 are longer than the length of the insulating film 116. 6. The oxide semiconductor film 120a and the The conductive film 104 is formed in an opening 132 in the insulating films 106, 107, 114, and 116. Therefore, the side surface of the oxide semiconductor film 108 extending in the channel width direction is The semiconductor film 120a faces the semiconductor film 120a.

[0143] In other words, the conductive film 104 and the oxide semiconductor film 120a are The insulating films 106 and 10 The oxide semiconductor film 108 is surrounded by the insulating layers 7, 114, and 116.

[0144] With such a structure, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 104 functioning as a first gate electrode and a conductive film 105 functioning as a second gate electrode. The transistor 10 can be electrically surrounded by the electric field of the oxide semiconductor film 120a. 0A, the electric field of the first gate electrode and the second gate electrode causes the channel region The device structure of the transistor that electrically surrounds the oxide semiconductor film to be formed is called Surrou. This can be called a nded channel (S-channel) structure.

[0145] Since the transistor 100A has an S-channel structure, the first gate electrode and The conductive film 104 functions as an oxide semiconductor to effectively generate an electric field for inducing a channel. Since the voltage can be applied to the conductive film 108, the current driving capability of the transistor 100A is improved. This makes it possible to obtain high on-current characteristics. Therefore, it is possible to miniaturize the transistor 100A. 00A is a conductive film 104 functioning as a first gate electrode and a conductive film 105 functioning as a second gate electrode. Since the transistor 100 has a structure in which the oxide semiconductor film 120a is surrounded by the The mechanical strength of A can be increased.

[0146] [Configuration example of the first transistor (variation 2)] The transistor 100B has a structure similar to that of the transistor 100 described above, except that the oxide semiconductor film 108 is not included. The other configurations are the same as those of the transistor 100, and the same effects are achieved. The following describes the configurations that are different from the transistor 100.

[0147] The transistor 100B is a transistor in which the oxide semiconductor film 108 of the transistor 100 is replaced with a three-layer More specifically, the transistor 100B has an oxide semiconductor film 1 08 shows an oxide semiconductor film 108c on the insulating film 107 and an oxide semiconductor film 108c on the oxide semiconductor film 108c. The oxide semiconductor film 108a is an oxide semiconductor film 108b on the oxide semiconductor film 108a. do.

[0148] Here, the band structure of the insulating film in contact with the oxide semiconductor films 108a, 108b, and 108c is 7, the band structure of the insulating film in contact with the oxide semiconductor films 108a and 108b is I will explain this in more detail.

[0149] FIG. 7A illustrates an insulating film 107, oxide semiconductor films 108a, 108b, and 108c, and an insulating FIG. 7B is an example of a band structure in the thickness direction of a laminated structure having an insulating film 114. a stacked structure including an insulating film 107, oxide semiconductor films 108a and 108b, and an insulating film 114. The band structure is shown in FIG. 1 in the thickness direction of the structure. The conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, and 108c, and the insulating film 114 The lowest energy level (Ec) is shown.

[0150] FIG. 7A shows a case where a silicon oxide film is used as the insulating films 107 and 114, and an oxide semiconductor film is used. The metal oxide film 108c has an atomic ratio of In:Ga:Zn=1:1:1.2. The oxide semiconductor film 108a was formed using an oxide semiconductor film formed using a metal target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film 108b is formed by using an oxide semiconductor film having an atomic ratio of metal elements The oxide formed using a metal oxide target of In:Ga:Zn=1:1:1.2 FIG. 1 is a band diagram of a configuration using a semiconductor film.

[0151] FIG. 7B shows a case where a silicon oxide film is used as the insulating films 107 and 114, and an oxide semiconductor film is used. The metal oxide film 108a has an atomic ratio of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 108b was formed using an oxide semiconductor film formed using a metal target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:1:1.2 was used. FIG. 1 is a band diagram of a structure using an oxide semiconductor film formed by

[0152] As shown in FIG. 7A, in the oxide semiconductor films 108a, 108b, and 108c, The energy level of the lower conduction band changes gradually. In the semiconductor films 108a and 108b, the energy level at the bottom of the conduction band changes gradually. In other words, it can be said that the material changes continuously or joins continuously. In order to have a band structure, the boundary between the oxide semiconductor film 108a and the oxide semiconductor film 108b must be The trapping occurs at the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a or at the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a. It is assumed that there are no impurities that would form defect levels such as loop centers or recombination centers.

[0153] In order to form a continuous junction in the oxide semiconductor films 108a, 108b, and 108c, Each film is deposited using a multi-chamber deposition system (sputtering system) equipped with a lock chamber. It is necessary to continuously stack the layers without exposing them to the air.

[0154] With the structure shown in FIGS. 7A and 7B, the oxide semiconductor film 108a serves as a well. In the transistor using the above-mentioned stacked structure, the channel region is formed of the oxide semiconductor film 10 It can be seen that it is formed in 8a.

[0155] Note that the boundary between the oxide semiconductor film 108a and the insulating film (the insulating film 107 or the insulating film 114) The oxide semiconductor films 108b and 108c can prevent trap states from being formed in the vicinity of the surface. Therefore, the oxide semiconductor film 108a is located farther away.

[0156] In addition, the trap states are below the conduction band of the oxide semiconductor film 108a which functions as a channel region. The energy level of the edge (Ec) can be farther from the vacuum level, and electrons can be trapped in the trap level. The accumulation of electrons in the trap level leads to a fixed negative charge. This causes the threshold voltage of the transistor to shift in the positive direction. The trap level is lower than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 108a. It is preferable to configure the trap level so that the trap level is close to the empty level. This makes it difficult for electrons to accumulate, which makes it possible to increase the on-state current of the transistor. , the field effect mobility can be increased.

[0157] In addition, the oxide semiconductor films 108b and 108c have a conduction band lower than that of the oxide semiconductor film 108a. The energy level of the edge of the oxide semiconductor film 108a is close to the vacuum level, and typically, and the energy levels of the conduction band minimums of the oxide semiconductor films 108b and 108c. The difference between the two is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV That is, the electron affinity of the oxide semiconductor films 108b and 108c and the The difference between the electron affinity of the organic film 108a and the electron affinity of the organic film 108b is 0.15 eV or more, or 0.5 eV or more, and eV or less, or 1 eV or less.

[0158] With such a structure, the oxide semiconductor film 108a serves as a main current path. That is, the oxide semiconductor film 108a functions as a channel region, and the oxide semiconductor film 1 The oxide semiconductor film 108b and 108c function as oxide insulating films. b and 108c are metal elements constituting the oxide semiconductor film 108a in which the channel region is formed. Since the oxide semiconductor film 108c is an oxide semiconductor film including at least one of At the interface with the oxide semiconductor film 108a or between the oxide semiconductor film 108a and the oxide semiconductor film 108b At the interface, the interface scattering is unlikely to occur. Therefore, at the interface, the movement of carriers is Since the electrons are not inhibited, the field effect mobility of the transistor is increased.

[0159] In addition, the oxide semiconductor films 108b and 108c function as part of a channel region. To prevent this, a material with sufficiently low electrical conductivity is used. The films 108b and 108c are also called oxide insulating films based on their physical properties and / or functions. Alternatively, the oxide semiconductor films 108b and 108c may have a low electron affinity (between the vacuum level and the conduction band The energy level difference between the conduction band minimum and the conduction band minimum of the oxide semiconductor film 108a is smaller than that of the oxide semiconductor film 108a. The energy level of the oxide semiconductor film 108a is different from the energy level of the conduction band minimum of the oxide semiconductor film 108a (band-off In addition, a material having a drain voltage-dependent capacitance is used. In order to suppress the occurrence of a difference in the voltage between the oxide semiconductor films 108b and 108c, The energy level of the conduction band minimum of the oxide semiconductor film 108a is higher than the energy level of the conduction band minimum of the oxide semiconductor film 108a. For example, a material having a conductivity closer to a vacuum level than that of the oxide semiconductor film 108b is preferably used. The energy levels of the conduction band minimums of the oxide semiconductor films 108a and 108c are The difference from the -level is preferably 0.2 eV or more, more preferably 0.5 eV or more.

[0160] In addition, the oxide semiconductor films 108b and 108c do not contain a spinel crystal structure. It is preferable that the oxide semiconductor films 108b and 108c have a spinel crystal structure. In the case where the spinel type crystal structure is included, the conductive film 112a, 11 In some cases, the constituent elements of the oxide semiconductor film 2b may diffuse into the oxide semiconductor film 108a. When the conductive films 108b and 108c are made of CAAC-OS, the structure of the conductive films 112a and 112b is This is preferable because it enhances the blocking property of the component element, for example, copper element.

[0161] The thicknesses of the oxide semiconductor films 108b and 108c are determined by the composition of the conductive films 112a and 112b. The insulating film has a thickness that is greater than or equal to a thickness that can prevent the insulating film from diffusing into the oxide semiconductor film 108a. The thickness of the oxide semiconductor film 108a is set to be less than the thickness at which oxygen supply from the film 114 to the oxide semiconductor film 108a is suppressed. For example, When the thickness of the oxide semiconductor films 108b and 108c is 10 nm or more, the conductive films 112a and This can prevent the constituent elements of the oxide semiconductor film 112b from diffusing into the oxide semiconductor film 108a. In addition, when the thickness of the oxide semiconductor films 108b and 108c is set to 100 nm or less, the insulating film 114 Therefore, oxygen can be effectively supplied to the oxide semiconductor film 108a.

[0162] In this embodiment, the oxide semiconductor films 108b and 108c are formed using a metal element. The atomic ratio of In:Ga:Zn was 1:1:1.2. However, the present invention is not limited to this structure. The compound semiconductor films 108b and 108c are made of In:Ga:Zn=1:1:1 [atomic ratio], In:Ga:Zn=1:3:2 [atomic ratio], In:Ga:Zn=1:3:4 [atomic ratio] ], or a metal oxide target with In:Ga:Zn=1:3:6 [atomic ratio] A formed oxide semiconductor film may be used.

[0163] Note that the oxide semiconductor films 108b and 108c were formed using a compound in which In:Ga:Zn=1:1:1 [original When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 108b and 108c have a molecular weight ratio of 1:1 or less. In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦2) The oxide semiconductor films 108b and 108c were formed of In:Ga:Zn=1:3:4 [prime When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 108b and 108c have a molecular weight ratio of 1:1 or less. In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) The oxide semiconductor films 108b and 108c were formed of In:Ga:Zn=1:3:6 [prime When a metal oxide target having a molecular weight ratio of 1:1 or less is used, the oxide semiconductor films 108b and 108c have a molecular weight ratio of 1:1 or less. In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β6≦8) .

[0164] In addition, the oxide semiconductor film 108b included in the transistor 100 and the transistor 100B In the drawing, the oxide semiconductor film 108b is exposed from the conductive films 112a and 112b. In other words, a part of the oxide semiconductor film has a depression. However, one embodiment of the present invention is not limited to this. The oxide semiconductor film in the region exposed from 2a and 112b does not necessarily have to have a recess. An example of the semiconductor device is shown in FIG. 8(A) and FIG. 8(B). Note that in FIG. 8A, the oxide semiconductor film 108b of the transistor 100 is FIG. 8B shows a structure having no recess. The membrane 108b has a structure that does not have a recess.

[0165] [Configuration example of the first transistor (variation example 3)] The transistor 100C is the same as the transistor 100 shown above, except that insulating films 114 and 116 are provided. The difference is that the insulating film 162 is provided and the position where the insulating film 162 is provided. It is similar to the transistor 100 and provides the same effects.

[0166] The transistor 100C includes a conductive film 104 and insulating films 106 and 107 on the conductive film 104. an oxide semiconductor film 108 over the insulating film 107; an insulating film 114 over the oxide semiconductor film 108; 116, conductive films 112a and 112b on the insulating film 116, the insulating film 116, and the conductive film 1 An insulating film 162 on the insulating films 12a and 112b, an oxide semiconductor film 120a on the insulating film 162, an insulating film 162, and an insulating film 118 over the oxide semiconductor film 120a.

[0167] The conductive film 112a is exposed through an opening 173a provided in the insulating films 114 and 116. The conductive film 112b is electrically connected to the oxide semiconductor film 108. The oxide semiconductor film 108 is electrically connected to the insulating film 14 through the opening 173b provided in the insulating film 116. This is being continued.

[0168] The insulating film 162 is formed of the same material and by the same method as the insulating films 114 and 116. This can be done.

[0169] The transistor 100 shown in FIGS. 1A, 1B, and 2A and 2B has a so-called channel element. The transistors shown in Figs. 9(A)(B) and 10(A)(B) are of the same type. The transistor 100C is a so-called channel protection type transistor. The transistors in the first category are either channel-etched or channel-protected. This can be applied to the sta. <1-4. Configuration example 3 of semiconductor device> Next, regarding configurations different from those shown in Figs. 1(A)(B) and 2(A)(B), This will be explained with reference to Figures 11 to 13.

[0170] FIG. 11A illustrates a transistor 100, which is a semiconductor device of one embodiment of the present invention, and 11B is a top view of the transistor 150A and the transistor 150B. FIG. 11B is a top view of the transistor 150A and the transistor 150B. FIG. 13(A) corresponds to a cross-sectional view taken along the line X1-X2. FIG. 12(A) corresponds to a cross-sectional view taken along the dashed line Y3-Y4 in FIG. , the transistor 100 and the transistor 150B, which are semiconductor devices of one embodiment of the present invention. 12(B) is a top view of the cut-off portion between the dashed line X1-X2 shown in FIG. 12(A). FIG. 13B is a cross-sectional view of the cross section of the Y3-Y This corresponds to a cross-sectional view of the cut surface at interval 4.

[0171] The semiconductor device shown in FIGS. 11(A) and 11(B) and FIG. 13(A) is Instead of the transistor 150 included in the semiconductor device shown in FIGS. 150A. Also, the semiconductor shown in FIG. 12(A)(B) and FIG. The semiconductor device shown in FIG. 1(A)(B) and FIG. 2(A)(B) has a transistor. The transistor 150B is used instead of the transistor 150.

[0172] Therefore, the description of the transistor 100 described above will be omitted. The details of the transistor 150A and the transistor 150B will now be described.

[0173] [Example of the second transistor configuration (variation 1)] The transistor 150A shown in FIGS. 11A and 11B and FIG. 13A is a The conductive film 104a, the insulating films 106 and 107 on the substrate 102 and the conductive film 104a, Insulating films 114 and 116 on the films 106 and 107, and a channel region 120b on the insulating film 116 1. An oxide semiconductor film 1 including a source region 120b_s and a drain region 120b_d. 20b, an insulating film 152 on the channel region 120b_i, and a gate electrode on the insulating film 152. The conductive film 154 functions as a source region 120b_s and a drain region 120b_s. d, and an insulating film 118 is provided on the insulating film 118. In addition, the insulating films 118 and 156 have an opening 171a that reaches the source region 120b_s. An opening 171b is provided that reaches the drain region 120b_d. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the electrodes 171a and 171b.

[0174] The conductive film 104a functions as a backgate electrode of the transistor 150A. In addition, openings are provided in the insulating films 106, 107, 114, 116, and 152, and the insulating films 106, 107, 114, 116, and 152 are exposed through the openings. In this way, the conductive film 104a and the conductive film 154 may be electrically connected to each other.

[0175] In this way, the transistor 150A does not have a back gate voltage similar to that of the transistor 150 shown above. The conductive film 104a functions as an electrode. It is formed by processing the same conductive film as in 04. Therefore, the conductive film can be formed without increasing the number of manufacturing steps. This allows the film 104a to form.

[0176] [Configuration example of second transistor (variation example 2)] The transistor 150B shown in FIGS. 12A, 12B, and 13B is a The insulating films 106 and 107, the conductive film 112c on the insulating film 107, the insulating film 107, and the conductive film The insulating films 114 and 116 on the conductive film 112c and the channel region 120b_i on the insulating film 116 , a source region 120b_s, and a drain region 120b_d. b, an insulating film 152 on the channel region 120b_i, and a gate electrode on the insulating film 152. A conductive film 154 that functions as a gate insulating film and a source region 120b_s and a drain region 120b_d and an insulating film 118. An insulating film 156 is provided on the insulating film 118. In addition, the insulating films 118 and 156 are provided with an opening 171a reaching the source region 120b_s and a An opening 171b is provided that reaches the rain region 120b_d. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover 171b.

[0177] The conductive film 112c functions as a backgate electrode of the transistor 150B. In addition, openings are provided in the insulating films 114, 116, and 152, and the conductive film 112 c and the conductive film 154 may be electrically connected.

[0178] In this way, the transistor 150B has a back gate voltage similar to that of the transistor 150 shown above. The conductive film 112c functions as an electrode. The same conductive film as 12a and 112b is processed to form the electrodes. Therefore, the conductive film 112c can be formed without any need for a metal oxide film.

[0179] The transistor according to the present embodiment can be formed by freely combining the above structures. It is possible.

[0180] <1-5. Manufacturing method of semiconductor device> Next, the transistor 100 and the transistor 15 which are semiconductor devices of one embodiment of the present invention will be described. A method for manufacturing the semiconductor device 10 will be described with reference to FIGS. 14 to 22. 1A to 1C are cross-sectional views taken in a channel length direction, illustrating a method for manufacturing a semiconductor device.

[0181] First, a conductive film is formed on the substrate 102, and the conductive film is then subjected to a lithography process and an etching process. Then, a conductive film 104 that functions as a first gate electrode is formed by carrying out a process. On the conductive film 104, insulating films 106 and 107 that function as a first gate insulating film are formed (see FIG. 14(A)).

[0182] In this embodiment, a glass substrate is used as the substrate 102, which functions as the first gate electrode. A tungsten film having a thickness of 100 nm is formed by sputtering as the conductive film 104. In addition, a silicon nitride film having a thickness of 400 nm is formed as the insulating film 106 by the PECVD method. Then, a silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 107 by the PECVD method. Form.

[0183] The insulating film 106 may have a stacked structure of a silicon nitride film. The insulating film 106 is made of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminate structure with a silicon film can be formed. An example of the three-layer laminate structure is as follows: It can be formed as follows:

[0184] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PE-CV was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gas. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency If a power of 2000 W is supplied using a frequency power supply and the thickness is formed to be 50 nm, good.

[0185] For the second silicon nitride film, silane at a flow rate of 200 sccm, The nitrogen gas and the ammonia gas with a flow rate of 2000sccm were used as raw material gases in the PECVD equipment. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency power supply was used. A power of 2000 W may be supplied using the above method to form a film having a thickness of 300 nm.

[0186] The third silicon nitride film was prepared by using silane at a flow rate of 200 sccm and 5000 sccm. The pressure in the reaction chamber was kept at 100 The thickness was measured by controlling the temperature at 40 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power source. It is sufficient to form it so that the thickness is 50 nm.

[0187] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be 350° C. or less.

[0188] By forming the insulating film 106 in a three-layered structure of silicon nitride films, for example, the conductive film 10 When a conductive film containing copper (Cu) is used for 4, the following effects are achieved.

[0189] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 104. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the insulating film. Hydrogen release from the silicon nitride film is small, and hydrogen released from the second silicon nitride film is diffused. can be suppressed.

[0190] The insulating film 107 is an oxide semiconductor film 108 (more specifically, an oxide In order to improve the interface characteristics with the semiconductor film 108b), the insulating film is formed of an oxygen-containing insulating film. preferable.

[0191] Next, the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are formed over the insulating film 107. (See FIG. 14(B) and FIG. 15(A)).

[0192] Note that FIG. 14B shows a state in which the oxide semiconductor film 108a_0 is formed over the insulating film 107. FIG. 14(B) is a schematic cross-sectional view of the inside of a film forming apparatus. The target 191 and the target 192 are placed inside the sputtering device. 91 and a plasma 192 formed below it.

[0193] First, when the oxide semiconductor film 108a_0 is formed, a first oxygen gas-containing atmosphere is used. The plasma is discharged. At this time, the insulating film on which the oxide semiconductor film 108a_0 is to be formed is In addition, oxygen is added to the oxide semiconductor film 107. In addition to the oxygen gas in 1, inert gases (e.g., helium gas, argon gas, xenon gas) etc.) may be mixed.

[0194] The first oxygen gas is at least oxygen gas contained in the oxide semiconductor film 108a_0. The first gas in the deposition gas for forming the oxide semiconductor film 108a_0 may be the first gas in the deposition gas for forming the oxide semiconductor film 108a_0. The ratio of oxygen gas is more than 0% and less than 100%, preferably 10% to 100%. It is more preferably 30% or more and 100% or less.

[0195] In FIG. 14B, oxygen or excess oxygen added to the insulating film 107 is shown as a schematic diagram. is indicated by a dashed arrow.

[0196] Note that the substrate temperature during the formation of the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 was However, the thickness of the oxide semiconductor film 108a_0 and the thickness of the oxide semiconductor film 108b_1 may be the same or different. By making the substrate temperature the same as that of the conductive film 108b_0, the manufacturing cost can be reduced. This is preferable because

[0197] For example, when the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are formed, The substrate temperature is from room temperature to less than 340° C., preferably from room temperature to 300° C., more preferably The temperature is preferably 100° C. or higher and 250° C. or lower, and more preferably 100° C. or higher and 200° C. or lower. The oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are formed by heating. As a result, the crystallinity of the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 is improved. On the other hand, the substrate 102 may be a large glass substrate (for example, a sixth generation or In the case where a 10th generation oxide semiconductor film is used, the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are If the substrate temperature during film formation is set to 150° C. or higher and lower than 340° C., the substrate 102 may be deformed. Therefore, when using a large glass substrate, Substrate temperature when the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are formed By setting the heating temperature to 100° C. or higher and lower than 150° C., deformation of the glass substrate can be suppressed.

[0198] In addition, the sputtering gas must be highly purified. The oxygen gas and argon gas used in the present invention have a dew point of -40°C or less, preferably -80°C or less, and Preferably, the gas is purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using the above, it is possible to prevent moisture and the like from being absorbed into the oxide semiconductor film as much as possible. .

[0199] In addition, when the oxide semiconductor film is formed by a sputtering method, The chamber is a clarified chamber to remove water and other impurities that may be harmful to the oxide semiconductor film as much as possible. A high vacuum (5×10) was achieved by using an adsorption type vacuum pump such as an ion pump. -7 Pa to 1× 10 -4It is preferable to evacuate the gas to a temperature of about 10 Pa. Alternatively, a turbo molecular pump and a cold A trap is used to extract gases, especially those containing carbon or hydrogen, from the exhaust system into the chamber. It is preferable to prevent backflow.

[0200] After the oxide semiconductor film 108a_0 is formed, the oxide semiconductor film 108b The oxide semiconductor film 108b_ is formed on the oxide semiconductor film 108a_0. When forming the layer 0, plasma may be discharged in an atmosphere containing the second oxygen gas.

[0201] Note that the ratio of the first oxygen gas and the ratio of the oxide semiconductor The ratio of the second oxygen gas when forming the conductive film 108b_0 may be the same as or different from that of the first oxygen gas when forming the conductive film 108b_0. For example, the second acid gas contained in the entire deposition gas when the oxide semiconductor film 108b_0 is formed may be The ratio of the raw gas is more than 0% and not more than 100%, preferably 10% or more and not more than 100%. , and more preferably 30% or more and 100% or less.

[0202] Note that when the oxide semiconductor film 108b_0 is formed, the second oxygen gas and the argon gas are mixed. When using the above, it is preferable to make the flow rate of the argon gas greater than the flow rate of the second oxygen gas. By increasing the flow rate of argon gas, the oxide semiconductor film 108b_0 becomes a dense film. In order to form the oxide semiconductor film 108b_0 into a dense film, The substrate temperature when the oxide semiconductor film 108b_0 is formed is set to be high. Typically, the oxidation temperature is 250° C. or less, and preferably 150° C. or more and 190° C. or less. When the compound semiconductor film 108b_0 is a dense film, the gold contained in the conductive films 112a and 112b This can prevent metal elements from entering the oxide semiconductor film 108a_0.

[0203] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by sputtering, 0 was formed, and then, in vacuum, an In-Ga-Zn metal oxide target (In: The oxide semiconductor was deposited by sputtering using Ga:Zn=1:1:1.2 (atomic ratio). The conductive film 108b_0 is formed. In addition, the substrate temperature during the formation of the oxide semiconductor film 108a_0 is The substrate temperature during the formation of the oxide semiconductor film 108b_0 is set to 170° C. In addition, the oxide semiconductor film 108a_0 was formed using an oxygen gas having a flow rate of 60 sccm. The oxide semiconductor film 108 is formed by oxidizing the oxide semiconductor film 108 with a flow rate of 100 sccm. The deposition gas for forming b_0 was oxygen gas with a flow rate of 100 sccm and cm of argon gas is used.

[0204] Next, the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_ are processed into desired shapes. In this way, island-shaped oxide semiconductor films 108a and 108b are formed. (See FIG. 15(B)).

[0205] Next, a conductive film is formed over the insulating film 107 and the oxide semiconductor film 108. By processing the conductive film into this shape, the conductive films 112a and 112b are formed (see FIG. 16A).

[0206] In this embodiment, the conductive films 112a and 112b are made of tungsten films having a thickness of 50 nm. A laminated film in which a 400 nm thick aluminum film and a 400 nm thick aluminum film were laminated in this order was formed by sputtering. In this embodiment, the conductive films 112a and 112b are formed by depositing two layers of For example, the conductive films 112a and 112b may have a thickness of A tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a Alternatively, a three-layer structure may be formed in which a titanium film and a silicon film are laminated in this order.

[0207] After the conductive films 112a and 112b are formed, the oxide semiconductor film 108 (more specifically, The surface (back channel side) of the oxide semiconductor film 108b may be cleaned. For example, cleaning with an etchant such as an aqueous solution of phosphoric acid can be used. In this way, impurities (e.g., the conductive films 112a and 112b) attached to the surface of the oxide semiconductor film 108b are removed. However, this cleaning is not necessarily required. In some cases, cleaning may not be necessary.

[0208] In addition, either one of the steps of forming the conductive films 112a and 112b and the above-mentioned cleaning step may be performed. In either case, the region of the oxide semiconductor film 108 that is exposed from the conductive films 112a and 112b is But it may become thinner.

[0209] Next, an insulating film was formed over the insulating film 107, the oxide semiconductor film 108, and the conductive films 112a and 112b. The film 114 and the insulating film 116 are formed (see FIG. 16B).

[0210] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposing it to the air. After the insulating film 114 is formed, it is preferable to adjust the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the air. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. At the same time, oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108. As a result, the amount of oxygen vacancies in the oxide semiconductor film 108 can be reduced. .

[0211] For example, a silicon oxynitride film is formed as the insulating film 114 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, etc. Examples of oxidizing gases include nitrous oxide, nitrous oxide, and trisilane. In addition, the flow rate of the oxidizing gas is set to 20 times or more the flow rate of the deposition gas. The pressure in the treatment chamber is set to less than 100 times, preferably 40 times or more and 80 times or less, and the pressure in the treatment chamber is set to less than 100 Pa. By using the PECVD method at a pressure of 50 Pa or less, preferably 50 Pa or less, the insulating film 114 is The insulating film contains the above and has a small amount of defects.

[0212] In this embodiment, the insulating film 114 is formed by heating the substrate 102 at a temperature of 220° C. The source gases were silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm. The pressure in the treatment chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6×10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using this.

[0213] The insulating film 116 is formed by depositing a substrate in a vacuum-evacuated processing chamber of a PECVD apparatus. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the treatment chamber to increase the pressure in the treatment chamber. is set to 100 Pa or more and 250 Pa or less, and more preferably set to 100 Pa or more and 200 Pa or less. 0.17 W / cm2 at the electrode installed in the treatment chamber 2 More than 0.5W / cm 2 Below are some more Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0214] The conditions for forming the insulating film 116 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 116 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An oxide that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated. An insulating film can be formed.

[0215] In the step of forming the insulating film 116, the insulating film 114 serves as a protection film for the oxide semiconductor film 108. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 108. The insulating film 116 can be formed using high radio frequency power.

[0216] In the deposition conditions for the insulating film 116, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the amount of defects in the insulating film 116. In the first place, ESR measurements revealed that the g value was 2.001, which is due to the dangling bonds of silicon. The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5×10 17 spins / cm 3 The following is a missing As a result, the signal quality of the transistor 100 can be improved. It can increase reliability.

[0217] After the insulating films 114 and 116 are formed, heat treatment (hereinafter referred to as first heat treatment) is performed. The first heat treatment is preferably performed to remove nitrogen oxide contained in the insulating films 114 and 116. Alternatively, the first heat treatment can reduce the amount of oxides in the insulating films 114 and 116. Part of the oxygen contained in the oxide semiconductor film 108 is transferred to the oxide semiconductor film 108. This can reduce the amount of oxygen vacancies.

[0218] The temperature of the first heat treatment is typically less than 400° C., preferably less than 375° C., and The first heat treatment is preferably performed at a temperature of 150° C. or higher and 350° C. or lower. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb The reaction may be carried out under an atmosphere of air (see below) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. Heat treatment is performed using an electric furnace, RTA (Rapid Thermal Anneal), etc. It is possible.

[0219] Next, the oxide semiconductor film 120 is formed over the insulating film 116 (see FIGS. 17A and 17B). .

[0220] 17A shows a deposition process for forming the oxide semiconductor film 120 over the insulating film 116. FIG. 17(A) is a schematic cross-sectional view of the inside of the device. A target 193 is installed inside the sputtering apparatus. 1 and a plasma 194 formed below the plasma 194 are shown diagrammatically.

[0221] First, when forming the oxide semiconductor film 120, a plasma is generated in an atmosphere containing a third oxygen gas. At that time, the oxide semiconductor film 120 is formed on the insulating film 116. When the oxide semiconductor film 120 is formed, oxygen is added to the oxide semiconductor film 120. , by mixing inert gas (e.g., helium gas, argon gas, xenon gas, etc.) For example, argon gas and a third oxygen gas may be used, and the flow rate of the argon gas may be set to be lower than that of the oxygen gas. It is preferable to increase the flow rate of the third oxygen gas. In this way, oxygen can be suitably added to the insulating film 116. For example, The formation condition of 120 is to set the ratio of the third oxygen gas in the entire deposition gas to 50% or more. It is preferable that the ratio is 100% or less, and more preferably, 80% or more and 100% or less.

[0222] In FIG. 17A, oxygen or excess oxygen added to the insulating film 116 is shown as a schematic diagram. is indicated by a dashed arrow.

[0223] The substrate temperature during the formation of the oxide semiconductor film 120 is set to room temperature or higher and lower than 340° C. , preferably from room temperature to 300° C., more preferably from 100° C. to 250° C., The temperature is preferably 100° C. or higher and 200° C. or lower. The oxide semiconductor film 120 is formed by heating. This can improve the crystallinity of the oxide semiconductor film 120. Therefore, when a large glass substrate (for example, 6th generation to 10th generation) is used, the oxide semiconductor When the substrate temperature during the deposition of the film 120 is set to 150° C. or higher and lower than 340° C., the substrate 102 Therefore, when using a large glass substrate, In this case, the substrate temperature during the formation of the oxide semiconductor film 120 is set to 100° C. or higher and lower than 150° C. This makes it possible to suppress deformation of the glass substrate.

[0224] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by sputtering to form the oxide semiconductor film 120. The substrate temperature during the formation of the oxide semiconductor film 120 is set to 170° C. The deposition gas used for forming the semiconductor film 120 is oxygen gas at a flow rate of 100 sccm. .

[0225] The oxide semiconductor film 120 may be, for example, the oxide semiconductor film described above (e.g., In: Ga:Zn=1:1:1[atomic ratio], In:Ga:Zn=1:3:2[atomic ratio], I n:Ga:Zn=1:3:4[atomic ratio], In:Ga:Zn=1:3:6[atomic ratio] , In:Ga:Zn=3:1:2 [atomic ratio], In:Ga:Zn=4:2:3 [atomic ratio] Ratio, etc.) may also be used.

[0226] Next, the oxide semiconductor film 120 is processed into a desired shape to form an island-shaped oxide semiconductor film 1 Then, an oxide semiconductor film 20a and an island-shaped oxide semiconductor film 120b are formed (see FIG. 18A).

[0227] Next, an insulating film 152_0 is formed over the insulating film 116 and the oxide semiconductor films 120a and 120b. , and a conductive film 154_0 are formed (see FIG. 18B).

[0228] The insulating film 152_0 may be the insulating films 106 and 107 or the insulating films 114 and 11 In the present embodiment, the insulating film 152_0 may be formed similarly to the insulating film 152_1. A silicon oxynitride film having a thickness of 100 nm is formed using a PECVD apparatus.

[0229] The conductive film 154_0 may be the conductive film 104 or the conductive film 112a or 1 12b, a conductive film similar to the conductive film 154_0 may be formed. Using a sputtering device, a tantalum nitride film with a thickness of 30 nm and a tantalum nitride film with a thickness of 150 nm were A tungsten film having a thickness of 100 nm is formed.

[0230] Next, a mask 195 is formed in a desired region on the conductive film 154_0 (see FIG. 19(A)). ).

[0231] As the mask 195, an organic resin film such as a resist is formed using a spin coater or the like. Just do that.

[0232] Next, the conductive film 154_0 and the insulating film 152_0 are processed using a mask 195. As a result, the insulating film 152 overlapping the oxide semiconductor film 120b and the conductive film 1 54 is formed (see FIG. 19(B)).

[0233] The method for processing the conductive film 154_0 and the insulating film 152_0 is not particularly limited. For this purpose, a wet etching method or a dry etching method may be used.

[0234] Next, the insulating film 116, the oxide semiconductor film 120a, the oxide semiconductor film 120b, and the conductive film An insulating film 118 is formed on the insulating film 154. Note that, by forming the insulating film 118, The carrier density of the oxide semiconductor film 120a in contact with the semiconductor substrate 8 becomes high, and the transistor 100 is formed. In addition, by forming the insulating film 118, the oxide semiconductor film 120b and the insulating film 11 8 constitute a source region 120b_s and a drain region 120b_d. As a result, the transistor 150 is formed (see FIG. 20A).

[0235] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferably used as the insulating film 118. For example, it can be formed by using a sputtering method or a PECVD method. When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to less than 400° C., preferably less than 375° C. C., and more preferably, the temperature is 180 to 350.degree. C. In this case, it is preferable to set the substrate temperature in the above-mentioned range since a dense film can be formed. By setting the substrate temperature in the above range when forming the insulating film 118, the insulating films 114 and 1 Therefore, oxygen or excess oxygen in the oxide semiconductor film 106 can be moved to the oxide semiconductor film 108.

[0236] In this embodiment, the insulating film 118 is a silicon oxynitride film having a thickness of 100 nm. is formed using a PECVD apparatus.

[0237] In addition, when a silicon nitride film is formed as the insulating film 118 by the PECVD method, silicon It is preferable to use a deposition gas containing nitrile, nitrogen, and ammonia as the source gas. By using a small amount of ammonia compared to hydrogen, ammonia dissociates in the plasma and becomes active. The active species are generated by bonding with silicon and hydrogen contained in the silicon-containing deposition gas. This breaks the triple bond between silicon and nitrogen. As a result, the bond between silicon and nitrogen is promoted, It is possible to form a dense silicon nitride film with few silicon and hydrogen bonds and few defects. On the other hand, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and the nitrogen The decomposition of the silicon does not proceed, silicon and hydrogen bonds remain, and defects increase and the material becomes rough. For these reasons, the source gas is not suitable for ammonia. It is preferable that the flow rate ratio of nitrogen to oxygen is 5 times or more and 50 times or less, and more preferably 10 times or more and 50 times or less.

[0238] After the insulating film 118 is formed, a heat treatment similar to the first heat treatment described above (hereinafter, the first heat treatment) is performed. In this manner, when the oxide semiconductor film 120 is formed, After adding oxygen to the insulating film 116, the insulating film 116 is heated at a temperature lower than 400° C., preferably lower than 375° C., The heat treatment is preferably performed at a temperature of 180° C. or higher and 350° C. or lower. The oxygen or excess oxygen is moved into the oxide semiconductor film 108 (particularly the oxide semiconductor film 108b). Thus, oxygen vacancies in the oxide semiconductor film 108 can be filled.

[0239] Next, an insulating film 156 is formed over the insulating film 118 (see FIG. 20B).

[0240] The insulating film 156 is made of a material that can be used for the insulating films 114 and 116 described above. In this embodiment, a PECVD apparatus is used to form the insulating film 156. A silicon oxynitride film is formed to a thickness of 400 nm.

[0241] Next, the insulating films 118 and 156 are an opening 171a reaching the drain region 120b_d of the oxide semiconductor film 120b; An opening 171b is formed (see FIG. 21(A)).

[0242] The method for forming the openings 171a and 171b is not particularly limited, and may be a wet etching method, A dry etching method or the like may be used.

[0243] Next, a conductive film 158_0 is formed on the insulating film 156 so as to cover the openings 171a and 171b. (See FIG. 21(B)).

[0244] The conductive film 158_0 is used for the conductive film 104 and the conductive films 112a and 112b. In this embodiment, a material that can be used as the conductive film 158_0 is Using a sputtering device, a titanium film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm were A film and a titanium film having a thickness of 100 nm are formed.

[0245] Next, the conductive film 158_0 is processed into a desired shape to form the conductive films 158a and 158b. Form (see Figure 22).

[0246] Through the above steps, the transistor 100 and the transistor 150 shown in FIGS. can be formed on the same substrate.

[0247] In the manufacturing process of the transistor 100 and the transistor 150, the substrate temperature Less than 400°C, preferably less than 375°C, more preferably 180°C to 350°C. This minimizes deformation (warping or warping) of the substrate even when a large substrate is used. This is preferable because it is possible to

[0248] <1-6. Configuration example 4 of semiconductor device> Next, a structure of a semiconductor device according to one embodiment of the present invention that is different from the structure described above will be described. In this case, the transistor 100 and the transistor 150 are manufactured using the same manufacturing process. The capacitor element that can be manufactured by the above method will be described with reference to FIGS. 23 and 24. 24(A), (B), and (C) are cross-sectional views for explaining a semiconductor device. 23 and 24 are cross-sectional views for explaining a semiconductor device. The capacitor element is a so-called stacked type capacitor element in which a dielectric film is sandwiched between the electrodes.

[0249] The capacitor element shown in FIG. 23A includes a conductive film 104b on a substrate 102, a conductive film 104b on the substrate 102, and a conductive film 104b on the substrate 102. The insulating films 106 and 107 on the conductive film 104b, the conductive film 112d on the insulating film 107, and the insulating film 107, and insulating films 114, 116, and 118 on the conductive film 112d. The conductive film 112 is formed by processing the same conductive film as the conductive film 104. 23(A) and 23(B) are formed by processing the same conductive film as the conductive films 112a and 112b. In the capacitor shown in FIG. 1, one of a pair of electrodes is a conductive film 104b and the other is a conductive film 112d. Moreover, the insulating films 106 and 107 function as a dielectric film of the capacitance element.

[0250] The capacitor element shown in FIG. 23B includes a conductive film 104b on the substrate 102 and a conductive film 104b on the substrate 102. The insulating films 106, 107, 114, and 116 on the conductive film 104b and the oxide semiconductor film on the insulating film 116 A conductive film 120c, an insulating film 116, and an insulating film 118 on the oxide semiconductor film 120c. The oxide semiconductor film 120c is made of the same oxide semiconductor as the oxide semiconductor films 120a and 120b. The capacitor element shown in FIG. 23B has a pair of electrodes. The insulating film 106 is a conductive film 104b, and the other is an oxide semiconductor film 120c. 07, 114, and 116 function as dielectric films of the capacitance element.

[0251] The capacitance element shown in FIG. 23C is made up of insulating films 106 and 107 on a substrate 102 and an insulating film 10 7, the insulating film 107, and the insulating films 114 and 116 on the conductive film 112e. and the oxide semiconductor film 120c on the insulating film 116. The conductive film 112e has the same structure as the conductive films 112a and 112b. The capacitor shown in FIG. 23C is formed by processing one of a pair of electrodes. One side is a conductive film 112e, and the other side is an oxide semiconductor film 120c. , 116 function as the dielectric film of the capacitance element.

[0252] The capacitor element shown in FIG. 24A includes a conductive film 104b on a substrate 102, a conductive film 104b on the substrate 102, and a conductive film 104b on the substrate 102. The insulating films 106, 107, 114, 116, 118, and 156 on the conductive film 104b and the insulating film 1 56. The conductive film 158c is formed by the conductive films 158a and 158b. The capacitor shown in FIG. One is the conductive film 104b, and the other is the conductive film 158c. 7, 114, 116, 118, and 156 function as dielectric films of the capacitance element.

[0253] The capacitance element shown in FIG. 24B is made up of insulating films 106 and 107 on a substrate 102 and an insulating film 10 7, and insulating films 114 and 116 on the insulating film 107 and the conductive film 112e. 118, 156, and a conductive film 158c on the insulating film 156. In the capacitor, one of a pair of electrodes is the conductive film 112e, and the other is the conductive film 158c. Moreover, the insulating films 114, 116, 118, and 156 function as dielectric films of the capacitance element.

[0254] The capacitance element shown in FIG. 24C is made of insulating films 106, 107, 114, and 11 6, an oxide semiconductor film 120c on the insulating film 116, and a semiconductor film 20c, and a conductive film 158c on the insulating film 156. In the capacitor shown in FIG. 24(C), one of a pair of electrodes is an oxide semiconductor film 120c, and the other The insulating films 118 and 156 function as a dielectric film of the capacitance element. do.

[0255] In addition, the capacitor element shown in FIG. 23 and FIG. 24 may be formed by stacking a transistor, for example. This reduces the area occupied by the capacitor. An example of such a case is shown in Fig. 25. Note that Fig. 25 is a diagram illustrating a cross section of a semiconductor device.

[0256] The semiconductor device shown in FIG. 25 includes the capacitor shown in FIG. 23A and the transistor 1 shown above. 50 and 51 are stacked. In addition, in the capacitive element shown in FIG. In the case of the pair of electrodes, the lower electrode is smaller than the upper electrode of the pair of electrodes. However, the lower electrode of the pair of electrodes may be larger than the upper electrode of the pair of electrodes. This may also be configured.

[0257] Note that one embodiment of the present invention has been described in this embodiment. In the following, one embodiment of the present invention will be described. However, the embodiment of the present invention is not limited to these. That is, various inventive aspects are described in this and other embodiments. Therefore, one embodiment of the present invention is not limited to a specific embodiment. For example, one embodiment of the present invention As a result, a channel formation region, a source / drain region, and the like of a transistor are formed using an oxide semiconductor. However, one embodiment of the present invention is not limited to this. Alternatively, various transistors and transistor chips according to one embodiment of the present invention may be used depending on the situation. The channel forming region, or the source / drain region of a transistor, is made of various semiconductors. In some cases, or depending on the situation, various aspects of the present invention may be A transistor, a channel forming region of a transistor, or a source / drain region of a transistor The in-region may be, for example, silicon, germanium, silicon germanium, silicon carbide, etc. gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride, or , organic semiconductor, etc. Alternatively, depending on the situation, various transistors and transistors according to one embodiment of the present invention may be used. A channel formation region, a source / drain region, or the like of a transistor is formed using an oxide semiconductor. It is not necessary to have it.

[0258] Note that the structure described in this embodiment mode can be used in appropriate combination with other embodiment modes. Cut.

[0259] (Embodiment 2) In this embodiment, the structure of an oxide semiconductor will be described with reference to FIGS. He explains.

[0260] <2-1. Structure of oxide semiconductor> Oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Nanocrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconducting ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- like oxide semiconductor) and amorphous oxide semiconductor. be.

[0261] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductors, and nc-OS.

[0262] Amorphous structures are generally isotropic and have no inhomogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The positions are not fixed, the bond angles are flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0263] From the other perspective, a stable oxide semiconductor can be considered as completely amorphous. In addition, the oxide semiconductor is not isotropic (for example, a small area). An oxide semiconductor having a periodic structure in the above structure cannot be called a completely amorphous oxide semiconductor. On the other hand, a-like OS is not isotropic but has voids (also called voids) and is unstable. In terms of instability, a-like OS is physically an amorphous oxide. It is close to a semiconductor.

[0264] <2-2.CAAC-OS> First, let me explain about CAAC-OS.

[0265] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0266] CAAC-OS was analyzed by X-ray diffraction (XRD). For example, InGaZnO4, which is classified into the space group R-3m, The structure of CAAC-OS with crystals was analyzed by the out-of-plane method. As shown in FIG. 26(A), a peak appears at a diffraction angle (2θ) of about 31°. The peak is attributed to the (009) plane of the InGaZnO4 crystal, so In this case, the crystal has a c-axis orientation, and the c-axis is the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). It can be confirmed that the direction is perpendicular to the upper surface. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The nearby peak is due to a crystal structure classified into the space group Fd-3m. It is preferred that the C-OS does not exhibit such a peak.

[0267] On the other hand, in-plane X-ray irradiation is performed on the CAAC-OS in a direction parallel to the surface on which the X-ray is to be formed. When structural analysis was performed using the ane method, a peak appeared at 2θ of approximately 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. And, 2θ is fixed at around 56°. Then, the sample is rotated around the normal vector of the sample surface as an axis (φ axis) while analyzing (φ scan). Even if the above is done, no clear peak appears as shown in FIG. 26(B). On the other hand, single crystal InGa When 2θ is fixed at around 56° and φ is scanned for ZnO4, the results shown in Figure 26(C) As shown in the figure, six peaks attributable to crystal planes equivalent to the (110) plane are observed. XRD structural analysis revealed that the orientation of the a-axis and b-axis of CAAC-OS is irregular. It can be confirmed that:

[0268] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the process was parallel to the CAAC-OS surface. When an electron beam with a probe diameter of 300 nm is incident, a diffraction pattern ( This is also called a selected area electron diffraction pattern.) may appear. This diffraction pattern includes I The spots are due to the (009) plane of the nGaZnO4 crystal. Diffraction also confirmed that the pellets contained in the CAAC-OS have a c-axis orientation and that the c-axis is the unformed On the other hand, for the same sample, the sample surface is The diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicularly to the ) is shown. From FIG. 26(E), a ring-shaped diffraction pattern is confirmed. Electron diffraction using an electron beam with a diameter of 300 nm also revealed that the PEG-1000 nanometers in the CAAC-OS It can be seen that the a-axis and b-axis of the slits have no orientation. The first ring is due to the (010) and (100) planes of the InGaZnO4 crystal. The second ring in Figure 26(E) is thought to be due to the (110) plane. It is thought that.

[0269] In addition, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using a microscope. When observing the image (also called a high-resolution TEM image), multiple pellets can be confirmed. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries (grain boundaries), are not clearly visible. (also called underly.) may not be clearly identified. It can be said that C-OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0270] Figure 27(A) shows a high-resolution cross-section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image is shown. A spherical aberration correction (SCA) was used for high-resolution TEM imaging. The spherical aberration corrector function was used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. Therefore, it can be observed.

[0271] From FIG. 27(A), a pellet, which is an area where metal atoms are arranged in layers, can be confirmed. The size of each pellet can be 1 nm or more, or 3 nm or more. Therefore, the pellets are called nanocrystals (nc). CAAC-OS can also be used as a C-Axis Aligned Navigator (CANC). The pellets can also be called oxide semiconductors with no crystals. It reflects the unevenness of the surface on which the C-OS is formed or the top surface, and the unevenness of the surface on which the CAAC-OS is formed or It is parallel to the top surface.

[0272] In addition, Fig. 27(B) and Fig. 27(C) show CAA images observed from a direction approximately perpendicular to the sample surface. Cs-corrected high-resolution TEM images of the C-OS surface. 27(B) and 27(C), respectively. First, the method of processing is explained. Then, the FFT image is obtained by Fourier Transform (FFT) processing. In the acquired FFT image, the origin is used as the reference point, and the -1 From 5.0 nm -1 The range between Next, the masked FFT image is transformed by inverse fast Fourier transform (IFFT : Inverse Fast Fourier Transform) processing is used to The image obtained in this way is called an FFT filtered image. The filtered image is an image in which periodic components are extracted from a Cs-corrected high-resolution TEM image. This indicates a child array.

[0273] In FIG. 27(D), the area where the lattice arrangement is disturbed is indicated by a dashed line. The area indicated by the dashed line is the connection between the pellets. The broken line shows the hexagonal shape, so we can see that the pellet is hexagonal. The shape of the let is not limited to a regular hexagon, and is often a non-regular hexagon.

[0274] In FIG. 27(E), a dot is drawn between an area with a uniform lattice arrangement and an area with a different uniform lattice arrangement. The lattice arrangement direction is shown by a dotted line. If you connect the lattice points around the dotted line, you will get a distorted hexagon. In other words, the formation of grain boundaries is suppressed by distorting the lattice arrangement. This is because the atomic arrangement of CAAC-OS is not dense in the ab-plane direction. The metal elements are replaced by other elements, which changes the bond distance between atoms, resulting in distortion. This is thought to be because it is possible to tolerate

[0275] As described above, the CAAC-OS has a c-axis orientation and is Multiple pellets (nanocrystals) are connected to form a distorted crystal structure. AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor having lane-anchored crystals. Cut.

[0276] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors is determined by the presence of impurities. Conversely, CAAC-O may be degraded due to contamination or defect generation. S can be considered an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0277] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0278] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or For example, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the ZnO traps hydrogen and becomes a carrier generation source.

[0279] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 less than , and more preferably 1×10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The above Such an oxide semiconductor can be obtained by using a high-purity pure oxide semiconductor. CAAC-OS is a highly pure or substantially intrinsic oxide semiconductor with low impurity concentration. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0280] <2-3.nc-OS> Next, we will explain nc-OS.

[0281] The following describes the case where nc-OS is analyzed by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0282] For example, an nc-OS having InGaZnO4 crystals was sliced ​​to a thickness of 34 nm. When an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on the region of m, the result shown in Fig. 2 A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in FIG. 8(A) was observed. In addition, the diffraction pattern when an electron beam with a probe diameter of 1 nm is incident on the same sample ( The nanobeam electron diffraction pattern is shown in Figure 28(B). Therefore, the nc-OS has a probe diameter of 50 nm. No order was observed when an electron beam with a probe diameter of 1 nm was incident. When light is incident on it, order is confirmed.

[0283] In addition, when an electron beam with a probe diameter of 1 nm is incident on an area with a thickness of less than 10 nm, As shown in FIG. 28(C), an electron diffraction pattern in which the spots are arranged in a substantially regular hexagonal shape is observed. Therefore, it is considered that the nc-OS is ordered in the range of thickness less than 10 nm. It can be seen that the crystals are highly ordered. Therefore, there are some areas where no regular electron diffraction pattern is observed.

[0284] FIG. 28(D) shows the Cs-corrected height of the cross section of the nc-OS observed from a direction approximately parallel to the surface on which the film was formed. The nc-OS is shown in the high-resolution TEM image as the area indicated by the auxiliary lines. How to identify the crystals and the areas where no clear crystals can be identified The crystal parts in the nc-OS have a size of 1 nm to 10 nm. In particular, the size of the crystals is often between 1 nm and 3 nm. An oxide semiconductor having a size of 10 nm or more and 100 nm or less is called a microcrystalline oxide semiconductor (microcrystalline oxide semiconductor). o crystalline oxide semiconductor) For example, in the case of nc-OS, the grain boundaries are often not clearly visible in high-resolution TEM images. It is possible that the nanocrystals originate from the same source as the pellets in CAAC-OS. Therefore, below, the crystalline part of the nc-OS may be referred to as a pellet.

[0285] In this way, the nc-OS can be used in microscopic regions (e.g., regions of 1 nm to 10 nm, particularly The atomic arrangement has periodicity in the region of 1 nm to 3 nm. In the case of the Cr-Al-Al-Fe-Al-Fe-O-Pb-Al-Zn ... Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous OS. In some cases, it may be difficult to distinguish them from solid oxide semiconductors.

[0286] In addition, since the crystal orientation between the pellets (nanocrystals) is not regular, nc-OS is , oxidation with RANC (Random Aligned nanocrystals) Semiconductors or NANC (Non-Aligned nanocrystals) In other words, the oxide semiconductor has a conductivity of 1000.

[0287] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0288] <2-4.a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0289] FIG. 29 shows a high-resolution cross-sectional TEM image of the a-like OS. is a high-resolution cross-sectional TEM image of the a-like OS at the start of electron irradiation. B) is 4.3 x 10 8 e - / nm 2 Electrons (e - ) A-like OS after irradiation High-resolution cross-sectional TEM images. Figures 29(A) and 29(B) show that a-like O It can be seen that striped bright regions extending in the vertical direction are observed in S from the start of electron irradiation. It can also be seen that the shape of the bright regions changes after electron irradiation. It is suspected to be a density region.

[0290] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0291] As samples, a-like OS, nc-OS and CAAC-OS are prepared. Both samples are In-Ga-Zn oxides.

[0292] First, high-resolution cross-sectional TEM images of each sample are obtained. All of the materials have crystalline parts.

[0293] The unit cell of the InGaZnO4 crystal has three In-O layers and a Ga-Zn It is known that the structure has a total of nine layers, six of which are -O layers, stacked in layers in the c-axis direction. The distance between these adjacent layers is the lattice spacing (also called the d value) of the (009) plane. The value is about the same, and is calculated to be 0.29 nm from crystal structure analysis. In the following, the area where the lattice spacing is 0.28 nm or more and 0.30 nm or less is called InGaZ. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal. do.

[0294] Figure 30 shows an example of the average size of the crystal parts (22 to 30 places) of each sample. The length of the lattice fringes is the size of the crystal part. e. The crystal part of the OS grows larger according to the cumulative dose of electrons used in obtaining the TEM image. As can be seen from Fig. 30, in the early stages of TEM observation, the size of the particles is about 1.2 nm. The part of the crystal that grew up (also called the initial nucleus) absorbs electrons (e - ) cumulative exposure of 4.2 × 10 8 e - / nm 2 It can be seen that the size of the crystals grows to about 1.9 nm in the n For c-OS and CAAC-OS, the cumulative electron irradiation dose was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of 100 to 150 mm. Therefore, the size of the crystalline parts of nc-OS and CAAC-OS is constant regardless of the cumulative dose of electron irradiation. , and 1.3 nm and 1.8 nm, respectively. The Hitachi transmission electron microscope H-9000NAR was used for the TEM observations. The conditions were an acceleration voltage of 300 kV and a current density of 6.7 × 10 5 e - / (nm 2 ·s), irradiation area The diameter of the region was set to 230 nm.

[0295] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. That is, a-like OS is not seen in comparison with nc-OS and CAAC-OS. , it is clear that this is an unstable structure.

[0296] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0297] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0298] If single crystals of the same composition are not available, single crystals of different compositions may be combined in any ratio. By combining these, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density of a single crystal of a desired composition is calculated based on the ratio of the single crystals of different compositions. However, the density can be estimated by using as few types of single crystals as possible. A combined estimate is preferred.

[0299] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0300] The configuration shown in this embodiment may be appropriately combined with configurations shown in other embodiment modes or examples. , can be used in combination.

[0301] (Embodiment 3) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 35. In the present embodiment, the display element of the display device is A configuration (liquid crystal display device) having a liquid crystal element will be specifically described.

[0302] <3-1.Liquid crystal display device> A liquid crystal display device 880 shown in FIG. 31(A) includes a pixel portion 871, a gate driver 874, and , a source driver 876, and a gate driver 8 74, m scanning lines 877 whose potentials are controlled by the and n signal lines 879 whose potentials are controlled by a source driver 876. Furthermore, the pixel section 871 has a plurality of pixels 870 arranged in a matrix. , along the signal line 879, each of which has a common line 875 arranged in parallel or approximately parallel to each other. In addition, the gate driver 874 and the source driver 876 may be collectively referred to as a drive circuit section. There is a match.

[0303] Each scanning line 877 corresponds to one of the pixels 870 arranged in m rows and n columns in the pixel section 871. , electrically connected to n pixels 870 arranged in any row. The line 879 is a pixel array of m pixels arranged in one of the columns of the pixels 870 arranged in m rows and n columns. The pixel 870 is electrically connected to the m and n. The pixel line 875 is formed by dividing m pixels 870 arranged in m rows and n columns in any one of the rows. The pixel 870 is electrically connected to the pixel 870.

[0304] FIG. 31B shows a pixel 870 of the liquid crystal display device 880 shown in FIG. 1 shows an example of a possible circuit configuration.

[0305] A pixel 870 shown in FIG. 31B includes a liquid crystal element 851, a transistor 852, and a capacitor. It has a child 855.

[0306] The transistor 852 may be the transistor 100 described in the first embodiment or a transistor In particular, the pixel 870 may include a transistor 150. When using this, there is no overlap between the gate electrode and the source electrode or the drain electrode, so there is no parasitic This is preferable since it is possible to reduce the capacity.

[0307] One of a pair of electrodes of the liquid crystal element 851 is connected to a transistor 852. The other of the pair of electrodes of the liquid crystal element 851 is connected to the common line 875, and a common potential (common potential) is applied. The alignment state of the liquid crystal is controlled by data written to the transistor 852 .

[0308] The liquid crystal element 851 controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of liquid crystals is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal element 851 is controlled by a directional electric field or an oblique electric field. The liquid crystals used are thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, and polymer dispersed liquid crystals. The liquid crystal material may be a ferroelectric liquid crystal, an antiferroelectric liquid crystal, or the like. Therefore, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. Shows dimensions etc.

[0309] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a short wavelength and is optically isotropic. The composition does not require alignment treatment and has low viewing angle dependency. Also, no alignment film is required. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This can prevent the liquid crystal display device from being damaged or broken during the manufacturing process.

[0310] A liquid crystal display device 880 having a liquid crystal element 851 is driven by a TN (Twiste) d Nematic mode, IPS (In-Plane-Switching) mode , FFS (Fringe Field Switching) mode, ASM (Axia lly Symmetric aligned Micro-cell mode, OCB (Optical Compensated Birefringence) mode, F LC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, etc. It can be used.

[0311] In addition, the liquid crystal display device 880 is a normally black type liquid crystal display device, for example, a vertical alignment ( The liquid crystal display device may be a transmissive type liquid crystal display device that employs a vertical alignment (VA) mode. MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV Modes, etc. can be used.

[0312] <3-2. In-plane switching mode LCDs> First, horizontal electric field mode liquid crystal display devices, typically FFS mode and IPS mode liquid crystal displays, The display device will now be described.

[0313] In the configuration of the pixel 870 shown in FIG. One of the drain electrodes is electrically connected to a signal line 879, and the other is a pair of drain electrodes of the liquid crystal element 851. The gate electrode of the transistor 852 is electrically connected to one of the electrodes of the scan line The transistor 852 is electrically connected to the data input terminal 877. It has the function of controlling.

[0314] In the configuration of the pixel 870 shown in FIG. 31B, one of a pair of electrodes of the capacitor 855 is , is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes 5 is electrically connected to a common line 875. The value of is set appropriately according to the specifications of the pixel 870. The liquid crystal display functions as a storage capacitor to hold the data. In the liquid crystal display device 880, one of a pair of electrodes of the capacitor element 855 is connected to the liquid crystal element 851. The other of the pair of electrodes of the capacitor 855 is a liquid crystal It is a part or the whole of the other of the pair of electrodes of the element 851 .

[0315] <3-3. Configuration example 1 of transverse electric field mode element substrate> Next, a specific configuration of the element substrate included in the liquid crystal display device 880 will be described. A liquid crystal display device 880 driven in the FFS mode has a plurality of pixels 870a, 87 The top view of 870b and 870c is shown in FIG.

[0316] In FIG. 32A, the conductive film 843 functioning as a scanning line is substantially perpendicular to the signal line. The conductive film 848a that functions as a signal line is provided so as to extend in the direction (the left-right direction in the drawing). The scanning lines and the vertical direction in the figure are substantially perpendicular to each other. The conductive film 843, which functions as a signal line, is electrically connected to a gate driver 874. The conductive film 848a, which functions as a 31(A)).

[0317] The transistor 852 is provided near the intersection of the scan line and the signal line. The transistor 852 includes a conductive film 843 functioning as a gate electrode, a gate insulating film (FIG. 32(A) ) (not shown in FIG. 1 ) an oxide semiconductor film in which a channel region is formed on a gate insulating film 820, and conductive films 848a and 848b functioning as source and drain electrodes. Note that the conductive film 843 also functions as a scan line and overlaps with the oxide semiconductor film 820. The conductive film 848a functions as a gate electrode of the transistor 852. The oxide semiconductor film 820 also functions as a signal line. It functions as a source electrode or a drain electrode.

[0318] The conductive film 848b is electrically connected to the oxide semiconductor film 819a having a function of a pixel electrode. In addition, an insulating film (not shown in FIG. 32A) is formed over the oxide semiconductor film 819a. The conductive film 829 is provided as a common electrode. It has the following functions.

[0319] The conductive film 829 has stripe-shaped regions extending in a direction intersecting the signal lines. This region is connected to a region extending in a direction parallel or approximately parallel to the signal line. In a plurality of pixels of the liquid crystal display device 880, the conductive film 829 having striped regions is The regions are at the same potential.

[0320] The capacitor 855 is formed in a region where the oxide semiconductor film 819a and the conductive film 829 overlap with each other. The oxide semiconductor film 819a and the conductive film 829 have a light-transmitting property. 5 has translucency.

[0321] In addition, since the capacitor 855 has a light-transmitting property, the capacitor 855 is large and is disposed in the pixel 870. Therefore, the aperture ratio can be increased, typically to 50% or more. Preferably, the charge amount can be increased to 60% or more. For example, in a display device with high resolution, such as a liquid crystal display device, The area of ​​the element is reduced, and the area of ​​the capacitive element is also reduced. This allows for a display device with high resolution. In this embodiment, however, the amount of charge stored in the capacitance element is small. Since the capacitor 855 has a light-transmitting property, the capacitor is provided in each pixel. This allows the aperture ratio to be increased while obtaining a sufficient amount of charge in the pixel. High resolution of 1000ppi or more, 300ppi or more, or even 500ppi or more The present invention can be suitably used in display devices.

[0322] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitance element, the more In the liquid crystal display device, the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant can be extended. When displaying a still image, the period can be extended, reducing the frequency with which image data is rewritten. It is possible to reduce the number of circuits, and therefore the power consumption. The structure shown in FIG. 1 can increase the aperture ratio even in a high-resolution display device. It is possible to efficiently use light from light sources such as backlights, thereby reducing the power consumption of display devices. It is possible.

[0323] Next, a cross-sectional view taken along the dashed line Q1-R1 in FIG. 32(A) is shown in FIG. The transistor 852 shown in FIG. 32(B) is a top-gate transistor. The dashed dotted line Q1-R1 is a cross-sectional view of the transistor 852 in the channel length direction.

[0324] The transistor 852 shown in FIG. 32A and FIG. 32B includes an insulating film 8 formed on a substrate 802. 806, 807, 814, and 816. Transistor 852 is also formed on the oxide semiconductor. A conductive film 820, an insulating film 832 provided on the oxide semiconductor film 820, and a the conductive film 843, the insulating film 816, the oxide semiconductor film 820, and the insulating film over the conductive film 843 Note that the oxide semiconductor film 820 includes a source region 820s, a channel region 820s, and a gate electrode 834. The insulating film 834 includes a drain region 820i and a drain region 820d. 6 is provided, and conductive films 848a and 848b are provided over the insulating film 836. The film 848a is connected to the source region 820s through an opening provided in the insulating films 836 and 834. The conductive film 848b is electrically connected to the insulating films 836 and 834. The insulating layer 820 is electrically connected to the drain region 820d through an opening formed therein.

[0325] The insulating film 832 functions as a gate insulating film of the transistor 852. The conductive film 843 functions as a gate electrode of the transistor 852, and the conductive film 84 The conductive film 848a functions as a source electrode, and the conductive film 848b functions as a drain electrode. has.

[0326] In addition, the substrate 802, the insulating films 806, 807, 814, 816, 832, 834, and 836 The oxide semiconductor film 820, and the conductive films 848a and 848b are formed on the substrate 10 as described above. 2, insulating films 106, 107, 114, 116, 152, 118, 156, oxide semiconductor film The conductive films 120a and 112a and 112b can be formed using the same material and method. Cut.

[0327] In addition, an insulating film 838 is provided over the insulating film 836 and the conductive films 848a and 848b. In addition, an oxide semiconductor film 819a is provided over the insulating film 838. 9a is electrically connected to the conductive film 848b through an opening provided in the insulating film 838. An insulating film 840 is provided over the insulating film 836 and the oxide semiconductor film 819a. A conductive film 829 is provided over the insulating film 840 .

[0328] The insulating film 838 can be formed using a material and a method similar to those of the insulating film 836. The oxide semiconductor film 819a can be formed using a material and a method similar to those of the oxide semiconductor film 820. The insulating film 840 can be formed by the same method as the insulating film 834. The conductive film 829 can be formed using a material and a method similar to that of the oxide semiconductor film 820. It can be formed by the same materials and methods as those described above.

[0329] The oxide semiconductor film 819a functions as a pixel electrode of a display device, and the conductive film 829 The oxide semiconductor film 819a and the insulating film 819b function as a common electrode of the display device. The insulating film 840 and the conductive film 829 form a capacitor 855 .

[0330] Note that in this embodiment, the oxide semiconductor film 819a has a rectangular shape in a top view. However, the present invention is not limited to this. For example, the oxide semiconductor film 819a may be formed in a comb-like shape or a stripe-like shape. It may also have a shape having a rib.

[0331] <3-4. Vertical alignment mode liquid crystal display device> Next, we developed a liquid crystal display (LCD) that operates in vertical alignment (VA) mode. The structure of a pixel having a liquid crystal element will be described with reference to Figs. 33 to 35. 34 is a top view of a pixel included in the display device, and FIG. 34 is a diagram showing a pixel along a dashed line Z1-Z2 shown in FIG. FIG. 35 is a cross-sectional view of a pixel of the liquid crystal display device. FIG.

[0332] VA type is a type of method for controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. In a liquid crystal display device, when no voltage is applied, the liquid crystal molecules are oriented vertically to the panel surface. This is a method that faces the camera.

[0333] In the following, we will divide a pixel into several regions (subpixels) and The molecules are designed to bend in different directions. In the following explanation, a liquid crystal display device in which a multi-domain design is taken into consideration will be described. He explains.

[0334] The liquid crystal display device shown in FIG. 33 and FIG. 34 includes a transistor 852a on a substrate 802 and a transistor An insulating film 838 over the transistor 852a; The conductive film 824 electrically connected to the capacitor 852a and the capacitor 855a are included. The conductive film 824 functions as a pixel electrode. 46 is provided. The slit 846 has a function of controlling the alignment of the liquid crystal.

[0335] In addition, a substrate 803 is provided at a position overlapping the substrate 802. A liquid crystal layer 881 is provided between the substrate 803 and the colored film 866 and the conductive film 867. A conductive film 868 and a structure 869 are provided. Note that the conductive film 868 functions as a common electrode. The conductive film 868 has a slit 872. The gap 872 and the structure 869 have a function of controlling the alignment of the liquid crystal. On the surface in contact with 1, alignment films 848 and 878 are provided.

[0336] In the top view shown in FIG. 33, the conductive film 824 functioning as a pixel electrode and the common The conductive film 868 functioning as an electrode is indicated by a solid line, and the transistors 852a and the like are indicated by broken lines. It is represented by a line.

[0337] In addition, a transistor 852b is provided adjacent to the transistor 852a. The transistor 852a and the transistor 852b are both connected to the conductive film 848a. Note that the conductive film 848a serves as a source electrode in the transistors 852a and 852b. In a liquid crystal display device, they function as signal lines.

[0338] The transistors 852a and 852b are the same as those described in the first embodiment. 100 or transistor 150. In particular, transistor 150 When using the gate electrode, there is no overlap between the gate electrode and the source electrode or the drain electrode, so the This is preferable since it is possible to reduce the raw capacitance.

[0339] When a voltage is applied to the conductive film 824 having the slit 846, A distortion of the electric field (an oblique electric field) occurs. The slit 846 and the structure 869 on the substrate 803 side, By arranging the slits 872 alternately or facing each other, an oblique electric field is effectively generated. The alignment of the liquid crystal can be controlled by adjusting the direction of the alignment of the liquid crystal. The liquid crystal is aligned in the pixel in which the transistor 52a is formed and in the pixel in which the transistor 852b is formed. In other words, it is preferable to make the viewing angle of the liquid crystal display device by forming a multi-domain. It will be possible to expand the range.

[0340] In addition, either the structure 869 on the substrate 803 side or the slit 872 on the substrate 803 side One or both may not be formed.

[0341] The transistor 852a includes insulating films 806, 807, 814, and The transistor 852a is provided over the oxide semiconductor film 816. An insulating film 832 on the oxide semiconductor film 820, a conductive film 843b on the insulating film 832, and an oxide semiconductor A conductive film 848a electrically connected to the source region 820s of the conductive film 820, and an oxide semiconductor and a conductive film 848b electrically connected to the drain region 820d of the film 820. The insulating film 832 functions as a gate insulating film, and the conductive film 843b functions as a gate electrode. The conductive film 848a functions as a source electrode. The film 848b functions as a drain electrode. In the semiconductor film 820, a channel region 820i is formed.

[0342] In addition, an insulating film is formed on the source region 820s, the drain region 820d, and the conductive film 843b. The insulating films 834 and 836 are provided, and the conductive films 848a and 848b are provided on the insulating films 834 and 836. The insulating film 820 is electrically connected to the oxide semiconductor film 820 through the opening.

[0343] The capacitor 855a includes a conductive film 843a and insulating films 834 and 836 over the conductive film 843a. The conductive film 843a is a transistor. The conductive film 843b of the capacitor 852a is formed through a process of processing the same conductive film.

[0344] FIG. 35 shows an example of an equivalent circuit of the liquid crystal display device shown in FIGS.

[0345] As shown in FIG. 35, the transistor 852a and the transistor 852b are both gated. The conductive film 843b functions as a source wiring, and the conductive film 848a functions as a source wiring. In this case, the conductive film 843a and the conductive film 843c are electrically connected to each other. By doing so, the liquid crystal element 851a and the liquid crystal element 851b can be made to operate differently. That is, the potentials of the conductive films 843a and 843c are controlled. Therefore, the viewing angle can be widened. It functions as a monitor wiring.

[0346] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0347] (Embodiment 4) In this embodiment, a semiconductor device of one embodiment of the present invention and a display device including the semiconductor device will be described. The device will be described with reference to Figs. 36 to 39. The display device has a light-emitting element (particularly an electroluminescence (EL) element) as a display element. The configuration will now be described in detail.

[0348] <4-1. Explanation of display device> The display device shown in FIG. 36(A) has a region having pixels of a display element (hereinafter, referred to as a pixel portion 502). ) and a circuit section ( Hereinafter, it is referred to as a driving circuit unit 504) and a transistor or a light emitting element for correcting the temperature A circuit section having a function of protecting the element (hereinafter, referred to as a sensor circuit section 508) The sensor circuit section 508 includes a protection circuit section 506 and a terminal section 507. The protective circuit portion 506 may not be provided.

[0349] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Band). It can be implemented by using the onding.

[0350] In FIG. 36(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a source driver circuit is formed separately. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is It may also be configured to be equipped with

[0351] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter, referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter, a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a) to supply a signal (data signal) for driving the display element of the pixel. The pixel circuit 504 includes a driver circuit such as a circuit (hereinafter, referred to as a source driver 504b).

[0352] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is input via a terminal unit 507, and a signal is output. For example, a start pulse signal, a clock signal, etc. are input to the gate driver 504a. The gate driver 504a outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it. However, the gate driver 50 has a function of supplying 4a may also supply other signals. For example, as shown in FIG. The light driver 504a is a wiring for controlling the potential of the light-emitting element (hereinafter, ANODE_1 to ANODE_2). NODE_X).

[0353] The source driver 504b includes a shift register and the like. Through the terminal section 507, a signal for driving the shift register as well as a source of a data signal are input. The source driver 504b outputs a pixel circuit based on the image signal. The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated according to a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data line 101 through the data line 102. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0354] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a number of analog switches, A signal obtained by time-sharing an image signal can be output as a data signal.

[0355] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is inputted through the data line DL, and a data signal is given through one of the data lines DL. A data signal is input to each of the pixel circuits 501. 504a controls writing and holding of data of the data signal. For example, The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or smaller than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via a source driver 504c (n is a natural number equal to or smaller than Y).

[0356] The protection circuit unit 506 shown in FIG. 36A includes, for example, a gate driver 504a and a pixel circuit 501. The protection circuit unit 506 is connected to the scanning line GL, which is the wiring between the source It is connected to the data line DL which is the wiring between the driver 504b and the pixel circuit 501. The protection circuit unit 506 is connected to the wiring between the gate driver 504a and the terminal unit 507. Alternatively, the protection circuit unit 506 may include a source driver 504b and a terminal unit 507. The protection circuit unit 506 can be connected to the wiring between the A circuit that connects a certain wiring to another wiring when a potential outside a certain range is applied. do.

[0357] As shown in FIG. 36A, a pixel section 502 and a driving circuit section 504 are provided with a protection circuit section 506. 06 prevents ESD (Electro Static Discharge) The resistance of the display device to overcurrent caused by electrostatic discharge (ESD) and other phenomena can be improved. However, the configuration of the protection circuit unit 506 is not limited to this. For example, the gate driver 504 a, or a protection circuit unit 50 Alternatively, the protection circuit section 506 may be connected to the terminal section 507. It is also possible to adopt a continuous configuration.

[0358] <4-2. Example of protection circuit configuration> The protective circuit portion 506 can have a structure shown in FIG.

[0359] FIG. 37A shows an example of a circuit configuration that can be used as the protection circuit portion 506. In FIG. The protection circuit unit 506 includes a transistor 510 and a resistor element 512. One of the source electrode and the drain electrode of the transistor 510 is electrically connected to the data line DL. The other of the source electrode and drain electrode of the transistor 510 is connected to one electrode of a resistor element 512. The gate electrode of the transistor 510 is electrically connected to the The other of the source electrode and the drain electrode of the resistor element 512 is electrically connected to the other of the source electrode and the drain electrode of the resistor element 512. The other electrode is electrically connected to the scanning line GL. A cathode electrode may be provided.

[0360] The transistors 100 and 150 described in Embodiment 1 are used as the transistor 510. The resistor element 512 may have the configuration shown in FIG. It is possible.

[0361] FIG. 37(B) is an example of a top view of the resistance element 512, and FIG. 37(C) is an example of a top view of the resistance element 512. ) corresponds to a cross-sectional view taken along dashed dotted line A3-A4 in FIG.

[0362] The resistor element 512 includes electrodes 542a and 542b on a substrate 532, and the substrate 532 and the electrodes Insulating films 544 and 546 on the electrodes 542a and 542b, and the electrodes 542a and 542b and the insulating film The oxide semiconductor film 550 on the insulating film 546 and the insulating film on the oxide semiconductor film 550 and a membrane 548.

[0363] A substrate 532, insulating films 544 and 546, electrodes 542a and 542b, and an oxide semiconductor film 550. , and the insulating film 548 are the substrate 102, the insulating films 114, 116, respectively, described above. The conductive films 112a and 112b, the oxide semiconductor film 120, and the insulating film 118 are formed using the same materials. It can be used.

[0364] The electrode 542a and the electrode 542b are electrically connected to each other through an oxide semiconductor film 550. The oxide semiconductor film 550 functions as a resistor.

[0365] As shown in FIG. 37(B) and (C), the shape (length or width) of the oxide semiconductor film 550 is adjusted. By adjusting the thickness of the oxide semiconductor film 550, a desired resistance value can be obtained. This can be done.

[0366] Also, a terminal section 507 shown in FIG. 36(A) is used to transmit power and control signals from an external circuit to the display device. The part in which the terminals for inputting the image signal and the image signal are provided. The sensor circuit unit 508 shown has a function of compensating for the temperature of a transistor or a light-emitting element. .

[0367] <4-3. Example of sensor circuit configuration> The sensor circuit section 508 can have a configuration shown in FIG.

[0368] FIG. 38A shows an example of a circuit configuration that can be used as the sensor circuit unit 508. The sensor circuit unit 508 includes a transistor 556, a resistor element 558, and a monitor light emitting element. The gate electrode of the transistor 556 is connected to the gate line for monitoring. A source electrode and a drain electrode of the transistor 556 are electrically connected to MONI_G. One of the electrodes is electrically connected to one of the electrodes of the light emitting element 572m, and the source of the transistor 556 The other of the source electrode and drain electrode is electrically connected to the monitor drain line MONI_D. One electrode of the resistor element 558 is connected to the source electrode and drain electrode of the transistor 556. The other electrode of the resistor element 558 is electrically connected to the other of the drain electrodes. The node line MONI_ANO is electrically connected to one electrode of the light emitting element 572m. is electrically connected to the monitor source line MONI_S, and the other The electrode is electrically connected to a cathode line.

[0369] The transistor 556 is a driving transistor in the pixel section 502, for example. For example, the sensor circuit unit 508 supplies electricity to the light emitting element 572m. When a current is applied, the gate electrode, source electrode, and drain electrode of the transistor 556 are connected to the It also has the function of monitoring the voltage and current of the anode line. ,monitor gate line MONI_G, monitor drain line MONI_D, monitor The anode line MONI_ANO for the monitor and the source line MONI_S for the monitor are Since they are provided independently, it is possible to measure each signal individually.

[0370] For example, the potential of the monitor source line is measured, and the monitor light emitting element 572 m characteristics can be measured. The potential of the drain line MONI_D for the monitor and the source line MONI_S for the monitor are measured. By doing so, the characteristics of the transistor 556 can be measured. Measure the potential of the node line MONI_ANO and the monitor drain line MONI_D. In this way, the characteristics of the resistor element 558 can be measured.

[0371] Alternatively, the anode line MONI_ANO for the monitor and the gate line MO Apply voltage to NI_G to monitor drain wire MONI_D and monitor source wire MONI_D. The temperature is measured from the potential of the monitor drain line MONI_D by measuring the potential of the drain line. Alternatively, the anode line MONI_ANO for the monitor and the monitor Apply a voltage to the gate line MONI_G for the monitor, and the drain lines MONI_D and By measuring the potential of the monitor source line, the potential of the monitor source line MONI_S is The Vgs of the transistor 556 and the voltage applied to the light emitting element 572m are measured from the It can be determined.

[0372] Using the above measured values, the other electrode of the light emitting element 572m is electrically connected to Correction can be performed by changing the potential of the cathode line or the video data potential. In addition, as shown in FIG. 36(A), a sensor circuit portion 508 is provided at each of the four corners of the pixel portion 502. In such a configuration, the correction method may be changed depending on the position of each pixel.

[0373] The sensor circuit unit 508 may have a configuration shown in FIG. 38(B) is a schematic cross-sectional view illustrating the sensor circuit portion 508.

[0374] The sensor circuit portion 508 shown in FIG. 38B includes a transistor 556 and a resistor element 558. The transistor 556 includes a conductive film 104 over a substrate 102, The insulating films 106 and 107 on the conductive film 104, the oxide semiconductor film 108 on the insulating film 107, and the oxide semiconductor film a conductive film 112a electrically connected to the oxide semiconductor film 108; The conductive film 112b, the oxide semiconductor film 108, and the conductive films 112a and 112b are electrically connected to each other. 2b, and an oxide semiconductor film 120a on the insulating film 116. do.

[0375] The resistor element 558 is formed by insulating films 106 and 107 on the substrate 102 and a Conductive films 112b and 112c, an insulating film 107, and an insulating film on the conductive films 112b and 112c 114, 116, the oxide semiconductor film 120c on the insulating film 116, and the oxide semiconductor film 120 The oxide semiconductor film 120c has the insulating films 114 and 118 over it. 16 is electrically connected to the conductive film 112b through an opening 152a provided in the conductive film 112b. The oxide semiconductor film 120c is exposed through an opening 152d provided in the insulating films 114 and 116. The conductive film 112b is electrically connected to the conductive film 112c in the transistor 556. serves as the other of the source electrode and drain electrode, and in the resistor element 558, The conductive film 112c functions as one of the pair of electrodes of the resistor element 558. The conductive film 112c functions as the other anode line MONI_AN It functions as O.

[0376] Note that the transistor 556 has a function similar to that of the transistor 100 described in Embodiment 1. Therefore, in each component of the transistor 556, the transistor 1 00 and hatching are used. Each component is made of a material that can be used for the transistor 100 described in Embodiment 1. The transistor 556 can be formed by taking into consideration the material and the like. 1. The transistor 150 may have a structure similar to that of the transistor 150 shown in FIG.

[0377] The other of the pair of electrodes of the resistor element 558 is connected to the source electrode and drain electrode of the transistor 556. The conductive film that functions as the rain electrode is formed by processing the same conductive film. The oxide semiconductor film 120c is formed by processing the same oxide semiconductor film as the oxide semiconductor film 120a. As described in the first embodiment, the oxide semiconductor film 120a is formed of Since it can be used as a solid conductor (OC), it is possible to use the same oxide as the oxide semiconductor film 120a. The oxide semiconductor film 120c formed by processing the semiconductor film is also an oxide conductor (OC). Therefore, in the circuit diagram shown in FIG. The symbol OC is added to 8.

[0378] The oxide semiconductor film 120c included in the resistor 558 has a structure similar to that of the oxide semiconductor film 120b. For example, the oxide semiconductor film 120c is formed of an indium arsenide. Indium Gallium Zinc Oxide (IGZO), Indium Tin Oxide (ITO), Indium Uses materials such as zinc oxide and indium tin oxide doped with silicon oxide (ITSO) It is possible.

[0379] <4-4. Example of pixel circuit configuration> The pixel circuits 501 shown in FIG. 36(A) may have a configuration shown in FIG. 36(B), for example. It is possible.

[0380] The pixel circuit 501 shown in FIG. 36B includes transistors 552 and 554 and a capacitor 56. 2 and a light-emitting element 572. Either or both of the transistors are the transistor 100 or the transistor 1 50 may be applied.

[0381] A data signal is applied to one of the source and drain electrodes of the transistor 552. The transistor 55 is electrically connected to a wiring (hereinafter, referred to as a signal line DL_n). The gate electrode of 2 is electrically connected to the wiring (hereinafter referred to as the scanning line GL_m) to which the gate signal is applied. are connected to the network.

[0382] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0383] One of a pair of electrodes of the capacitor 562 is the source electrode and the drain electrode of the transistor 552. The other of the pair of electrodes of the capacitor 562 is electrically connected to the transistor. The second gate electrode (also referred to as a backgate electrode) of the transistor 554 is electrically connected to the second gate electrode (also referred to as a backgate electrode) of the transistor 554 . The capacitor 562 functions as a storage capacitor for storing written data.

[0384] One of the source and drain electrodes of the transistor 554 is connected to the anode line (ANODE _m).

[0385] One of the anode and cathode of the light emitting element 572 is connected to the source electrode of the transistor 554 and The other end is electrically connected to the cathode line (CATHODE). In addition, a capacitance element is electrically connected to one of the anode and the cathode of the light emitting element 572. The other of the pair of electrodes 562 is electrically connected.

[0386] The light emitting element 572 may be, for example, an organic EL element. The element 572 is not limited to this, and an inorganic EL element made of an inorganic material may also be used.

[0387] In a display device having the pixel circuit 501 shown in FIG. 36(B), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0388] In the pixel circuit 501 to which the data has been written, the transistor 552 is turned off. Furthermore, the transistor 554 is in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted with a brightness that corresponds to the flow rate. By performing this process row by row, an image can be displayed.

[0389] In this embodiment, the display device has a light-emitting element 572 as a display element. Although the configuration is illustrated, the display device is not limited to this and may have various elements. .

[0390] An example of the above element is an electroluminescence (EL) element (organic and inorganic EL elements, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements ( transistors that emit light in response to electric current), electron emission elements, liquid crystal elements, electronic ink elements, Electrophoretic element, electrowetting element, plasma display (PDP), MEMS (Microelectromechanical systems) displays (e.g., gratings) Glight Valve (GLV), Digital Micromirror Device (DMD), Digital Micro Shutter (DMS) element, Interference Modulation (IMO D) elements, piezoelectric ceramic displays, etc., which are produced by electrical or magnetic effects Some display media have display characteristics such as contrast, brightness, reflectance, and transmittance that change. An example of a display device using an electron-emitting element is an EL display. An example of the display device used is a field emission display (FED) or S ED type flat panel display (SED: Surface-conduction Electrodes) Display devices using liquid crystal elements. An example of this is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). (a) Reflective LCD, Direct-view LCD, Projection LCD, etc. An example of a display device using electronic ink elements or electrophoretic elements is electronic paper. In addition, in order to realize semi-transmissive liquid crystal displays and reflective liquid crystal displays, In this case, a part or the whole of the pixel electrode may function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM can be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0391] The display device uses a progressive method, an interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB ( R stands for red, G for green, and B for blue). For example, It may be composed of four pixels, a B pixel and a W (white) pixel. Or, it may be arranged in a Pentile array. As shown in the figure, two colors of RGB compose one color element, and two different colors are selected depending on the color element. Alternatively, one or more colors such as yellow, cyan, magenta, etc. may be added to RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to a color display device, and may be used for a monochrome display device. The present invention can also be applied to display devices.

[0392] Also, backlights for display devices (organic EL elements, inorganic EL elements, LEDs, fluorescent lights, etc.) A white light (W) may be provided to the display device. Also, a colored layer (also called a color filter) may be provided to the display device. The colored layer may be, for example, a red (R), green (G), or blue (B ), yellow (Y), etc. can be used in appropriate combination. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a color layer and a region not having a color layer, The white light in the region may be directly used for display. By placing the colored layer over the entire display, the decrease in brightness caused by the colored layer can be reduced during bright display, and power consumption can be reduced by 2. However, in some cases, the emission of light from organic EL elements and inorganic EL elements can be reduced by about 10 to 30%. When using optical elements to display full color, R, G, B, Y, and white (W) are The color layer may be formed by using a self-luminous element. In some cases, power consumption can be reduced even further than when using a conventional method.

[0393] <4-5. Example of pixel configuration of display device> Here, an example of a display device having the pixel circuit shown in FIG. FIG. 39(A) is a top view of a pixel portion of a display device, and FIG. 39(A) is a cross-sectional view taken along the dashed line X1-X2 in FIG. In order to avoid the diagram becoming too complicated, some of the components are omitted.

[0394] The display device shown in FIG. 39(A)(B) has a first gate electrode on a substrate 702. A conductive film 704, insulating films 706 and 707 on the conductive film 704, and an oxide film on the insulating film 707. The semiconductor film 708, the insulating film 707, and the source electrode and the drain electrode over the oxide semiconductor film 708 Conductive films 712a and 712b functioning as gate electrodes, and a conductive film 712c on the insulating film 707. , the oxide semiconductor film 708, and the insulating films 714, 712a, 712b, and 712c. 16, an oxide semiconductor film 720 serving as a second gate electrode over the insulating film 716, and An insulating film 718 on the insulating film 716 and the oxide semiconductor film 720, and a planarizing insulating film on the insulating film 718 An insulating film 722 functioning as a film, and a conductive film 722 functioning as a pixel electrode on the insulating film 722 4a and 724b, and a function of suppressing electrical connection between the conductive film 724a and the conductive film 724b. A structure 726 having the conductive films 724a and 724b and an EL layer 728 on the structure 726. , and a conductive film 730 on the EL layer 728 .

[0395] The conductive film 712c is formed through an opening 752c provided in the insulating films 706 and 707. The oxide semiconductor film 702 is electrically connected to the conductive film 704. The conductive film 720 is connected to the conductive film 712 through an opening 752 a provided in the insulating films 714 and 716 . The conductive film 724a is electrically connected to the insulating films 714, 716, 718, and 719. 22 is electrically connected to the conductive film 712b through an opening 752b provided in the conductive film 752b.

[0396] In addition, a conductive film 724a functioning as a pixel electrode, an EL layer 728, a conductive film 730, The light emitting element 572 is formed. The EL layer 728 is formed by sputtering, evaporation, or the like. printing methods (including vacuum deposition methods), printing methods (such as letterpress printing, intaglio printing, gravure printing, It can be formed by methods such as lithographic printing, stencil printing, ink jet printing, coating, etc. do.

[0397] As shown in FIG. 36(B) and FIG. 39(A)(B), the pixel configuration of the display device is as follows: By using a structure including two transistors and one capacitor, the number of wirings can be reduced. For example, as shown in FIG. 36(B) and FIG. 39(A), the pixel may have a gate. The three lines can be a ground line, a data line, and an anode line. This makes it possible to increase the aperture ratio of the pixels of the display device. This makes it difficult for short circuits to occur between adjacent wiring, providing display devices with high yields. It becomes possible to do so.

[0398] Note that the structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0399] (Embodiment 5) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention and a display device including the semiconductor device An electronic device having an input device attached thereto will be described with reference to FIGS.

[0400] <5-1. Explanation of the touch panel> In the present embodiment, an electronic device that combines a display device and an input device is used as an example of the electronic device. A touch panel 2000 having the touch sensor 2000 will be described. The case where the .

[0401] 40(A) and (B) are perspective views of the touch panel 2000. In B), representative components of touch panel 2000 are shown for clarity.

[0402] The touch panel 2000 includes a display device 2501 and a touch sensor 2595 (see FIG. 4). 0(B)). The touch panel 2000 includes a substrate 2510, a substrate 2570, and a substrate The substrate 2510, the substrate 2570, and the substrate 2590 are all However, any one of the substrates 2510, 2570, and 2590 may be flexible. Alternatively, one or all of the components may be configured to be inflexible.

[0403] The display device 2501 includes a plurality of pixels on a substrate 2510 and a display device that can supply signals to the pixels. The plurality of wirings 2511 are arranged around the periphery of the substrate 2510. The wiring 2511 is routed by a wire 2519 formed on the wiring 2511. The wiring 2519 is Electrically connect to 2509(1).

[0404] Here, an example of the configuration of the outer periphery and terminal portion of the substrate 2510 of the display device 2501 will be described. FIG. 41(A) illustrates an example of the outer periphery of the substrate. 41(B) and (C) are cross-sectional views for explaining an example of a terminal portion. 42(A), (B), and (C) are cross-sectional views illustrating an example of a terminal portion.

[0405] The structure shown in FIG. 41(A) is an insulating film 906 on a substrate 2510 and an insulating film on the insulating film 906. A film 907, insulating films 914 and 916 on the insulating film 907, and an insulating film 906 and an insulating film 916 an insulating film 918 on the insulating film 918; an insulating film 956 on the insulating film 918; and an insulating film 940 on the insulating film 956. and a sealant 942 over the insulating film 956 and the insulating film 940.

[0406] The insulating films 906, 907, 914, 916, 918, and 956 are the same as those in the first embodiment. The insulating films 106, 107, 114, 116, 118, and 156 shown in FIG. It can be formed more.

[0407] The insulating film 940 may be made of an organic insulating material such as an acrylic resin. By forming the insulating film 940, it is possible to flatten out the unevenness caused by the transistors, etc. The sealing material 942 can be made of, for example, epoxy resin or glass. It is preferable to use a frit as the sealing material. It is preferable to use an opaque material.

[0408] By using the structure of the outer periphery of the substrate shown in FIG. 41A, the insulating film 906 and the insulating film 918 are However, since it is installed in contact with the surface, it is possible to prevent impurities such as moisture from entering from the outside. can.

[0409] The structure shown in FIG. 41B is a structure including a conductive film 904 on a substrate 2510 and a conductive film 905 on the substrate 2510. An insulating film 906 on the film 904, an insulating film 907 on the insulating film 906, and a conductive film on the insulating film 907. A film 912, insulating films 914 and 916 on the conductive film 912, and the insulating film 916 and the conductive film 912 The insulating films 906 and 916 and the insulating film on the oxide semiconductor film 920 The insulating film 918 and the insulating film 956 on the insulating film 918 are also included. An opening 930a reaching the oxide semiconductor film 920 is provided in the insulating film 918. An opening 930b reaching the oxide semiconductor film 920 is provided in the oxide semiconductor film 956. The semiconductor film 920 is electrically connected to the FPC 2509(1) via the anisotropic conductive film 944. This is being continued.

[0410] The conductive films 904 and 912 and the oxide semiconductor film 920 are the same as those in the conductive film 904 and the oxide semiconductor film 912 described in Embodiment 1. The conductive film 104, the conductive film 112, and the oxide semiconductor film 120 are formed using the same material and method. It is possible.

[0411] In FIG. 41B, a conductive film 904 is provided over a substrate 2510. However, the present invention is not limited to this. For example, as shown in FIG. 41(C), The conductive film 904 may not be provided.

[0412] In addition, in FIG. 41B and FIG. 41C, an oxide semiconductor film 920 is provided over the conductive film 912. However, the present invention is not limited to this. For example, as shown in FIG. Alternatively, the oxide semiconductor film 920 may not be provided over the conductive film 912. As shown in FIG. 1, the conductive film 904 and the oxide semiconductor film 920 may not be provided. Alternatively, as shown in FIG. 42C, a conductive film 958 may be provided to cover the opening 930b. In the case of the structure shown in FIG. 42C, the anisotropic conductive film 944 may be a conductive film 958. and electrically connected to the conductive film 912 through the oxide semiconductor film 920.

[0413] As shown in FIG. 41B and FIG. 41C, the anisotropic conductive film 944 is connected to In the region, an oxide semiconductor film 920 is preferably provided. By adopting this configuration, it is possible to improve the adhesion between the terminal portion and the anisotropic conductive film 944. .

[0414] The substrate 2590 is electrically connected to the touch sensor 2595. The plurality of wirings 2598 are connected to the outer periphery of the substrate 2590. The terminal is electrically connected to the FPC2509(2). In FIG. 40(B), for clarity, the back side of the substrate 2590 (substrate 2 The electrodes and wiring of the touch sensor 2595 provided on the surface opposite to the touch panel 510 are shown by solid lines. is.

[0415] As the touch sensor 2595, for example, a capacitive touch sensor can be used. The capacitive type includes a surface type capacitive type and a projected type capacitive type.

[0416] The projected capacitive type is classified into self-capacitance type, mutual capacitance type, etc., mainly based on the difference in the driving method. The mutual capacitance method is preferable because it enables simultaneous multi-point detection.

[0417] The touch sensor 2595 shown in FIG. 40(B) is a projected capacitive touch sensor. This is a configuration in which the .

[0418] The touch sensor 2595 can detect the proximity or contact of a detection target such as a finger. Various sensors can be applied.

[0419] The projected capacitive touch sensor 2595 has an electrode 2591 and an electrode 2592. The electrode 2591 is electrically connected to one of a plurality of wirings 2598, and the electrode 2592 is It is electrically connected to any other of the multiple wirings 2598.

[0420] As shown in FIG. 40(A) and (B), the electrodes 2592 are arranged in a single direction. The shape is such that the four quadrilaterals are connected at their corners.

[0421] The electrode 2591 is quadrilateral and is repeated in a direction intersecting the direction in which the electrode 2592 extends. are placed.

[0422] The wiring 2594 is electrically connected to the two electrodes 2591 that sandwich the electrode 2592. In this case, it is preferable that the area of ​​the intersection between the electrode 2592 and the wiring 2594 is as small as possible. This reduces the area of ​​the region where no electrodes are provided, reducing variations in transmittance. As a result, the variation in the brightness of the light passing through the touch sensor 2595 can be reduced. can be done.

[0423] The shapes of the electrodes 2591 and 2592 are not limited to this, and may take various shapes. For example, multiple electrodes 2591 are arranged with as few gaps as possible, and are A plurality of electrodes 2592 are provided at intervals so that there is an area where the electrodes 2592 do not overlap with the electrodes 2591. In this case, a wire may be provided between two adjacent electrodes 2592, which is electrically isolated from the two adjacent electrodes 2592. Providing an insulated dummy electrode is preferable because it can reduce the area of ​​the region with different transmittance. .

[0424] In addition, the conductive films such as the electrodes 2591, the electrodes 2592, and the wiring 2598, that is, the touch panel Materials that can be used for the wiring and electrodes that make up the filter include indium oxide, tin oxide, and oxide. Examples of the transparent conductive film include a transparent conductive film having zinc oxide or the like (e.g., ITO, etc.). As a material that can be used for the wiring and electrodes that constitute the device, for example, a material with a low resistance value is preferable. Examples include silver, copper, aluminum, carbon nanotubes, graphene, and halogens. Metal halide (silver halide, etc.) may also be used. Even if metal nanowires (diameters of several nanometers) are used, which are made up of multiple conductors, Alternatively, a metal mesh made of a conductor may be used. Nanowires, Cu nanowires, Al nanowires, Ag mesh, Cu mesh, Al plate For example, Ag nanowires may be used for the wiring and electrodes that make up the touch panel. When using a material with a visible light transmittance of 89% or more and a sheet resistance of 40 Ω / cm 2 End 100Ω / cm 2 The wiring constituting the above-mentioned touch panel can be as follows. Examples of materials that can be used for the electrodes include metal nanowires, metal meshes, and carbon nanotubes. Nanotubes and graphene have high transmittance in visible light, so they are used in display elements. It may also be used as an electrode (for example, a pixel electrode or a common electrode).

[0425] <5-2. Explanation of display device> Next, the display device 2501 will be described in detail with reference to FIGS. 43(A) and 43(B). 3(A) and (B) correspond to a cross-sectional view taken along dashed line X1-X2 shown in FIG. 40(B).

[0426] The display device 2501 has a plurality of pixels arranged in a matrix. The display device has a display element and a pixel circuit for driving the display element.

[0427] [Configuration using EL elements as display elements] First, a configuration using an EL element as a display element will be described below with reference to FIG. In the following description, the case where an EL element that emits white light is applied is taken as an example. However, the EL element is not limited to this. For example, EL elements having different luminescent colors may be applied so that the colors of the EL elements are different.

[0428] The substrate 2510 and the substrate 2570 are, for example, a substrate having a water vapor permeability of 10 -5 g / (m 2 ·day) or less, preferably 10 -6 g / (m 2 -Flexibility of less than 1000m2 Alternatively, the thermal expansion coefficient of the substrate 2510 and the thermal expansion coefficient of the substrate 2570 may be set to be equal to or larger than the thermal expansion coefficient of the substrate 2570. It is preferable to use a material with a linear expansion coefficient approximately equal to that of the material. For example, a material with a linear expansion coefficient of 1×10 - 3 / K or less, preferably 5×10 -5 / K or less, more preferably 1×10 -5 / K or less Certain materials may be used advantageously.

[0429] The substrate 2510 is made of an insulating layer 2510a for preventing impurities from diffusing into the EL element, and a flexible The substrate 2510b and the adhesive layer 2 that bonds the insulating layer 2510a and the flexible substrate 2510b together 510c. The substrate 2570 is a laminate having a structure for preventing diffusion of impurities into the EL element. and a flexible substrate 2570b. 2570b and an adhesive layer 2570c that bonds the first and second layers 2570a and 2570b to each other.

[0430] The adhesive layer 2510c and the adhesive layer 2570c may be made of, for example, polyester or polyolefin. Polyimide, polycarbonate or acrylic Materials containing polystyrene resin, polyurethane, epoxy resin or resin with siloxane bonds can be used.

[0431] In addition, a sealing layer 2560 is provided between the substrate 2510 and the substrate 2570. It is preferable that the refractive index of the sealing material is larger than that of air. When light is extracted to the layer 2560 side, the sealing layer 2560 can also serve as an optical element.

[0432] In addition, a sealant 2561 may be formed on the outer periphery of the sealing layer 2560. By using the sealing material 2510, the substrate 2570, the sealing layer 2560, and the sealing material 2511, The EL element 2550 can be provided in the region surrounded by 561. Layer 2560 may be filled with an inert gas (such as nitrogen or argon). A desiccant may be provided in the desiccant gas to adsorb moisture and the like.

[0433] The display device 2501 shown in FIG. 43A includes a pixel 2505. 505 is a light emitting module 2580, an EL element 2550, and a The transistor 2502t can supply the 2t functions as a part of the pixel circuit.

[0434] The light emitting module 2580 also includes an EL element 2550 and a coloring layer 2567 . The EL element 2550 has a lower electrode, an upper electrode, and an EL element between the lower electrode and the upper electrode. The layer.

[0435] In addition, when the sealing layer 2560 is provided on the side from which light is extracted, the sealing layer 2560 has a property of E It contacts the L element 2550 and the colored layer 2567 .

[0436] The colored layer 2567 is located so as to overlap the EL element 2550. A part of the light emitted by the light emitting module 50 passes through the colored layer 2567 and travels in the direction of the arrow shown in the figure. It is ejected outside of the ball 2580.

[0437] Furthermore, the display device 2501 is provided with a light-shielding layer 2568 in the light-emitting direction. A layer 2568 is provided surrounding the colored layer 2567 .

[0438] The colored layer 2567 may have a function of transmitting light of a specific wavelength band. For example, For example, a color filter that transmits light in the red wavelength band, a color filter that transmits light in the green wavelength band, A color filter that transmits light in the blue wavelength range, a color filter that transmits light in the yellow wavelength range, Each color filter can be made of various materials. Printing method, inkjet method, etching method using photolithography technology, etc. It can be formed with.

[0439] The display device 2501 is provided with an insulating layer 2521. The insulating layer 2521 covers the transistor 2502t and the like. In addition, the insulating layer 2521 has a function of suppressing diffusion of impurities. This prevents the reliability of the transistors 2502t and the like from being deteriorated due to the diffusion of impurities. can be suppressed.

[0440] The EL element 2550 is formed above the insulating layer 2521. The lower electrode of 50 is provided with a partition wall 2528 that overlaps with an edge of the lower electrode. A spacer for controlling the distance between the substrate 2510 and the substrate 2570 is formed on the partition wall 2528. You may do so.

[0441] The scanning line driver circuit 2504 includes a transistor 2503t and a capacitor 2503c. Note that the driver circuit and the pixel circuit can be formed on the same substrate in the same process. .

[0442] Moreover, wiring 2511 capable of supplying signals is provided on the substrate 2510 . In addition, a wiring 2519 is provided on the wiring 2511. C2509(1) is electrically connected to FPC2509(1). FPC2509(1) also transmits video signals, It has the function of supplying clock signals, start signals, reset signals, etc. 509(1) may have a printed wiring board (PWB) attached.

[0443] Note that either one or both of the transistor 2502t and the transistor 2503t The transistor described in the above embodiment may be used for the transistor. The transistor has a highly purified oxide semiconductor film with high crystallinity. Therefore, the current value (off-state current value) at the time of the image signal or other electric signals can be reduced. The retention time of the data can be extended, and the write interval can also be set longer when the power is on. This reduces the frequency of refresh operations, resulting in reduced power consumption. The refresh operation will be described in detail later.

[0444] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a display device. By using this in the device 2501, the switching transistor of the pixel circuit and the In other words, a separate driver circuit can be formed on the same substrate. Since it is not necessary to use a semiconductor device formed of a silicon wafer or the like, The number of parts in the device can be reduced. Also, the pixel circuit can be driven at high speed. By using a transistor, a high-quality image can be provided.

[0445] [Configuration using liquid crystal elements as display elements] Next, a configuration in which a liquid crystal element is used as a display element will be described below with reference to FIG. In the following description, a reflective liquid crystal display device that displays images by reflecting external light will be described. However, the liquid crystal display device is not limited to this. For example, a light source (backlight , side lights, etc.) to create a transmissive liquid crystal display device, or a combination of reflective and transmissive functions. The liquid crystal display device may also be provided with such a function.

[0446] The display device 2501 shown in FIG. 43(B) has the following features similar to the display device 2501 shown in FIG. 43(A). The other configuration is the same as the display device 2501 shown in FIG. It is.

[0447] A pixel 2505 of a display device 2501 shown in FIG. 43B includes a liquid crystal element 2551 and a liquid crystal and a transistor 2502t capable of supplying power to the transistor 2551.

[0448] The liquid crystal element 2551 includes a lower electrode (also called a pixel electrode), an upper electrode, and a lower electrode and an upper electrode, and a liquid crystal layer 2529 between the lower electrode and the upper electrode. The alignment state of the liquid crystal layer 2529 can be changed by applying a voltage between the electrodes. In addition, a spacer 2530a and a spacer 2530b are provided in the liquid crystal layer 2529. Although not shown in FIG. 43B, the liquid crystal layer 25 of the upper electrode and the lower electrode An alignment film may be provided on each side in contact with 29.

[0449] The liquid crystal layer 2529 may be a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, or a high molecular weight polymer. The liquid crystal material can be a dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. Depending on the conditions, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. In addition, when the liquid crystal display device adopts the in-plane electric field method, the alignment film A liquid crystal that exhibits a blue phase without using a core may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, this phenomenon appears immediately before the transition from the cholesteric phase to the isotropic phase. The blue phase is only manifested in a narrow temperature range, so several studies have been carried out to improve the temperature range. A liquid crystal composition containing 100% by weight of chiral agent is used for the liquid crystal layer. The liquid crystal composition containing the chiral agent has a short response time. In addition, when a liquid crystal composition that contains the liquid crystal composition and the ... does not require an alignment treatment. In this case, the viewing angle dependency of the liquid crystal element is small. Also, since there is no need to provide an alignment film, rubbing treatment is not required. This eliminates the need for rubbing, which can prevent electrostatic damage caused by rubbing. This can reduce defects and damage to the liquid crystal display device during the manufacturing process.

[0450] The spacers 2530a and 2530b are obtained by selectively etching the insulating film. The spacers 2530a and 2530b are spaced apart from the substrate 2510 and the substrate 2570. The spacers 2530a and 2530b are provided to control the cell gap. The sizes of the particles may be different from each other, and it is preferable that the particles are provided in a columnar or spherical shape. In FIG. 43(B), spacers 2530a and 2530b are provided on the substrate 2570 side. However, the present invention is not limited to this configuration, and the electrodes may be provided on the substrate 2510 side.

[0451] The upper electrode of the liquid crystal element 2551 is provided on the substrate 2570 side. An insulating layer 2531 is provided between the electrode and the coloring layer 2567 and between the electrode and the light-shielding layer 2568. The edge layer 2531 has a function of flattening unevenness caused by the colored layer 2567 and the light-shielding layer 2568. The insulating layer 2531 may be, for example, an organic resin film. The lower electrode 2551 functions as a reflective electrode. 501 is a reflection type display that uses external light, reflects the light at the lower electrode, and displays the light through the color layer 2567. In the case of a transmission type liquid crystal display device, a transparent electrode is used as the lower electrode. All that is needed is to give it a function as a pole.

[0452] The display device 2501 shown in FIG. 43B includes an insulating layer 2522. The insulating layer 2522 covers the transistor 2502t and the like. and forming unevenness in the lower electrode of the liquid crystal element. This makes it possible to form irregularities on the surface of the lower electrode. When light is incident on the lower electrode, it becomes possible for the light to be diffusely reflected on the surface of the lower electrode. In the case of a transmission type liquid crystal display device, the above-mentioned unevenness can be provided. It is also possible to adopt a configuration in which this is not necessary.

[0453] <5-3. Explanation of touch sensor> Next, the touch sensor 2595 will be described in detail with reference to FIG. 40(B) along dashed line X3-X4.

[0454] The touch sensor 2595 includes electrodes 2591 and electrodes 2592 arranged in a staggered pattern on a substrate 2590. 2592, an insulating layer 2593 covering the electrodes 2591 and 2592, and adjacent electrodes 25 91 and a wiring 2594 that electrically connects them.

[0455] The electrode 2591 and the electrode 2592 are formed using a light-transmitting conductive material. Examples of conductive materials having the above structure include indium oxide, indium tin oxide, and indium zinc oxide. Conductive oxides such as zinc oxide, zinc oxide doped with gallium can be used. A film containing graphene may also be used. The film containing graphene may be, for example, a film-like The graphene oxide-containing film formed on the substrate can be reduced to form the graphene oxide-containing film. An example of such a method is the application of heat.

[0456] For example, a light-transmitting conductive material is formed on the substrate 2590 by a sputtering method. After that, various patterning techniques such as photolithography are used to remove unnecessary parts. , an electrode 2591 and an electrode 2592 can be formed.

[0457] The material used for the insulating layer 2593 is, for example, a resin such as acrylic or epoxy. In addition to resins with siloxane bonds, silicon oxide, silicon oxynitride, aluminum oxide, Alternatively, inorganic insulating materials such as rubber may be used.

[0458] In addition, an opening reaching the electrode 2591 is provided in the insulating layer 2593, and a wiring 2594 is adjacent to the insulating layer 2593. The transparent conductive material is used to increase the aperture ratio of the touch panel. Since the electrode 2591 can be formed by the above-mentioned method, it can be suitably used for the wiring 2594. A material having a higher electrical conductivity than the electrode 2592 is preferable for the wiring 2594 because it can reduce electrical resistance. It can be used appropriately.

[0459] The electrodes 2592 extend in one direction, and a plurality of electrodes 2592 are provided in a stripe pattern. In addition, the wiring 2594 is provided so as to intersect with the electrode 2592.

[0460] A pair of electrodes 2591 are provided with one electrode 2592 interposed therebetween. A pair of electrodes 2591 are electrically connected.

[0461] In addition, the multiple electrodes 2591 are arranged in a direction that is not necessarily perpendicular to one electrode 2592. The angle does not have to be 0 degrees, and may be greater than 0 degrees but less than 90 degrees.

[0462] The wiring 2598 is electrically connected to the electrode 2591 or the electrode 2592. A part of the wiring 2598 functions as a terminal. The wiring 2598 is made of, for example, aluminum. Aluminum, gold, platinum, silver, nickel, titanium, tungsten, chromium, molybdenum, iron, Use of metal materials such as ballast, copper, or palladium, or alloy materials containing such metal materials. can be done.

[0463] An insulating layer is provided to cover the insulating layer 2593 and the wiring 2594, and the touch sensor 2595 may be protected.

[0464] The connection layer 2599 electrically connects the wiring 2598 and the FPC 2509(2). .

[0465] The connection layer 2599 is made of an anisotropic conductive film (ACF). conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0466] <5-4. Explanation of the touch panel> Next, the touch panel 2000 will be described in detail with reference to FIG. 40(A) along dashed line X5-X6.

[0467] The touch panel 2000 shown in FIG. 45 includes the display device 2501 described in FIG. 43(A), This configuration is formed by bonding the touch sensor 2595 described in FIG.

[0468] The touch panel 2000 shown in FIG. 45 has the configuration described in FIG. 43(A) and FIG. In addition, it has an adhesive layer 2597 and an anti-reflection layer 2569.

[0469] The adhesive layer 2597 is provided in contact with the wiring 2594. The substrate 2590 is attached to the substrate 2570 so that the sensor 2595 overlaps the display device 2501. In addition, it is preferable that the adhesive layer 2597 is transparent. The material 597 may be a thermosetting resin or an ultraviolet-curing resin. For example, Acrylic resin, urethane resin, epoxy resin, or siloxane resin can be used. This can be done.

[0470] The anti-reflection layer 2569 is provided at a position overlapping the pixel. For example, a circular polarizer can be used.

[0471] <5-5. Explanation of touch panel driving method> Next, an example of a method for driving a touch panel will be described with reference to FIG.

[0472] FIG. 46A is a block diagram showing the configuration of a mutual capacitance type touch sensor. In (A), a pulse voltage output circuit 2601 and a current detection circuit 2602 are shown. In FIG. 46(A), the electrodes 2621 to which the pulse voltage is applied are designated as X1-X6, and the change in current The electrodes 2622 for detecting the change are shown as Y1-Y6, each having six wires. FIG. 46(A) shows a capacitance formed by overlapping an electrode 2621 and an electrode 2622. 2603. The electrodes 2621 and 2622 are interchangeable in function. It may be possible.

[0473] The pulse voltage output circuit 2601 is a circuit for applying pulses to the wirings X1-X6 in sequence. When a pulse voltage is applied to the wiring of X1-X6, the voltage that forms the capacitance 2603 An electric field is generated between the electrodes 2621 and 2622. The electric field generated between the electrodes is blocked by By using the change in the mutual capacitance of the capacitance 2603, the proximity of the object to be detected or A contact can be detected.

[0474] The current detection circuit 2602 detects the change in mutual capacitance of the capacitor 2603 between the wirings Y1-Y6. This is a circuit to detect changes in current at the sensor. The wiring of Y1-Y6 detects the proximity of the object to be detected, Or, if there is no contact, the detected current value will not change, but the proximity of the object to be detected, or When the mutual capacitance decreases due to contact, a change in the current value is detected. The detection may be performed using an integrating circuit or the like.

[0475] Next, FIG. 46(B) shows the input of the mutual capacitance type touch sensor shown in FIG. 46(A). The timing chart of the output waveform is shown in FIG. 46(B). In FIG. 46(B), the case where the object is not detected ( Two cases are shown: when the sensor detects a target object (touch) and when the sensor detects a target object (non-touch). For the wiring Y1-Y6, the waveform is shown as a voltage value corresponding to the detected current value. There are.

[0476] A pulse voltage is applied to the wires X1-X6 in sequence, and the The waveform in the Y6 wiring changes. When there is no proximity or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the point of contact, the current value decreases, and the corresponding voltage waveform also changes. do.

[0477] In this way, by detecting the change in mutual capacitance, the proximity or contact of the object to be detected can be detected. It is possible.

[0478] <5-6. Explanation of sensor circuit> In FIG. 46A, only a capacitor 2603 is provided at the intersection of the wiring as a touch sensor. Although the configuration of a passive touch sensor has been shown, an active touch sensor having a transistor and a capacitor may also be used. One of the sensor circuits included in the active type touch sensor may be a An example is shown in Figure 47.

[0479] The sensor circuit shown in FIG. 47 includes a capacitor 2603, a transistor 2611, and a transistor 2612 and a transistor 2613.

[0480] A signal G2 is applied to the gate of the transistor 2613, and a voltage is applied to either the source or drain of the transistor 2613. A voltage VRES is applied to one electrode of a capacitor 2603 and a transistor 2611. The transistor 2611 has a source and a drain that are electrically connected to each other. One of the source and drain of the transistor 2612 is electrically connected to the other of the source and drain of the transistor 2612. A signal G1 is applied to the gate of the transistor 2612, and a signal S is applied to the source or The other electrode of the drain is electrically connected to the wiring ML. The other electrode of the capacitor 2603 is connected to a voltage VS S is given.

[0481] Next, the operation of the sensor circuit shown in FIG. 47 will be described. First, the signal G2 is When a potential is applied to turn on the transistor 2613, the gate of the transistor 2611 is turned on. A potential corresponding to the voltage VRES is applied to the node n to which the input is connected. When a potential that turns off the transistor 2613 is applied, the potential of the node n is Retained.

[0482] Next, the mutual capacitance of the capacitor 2603 changes due to the proximity or contact of a detection object such as a finger. Accordingly, the potential of the node n changes from VRES.

[0483] The read operation applies a potential to the signal G1 that turns on the transistor 2612. A current flows through the transistor 2611 in accordance with the potential of the node n, that is, a current flows through the wiring ML. By detecting this current, the proximity or contact of the object to be detected can be detected. This can be done.

[0484] The transistors 2611, 2612, and 2613 are In particular, the transistor 2613 may be a transistor having the above-mentioned structure. By using the transistor described in the embodiment, the potential of the node n can be maintained for a long period of time. It becomes possible to hold the voltage, and the operation of supplying VRES to node n again (refresh operation) ) can be reduced.

[0485] Note that the structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0486] (Embodiment 6) In this embodiment, a display element of a lateral electric field mode (also called a horizontal electric field mode) is used. A display device using a liquid crystal element will be described with reference to FIG.

[0487] FIG. 48 is a flow diagram for explaining the manufacturing process of a display device using a lateral electric field mode liquid crystal element. In FIG. 48, oxide semiconductors (particularly CAAC-OS), low-temperature polysilicon (LTPS (Low Temperature Poly-Silicon)), and When hydrogenated amorphous silicon (a-Si:H) is used as the active layer of a transistor, 1 shows an example of a manufacturing process for each of the above.

[0488] <6-1.CAAC-OS> We will explain the case where the CAAC-OS is used in a transistor. A gate electrode (GE) is formed in the device (SP). When processing the gate electrode, one mask is used.

[0489] Next, a gate insulating film (GI) is formed on the gate electrode using a PECVD device. Then, a sputtering device is used to form a silicon sulator on the gate insulating film. An oxide semiconductor (OS) film is formed as an active layer. The oxide semiconductor film is processed into islands. Use one mask when

[0490] Next, a part of the gate insulating film is processed to form an opening that reaches the gate electrode. When forming the opening, one mask is used.

[0491] Next, a conductive film is formed over the gate insulating film and the oxide semiconductor film by using a sputtering apparatus. The conductive film is then processed to form source and drain electrodes (S / D electrodes). In addition, one mask is used when forming the source electrode and the drain electrode.

[0492] Next, a PECVD apparatus is used to form a pas- on the oxide semiconductor film, the source electrode, and the drain electrode. An oxidization film is formed.

[0493] Next, a part of the passivation film is processed to create an opening that reaches the source electrode or the drain electrode. When forming the opening (contact opening), one mask is used. Use.

[0494] Next, a film is placed on the passivation film so as to cover the opening formed in the passivation film. A conductive film is formed using a sputtering device, and the conductive film is processed to form a common electrode. When forming the common electrode, one mask is used.

[0495] Next, an insulating film is formed on the passivation film and the common electrode using a PECVD device. Then, a part of the insulating film is opened to form an opening that reaches the source electrode or the drain electrode. When forming the insulating film (when forming an opening in a part of the insulating film), Use one card.

[0496] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. The pixel electrodes are formed by this process. Note that one mask is used to form the pixel electrodes.

[0497] Through the above steps, a liquid crystal display device of the in-plane electric field mode can be manufactured. When the -OS is used, the number of masks required for a lateral electric field mode liquid crystal display device is eight.

[0498] <6-2.LTPS> The case where LTPS is used for a transistor will be described. First, a sputtering device is A light-shielding film is formed using a mask.

[0499] Next, a base insulating film is formed on the light-shielding film using a PECVD device. Using a PECVD device, Si is formed on the film to become the active layer. In order to anneal the material, excimer laser annealing (ELA: Excimer Laser Annealing) is used. After the ELA process, the active layer Si is annealed by crystallizing silicon ( In order to perform ELA on a large area, However, this requires large equipment, and linear irregularities peculiar to ELA may occur.

[0500] Next, the p-Si is processed to form islands. Use one mask for the eye formation.

[0501] Next, a gate insulating film (GI) is formed on the p-Si using a PECVD device. After that, a gate electrode (GE) is formed on the gate insulating film using a sputtering device. In addition, when forming a gate electrode, one mask is used. Additionally, a part of the gate insulating film is also removed.

[0502] Next, ion doping (ID:Ion Doping) is performed to form an n+ region in the p-Si. The impurity is implanted using a masking device. Next, to form an n-region in the p-Si, an ion doping device is used. When forming the n-region, the impurity is implanted on the entire surface without using a mask. Next, an ion doping device is used to form a p+ region in the p-Si. The impurity is implanted using a mask. do.

[0503] Next, thermal activation is performed. For the thermal activation, an annealing furnace, an RTA device, etc. may be used. stomach.

[0504] Next, an interlayer insulating film is formed on the p-Si and the gate electrode using a PECVD apparatus. Then, the interlayer insulating film and a part of the gate insulating film are processed to form n+ and p+ regions. When forming the opening (GI+interlayer insulating film contact Use one mask for each opening.

[0505] Next, a conductive film is formed on the interlayer insulating film in which the opening is formed, using a sputtering device. The conductive film is then processed to form source and drain electrodes (S / D electrodes). It should be noted that one mask is used when forming the source electrode and the drain electrode.

[0506] Next, a planarizing insulating film is formed on the source electrode and the drain electrode using a coater device. As the planarizing insulating film, for example, an organic resin film or the like may be used. An opening reaching the source electrode or the drain electrode is formed in the Use one mask when doing so.

[0507] Next, a conductive film is formed on the planarizing insulating film by using a sputtering apparatus. A common electrode is formed on the substrate. When forming the common electrode, one mask is used.

[0508] Next, an insulating film is formed on the common electrode using a PECVD apparatus. An opening is formed in a part of the insulating layer, reaching the source electrode or the drain electrode. When forming the film (when forming an opening in a part of the insulating film), one mask is used.

[0509] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. The pixel electrodes are formed by this process. Note that one mask is used to form the pixel electrodes.

[0510] Through the above steps, a liquid crystal display device of the lateral electric field mode can be manufactured. When using this, the number of masks required for a lateral electric field mode liquid crystal display device is 11.

[0511] <6-3.a-Si:H> The case where a-Si:H is used for a transistor will be explained. First, the sputtering equipment The gate electrode (GE) is formed using a mask. Use one.

[0512] Next, a gate insulating film (GI) is formed on the gate electrode using a PECVD apparatus. After that, a silicon film that will become the active layer is formed on the gate insulating film using a PECVD device. When processing the silicon film into islands, one mask is used.

[0513] Next, a part of the gate insulating film is processed to form an opening that reaches the gate electrode. When forming the opening (contact opening), one mask is used.

[0514] Next, a conductive film is formed on the gate insulating film and the silicon film using a sputtering device. The conductive film is processed to form source and drain electrodes (S / D electrodes). In addition, one mask is used when forming the source electrode and the drain electrode.

[0515] Next, a conductive film is formed on the source electrode and the drain electrode by using a sputtering device. The conductive film is processed to form a common electrode. , use one mask.

[0516] Next, an insulating film is formed on the common electrode using a PECVD apparatus. An opening is formed in a part of the insulating film, which reaches the source electrode or the drain electrode. When forming an opening in an insulating film, one mask is used.

[0517] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. The pixel electrodes are formed by this process. Note that one mask is used to form the pixel electrodes.

[0518] By the above process, a liquid crystal display device of the horizontal electric field mode can be manufactured. When using :H, the number of masks required for a lateral electric field mode liquid crystal display device is seven.

[0519] In each flow shown for CAAC-OS, LTPS, and a-Si:H, The electrodes, the insulating film on the common electrode, and the pixel electrodes are formed by using a liquid crystal display in a horizontal electric field mode. Due to the process involved in the display device, the liquid crystal element is in the vertical electric field mode (e.g. VA mode, etc.) ) liquid crystal display device or when an organic EL element is used as a display element. may be different steps.

[0520] As shown in FIG. 48, a CAAC By using -OS, the manufacturing process can be simplified compared to LTPS. By using CAAC-OS, it is possible to manufacture with the same number of masks as a-Si:H. do.

[0521] The characteristics of each process are summarized in Table 1.

[0522] [Table 1]

[0523] In Table 1, the "Total number of masks" refers to the number of masks caused by the electrode process of the liquid crystal element. The number of masks is the total number of masks due to the FET process and the number of masks due to the FET process. "Number of masks for CAA T only" refers to the number of masks due to the FET process. By using C-OS, it is possible to fabricate the same number of masks as a-Si:H, and Electrical properties (field effect mobility (or simply mobility), or on / off ratio, etc.) Therefore, by using CAAC-OS, it is possible to produce a display device with high display quality. In addition, as shown in Table 1, CAAC-OS has a higher prismatic speed than LTPS. The maximum process temperature is low, and the device cost and plant cost are low. This makes it possible to realize a display device with reduced manufacturing costs.

[0524] In addition, transistors using oxide semiconductors, such as CAAC-OS, can be used Compared to the transistors used, 1. off-current is low, 2. there is no short channel effect 3. High voltage resistance, or 4. Little change in temperature characteristics. In addition, a transistor using an oxide semiconductor has a substantially improved effect. It has the same switching speed or frequency characteristics (also called frequency characteristics) as a transistor. Therefore, high-speed operation is possible. A display device having such a display element can realize a display device with high display quality and high reliability. do.

[0525] Note that the structure described in this embodiment mode can be used in appropriate combination with other embodiment modes. Cut.

[0526] (Embodiment 7) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention and a display device including the semiconductor device A method for driving the display device will be described with reference to FIGS.

[0527] Note that the display device of one embodiment of the present invention includes an information processing unit, a calculation unit, a storage unit, a display unit, and an input unit. The second embodiment may have a second portion, etc.

[0528] In addition, in the display device according to one embodiment of the present invention, the same image (still image) is continuously displayed. In this case, by reducing the number of times the same image signal is written (also called refreshing), This allows for a reduction in power consumption. The frequency of refreshing can be set as the refresh rate. The refresh rate is also called the scanning frequency or vertical synchronization frequency. The present invention describes a display device that reduces image distortion and reduces eye fatigue.

[0529] There are two types of eye fatigue: nervous fatigue and muscular fatigue. Staring at the light-emitting or flashing screen of the device for a long period of time can cause the brightness to irritate the retina, nerves, and brain. Muscular fatigue is caused by the ciliary muscles, which are used to adjust the focus. It tires the flesh by overworking it.

[0530] FIG. 49(A) is a schematic diagram showing a display of a conventional display device. As shown in FIG. In contrast, conventional display devices rewrite images 60 times per second. Looking at a screen for a long time can stimulate the retina, nerves, and brain of the user's eyes, causing eye fatigue. There was a risk of being woken up.

[0531] In the display device of one embodiment of the present invention, a transistor using an oxide semiconductor is provided in a pixel portion of the display device. A transistor using CAAC-OS, for example, is applied. The off-state current of the transistor is extremely small. Therefore, even if the refresh rate of the display device is lowered, the display This makes it possible to maintain the brightness of the display device.

[0532] In other words, as shown in FIG. 49(B), for example, an image can be rewritten once every five seconds. This allows the user to watch the same image for as long as possible, and the screen that is visible to the user is This reduces the stimulation of the retina, nerves, and brain of the user's eyes, and improves the nerve function. System fatigue is reduced.

[0533] Also, as shown in FIG. 50(A), when the size of one pixel is large (for example, when the resolution is 15 If the resolution is less than 100 ppi, the characters displayed on the display device will be blurred. When you look at blurry, blurry text for a long time, your ciliary muscles work constantly to bring the image into focus. Even if you are using your eyesight, you may still have difficulty focusing, which can cause strain on your eyes. There is a risk that this will happen.

[0534] In contrast, as shown in FIG. 50B, in a display device according to one embodiment of the present invention, The small size of the image allows for high-definition display, resulting in a detailed and smooth display. This allows the ciliary muscles to focus more easily, reducing fatigue in the user's muscular system. The resolution of the display device should be 150 ppi or more, preferably 200 ppi or more. More preferably, the value is set to 300 ppi or more to effectively alleviate fatigue in the user's muscular system. can be reduced.

[0535] Methods for quantitatively measuring eye fatigue are currently being considered. The value index is the Critical Flicker Frequency (CFF). In addition, the evaluation index of muscle fatigue is known as Known examples of such factors include adjustment time and adjustment near point distance.

[0536] Other methods for assessing eye fatigue include electroencephalography, thermography, and blink count. Measurement of eye movement, tear volume evaluation, pupil contraction reaction rate evaluation, questionnaire to investigate subjective symptoms There are also other projects.

[0537] For example, the driving method of the display device according to one embodiment of the present invention can be evaluated by the above-mentioned various methods. This can be done.

[0538] <7. Driving method of the display device> Here, a method for driving a display device of one embodiment of the present invention will be described with reference to FIG.

[0539] [Image information display example] The following is an example of moving and displaying an image containing two different image information. .

[0540] FIG. 51A shows a window 451 on a display unit 450 and 4 shows an example in which a first image 452a, which is a still image, is displayed.

[0541] At this time, it is preferable that the display is performed at the first refresh rate. The refresh rate is 1.16 x 10 -5 Hz (approximately once a day) or more Hz or less, or 2.78 x 10 -4 Hz (approximately once per hour) to 0.5 Hz , or 1.67 × 10 -2 Hz (approximately once per minute) or more and 0.1 Hz or less. This can be done.

[0542] In this way, the first refresh rate is set to a very small value, and the screen rewriting Reducing the frequency allows for a virtually flicker-free display, making it more effective to use. This can reduce eye fatigue for the user.

[0543] The window 451 is used to execute, for example, an image display application software. The display includes a display area for displaying an image.

[0544] Also at the bottom of window 451 are buttons for switching the display to different image information. The user selects the button 453 to move the image. A command to operate the display device can be given to the information processor of the display device.

[0545] The operation method of the user may be set according to the input means. When a touch panel is used that is provided over the display unit 450, the touch panel is operated by a finger, a stylus, etc. You can input the image by touching the button 453 or by using a gesture such as sliding the image. When using gesture input or voice input, The button 453 does not have to be displayed.

[0546] When the information processing unit of the display device receives a command to move the image, the image is displayed in the window 451. The displayed image begins to move (FIG. 51(B)).

[0547] If the display is performed at the first refresh rate at the time of FIG. 51(A), Before the image movement, it is preferable to change the refresh rate to a second refresh rate. The second refresh rate is a value required for displaying moving images. For example, The second refresh rate is between 30 Hz and 960 Hz, preferably between 60 Hz and 960 Hz. 60Hz or less, more preferably 75Hz to 960Hz, more preferably 120Hz and 960 Hz or less, more preferably 240 Hz or more and 960 Hz or less. .

[0548] Setting the second refresh rate to a value higher than the first refresh rate. This allows moving images to be displayed more smoothly and naturally. This reduces eye fatigue by suppressing the visibility of flickering (also known as flicker) to the user. can be reduced.

[0549] At this time, the images displayed in the window 451 are the first image 452a and the next image The resulting image is a combined image with the first image 452b to be combined. A portion of the image is displayed so that the merged image moves in one direction (here, to the left).

[0550] Also, as the combined image moves, the brightness of the image displayed in the window 451 changes for the first time. The brightness gradually decreases compared to the brightness at the time of the initial stage (at the time of FIG. 51(A)).

[0551] FIG. 51(C) shows the time when the image displayed in the window 451 reaches a predetermined coordinate. Therefore, at this point, the brightness of the image displayed in the window 451 is the highest. low.

[0552] In FIG. 51C, the first image 452a and the second image 452b are located at predetermined coordinates. Each of the coordinates is displayed half at a time, but this is not limited to this and the user can freely It is preferable to make it configurable.

[0553] For example, the ratio of the distance from the initial coordinates to the distance from the final coordinates of the image is A coordinate greater than 0 and less than 1 may be set as the predetermined coordinate.

[0554] In addition, the brightness when the image reaches a specified coordinate can also be freely set by the user. For example, the ratio of the brightness when the image reaches a predetermined coordinate to the initial brightness is preferably 0. or more and less than 1, preferably 0 to 0.8, more preferably 0 to 0.5, etc. Just do that.

[0555] Next, within the window 451, the combined image moves and the brightness increases step by step. (Figure 51(D)).

[0556] FIG. 51(E) shows the point when the coordinates of the combined image reach their final coordinates. Within the dot 451, only the second image 452b is displayed with a brightness equal to the initial brightness. do.

[0557] After the image movement is complete, the refresh rate is changed from the second refresh rate to the It is preferable to change the refresh rate to the first refresh rate.

[0558] By displaying the image in this way, even if the user tries to follow the movement of the image with his / her eyes, the image Since the brightness of the display is reduced, eye fatigue of the user can be reduced. By using such a driving method, a display that is easy on the eyes can be realized.

[0559] [Example of document information display] Next, let's look at an example where you scroll through document information that is larger than the display window. We will explain about this.

[0560] FIG. 52A shows a window 455 on a display unit 450 and 4 shows an example in which a part of document information 456, which is a still image, is displayed.

[0561] At this time, it is preferable that the display is performed at the above-mentioned first refresh rate.

[0562] The window 455 is, for example, a document display application software, a document creation application software, etc. It includes a display area that is displayed by executing application software, etc., and displays document information.

[0563] The document information 456 is a document whose image size is larger vertically than the display area of ​​the window 455. Therefore, only a part of the area is displayed in the window 455. As shown in FIG. 52(A), a window 455 shows which area of ​​document information 456 is displayed. The display may include a scroll bar 457 that indicates whether the

[0564] A command to move an image (also called a scroll command here) is input to the display device via the input unit. When the command is given to the document information 456, the document information 456 starts to move (FIG. 52(B)). The brightness of the image being displayed decreases in stages.

[0565] If the display is performed at the first refresh rate at the time of FIG. 52(A), Before the document information 456 is moved, the refresh rate is changed to the second refresh rate. It is preferable to do so.

[0566] Here, not only the brightness of the image displayed in the window 455 but also the brightness of the image displayed on the display unit 450 Illustrated is a decrease in brightness across the displayed image.

[0567] FIG. 52(C) shows the time when the coordinates of the document information 456 reach the predetermined coordinates. At this time, the brightness of the entire image displayed on display unit 450 becomes the lowest.

[0568] Next, document information 456 is displayed while moving within window 455 (see FIG. 52). At this time, the brightness of the entire image displayed on the display unit 450 increases stepwise.

[0569] FIG. 52(E) shows the point in time when the coordinates of the document information 456 reach the final coordinates. In the document 455, an area different from the initially displayed area of ​​the document information 456 is displayed. It is displayed with a brightness equal to the

[0570] After the movement of the document information 456 is completed, the refresh rate is changed to the first refresh rate. It is preferable to change the format to a scalable format.

[0571] By displaying the image in this way, even if the user tries to follow the movement of the image with his / her eyes, the image Since the brightness of the display is reduced, eye fatigue of the user can be reduced. By using such a driving method, a display that is easy on the eyes can be realized.

[0572] In particular, high contrast displays such as document information can cause eye fatigue. Therefore, it is more preferable to apply such a driving method to displaying document information.

[0573] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0574] (Embodiment 8) In this embodiment, a display module, an electronic device, and a display device each including a semiconductor device according to one embodiment of the present invention will be described. The display device will be described with reference to FIGS.

[0575] <8-1. Display module explanation> The display module 8000 shown in FIG. 53 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight 8007, a frame 8009, and a printed circuit board 801 0, has battery 8011.

[0576] The oxide semiconductor film or the semiconductor device according to one embodiment of the present invention is used for, for example, a display panel 8006. It can be used.

[0577] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0578] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the touch panel 006 to make it an optical touch panel.

[0579] The backlight 8007 has a light source 8008. In FIG. In the above embodiment, the light source 8008 is disposed on the light source 8007, but the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a display device of this type, the backlight 8007 may not be provided.

[0580] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0581] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. , this can be omitted when using a commercial power source.

[0582] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0583] <8-2. Explanation of electronic devices> 54(A) to 54(G) are diagrams showing electronic devices. These electronic devices are A body 9000, a display unit 9001, a speaker 9003, and operation keys 9005 (power switch, etc.) includes an operation switch), a connection terminal 9006, a sensor 9007 (force, displacement, position, speed, Acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity Measures field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays The device may have a built-in microphone 9008, etc.

[0584] The electronic devices shown in Figures 54(A) to 54(G) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software ( A function to control processing by a program, wireless communication function, and various functions using wireless communication function Functions for connecting to computer networks, transmitting various data using wireless communication functions, or receiving the program or data recorded on the recording medium, and displaying the program or data. The function of displaying the information on the display unit can be provided. The functions that the electronic device shown in the figure can have are not limited to these, and the electronic device may have a variety of functions. Although not shown in Fig. 54(A) to Fig. 54(G), the electronic device may include The electronic device may have a plurality of display units. The function to take pictures, record videos, and store the images on a recording medium (external or built-in to the camera) ) and a function for displaying the captured image on a display unit.

[0585] The electronic devices shown in FIGS. 54(A) to 54(G) will be described in detail below.

[0586] FIG. 54A is a perspective view showing a portable information terminal 9100. The display unit 9001 has flexibility. The display unit 9001 can be incorporated along the screen. The device is equipped with a touch sensor, and can be operated by touching the screen with a finger or a stylus. By touching the icon displayed on the display 9001, the application can be started. can.

[0587] FIG. 54(B) is a perspective view showing a portable information terminal 9101. For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, the mobile information terminal 9101 can be used as a smartphone. Although the speaker 9003, the connection terminal 9006, the sensor 9007, etc. are omitted in the figure, It can be installed in the same position as the mobile information terminal 9100 shown in FIG. The information terminal 9101 can display text and image information on multiple surfaces. For example, Three operation buttons 9050 (also called operation icons or simply icons) are displayed on the display unit 900. The information 9051 shown in the dashed rectangle can be displayed on one side of the display unit 90. 01. An example of the information 9051 is an e-mail Displays to notify you of incoming calls, SNS (social networking services), etc. , subject of email or SNS, sender name of email or SNS, date and time, time, Battery level, antenna reception strength, etc. Or, information 9051 is displayed. Instead of the information 9051, an operation button 9050 or the like may be displayed at that position.

[0588] FIG. 54C is a perspective view showing a portable information terminal 9102. , and has a function of displaying information on three or more faces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 holds the portable information terminal 9102 in the breast pocket of the clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed on the mobile information terminal 9102 so that it can be observed from above. The user can read the display without taking the mobile information terminal 9102 out of his pocket. You can check the number and decide whether to answer the call or not.

[0589] Fig. 54(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is used for mobile phone calls, e-mail, document browsing and writing, music playback, and Internet communications. It is possible to execute various applications such as computer games. The display unit 9001 has a curved display surface, and displays information along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. Power may also be supplied wirelessly without going through 6.

[0590] 54(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 54(E) is a perspective view of the portable information terminal 9201 in an unfolded state. (F) shows the mobile information terminal 9201 being changed from one of the unfolded and folded states to the other. FIG. 54(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded and is unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 9001 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. The portable information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0591] 55(A) and (B) are perspective views of a display device having multiple display panels. FIG. 55(A) is a perspective view of a state in which a plurality of display panels are rolled up, and FIG. ) is a perspective view of a state in which a plurality of display panels are unfolded.

[0592] The display device 9500 shown in FIG. 55(A) and (B) includes a plurality of display panels 9501 and a shaft portion 9 511 and a bearing portion 9512. The display panels 9501 have a display area 9502 and a light-transmitting region 9503.

[0593] In addition, the display panels 9501 are flexible. The filters 9501 are arranged so that they partially overlap each other. For example, A light-transmitting region 9503 of the display panel 9501 can be overlapped. By using the display panel 9501, a large-screen display device can be provided. The display panel 9501 can be rolled up depending on the situation, making it a versatile display. The display device may be a display device.

[0594] In addition, in FIG. 55(A) and (B), the display area 9502 is adjacent to the display panel 950 1 shows a state in which the display panels are spaced apart from each other, but this is not limited thereto. For example, the display panels 9 By overlapping the display areas 9502 of 501 without any gaps, a continuous display area 9502 is created. You may do so.

[0595] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention can also be applied to electronic devices that do not have a display portion. In addition, in the display portion of the electronic device described in this embodiment, a flexible and a configuration capable of displaying along a curved display surface or a foldable display. However, the present invention is not limited to this configuration, and may be applied to a non-flexible, flat display unit. This may also be configured.

[0596] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done. [Explanation of symbols]

[0597] 100 Transistors 100A Transistor 100B Transistor 100C transistor 102 Substrate 104 Conductive film 104a Conductive film 104b Conductive film 106 Insulating film 107 Insulating film 108 Oxide semiconductor film 108a Oxide semiconductor film 108a_0 Oxide semiconductor film 108b Oxide semiconductor film 108b_ Oxide semiconductor film 108b_0 Oxide semiconductor film 108c Oxide semiconductor film 112 Conductive film 112a Conductive film 112b Conductive film 112c conductive film 112d Conductive film 112e Conductive film 114 Insulating film 116 Insulating film 118 Insulating film 120 Oxide Semiconductor Film 120a Oxide semiconductor film 120b Oxide semiconductor film 120b_d Drain region 120b_i Channel Area 120b_s source area 120c Oxide semiconductor film 132 Opening 150 Transistors 150A Transistor 150B Transistor 152 Insulating film 152_0 Insulating film 152a opening 152d opening 154 Conductive Film 154_0 Conductive film 156 Insulating Film 158_0 Conductive film 158a Conductive film 158b Conductive film 158c conductive film 162 Insulating film 171a opening 171b opening 173a opening 173b opening 191 Target 192 Plasma 193 Target 194 Plasma 195 Mask 450 Display section 451 Window 452a Image 452b Image 453 Button 455 Window 456 Document Information 457 Scrollbar 501 Pixel circuit 502 Pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit section 507 Terminal section 508 Sensor circuit section 510 Transistor 512 Resistance element 532 Substrate 542a electrode 542b electrode 544 Insulating film 546 Insulating Film 548 Insulating Film 550 Oxide Semiconductor Film 552 Transistor 554 Transistor 556 Transistor 558 Resistor Element 562 Capacitive element 572 Light emitting element 572m Light emitting element 702 Substrate 704 Conductive film 706 Insulating film 707 Insulating Film 708 Oxide Semiconductor Film 712a Conductive film 712b Conductive film 712c conductive film 714 Insulating film 716 Insulating film 718 Insulating film 720 Oxide Semiconductor Film 722 Insulating film 724a Conductive film 724b Conductive film 726 Structure 728 EL layer 730 Conductive Film 752a opening 752b opening 752c opening 802 Substrate 803 Substrate 806 Insulating film 807 Insulating film 814 Insulating film 816 Insulating film 819a Oxide semiconductor film 820 Oxide Semiconductor Film 820d Drain region 820i Channel Area 820s Source Region 824 Conductive film 829 Conductive film 832 Insulating film 834 Insulating film 836 Insulating film 838 Insulating film 840 Insulating film 843 Conductive film 843a Conductive film 843b Conductive film 843c Conductive film 846 Slit 848 Orientation Film 848a Conductive film 848b Conductive film 851 Liquid crystal element 851a Liquid crystal element 851b Liquid crystal element 852 Transistor 852a Transistor 852b transistor 855 Capacitive element 855a Capacitive element 866 Colored film 868 Conductive Film 869 Structure 870 pixels 870a pixels 870b pixels 870c pixels 871 Pixel section 872 Slit 874 Gate Driver 875 Common Line 876 Source Driver 877 scan lines 878 Orientation Film 879 Signal Line 880 LCD display device 881 Liquid crystal layer 904 Conductive film 906 Insulating film 907 Insulating film 912 Conductive film 914 Insulating film 916 Insulating film 918 Insulating film 920 Oxide Semiconductor Film 930a opening 930b opening 940 Insulating film 942 Sealing material 944 Anisotropic Conductive Film 956 Insulating film 958 Conductive film 2000 Touch Panel 2501 Display device 2502t transistor 2503c Capacitive element 2503t Transistor 2504 Scanning line driver circuit 2505 pixels 2509 FPC 2510 Board 2510a Insulating layer 2510b flexible substrate 2510c adhesive layer 2511 Wiring 2519 Wiring 2521 Insulating layer 2522 Insulating layer 2528 Bulkhead 2529 Liquid crystal layer 2530a Spacer 2530b Spacer 2531 Insulation layer 2550 EL element 2551 Liquid crystal element 2560 Sealing layer 2561 Sealing material 2567 Colored layer 2568 Light blocking layer 2569 Anti-reflection layer 2570 PCB 2570a Insulating layer 2570b flexible substrate 2570c adhesive layer 2580 Light Emitting Module 2590 Board 2591 Electrode 2592 Electrode 2593 Insulation layer 2594 Wiring 2595 Touch Sensor 2597 Adhesive layer 2598 Wiring 2599 Connection Layer 2601 Pulse voltage output circuit 2602 Current detection circuit 2603 Capacity 2611 Transistor 2612 Transistor 2613 Transistor 2621 Electrode 2622 Electrode 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery 9000 Chassis 9001 Display section 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation button 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Mobile Information Terminal 9101 Portable information terminal 9102 Portable information terminal 9200 Mobile Information Terminal 9201 Portable information terminals 9500 display device 9501 Display Panel 9502 Display area 9503 area 9511 Shaft 9512 Bearing section

Claims

1. A pixel portion having a plurality of pixels, The pixel includes at least a first transistor and a second transistor, a first gate of the first transistor is electrically connected to one of a source and a drain of the second transistor; a display device, wherein one of a source and a drain of the first transistor is electrically connected to a second gate of the first transistor and a pixel electrode, a first oxide semiconductor layer including a channel formation region of the first transistor; a second oxide semiconductor layer including a channel formation region of the second transistor; a first conductive layer having a region in contact with a top surface of the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the first transistor; a second conductive layer having a region in contact with a top surface of the first oxide semiconductor layer and functioning as the other of the source electrode and drain electrode of the first transistor; a third conductive layer having a region overlapping with the first oxide semiconductor layer and functioning as a first gate electrode of the first transistor; a fourth conductive layer having a region overlapping with the first oxide semiconductor layer and a region in contact with the first conductive layer and functioning as a second gate electrode of the first transistor; a fifth conductive layer having a region in contact with the first conductive layer and functioning as a first pixel electrode; a sixth conductive layer having a function as the other of the source electrode and the drain electrode of the second transistor and a function as a data line, the sixth conductive layer having a region extending in a first direction in a plan view; a seventh conductive layer having a function as a second pixel electrode disposed adjacent to the first pixel electrode in the first direction in a plan view; an eighth conductive layer having a function as a gate electrode of the second transistor and a function as a scanning line, and having a region extending in a second direction intersecting the first direction; the fifth conductive layer has a region overlapping with the first oxide semiconductor layer, the seventh conductive layer has a region overlapping with the second oxide semiconductor layer, A display device, wherein, in a plan view, a length of the first conductive layer in the first direction is greater than a length of the first conductive layer in the second direction.

2. A pixel portion having a plurality of pixels, The pixel includes at least a first transistor and a second transistor, a first gate of the first transistor is electrically connected to one of a source and a drain of the second transistor; a display device, wherein one of a source and a drain of the first transistor is electrically connected to a second gate of the first transistor and a pixel electrode, a first oxide semiconductor layer including a channel formation region of the first transistor; a second oxide semiconductor layer including a channel formation region of the second transistor; a first conductive layer having a region in contact with a top surface of the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the first transistor; a second conductive layer having a region in contact with a top surface of the first oxide semiconductor layer and functioning as the other of the source electrode and drain electrode of the first transistor; a third conductive layer having a region overlapping with the first oxide semiconductor layer and functioning as a first gate electrode of the first transistor; a fourth conductive layer having a region overlapping with the first oxide semiconductor layer and a region in contact with the first conductive layer and functioning as a second gate electrode of the first transistor; a fifth conductive layer having a region in contact with the first conductive layer and functioning as a first pixel electrode; a sixth conductive layer having a function as the other of the source electrode and the drain electrode of the second transistor and a function as a data line, the sixth conductive layer having a region extending in a first direction in a plan view; a seventh conductive layer having a function as a second pixel electrode disposed adjacent to the first pixel electrode in the first direction in a plan view; an eighth conductive layer having a function as a gate electrode of the second transistor and a function as a scanning line, and having a region extending in a second direction intersecting the first direction; the fifth conductive layer has a region overlapping with the first oxide semiconductor layer, the seventh conductive layer has a region overlapping with the second oxide semiconductor layer, In a plan view, a length of the first conductive layer in the first direction is greater than a length of the first conductive layer in the second direction; a channel formation region of the first transistor does not have a region that does not overlap with the fifth conductive layer in a plan view; a channel formation region of the second transistor having a region that does not overlap with the seventh conductive layer in a plan view;

3. In claim 1 or 2, The display device, wherein the second transistor is a single gate transistor.

Images