Imaging device

Abstract

To provide an image device that can appropriately form marks used for alignment, a mother substrate for an image device, and a method for manufacturing an image device.SOLUTION: In a mother substrate for an image device used for manufacture of image devices, such as a liquid crystal device, an organic electroluminescence device, a mirror device, and an imaging apparatus, marks for alignment M are provided outside a pixel area in which a plurality of pixels are arranged, and in a photolithography step, an exposure mask is arranged with the marks M as reference positions. In the mark M, a recess 195 depressed toward a mother substrate body is filled with a filling film 41. The recess 195 includes a first groove 196 that extends in a first direction in an in-plane direction of the mother substrate body, and a second groove 197 that extends in a second direction intersecting with the first groove 196 without intersecting with the first groove 196 in the in-plane direction of the mother substrate body.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to an imaging device capable of performing display and imaging, a motherboard for the imaging device, and a method for manufacturing the imaging device. [Background technology]

[0002] Imaging devices, such as liquid crystal devices, display devices equipped with light-emitting elements such as organic electroluminescence elements, mirror devices, and image sensors combining light-receiving elements and lenses, perform display and imaging using a plurality of pixels provided in a pixel region. In the manufacturing process of imaging devices, various elements, wiring, and the like are formed on a substrate body using semiconductor processes such as a photolithography process. In addition, when exposing a resist in the photolithography process, a mark is formed on the substrate body, and the positioning of an exposure mask is performed using the mark. The mark has a structure in which, for example, a rectangular or cross-shaped recess formed on the substrate body is filled with a filling film (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2013-89881 A Summary of the Invention [Problem to be solved by the invention]

[0004] When forming a mark in a rectangular recess, the opening width is large, making it difficult to properly fill the recess with a filling film. Even in the case of a +-shaped recess, at the intersection of a first groove extending in a first direction and a second groove extending in a second direction, the opening width becomes large in the diagonal direction relative to both the first groove and the second groove, making it difficult to properly fill the recess with a filling film. In such cases, there is a problem that cracks, etc. that occur in the recess due to stress make it difficult to recognize the mark. [Means for solving the problem]

[0005] In order to solve the above problem, one aspect of the present invention is an imaging device comprising: a substrate body; In the pixel area, A capacitive element including a first recess provided in the substrate body and a laminated film provided in the first recess. children and outside the pixel area, The substrate body is provided with Second recess and, The second recess Filling inside was done The laminated film includes the same laminated film as that constituting the capacitance element. A mark including a filler film; having The first recess and the second recess are each A first groove extending along a first direction; In a plan view, the groove extends along a second direction intersecting the first direction without intersecting the first groove. and a second groove located in the groove.

[0006] One embodiment of the motherboard for an imaging device of the present invention comprises a motherboard body, The mother board body A recess is provided, and a filling film is filled in the recess; Marks including 、 having The concave The portion is provided with a first groove extending along a first direction and a front portion that does not intersect with the first groove in a plan view. a second groove extending along a second direction intersecting the first direction; , characterized in that it includes.

[0007] Another aspect of the present invention is a mark including a recess that is recessed outside a pixel area in which a plurality of pixels are arranged. In a manufacturing method of an image device formed based on a substrate body , extending along the first direction a first groove that does not intersect the first groove in a plan view and intersects the first direction; forming the recess including a second groove extending along a direction; and thereafter The recess is filled It is characterized by filling the membrane. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing one aspect of an imaging device according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a cross-sectional view of the imaging device shown in FIG. [Diagram 3] 2 is a plan view of adjacent pixels in the image device shown in FIG. 1. [Figure 4] Cross-sectional view of the transistor shown in Figure 3. [Diagram 5] Cross-sectional view of the SS′ region around the transistor shown in Figure 3. [Figure 6] FIG. 2 is an explanatory diagram of a mother board for an imaging device according to the first embodiment of the present invention. [Figure 7] FIG. 2 is an enlarged plan view showing the mark shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view of the mark shown in FIG. [Figure 9] FIG. 4 is an enlarged plan view showing a mark according to a reference example of the present invention. [Figure 10] FIG. 10 is a cross-sectional view of the mark shown in FIG. [Figure 11] FIG. 4 is an explanatory diagram showing a second configuration example of a mark on a mother board for an imaging device according to the present invention. [Figure 12] FIG. 11 is an explanatory diagram showing a third configuration example of a mark on a mother board for an imaging device according to the present invention. [Figure 13] FIG. 11 is an explanatory diagram showing a fourth configuration example of the mark of the mother board for the imaging device according to the present invention. [Figure 14] FIG. 5 is an explanatory diagram showing a fifth configuration example of a mark on a mother board for an imaging device according to the present invention. [Figure 15] FIG. 6 is an explanatory diagram showing a sixth configuration example of the mark of the mother board for an imaging device according to the present invention. [Figure 16] FIG. 11 is an explanatory diagram showing a seventh configuration example of the mark of the mother board for the imaging device according to the present invention. [Figure 17] 6 is a plan view showing a configuration example of the capacitive element shown in FIG. 4 and FIG. 5. [Figure 18] 7 is an explanatory diagram of a modified example of the mother board for the image display device shown in FIG. 6. [Figure 19] 1 is an explanatory diagram of an organic electroluminescence display device to which the present invention is applied. [Figure 20] FIG. 1 is an explanatory diagram of a mirror device to which the present invention is applied. [Figure 21] FIG. 1 is an explanatory diagram of an imaging apparatus to which the present invention is applied. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] An embodiment of the present invention will be described with reference to the drawings. In the present invention, the term "image device" refers to a display device that displays an image or an imaging device that captures an image. Therefore, in the following description, an application example to a liquid crystal device 1a will be described in embodiment 1, an application example to an organic electroluminescence device 1b will be described in embodiment 2, an application example to a mirror device 1c will be described in embodiment 3, and an application example to an imaging device 1d will be described in embodiment 4. In addition, in the figures referred to in the following description, the scales of each layer and each member are different so that each layer and each member is large enough to be recognized on the drawing. In addition, in the following description, of two directions that intersect with each other in the in-plane direction of the element substrate 10, the first direction will be labeled with X, and the second direction that intersects with the first direction X will be labeled with Y.

[0010] 1. First embodiment: Example of application to liquid crystal device 1a 1-1. Configuration of imaging device 1 Fig. 1 is a plan view showing one aspect of an image device 1 according to a first embodiment of the present invention. Fig. 2 is a cross-sectional view of the image device 1 shown in Fig. 1. The image device 1 shown in Figs. 1 and 2 is a liquid crystal device 1a. In the liquid crystal device 1a, an element substrate 10 having a substrate body 19 and a counter substrate 20 having a substrate body 29 are bonded together with a sealant 107 via a predetermined gap, and an electro-optical layer 80 is disposed in a region surrounded by the sealant 107 between the element substrate 10 and the counter substrate 20. A pixel region 10b is provided in approximately the center of the image device 1.

[0011] The substrate body 19 is made of a quartz substrate, a glass substrate, or the like. On one surface 19s of the substrate body 19, outside the pixel region 10b, a data line driving circuit 101 and a plurality of terminals 102 are formed along one side of the substrate body 19, and a scanning line driving circuit 104 is formed along the other side adjacent to the one side. A flexible wiring board (not shown) is connected to the terminals 102.

[0012] On one surface 19s of the substrate body 19, pixels 1e each including a plurality of light-transmitting pixel electrodes 9a made of an ITO (Indium Tin Oxide) film or the like and transistors (not shown in FIGS. 1 and 2) electrically connected to each of the plurality of pixel electrodes 9a are arranged in a matrix in the pixel region 10b. A first alignment film 18 is formed on the opposing substrate 20 side of the pixel electrodes 9a. Thus, the substrate body 19 to the first alignment film 18 correspond to the element substrate 10. A mark M, which will be described later, is formed in the outer region of the pixel region 10b of the substrate body 19.

[0013] The substrate body 29 is made of a quartz substrate, a glass substrate, or the like. A light-transmitting common electrode 21 made of an ITO film or the like is formed on one surface 29s of the substrate body 29. The common electrode 21 is formed on substantially the entire surface of the counter substrate 20. A second alignment film 28 is formed on the element substrate 10 side with respect to the common electrode 21. Therefore, the substrate body 29 to the second alignment film 28 correspond to the counter substrate 20. In the counter substrate 20, a light-shielding light-shielding layer 27 made of a metal or a metal compound is formed between the substrate body 29 and the common electrode 21, and a light-transmitting protective layer 26 is formed between the light-shielding layer 27 and the common electrode 21. The light-shielding layer 27 is formed, for example, as a frame-shaped parting 27a extending along the outer periphery of the pixel region 10b. The light-shielding layer 27 may also be formed as a black matrix 27b in a region overlapping a region sandwiched between adjacent pixel electrodes 9a in a plan view. In the region of the substrate body 19 overlapping with the parting 27a in plan view, a dummy pixel electrode 9d is formed at the same time as the pixel electrode 9a.

[0014] The first alignment film 18 and the second alignment film 28 are made of SiO x (x<2), it is an inorganic alignment film made of an obliquely evaporated film of SiO2, TiO2, MgO, Al2O3, etc., and liquid crystal molecules with negative dielectric anisotropy used in the electro-optic layer 80 are tilted and aligned. Therefore, the liquid crystal molecules form a predetermined angle with respect to the substrate body 19 and the substrate body 29. In this way, the image device 1 is configured as a liquid crystal device in a VA (Vertical Alignment) mode.

[0015] An inter-substrate conduction electrode 109 for electrical conduction between the element substrate 10 and the opposing substrate 20 is formed in an area of ​​the element substrate 10 that overlaps with a corner portion of the substrate body 29 outside the sealing material 107. An inter-substrate conduction material 109a containing conductive particles is disposed in the inter-substrate conduction electrode 109, and the common electrode 21 of the opposing substrate 20 is electrically connected to the element substrate 10 side via the inter-substrate conduction material 109a and the inter-substrate conduction electrode 109. For this reason, a common potential is applied to the common electrode 21 from the element substrate 10 side.

[0016] In the image device 1 of this embodiment, the pixel electrodes 9a and the common electrode 21 are formed of an ITO film, and the image device 1 is configured as a transmissive liquid crystal device. In this image device 1, light incident on the electro-optical layer 80 from one of the element substrate 10 and the counter substrate 20 is modulated while passing through the other substrate and being emitted, thereby displaying an image. In this embodiment, as shown by arrow L, light incident on the counter substrate 20 is modulated for each pixel by the electro-optical layer 80 while passing through the element substrate 10 and being emitted, thereby displaying an image.

[0017] 1-2. Schematic configuration of pixel 1e FIG. 3 is a plan view of a plurality of adjacent pixels 1e in the image device 1 shown in FIG. 1. FIG. 4 is a GG′ cross-sectional view of the periphery of the transistor 30 shown in FIG. 3. FIG. 4 shows a schematic view of the transistor 30 and the like cut along the scanning line 3a. FIG. 4 also shows a cross-section at a position passing through the contact hole 46e and the like. FIG. 5 is a SS′ cross-sectional view of the periphery of the transistor 30 shown in FIG. 3. FIG. 5 shows a schematic view of the transistor 30 and the like cut along the data line 6a. FIG. 3 shows each layer with the following lines. In FIG. 3, the ends of layers that overlap each other in a plan view are shifted in position so that the shapes of the layers and the like can be easily understood. Scan line 3a = thick solid line Semiconductor film 31a = thin, short dashed line Gate electrode 33a=thin dashed double-dashed line First capacitance electrode 4a = thin dashed line Second capacitance electrode 5a = thin solid line Relay electrodes 8c, 8d, 8s = thick dashed lines Data line 6a and relay electrodes 6c, 6d = thick dashed double-dashed lines Capacitive line 7a and relay electrode 7d = thick, long dashed line Pixel electrode 9a = thick solid line

[0018] As shown in FIG. 3, in the element substrate 10, a pixel electrode 9a is formed in each of the pixels 1e, and a scanning line 3a, a data line 6a, and a capacitance line 7a extend along the inter-pixel region sandwiched between the adjacent pixel electrodes 9a. More specifically, the scanning line 3a extends in the first direction X, overlapping with a first inter-pixel region 9b extending in the first direction X, and the data line 6a and the capacitance line 7a extend in the second direction Y, overlapping with a second inter-pixel region 9c extending in the second direction Y. In the element substrate 10, a transistor 30 is formed corresponding to the intersection of the data line 6a and the scanning line 3a. The scanning line 3a, the data line 6a, and the capacitance line 7a have light-shielding properties. Therefore, the region in which the scanning line 3a, the data line 6a, the capacitance line 7a, and the conductive film in the same layer as these wirings are formed is a light-shielding region through which light does not pass, and the region surrounded by the light-shielding region is an opening region through which light passes.

[0019] As shown in FIG. 4 and FIG. 5, in the element substrate 10, insulating films 41, 42, 43, 44, 45, 46 are laminated between the substrate body 19 and the pixel electrode 9a as interlayer insulating films. The insulating films 41, 42, 43, 44, 45, 46 are made of light-transmitting films such as silicon oxide films. In addition, a laminated film 550 is provided between the substrate body 19 and the insulating film 41, in which the first conductive film 4a, the insulating film 49 as a dielectric film, and the second conductive film 5a are laminated in this order from the substrate body 19 side, and the laminated film 550 constitutes a capacitive element 55. The insulating film 49 is made of a light-transmitting film such as a silicon nitride film or a silicon oxide film. When the insulating film 49 is a silicon nitride film, the insulating film 49 is formed to a thickness of 0.01 to 0.03 μm. The first conductive film 4a is made of a conductive silicon film, a metal silicide film, a metal film, a metal compound film, or the like. When the first conductive film 4a is a conductive silicon film, the first conductive film 4a is formed to a thickness of 0.03 to 0.2 μm. The second conductive film 5a is made of a conductive silicon film, a metal silicide film, a metal film, a metal compound film, etc. When the second conductive film 5a is a conductive silicon film, the second conductive film 5a is formed to a thickness of 0.03 to 0.2 μm.

[0020] Between the substrate body 19 and the capacitance element 55, a recess 190 recessed toward the substrate body 19 is formed, and the depth of the recess 190 is deeper than the total thickness of the laminated film 550. Therefore, the second conductive film 5a overlaps the side wall and bottom wall of the recess 190 via the insulating film 49 and the first conductive film 4a. Therefore, the capacitance element 55 has a larger capacitance than when the laminated film 550 is formed only on a flat surface. In this embodiment, the recess 190 is recessed toward the substrate body 19 on the surface of the substrate body 19 on the side of the pixel electrode 9a.

[0021] The scanning line 3a is formed in a layer between the insulating film 41 and the insulating film 42. The scanning line 3a is a conductive light-shielding film 3b made of a metal silicide film, a metal film, a metal compound film, etc. In this embodiment, the scanning line 3a is made of a tungsten silicide film. A pixel switching transistor 30 is configured between the insulating film 42 and the insulating film 43. The transistor 30 includes a semiconductor film 31a formed on the surface of the insulating film 42 facing the pixel electrode 9a, a gate insulating film 32 covering the semiconductor film 31a from the pixel electrode 9a side, and a gate electrode 33a overlapping the semiconductor film 31a with the gate insulating film 32 interposed therebetween in a plan view.

[0022] The gate electrode 33a is made of a laminated film of a conductive polysilicon film and a metal film such as aluminum, and is electrically connected to the scanning line 3a through groove-shaped contact holes 42g and 42h penetrating the gate insulating film 32 and the insulating film 42. The semiconductor film 31a includes a channel region 31g overlapping the gate electrode 33a in a plan view, a first source / drain region 31s adjacent to the channel region 31g on one side Y1 in the second direction Y, and a second source / drain region 31d adjacent to the channel region 31g on the other side Y2 in the second direction Y. The transistor 30 has an LDD (Lightly-Doped Drain) structure. Therefore, the second source / drain region 31d includes a high-concentration region 31d1 in which a high-concentration impurity is introduced at a position separated from the channel region 31g, and a low-concentration region 31d2 in which an impurity is introduced at a lower concentration than that of the high-concentration region 31d1 between the channel region 31g and the high-concentration region 31d1. The first source / drain region 31s includes a high-concentration region 31s1 in which a high-concentration impurity is introduced at a position separated from the channel region 31g, and a low-concentration region 31s2 in which an impurity is introduced at a lower concentration than that of the high-concentration region 31s1 between the channel region 31g and the high-concentration region 31s1. The semiconductor film 31a is made of a polysilicon film or the like, and the gate insulating film 32 has a two-layer structure including a first gate insulating film made of a silicon oxide film obtained by thermally oxidizing the semiconductor film 31a, and a second gate insulating film made of a silicon oxide film formed by a low-pressure CVD method or the like.

[0023] Between the gate insulating film 32 and the insulating film 43, relay electrodes 33c and 33d are provided. The relay electrodes 33c and 33d are made of the same conductive film as the gate electrode 33a. A contact hole 42c is formed in the gate insulating film 32, the insulating film 42, and the insulating film 41, the contact hole 42c passing through the notch 3a5 of the scanning line 3a and reaching the second conductive film 5a. Therefore, the relay electrode 33c is electrically connected to the second conductive film 5a through the contact hole 42c. In addition, a contact hole 42d is formed in the gate insulating film 32, the insulating film 42, and the insulating film 41, the contact hole 42d passing through the notch 5a5 of the second conductive film 5a and reaching the first conductive film 4a. Therefore, the relay electrode 33d is electrically connected to the first conductive film 4a through the contact hole 42d.

[0024] Between the insulating film 43 and the insulating film 44, relay electrodes 8c, 8d, and 8s are formed. The relay electrodes 8c, 8d, and 8s are made of a light-shielding conductive film such as a metal silicide film, a metal film, or a metal compound film. The relay electrode 8d is electrically connected to the second source-drain region 31d through a contact hole 43d that penetrates the insulating film 43 and the gate insulating film 32. Since the end of the relay electrode 33d is exposed in the contact hole 43d, the relay electrode 8d is electrically connected to the relay electrode 33d. The relay electrode 8s is electrically connected to the first source-drain region 31s through the insulating film 43 and the contact hole 43s that penetrates the gate insulating film 32. The relay electrode 8c is electrically connected to the relay electrode 33c through a contact hole 43c that penetrates the insulating film 43.

[0025] Between the insulating film 44 and the insulating film 45, the data line 6a and the relay electrodes 6e and 6c are provided. The data line 6a and the relay electrodes 6c and 6e are made of a light-shielding conductive film such as a metal silicide film, a metal film, or a metal compound film. The data line 6a is electrically connected to the relay electrode 8s through a contact hole 44s that penetrates the insulating film 44. The relay electrode 6e is electrically connected to the relay electrode 8d through a contact hole 44e that penetrates the insulating film 44. The relay electrode 6c is electrically connected to the relay electrode 8c through a contact hole 44c that penetrates the insulating film 44.

[0026] Between the insulating film 45 and the insulating film 46, a capacitance line 7a extending in the second direction Y so as to overlap the data line 6a in a plan view, and a relay electrode 7e are provided. The capacitance line 7a and the relay electrode 7e are made of a light-shielding conductive film such as a metal silicide film, a metal film, or a metal compound film. The capacitance line 7a is electrically connected to the relay electrode 6c through a contact hole 45c penetrating the insulating film 45. The relay electrode 7e is electrically connected to the relay electrode 6e through a contact hole 45e penetrating the insulating film 45.

[0027] The pixel electrode 9a is electrically connected to the relay electrode 7e through a contact hole 46e penetrating the insulating film 46. In this embodiment, among the four pixel electrodes 9a1, 9a2, 9a3, and 9a4 adjacent to each other around the contact hole 46e, the pixel electrode 9a1 located on the other side Y2 in the second direction Y with respect to the contact hole 46e is electrically connected to the relay electrode 7e through the contact hole 46e. Therefore, the pixel electrode 9a is electrically connected to the second source-drain region 31d through the relay electrode 7e, the relay electrode 6e, and the relay electrode 8d. Therefore, when the transistor 30 is turned on, the pixel electrode 9a is supplied with an image signal from the data line 6a. The pixel electrode 9a is also electrically connected to the first conductive film 4a of the capacitance element 55 through the relay electrode 7e, the relay electrode 6e, the relay electrode 8d, and the relay electrode 33d.

[0028] 1-3. Configuration example of mother board 100 for imaging device FIG. 6 is an explanatory diagram of the mother substrate 100 for an imaging device according to the first embodiment of the present invention. The mother substrate 100 for an imaging device shown in FIG. 6 is a large substrate for simultaneously manufacturing a plurality of element substrates 10. Therefore, in the mother substrate 100 for an imaging device, the mother substrate body 119 is formed in a structure substantially identical to that of the element substrate 10, including the mark M and the filling film 40, and then divided. In addition, in the manufacturing process of the imaging device 1, in order to form electrodes, wiring, contact holes, and the like of the element substrate 10, in the photolithography process, the resist is exposed through an exposure mask in the state of the mother substrate 100 for an imaging device shown in FIG. 6, and then developed to form a resist mask, and then etching is performed from the opening of the resist mask in the etching process. For this reason, before performing the photolithography process, the mark M shown in FIG. 6 is formed on the mother substrate 100 for an imaging device as an alignment mark, and the position of the exposure mask is adjusted with the mark M as a reference position.

[0029] The mother substrate 100 for the imaging device has a plurality of effective areas 110 into which the element substrate 10 is divided, and an ineffective area 120 that is removed when the element substrate 10 is divided. In this embodiment, a mark M is provided outside the pixel area 10b in each of the plurality of effective areas 110. Therefore, in the imaging device 1 shown in FIG. 1, the mark M is present on the element substrate 10. For example, the mark M is present at positions corresponding to the four corners of the element substrate 10.

[0030] 1-4. Mark M configuration example 1 Fig. 7 is an enlarged plan view of the mark M shown in Fig. 1. Fig. 8 is a cross-sectional view of the mark M shown in Fig. 7. Fig. 9 is an enlarged plan view of a mark Mx according to a reference example of the present invention. Fig. 10 is a cross-sectional view of the mark Mx shown in Fig. 9.

[0031] 7 and 8, the mark M has a recess 195 outside the pixel region 10b of the substrate body 19, and the inside of the recess 195 is filled with the filling film 40. In this embodiment, the recess 195 is formed in the same layer as the recess 190 shown in FIG. 4 and FIG. 5. More specifically, the recess 195 is recessed on the surface of the substrate body 19 on the pixel electrode 9a side, on the opposite side to the pixel electrode 9a. In this embodiment, since the substrate body 19 and the mother substrate 100 for an imaging device have light-transmitting properties, the filling film 40 includes a light-shielding film. Therefore, the mark M is visible when the mother substrate 100 for an imaging device is viewed from either side.

[0032] The filling film 40 is composed of a laminated film 550 used to form the capacitance element 55 and an insulating film 41, and the laminated film 550 includes a first conductive film 4a and a second conductive film 5a as a light-shielding film. In the mark M, the light-shielding film composed of the first conductive film 4a and the second conductive film 5a is formed in an area slightly wider than the recess 190, but the planar shape and planar size of the light-shielding film composed of the first conductive film 4a and the second conductive film 5a are approximately the same as the planar shape and planar size of the recess 190.

[0033] Here, the recess 195 includes a first groove 196 extending in the first direction X, and a second groove 197 extending in the second direction Y intersecting the first groove 196 without intersecting the first groove 196. In this embodiment, the recess 195 is provided with a plurality of second grooves 197. More specifically, the second grooves 197 extend in the first direction X on both sides of the first groove 191 in the first direction X.

[0034] None of the second grooves 197 intersects the first groove 196, but extends in the first direction X intersecting the first groove 196. More specifically, the second groove 197 is provided at a position separated from the first groove 196 in the first direction X via a gap G, and does not intersect the first groove 196. Therefore, the recess 195 has a narrow groove width at any position. Therefore, when the filling film 40 is formed, the recess 5a6 is filled with the portion deposited on the side wall of the first groove 196 and the second groove 197 in addition to the portion deposited on the bottom wall of the first groove 196 and the second groove 197, and the step coverage is good. Therefore, as shown in FIG. 8, even if the recess 5a6 caused by the first groove 196 and the second groove 197 occurs on the surface of the second conductive film 5a, the recess 5a6 is easily filled with the insulating film 41 when the insulating film 41 is formed. For this reason, stress is less likely to be applied to the insulating film 41 of the filling film 40, so that cracks are less likely to occur in the insulating film 41 and the cracks are less likely to grow. Therefore, observation of the marks M is not hindered by cracks, so that the marks M can be easily observed. Furthermore, even when chemical mechanical polishing is performed after the insulating film 41 is formed as in this embodiment, the insulating film 41 can be formed to a small thickness, so that the time required for forming the insulating film 41 can be shortened.

[0035] In contrast, in the mark Mx according to the reference example shown in FIG. 9 and FIG. 10, the first groove 196x and the second groove 197x that constitute the recess 195x intersect with each other, so that at the intersection 195y between the first groove 196x and the second groove 197x, the groove width in the direction that intersects obliquely with the first groove 196x and the second groove 197x becomes wider than the design value during etching. Therefore, the intersection 195y between the first groove 196x and the second groove 197x has a wide portion 195z, so that when the filling film 40 is formed, the filling film 40 does not easily fill the recess 195x due to the portions deposited on the bottom wall and side wall of the first groove 196x and the second groove 197x. For example, when the recess 5a7 caused by the first groove 196x and the second groove 197x occurs on the surface of the second conductive film 5a, when the insulating film 41 is formed, the insulating film 41 does not easily fill the recess 5a7. Therefore, stress is easily applied to the insulating film 41, so that cracks are easily generated in the insulating film 41 and the cracks are also easily developed. Therefore, observation of the mark M is hindered by the cracks, so that the mark M is difficult to observe.

[0036] Furthermore, if a portion 195z wider than the design width occurs at an intersection 195y between the first groove 196x and the second groove 197x, when the laminated film 550 is patterned, a recess 195x protrudes from the portion where the laminated film 550 is formed at the intersection 195y, making it difficult to observe the mark M. Furthermore, even when chemical mechanical polishing is performed after the insulating film 41 is formed, the insulating film 41 needs to be formed to a large thickness, which lengthens the time required to form the insulating film 41.

[0037] 7 and 8, problems that may occur when forming the mark Mx shown in Fig. 9 and 10 can be eliminated, such as preventing the recess 195 from protruding from the portion where the laminated film 550 is formed. When the substrate body 19 is a light-shielding substrate such as a silicon substrate, the filling film 40 may be light-transmitting.

[0038] 1-5. Mark M configuration example 2 Fig. 11 is an explanatory diagram showing a second configuration example of the mark M of the motherboard 100 for an imaging device according to the present invention. In this embodiment and the embodiments described later, the basic configuration of the mark M is the same as that described with reference to Fig. 7 and Fig. 8. For this reason, the same reference numerals are used for the common parts, and the description thereof will be omitted.

[0039] As shown in FIG. 11, the mark M of this embodiment also includes a recess 195, similar to the embodiment described with reference to FIG. 7 and FIG. 8. In this embodiment, the recess 195 includes a plurality of first grooves 196 extending in a first direction X, and a plurality of second grooves 197 extending in a second direction Y intersecting the first grooves 196 without intersecting the first grooves 196. In this embodiment, the mark M has a + shape, and the first grooves 196 and the second grooves 197 are alternately arranged along the outer edge of the mark M. In addition, the first grooves 196 and the second grooves 197 are separated from each other by a gap G, and the first grooves 196 and the second grooves 197 do not intersect with each other. Therefore, the recess 195 does not have the wide portion 195z described with reference to FIG. 9 and FIG. 10. Therefore, as shown in FIG. 8, the recess 5a6 is easily filled with the filling film 40, and cracks are less likely to occur in the insulating film 41, and the like, and the like, have the same effects as the embodiment described with reference to FIG. 7 and FIG. 8. Furthermore, since the first groove 196 and the second groove 197 are disposed along the contour of the mark M, the widths of the first groove 196 and the second groove 197 are narrow. Therefore, according to this embodiment, the recess 5a6 can be filled with the filling film 40 more easily than in the embodiment described with reference to Figures 7 and 8, which has the effect of making it difficult for cracks to occur in the insulating film 41, etc.

[0040] 1-6. Mark M configuration example 3 FIG. 12 is an explanatory diagram showing a third configuration example of the mark M of the mother substrate 100 for an imaging device according to the present invention. The mark M shown in FIG. 12 corresponds to a modified example of the mark M shown in FIG. 11. In the mark M shown in FIG. 11, the first groove 196 and the second groove 197 are not connected, but in this embodiment, as shown in FIG. 12, the first groove 196 and the second groove 197 are connected. Even in this embodiment, the first groove 196 and the second groove 197 do not intersect. Therefore, the wide portion 195z described with reference to FIG. 9 and FIG. 10 is unlikely to occur in the portion where the first groove 196 and the second groove 197 are connected, so that the recess 195 is easily filled with the filling film 40.

[0041] 1-7. Mark M configuration example 4 13 is an explanatory diagram showing a fourth configuration example of the mark M of the mother substrate 100 for an imaging device according to the present invention. As shown in FIG. 13, the mark M is composed of a group of a plurality of parts M1, M2, M3, M4, M5, and M6 arranged in a first direction X. Each of the plurality of parts M1, M2, M3, M4, M5, and M6 has a recess 195 of the same shape. In this embodiment, the recess 195 includes a first groove 196 extending in the first direction X and a second groove 197 extending in the second direction Y intersecting the first groove 196 without intersecting the first groove 196. In this embodiment, the recess 195 has a plurality of first grooves 196 and a plurality of second grooves 197. More specifically, the mark M has a rectangular frame shape, and first grooves 196 and second grooves 197 are alternately arranged along the outer edge of each of the multiple portions M1, M2, M3, M4, M5, and M6.

[0042] Moreover, the first groove 196 and the second groove 197 are separated by a gap G, and the first groove 196 and the second groove 197 do not intersect. Therefore, the wide portion 195z described with reference to FIG. 9 and FIG. 10 does not exist. Therefore, as described with reference to FIG. 7 and FIG. 8, the recess 195 is easily filled with the filling film 40, and cracks are unlikely to occur in the insulating film 41, etc., and the same effects as those of the embodiment described with reference to FIG. 7 and FIG. 8 are achieved. Furthermore, the first groove 196 and the second groove 197 are arranged along the contour of the mark M, and therefore the widths of the first groove 196 and the second groove 197 are narrow. Therefore, according to this embodiment, the recess 195 is easily filled with the filling film 40, and therefore cracks are unlikely to occur in the insulating film 41, etc., and the like.

[0043] 1-8. Mark M composition example 5 FIG. 14 is an explanatory diagram showing a configuration example 5 of the mark M of the mother substrate 100 for an imaging device according to the present invention. The mark M shown in FIG. 14 corresponds to a modified example of the mark M shown in FIG. 13. In the mark M shown in FIG. 13, the first groove 196 and the second groove 197 are not connected, but in this embodiment, as shown in FIG. 14, the first groove 196 and the second groove 197 are connected. However, the first groove 196 and the second groove 197 do not intersect. Therefore, the wide portion 195z described with reference to FIG. 9 and FIG. 10 is unlikely to occur in the portion where the first groove 196 and the second groove 197 are connected, so that the recess 195 is easily filled with the filling film 40.

[0044] 1-9. Mark M composition example 6 FIG. 15 is an explanatory diagram showing a sixth configuration example of the mark M of the mother substrate 100 for an imaging device according to the present invention. In this embodiment, as in the embodiment described with reference to FIG. 7, a recess 195 is provided. The recess 195 includes a first groove 196 extending in a first direction X and a second groove 197 extending in a second direction Y intersecting the first groove 196 without intersecting the first groove 196. In this embodiment, the recess 195 is provided with a plurality of first grooves 196 and a plurality of second grooves 197. The first grooves 196 and the second grooves 197 are alternately arranged. Therefore, the mark M has a rectangular frame shape. Therefore, the mark M is used as an alignment mark. Since the mark M is frame-shaped, if the resin pattern 2a is formed inside the mark M using a photolithography technique and then the positions of the resin pattern 2a and the mark M are inspected, the positional accuracy when the resin pattern 2a is formed by the photolithography technique can be evaluated.

[0045] In this embodiment, the first groove 196 and the second groove 197 are separated by a gap G, and the first groove 196 and the second groove 197 do not intersect. Therefore, the recess 195 does not have the wide portion 195z described with reference to FIG. 9 and FIG. 10. Therefore, as described with reference to FIG. 8, the recess 195 is easily filled with the filling film 40, and thus cracks are unlikely to occur in the insulating film 41, etc., and the same effects as those of the embodiment described with reference to FIG. 7 and FIG. 8 are achieved. Furthermore, the first groove 196 and the second groove 197 are arranged along the contour of the mark M, and thus the widths of the first groove 196 and the second groove 197 are narrow. Therefore, according to this embodiment, the recess 195 is easily filled with the filling film 40, and thus cracks are unlikely to occur in the insulating film 41, etc., and the like.

[0046] 1-10. Mark M composition example 7 FIG. 16 is an explanatory diagram showing a seventh configuration example of the mark M of the mother substrate 100 for an imaging device according to the present invention. The mark M shown in FIG. 16 corresponds to a modified example of the mark M shown in FIG. 15. In the mark M shown in FIG. 15, the first groove 196 and the second groove 197 are not connected, but in this embodiment, as shown in FIG. 16, the first groove 196 and the second groove 197 are connected. However, the first groove 196 and the second groove 197 do not intersect. Therefore, the wide portion 195z described with reference to FIG. 9 and FIG. 10 is unlikely to occur in the portion where the first groove 196 and the second groove 197 are connected, so that the recess 195 is easily filled with the filling film 40.

[0047] 1-11. Example of the configuration of the capacitance element 55 17 is a plan view showing a configuration example of the capacitive element 55 shown in FIGS. 4 and 5. In forming the capacitive element 55 shown in FIGS. 4 and 5, a mark M is formed outside the pixel region 10b at the same time as forming the recess 190. In the capacitive element 55, as shown in FIG. 17, the recess 190 recessed toward the substrate body 19 in a region overlapping with the capacitive element 55 in a plan view includes a first groove 191 extending in the first direction X and a second groove 192 extending in a direction different from the extending direction of the first groove 191. In this embodiment, the first groove 191 extends linearly in the second direction Y so as to overlap with the semiconductor film 31a in a plan view, and a plurality of second grooves 192 extend in the second direction Y on both sides of the first groove 191 in the width direction of the first direction X. Here, in the laminated film 550, the second conductive film 5a overlaps the side walls and bottom walls of the first groove 191 and the second groove 192 via the insulating film 49 and the first conductive film 4a. Therefore, the capacitance of the capacitance element 55 is large. In addition, the depth of the first groove 191 and the second groove 192 is deeper than the total thickness of the laminated film 550, and the laminated film 550 is uniformly formed by a CVD method or the like. Therefore, it is possible to configure the capacitance element 55 with a stable capacitance.

[0048] Here, the second groove 192 does not intersect the first groove 191 extending in the second direction Y, but extends in the first direction X intersecting the first groove 191. More specifically, the second groove 192 is provided at a position separated from the first groove 191 via a gap G in the first direction X, and does not intersect the first groove 191. Therefore, the first groove 191 and the second groove 192 have a narrow groove width at any position. Therefore, as described with reference to FIG. 7 and FIG. 8, even if the recess 5a6 caused by the first groove 191 and the second groove 192 occurs on the surface of the second conductive film 5a, when the insulating film 41 is formed, the insulating film 41 is likely to fill the recess 5a6 due to the portion deposited on the bottom wall and side wall of the first groove 191 and the second groove 192. Therefore, even when chemical mechanical polishing is performed after forming the insulating film 41 as in this embodiment, the insulating film 41 can be formed to a small thickness, and therefore the time required for forming the insulating film 41 can be shortened. Moreover, since it is sufficient to flatten the semiconductor film 31a, if the recess 5a6 is filled, it is not necessary to perform chemical mechanical polishing to flatten the surface of the insulating film 41. In this embodiment, the insulating film 41 is made of a silicon oxide film or the like, and is formed to a thickness of 0.2 μm to 0.5 μm. Moreover, the insulating film 41 has a shape with excellent step characteristics suitable for filling the recess 5a6. Moreover, the opening width of the first groove 191 is 0.6 μm to 1.0 μm, the width of the bottom wall is 0.4 μm to 0.8 μm, and the depth is 1 μm to 2 μm.

[0049] 1-12. Modifications of the Mother Board 100 for Imaging Devices Fig. 18 is an explanatory diagram of a modified example of the mother substrate 100 for an imaging device shown in Fig. 6. In the mother substrate 100 for an imaging device shown in Fig. 6, the mark M is provided outside the pixel region 10b in each of the multiple effective regions 110 divided into the element substrate 10, but in this embodiment, as shown in Fig. 18, the mark M is provided in the invalid region 120 that is removed after the element substrate 10 is divided. Therefore, when the imaging device 1 shown in Fig. 1 is constructed, the mark M does not exist in the imaging device 1.

[0050] In FIG. 18, the mark M is disposed outside the effective area 110 into which the element substrate 10 is divided, but the mark M may be provided between the areas of the effective area 110 into which the element substrate 10 is divided.

[0051] 2. Embodiment 2: Example of Application to Organic Electroluminescence Device 1b Fig. 19 is an explanatory diagram of an organic electroluminescence device 1b to which the present invention is applied. In describing this embodiment and the embodiments described below, the element substrate and the substrate body are described as an element substrate 10 and a substrate body 19, respectively, so as to easily understand the correspondence with the liquid crystal device 1a shown in Figs.

[0052] 19 is an organic electroluminescence device 1b. In the organic electroluminescence device 1b, light emitting elements 115 and the like are provided on a substrate body 19 of an element substrate 10, and an image is displayed by light emitted from the light emitting elements 115.

[0053] In this embodiment, the substrate body 19 is laminated with light-transmitting insulating films 141, 142, 143, 144, 145, 146, and 147 constituting an interlayer insulating film and the like. In addition, the substrate body 19 is formed with a semiconductor layer 131 constituting the transistor 130 and the like of each pixel 101e, and the semiconductor layer 131 is covered with a gate insulating film 132. Between the gate insulating film 132 and the insulating film 141, a gate electrode 133a is formed. Between the insulating film 141 and the insulating film 142, a relay electrode 133d and the like are formed. Between the insulating film 142 and the insulating film 143, a first capacitance electrode 164a and the like are formed. Between the insulating film 143 and the insulating film 144, a second capacitance electrode 165a and the like that faces the first capacitance electrode 164a through the insulating film 143 are formed. Between the insulating film 144 and the insulating film 145, a light-reflective wiring 167a and the like that is electrically connected to the second capacitance electrode 165a are formed. The insulating film 146 is an optical path adjustment layer for setting the resonant wavelength of the optical resonator 116 to a predetermined wavelength.

[0054] Between the insulating film 146 and the insulating film 147, a pixel electrode 111 constituting the pixel 101e is formed. The pixel electrode 111 is formed of a light-transmitting conductive material such as ITO. The insulating film 147 overlaps an end of the pixel electrode 111 and defines the region of the pixel 101e. A light-emitting functional layer 148 is formed on the pixel electrode 111. The light-emitting functional layer 148 is continuously formed over the plurality of pixels 101e in the pixel region 10b. A common electrode 121 is formed over the entire region of the pixel region 10b on an upper layer of the light-emitting functional layer 148. The pixel electrode 111, the light-emitting functional layer 148, and the common electrode 121 form a light-emitting element 115. In the light-emitting element 115, the light-emitting functional layer 148 is configured to include a light-emitting layer formed of an organic EL material, and emits white light when a current is supplied. The light-emitting functional layer 148 may be provided with a transport layer or an injection layer for electrons and holes to be supplied to the light-emitting layer.

[0055] The common electrode 121 functions as a semi-transmissive reflective layer that transmits a portion of the light that reaches it and reflects the remainder. The light emitted from the light-emitting functional layer 148 travels back and forth between the wiring 167a and the common electrode 121, and the component of a specific resonance wavelength is selectively amplified, and then passes through the common electrode 121 and is emitted to the opposite side of the substrate body 19.

[0056] A sealing body 170 is formed over the entire area of ​​the substrate body 19 on the upper layer side of the common electrode 121. The sealing body 170 is composed of a laminated film of a first sealing layer 171, a second sealing layer 172, and a third sealing layer 173. The third sealing layer 173 is made of an insulating inorganic material such as a silicon oxide film. The first sealing layer 171 is a planarizing film made of a light-transmitting organic material such as an epoxy resin. The second sealing layer 172 is made of, for example, silicon nitride or silicon oxide having excellent water resistance and heat resistance.

[0057] A colored layer 181 is formed on the upper surface of the sealing body 170. The colored layer 181 transmits light in a predetermined wavelength range. A light-transmitting cover substrate 118 is fixed by an adhesive layer 117 to the side of the colored layer 181 opposite to the substrate body 19.

[0058] The organic electroluminescent device 1b configured in this manner is configured for red light, green light, and blue light, for example, and is used in a projection type display device, etc. In addition, in the organic electroluminescent device 1b, a display device may be configured by making each pixel 101e correspond to red light, green light, and blue light.

[0059] In the organic electroluminescence device 1b thus configured, electrodes and the like are formed by a photolithography process, as in the liquid crystal device 1a. Therefore, in the organic electroluminescence device 1b, as in the liquid crystal device 1a, the mark M shown in Figs. 6 to 16 is formed in the effective area 110 of the mother substrate 100 for an image device. Also, as shown in Fig. 18, the mark M may be formed in the ineffective area 120 of the mother substrate 100 for an image device. The mark M has a recess 195, and the recess 195 is filled with a light-shielding filling film 40 made of the same conductive film as the gate electrode 133a, for example. When the substrate body 19 is a light-shielding substrate such as a silicon substrate or a ceramic substrate, the filling film 40 may be transparent.

[0060] 3. Third embodiment: Example of application to mirror device 1c FIG. 20 is an explanatory diagram of a mirror device 1c to which the present invention is applied. The image device 1 shown in FIG. 20 is the mirror device 1c. In the mirror device 1c, a mirror 251 is provided on the substrate body 19 of the element substrate 10, and an image is displayed by light reflected by the mirror 251. In the mirror device 1c, a plurality of mirrors 251 are arranged in a matrix on one side of the substrate body 19, and one mirror 251 corresponds to one pixel 201e. The mirror 251 is spaced apart from the substrate body 19. The substrate body 19 is, for example, a silicon substrate. The surface of the mirror 251 is a reflective surface 257 made of a reflective metal film such as aluminum.

[0061] The mirror device 1c includes a first floor section 200a including a substrate-side bias electrode 211 and substrate-side address electrodes 212, 213, a second floor section 200b including elevated address electrodes 232, 233 and a torsion hinge 235, and a third floor section 200c including a mirror 251. In the first floor section 200a, an address circuit (not shown) is formed on the substrate body 19. The second floor section 100b includes the elevated address electrodes 232, 233, the torsion hinge 235, and a mirror support section 252. The elevated address electrodes 232, 233 are electrically connected to the substrate-side address electrodes 212, 213 via electrode posts 222, 223, and are supported by the substrate-side address electrodes 212, 213.

[0062] Hinge arms extend from both ends of the torsion hinge 235. The hinge arms are electrically connected to the substrate-side bias electrode 211 via the hinge support portion 239, and are supported by the substrate-side bias electrode 211. The mirror 251 is electrically connected to the torsion hinge 235 via the mirror support portion 252, and is supported by the torsion hinge 235. Therefore, the mirror 251 is electrically connected to the substrate-side bias electrode 211 via the mirror support portion 252, the torsion hinge 235, the hinge arm, and the hinge support portion 239, and a bias voltage is applied from the substrate-side bias electrode 211.

[0063] In the mirror device 1c, the torsion hinge 235 is twisted when a drive voltage is applied to the substrate-side address electrodes 212, 213 and the elevated address electrodes 232, 233 and the mirror 251 tilts so as to be attracted to the substrate-side address electrodes 212 and the elevated address electrodes 232 or to the substrate-side address electrodes 212 and the elevated address electrodes 233. Then, when the application of the drive voltage to the substrate-side address electrodes 212, 213 and the elevated address electrodes 232, 233 is stopped and the attractive force on the mirror 251 disappears, the torsion hinge 235 exerts a force that returns the mirror 251 to a position parallel to the substrate body 19.

[0064] Here, when the mirror 251 is tilted toward the substrate-side address electrode 212 and the elevated address electrode 232, the light emitted from the light source unit is reflected by the mirror 251 toward the projection optical system, resulting in an ON state. On the other hand, when the mirror 251 is tilted toward the substrate-side address electrode 213 and the elevated address electrode 233, the light emitted from the light source unit is reflected by the mirror 251 toward the light absorbing device, resulting in an OFF state, in which no light is reflected toward the projection optical system. As a result of this driving being performed by each of the multiple mirrors 251, the light emitted from the light source unit is modulated by the multiple mirrors 251 into image light and projected from the projection optical system to display an image.

[0065] In the mirror device 1c thus configured, the electrodes and the like are formed by a photolithography process, as in the liquid crystal device 1a. At that time, a configuration in which the electrodes and the like are separated from the substrate body 19 is realized by using a sacrificial film. Therefore, in the mirror device 1c, as in the liquid crystal device 1a, the mark M shown in FIG. 6 to FIG. 16 is formed in the effective area 110 of the mother substrate 100 for the imaging device. Also, as shown in FIG. 18, the mark M may be formed in the ineffective area 120 of the mother substrate 100 for the imaging device. The mark M has a recess 195, and the recess 195 is filled with a light-shielding filling film 40 made of the same conductive film as the substrate-side address electrodes 212, 213, for example. When the substrate body 19 is a light-shielding substrate such as a silicon substrate or a ceramic substrate, the filling film 40 may be transparent.

[0066] 4. Fourth embodiment: Example of application to imaging device 1d Fig. 21 is an explanatory diagram of an imaging device 1d to which the present invention is applied. The imaging device 1 shown in Fig. 21 is an imaging device 1d equipped with a CMOS type solid-state imaging element. In the imaging device 1d, a substrate body 19 of an element substrate 10 is provided with a plurality of photodiodes 303 as solid-state imaging elements in each of a plurality of pixels 301e, and an image is captured by the plurality of photodiodes 303.

[0067] In the imaging device 1d, the substrate body 19 is made of a silicon substrate. A plurality of photodiodes 303 as a plurality of photoelectric conversion units are formed in a two-dimensional matrix on the surface layer of the substrate body 19. Charge transfer transistors for transferring signal charges from each photodiode 303 are provided on the substrate body 19 adjacent to the photodiodes 303. A gate insulating film 350 and a gate electrode 342 are provided on the surface 319s of the substrate body 19. An insulating film 351, a wiring 343, an insulating film 352, a wiring 344, an interlayer insulating film 353, a wiring 345, an insulating film 354, a wiring 346, an insulating film 355, and a wiring 347 are formed in this order on the upper layer side of the gate electrode 342. Furthermore, an insulating film 356 and a passivation film 349 are formed in this order on the upper layer side of the wiring 347. Moreover, the wirings overlapping each other via the insulating film are electrically connected to each other by contact plugs (not shown). A support substrate 320 is provided on the passivation film 349 via an adhesive layer 360.

[0068] A color filter 321 and a lens 322 are formed on the rear surface 319t of the substrate body 19 so as to overlap each of the multiple photodiodes 303. The color filter 321 and the lens 322 are formed by a photolithography process. Therefore, in the imaging device 1d, as in the liquid crystal device 1a, the mark M shown in Figs. 6 to 16 is formed in the effective area 110 of the imaging device mother substrate 100. The mark M may also be formed in the ineffective area 120 of the imaging device mother substrate 100 as shown in Fig. 18.

[0069] In this embodiment, the mark M has a recess 195 that extends from the passivation film 349 to the substrate body 19. The recess 195 reaches the inside of the substrate body 19. Here, the substrate body 19 has a light-shielding property. Therefore, the filling film 410 that fills the inside of the recess 195 is made of a light-transmitting insulating film. In this case, the substrate body 19 is thin at the bottom of the recess 195, so that the bottom has a certain degree of light-transmittance. Therefore, when the color filter 321 and the lens 322 are formed on the back surface 319t of the substrate body 19, the mark M can be observed from the side of the back surface 319t of the substrate body 19.

[0070] 5.Examples of electronic device configurations A liquid crystal device 1a, an organic electroluminescence device 1b, and a mirror device 1c to which the present invention is applied are used in electronic devices such as projection display devices, projection head-up displays, direct-view head-mounted displays, personal computers, and digital still cameras. [Explanation of symbols]

[0071] 1...image device, 1a...liquid crystal device, 1b...organic electroluminescence device, 1c...mirror device, 1d...imaging device, 1e, 101e, 201e, 301e...pixel, 3a...scanning line, 4a...first conductive film, 5a...second conductive film, 6a...data line, 9a, 111...pixel electrode, 10...element substrate, 10b...pixel region, 19, 29...substrate body, 20...opposing substrate, 21, 121...common electrode, 30, 130...transistor 1. A photodiode, 40...filling film, 41, 49...insulating film, 55...capacitive element, 80...electro-optical layer, 100...mother substrate for imaging device, 110...effective area, 115...light-emitting element, 119...mother substrate body, 120...ineffective area, 190, 195...recess, 191, 196...first groove, 192, 197...second groove, 251...mirror, 303...photodiode, 550...laminated film, G...gap, M...mark, X...first direction, Y...second direction

Claims

1. A substrate body, In the pixel region, a first recess is provided in the substrate body, and a stack is provided in the first recess. a capacitive element including a film; A second recess is provided in the substrate body outside the pixel region, and the second recess is filled with a mark including a filling film including the same laminated film as the laminated film constituting the capacitive element; having The first recess and the second recess each have a first groove extending along a first direction and a flat surface. The grooves extend along a second direction intersecting the first direction without intersecting the first groove in a perspective view. and a second groove.

2. In the imaging device according to claim 1, In the first recess, the first groove and the second groove are provided at a distance from each other. Imaging device with characteristic.

3. In the imaging device according to claim 2, In the second recess, the first groove and the second groove are provided at a distance from each other. Imaging device with characteristic.

4. In the imaging device according to claim 1 or 2, In the second recess, the first groove is one of the opposing side surfaces of the second groove. The second groove is provided so as to be connected to the side surfaces of the first groove, An imaging device characterized in that it is arranged to be connected to one side of the above.

5. In the imaging device according to claim 1, In the second recess, the first groove and the second groove are each formed along an outer edge of the mark. An imaging device comprising:

6. In the imaging device according to claim 5, In the second recess, the first groove and the second groove are provided to be spaced apart from each other, the first groove and the second groove are alternately provided along the outer edge of the mark, 4. An imaging device comprising:

7. 2. The imaging device according to claim 1, At least one of the first groove and the second groove is provided in a plurality of pieces. An imaging device.

8. 8. The imaging device according to claim 7, An imaging device, characterized in that a plurality of the first grooves and a plurality of the second grooves are provided.

9. 9. An imaging device according to any one of claims 1 to 8, Each of the plurality of pixels is provided with a pixel electrode for applying a voltage to the electro-optical layer. An imaging device comprising:

10. 10. An imaging device according to any one of claims 1 to 9, The substrate body is light-transmitting, The imaging device, wherein the filling film includes a light-shielding film.

11. 10. An imaging device according to any one of claims 1 to 9, The substrate body has a light-shielding property, An imaging device, wherein the filling film is light-transmitting.

Images