Multilayer Ceramic Capacitors

Abstract

A multilayer ceramic capacitor 10 comprises: a capacitor body 11 that includes a plurality of laminated dielectric layers 12, a plurality of first inner electrodes 13a, and a plurality of second inner electrodes 13b, and that has a first main surface 15a and a second main surface 15b that are opposite to each other in a first direction, a first side-surface and a second side-surface that are opposite to each other in a second direction orthogonal to the first direction, and a first end surface 17a and a second end surface 17b that are opposite to each other in a third direction orthogonal to the first direction and the second direction; a first external electrode 14a that is provided at least to the first main surface 15a, among the surfaces of the capacitor body 11, and that is electrically connected to the first inner electrodes 13a; a second external electrode 14b that is provided at least to the first main surface 15a, among the surfaces of the capacitor body 11, and that is electrically connected to the second inner electrodes 13b; a first bump 20a that is provided to a surface of the first main surface 15a side of the capacitor body 11, among the surfaces of the first external electrode 14a, and that is formed from one of Au, Cu, and Al; and a second bump 20b that is provided to a surface of the first main surface 15a side of the capacitor body 11, among the surfaces of the second external electrode 14b, and that is formed from the same material as the first bump 20a. The external electrodes 14a, 14b are not provided to the second main surface 15b of the capacitor body 11. The external electrode 14a is provided at a position in contact with at least the first bump 20a and includes a first metal layer 141a formed from the same material as the the first bump 20a. The second external electrode 14b is provided at a position in contact with at least the second bump 20b and includes a second metal layer 141b formed from the same material as the second bump 20b. The thickness of the first bump 20a and the thickness of the second bump 20b in the first direction is 4.5 μm or more.

Description

[Technical field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] A method of mounting semiconductor devices to a substrate by ultrasonic bonding is known. Ultrasonic bonding is a solid-state bond between metals below their melting point, so it has the advantages of being less affected by heat and being able to reduce the electrical resistance of the bonded area compared to connections using solder.

[0003] As one mounting method using ultrasonic bonding, Patent Document 1 discloses a method of electrically connecting a semiconductor device and a wiring component by applying ultrasonic waves to bumps between electrodes of the semiconductor device and the wiring component. Specifically, a semiconductor device having bumps on its electrodes is held by a holding part, and the held semiconductor device is brought close to a wiring component on a stage to bring the bumps into contact with the wiring component. Next, while pressing the semiconductor device against the wiring component, the holding part is ultrasonically vibrated to transmit the ultrasonic vibrations to the bumps, thereby bonding the electrodes of the semiconductor device and the wiring component. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2012-9599 A Summary of the Invention [Problem to be solved by the invention]

[0005] Here, it is considered to perform the above-mentioned ultrasonic bonding on a multilayer ceramic capacitor, instead of a semiconductor device. A multilayer ceramic capacitor is known that includes a plurality of laminated dielectric layers and a plurality of internal electrodes, and has a structure in which external electrodes are provided on the surface of a capacitor body having a pair of main surfaces, a pair of side surfaces, and a pair of end surfaces. In particular, a multilayer ceramic capacitor is generally known that has an external electrode provided on the entire end surfaces of the capacitor body and in such a way that the external electrodes are provided so as to wrap around the pair of main surfaces and the pair of side surfaces from each of the end surfaces.

[0006] When ultrasonic bonding is performed on a multilayer ceramic capacitor having such a structure using the method disclosed in Patent Document 1, it has been found that cracks may occur in the multilayer ceramic capacitor.

[0007] The present invention is devised to solve the above problems, and has an object to provide a multilayer ceramic capacitor in which cracks are less likely to occur even when ultrasonic bonding is performed. [Means for solving the problem]

[0008] The multilayer ceramic capacitor of the present invention is a capacitor body including a plurality of laminated dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes, the capacitor body having a first main surface and a second main surface facing in a first direction, a first side surface and a second side surface facing in a second direction perpendicular to the first direction, and a first end surface and a second end surface facing in a third direction perpendicular to the first direction and the second direction; a first external electrode provided on at least the first main surface of the capacitor body and electrically connected to the first internal electrode; a second external electrode provided on at least the first main surface of the capacitor body and electrically connected to the second internal electrode; a first bump formed on a surface of the first external electrode that faces the first main surface of the capacitor body and made of one of Au, Cu, and Al; a second bump provided on a surface of the second external electrode that faces the first main surface of the capacitor body and made of the same material as the first bump; Equipped with the first external electrode and the second external electrode are not provided on the second main surface of the capacitor body, the first external electrode is provided at a position in contact with at least the first bump and includes a first metal layer made of the same material as the first bump; the second external electrode is provided at a position in contact with at least the second bump and includes a second metal layer made of the same material as the second bump; The thickness of the first bump and the thickness of the second bump in the first direction are 4.5 μm or more. Effect of the Invention

[0009] In the multilayer ceramic capacitor of the present invention, at least the first main surface of the capacitor body is provided with a first external electrode and a second external electrode, and the second main surface is not provided with the first external electrode and the second external electrode. In addition, a first bump is provided on the surface of the first external electrode that faces the first main surface of the capacitor body, and a second bump is provided on the surface of the second external electrode that faces the first main surface of the capacitor body. In order to ultrasonically bond such a multilayer ceramic capacitor, when a holder holds the capacitor body so that the holding surface contacts the second main surface of the capacitor body, the holding surface and the second main surface come into contact with each other on their flat surfaces, and the contact area is increased. Therefore, when ultrasonic vibration is applied to the holder holding the multilayer ceramic capacitor, the multilayer ceramic capacitor vibrates in a direction parallel to the main surface of the capacitor body, so that stress concentration on the side and end surfaces of the capacitor body is alleviated, and the occurrence of cracks can be suppressed. [Brief description of the drawings]

[0010] [Figure 1]1 is a perspective view illustrating a multilayer ceramic capacitor according to a first embodiment of the present invention. [Diagram 2] 2 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 1 taken along line II-II. [Diagram 3] 3 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 1 taken along line III-III. [Figure 4] 4 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 1 taken along line IV-IV. [Diagram 5] 11 is a plan view for illustrating the ratio of the area of ​​a flat region to the area of ​​a second main surface of the capacitor body. FIG. [Figure 6] FIG. 1 is a diagram for explaining a method of ultrasonic bonding of a multilayer ceramic capacitor, where (a) shows the multilayer ceramic capacitor held by a holder, and (b) shows the state in which a first bump provided on the surface of a first external electrode of the multilayer ceramic capacitor and a second bump provided on the surface of a second external electrode of the multilayer ceramic capacitor are brought into contact with land electrodes provided on a substrate. [Figure 7] 1A is a diagram showing a simulation result showing the displacement direction and stress distribution of the multilayer ceramic capacitor according to the first embodiment, FIG. 1B is a perspective view showing the simulation result of the stress distribution of the multilayer ceramic capacitor according to the first embodiment, FIG. 1C is a diagram showing the simulation result showing the displacement direction and stress distribution of the multilayer ceramic capacitor of a comparative example, and FIG. 1D is a perspective view showing the simulation result of the stress distribution of the comparative example. [Figure 8] FIG. 4 is a perspective view illustrating a multilayer ceramic capacitor according to a second embodiment of the present invention. [Figure 9] 9 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 8 taken along line IX-IX. [Figure 10]9 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 8 taken along line XX. [Figure 11] FIG. 11 is a perspective view illustrating a multilayer ceramic capacitor according to a third embodiment of the present invention. [Figure 12] 12 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 11 taken along line XII-XII. [Figure 13] 13 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 11 taken along line XIII-XIII. [Figure 14] FIG. 11 is a perspective view illustrating a multilayer ceramic capacitor according to a fourth embodiment of the present invention. [Figure 15] 15 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 14 taken along line XV-XV. [Figure 16] 16 is a cross-sectional view showing a schematic structure of the multilayer ceramic capacitor shown in FIG. 14 taken along line XVI-XVI. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The features of the present invention will be described in detail below with reference to embodiments of the present invention.

[0012] <First embodiment> FIG. 1 is a perspective view showing a multilayer ceramic capacitor 10 according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10 shown in FIG. 1 cut along line II-II. FIG. 3 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10 shown in FIG. 1 cut along line III-III. FIG. 4 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10 shown in FIG. 1 cut along line IV-IV. FIG. 3 is a cross-sectional view of a position where a first internal electrode 13a described later is provided, and FIG. 4 is a cross-sectional view of a position where a second internal electrode 13b described later is provided.

[0013] The multilayer ceramic capacitor 10 comprises a capacitor body 11, a first external electrode 14a provided on the surface of the capacitor body 11, a second external electrode 14b provided on the surface of the capacitor body 11, a first bump 20a provided on the surface of the first external electrode 14a, and a second bump 20b provided on the surface of the second external electrode 14b.

[0014] The capacitor body 11 includes a plurality of laminated dielectric layers 12, a plurality of first internal electrodes 13a, and a plurality of second internal electrodes 13b. Here, the direction in which the dielectric layers 12, the first internal electrodes 13a, and the second internal electrodes 13b are laminated is referred to as the lamination direction. The capacitor body 11 has a structure in which the first internal electrodes 13a and the second internal electrodes 13b are alternately laminated in the lamination direction with the dielectric layers 12 interposed therebetween.

[0015] The capacitor body 11 has a rectangular parallelepiped shape as a whole. In the present embodiment, the capacitor body 11 has rounded corners and ridges. The corners are portions where three faces of the capacitor body 11 intersect, and the ridges are portions where two faces of the capacitor body 11 intersect. In other words, since the corners and ridges are rounded, the capacitor body 11 is not a perfect rectangular parallelepiped, but has six outer surfaces and a shape that can be considered as a rectangular parallelepiped as a whole.

[0016] The capacitor body 11 has a first main surface 15a and a second main surface 15b facing a first direction Y1, a first side surface 16a and a second side surface 16b facing a second direction Y2 perpendicular to the first direction Y1, and a first end surface 17a and a second end surface 17b facing a third direction Y3 perpendicular to the first direction Y1 and the second direction Y2. The first main surface 15a is the surface of the capacitor body 11 on which a first bump 20a and a second bump 20b, which will be described later, are provided. Any two directions among the first direction Y1, the second direction Y2, and the third direction Y3 are perpendicular to each other.

[0017] In this embodiment, the lamination direction is the second direction Y2 as shown in Fig. 2. That is, a plurality of dielectric layers 12, a plurality of first internal electrodes 13a and a plurality of second internal electrodes 13b are laminated in the direction in which the first side surface 16a and the second side surface 16b face each other.

[0018] The multilayer ceramic capacitor 10 in this embodiment has a structure suitable for mounting by ultrasonic bonding. For this reason, the Young's modulus of the capacitor body 11 is preferably 67 GPa or more. When the Young's modulus of the capacitor body 11 is 67 GPa or more, ultrasonic vibration applied to the multilayer ceramic capacitor 10 is more easily transmitted to the first bump 20a and the second bump 20b described below.

[0019] The dielectric layer 12 is made of, for example, BaTiO3, CaTiO3, SrTiO3, SrZrO 3、 Alternatively, it may be made of a ceramic material mainly composed of CaZrO3, etc. These main components may contain minor components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, etc., which are contained in smaller amounts than the main components.

[0020] The first internal electrode 13a and the second internal electrode 13b contain, for example, a metal such as Ni, Ag, Pd, Au, Cu, Ti, or Cr, or an alloy mainly composed of the above-mentioned metal. The first internal electrode 13a and the second internal electrode 13b may contain, as a common material, the same ceramic material as the dielectric ceramic contained in the dielectric layer 12. The content ratio of the common material in the first internal electrode 13a is, for example, 20 volume % or less of the entire first internal electrode 13a. The same applies to the content ratio of the common material in the second internal electrode 13b.

[0021] As shown in FIG. 3, the first internal electrode 13a is extended to the first main surface 15a of the capacitor body 11 on the side of the first end face 17a in the third direction Y3 and is electrically connected to the first external electrode 14a described later.

[0022] As shown in FIG. 4, the second internal electrode 13b is extended to the first main surface 15a of the capacitor body 11 on the side of the second end face 17b in the third direction Y3 and is electrically connected to the second external electrode 14b described later.

[0023] In addition to the first internal electrode 13a and the second internal electrode 13b, the capacitor body 11 may include an internal electrode that is not electrically connected to the first external electrode 14a and the second external electrode 14b. The materials of all the first internal electrodes 13a provided do not need to be the same, and some may be different. Furthermore, the materials of some parts of one first internal electrode 13a may be different. The same applies to the second internal electrode 13b.

[0024] The first internal electrode 13a and the second internal electrode 13b face each other via the dielectric layer 12 to form a capacitance, which functions as a capacitor.

[0025] The first external electrode 14a is provided on at least the first main surface 15a among the surfaces of the capacitor body 11, and is electrically connected to the first internal electrode 13a. In this embodiment, the first external electrode 14a is provided only on the first main surface 15a among the surfaces of the capacitor body 11, as shown in Figs. 1 to 4. The first external electrode 14a is provided in a manner to cover the multiple first internal electrodes 13a extended to the first main surface 15a of the capacitor body 11, and is separated from the second external electrode 14b.

[0026] The second external electrode 14b is provided on at least the first main surface 15a among the surfaces of the capacitor body 11, and is electrically connected to the second internal electrode 13b. In this embodiment, the second external electrode 14b is provided only on the first main surface 15a among the surfaces of the capacitor body 11, as shown in Figs. 1 to 4. The second external electrode 14b is provided in a manner to cover the multiple second internal electrodes 13b extended to the first main surface 15a of the capacitor body 11, and is separated from the first external electrode 14a.

[0027] The first external electrode 14a is provided at least in a position in contact with a first bump 20a described below, and includes a first metal layer 141a made of the same material as the first bump 20a. In this embodiment, the first external electrode 14a includes a first base electrode layer 142a and a first metal layer 141a disposed on the first base electrode layer 142a.

[0028] The first underlying electrode layer 142a includes at least one layer selected from the group consisting of a baked electrode layer, a resin electrode layer, and a thin-film electrode layer, which will be described below.

[0029] The baked electrode layer is a layer containing glass and metal, and may be a single layer or multiple layers. The baked electrode layer contains, for example, metals such as Cu, Ni, Ag, Pd, Ti, Cr, and Au, or alloys containing these metals.

[0030] The fired electrode layer is formed by applying and firing a conductive paste containing glass and metal to capacitor body 11. The firing may be performed simultaneously with the firing of the unfired capacitor body, or may be performed after capacitor body 11 is produced by firing.

[0031] The resin electrode layer can be formed, for example, as a layer containing conductive particles and a thermosetting resin. When forming a resin electrode layer, it may be formed directly on the capacitor body 11 without forming a baked electrode layer. The resin electrode layer may be a single layer or multiple layers.

[0032] The thin-film electrode layer is, for example, a layer of 1 μm or less in thickness in which metal particles are deposited, and can be formed by a known thin-film formation method such as a sputtering method or a vapor deposition method.

[0033] The first metal layer 141a is formed by, for example, plating. The thickness of the first metal layer 141a is preferably 0.3 μm or more. By making the thickness of the first metal layer 141a 0.3 μm or more, ultrasonic bonding can be performed more reliably.

[0034] However, the configuration of the first external electrode 14a is not limited to the above-mentioned configuration. For example, the first external electrode 14a may be composed of only the first metal layer 141a. In addition, when the first metal layer 141a is a plating layer, a plating layer made of another metal, for example, a Ni plating layer, may be provided between the first base electrode layer 142a and the first metal layer 141a.

[0035] The second external electrode 14b is provided at least in a position in contact with a second bump 20b described later, and includes a second metal layer 141b made of the same material as the second bump 20b. In this embodiment, the second external electrode 14b includes a second base electrode layer 142b and a second metal layer 141b disposed on the second base electrode layer 142b.

[0036] The second underlying electrode layer 142b includes at least one layer selected from the above-mentioned baked electrode layer, resin electrode layer, and thin-film electrode layer, for example.

[0037] The second metal layer 141b is formed by, for example, plating. The thickness of the second metal layer 141b is preferably 0.3 μm or more. By making the thickness of the second metal layer 141b 0.3 μm or more, ultrasonic bonding can be performed more reliably.

[0038] However, the configuration of the second external electrode 14b is not limited to the above-mentioned configuration. For example, the second external electrode 14b may be composed of only the second metal layer 141b. In addition, when the second metal layer 141b is a plating layer, a plating layer made of another metal, for example, a Ni plating layer, may be provided between the second base electrode layer 142b and the second metal layer 141b.

[0039] The first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11. In this embodiment, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11, nor on the first side surface 16a, the second side surface 16b, the first end surface 17a, or the second end surface 17b.

[0040] The first main surface 15a, the second main surface 15b, the first side surface 16a, the second side surface 16b, the first end surface 17a, and the second end surface 17b of the capacitor body 11 are substantially flat. As described above, the corners and ridges are rounded, so that each surface of the capacitor body 11 is not completely flat. However, it is preferable that the ratio of the area of ​​the flat region of the second main surface 15b of the capacitor body 11 to the area of ​​the second main surface 15b of the capacitor body 11 is 0.8 or more. This will be described with reference to FIG. 5.

[0041] 5, of the second main surface 15b of the capacitor body 11, the dimension in the third direction Y3 is La, the dimension in the second direction Y2 is Wa, and the dimension in the third direction Y3 of the flat region 30 excluding the rounded portion is Lb, and the dimension in the second direction Y2 is Wb. The radius of curvature at the corner is Ra. The dimensions La and Lb in the third direction Y3 satisfy the relationship of the following formula (1), and the dimensions Wa and Wb in the second direction Y2 satisfy the relationship of the following formula (2). Lb=La-2Ra (1) Wb=Wa-2Ra (2)

[0042] That is, the flat region 30 of the second main surface 15b of the capacitor body 11 is the region of the second main surface 15b excluding the rounded regions located on both sides in the third direction Y3 and the rounded regions located on both sides in the second direction Y2. Here, the area Sa of the second main surface 15b of the capacitor body 11 is defined as La×Wa, as shown in the following formula (3). Moreover, the area Sb of the flat region 30 of the second main surface 15b is defined as Lb×Wb, as shown in the following formula (4). Sa=La×Wa (3) Sb = Lb × Wb (4)

[0043] Therefore, the ratio K1 of the area Sb of the flat region 30 of the second main surface 15b to the area Sa of the second main surface 15b of the capacitor body 11 is expressed by the following formula (5). K1=(La-2Ra)×(Wa-2Ra) / (La×Wa) (5)

[0044] That is, it is preferable that the ratio K1 of the area Sb of the flat region 30 of the second main surface 15b to the area Sa of the second main surface 15b of the capacitor body 11, as shown in formula (5), is 0.8 or more. When the ratio K1 of the area Sb of the flat region 30 of the second main surface 15b to the area Sa of the second main surface 15b is 0.8 or more, as described later, a sufficiently large area where the second main surface 15b of the capacitor body 11 contacts the holding surface of the holder can be secured when ultrasonic bonding is performed, and the occurrence of cracks can be more effectively suppressed.

[0045] 3 and 4, a first bump 20a is provided on the surface of the first external electrode 14a that faces the first main surface 15a of the capacitor body 11. A second bump 20b is provided on the surface of the second external electrode 14b that faces the first main surface 15a of the capacitor body 11.

[0046] The first bump 20a is made of one of Au, Cu, and Al, which are suitable for solid-state bonding. The second bump 20b is made of the same material as the first bump 20a. As described above, the first metal layer 141a of the first external electrode 14a is made of the same material as the first bump 20a, and the second metal layer 141b of the second external electrode 14b is made of the same material as the second bump 20b. That is, the first bump 20a, the second bump 20b, the first metal layer 141a, and the second metal layer 141b are all made of the same material.

[0047] The thickness of the first bump 20a and the second bump 20b in the first direction Y1 is 4.5 μm or more. When a plurality of multilayer ceramic capacitors having first bumps 20a and second bumps 20b with different thicknesses were fabricated and ultrasonic bonding was performed, the inventors have confirmed that bonding is possible if the thickness is at least 4.5 μm or more.

[0048] The first bump 20a and the second bump 20b can be formed by any method, such as a screen printing method or a dispensing method.

[0049] (Manufacturing method) An example of a method for manufacturing the multilayer ceramic capacitor 10 described above will be described below.

[0050] First, a ceramic green sheet and a conductive paste for forming the internal electrodes are prepared. The ceramic green sheet and the conductive paste for forming the internal electrodes may be any known material containing an organic binder and an organic solvent.

[0051] Next, an internal electrode pattern is formed by printing a conductive paste for internal electrodes on the ceramic green sheets. The printing of the conductive paste for internal electrodes can be performed by a printing method such as screen printing or gravure printing.

[0052] Next, a predetermined number of ceramic green sheets not having an internal electrode pattern formed thereon are stacked, and then ceramic green sheets having an internal electrode pattern formed thereon are stacked in sequence, and a predetermined number of ceramic green sheets not having an internal electrode pattern formed thereon are stacked on top of the stacked ceramic green sheets to produce a mother laminate.

[0053] Next, the mother laminate is pressed in the lamination direction by a method such as a rigid press or a hydrostatic press, and then cut to a predetermined size by a cutting method such as press cutting, dicing, laser, etc. Thereafter, corners and ridges are rounded by barrel polishing or the like, and then sintered with a predetermined profile to obtain capacitor body 11.

[0054] Next, the first base electrode layer 142a and the second base electrode layer 142b are formed by applying and baking a conductive paste for external electrodes onto at least the first main surface 15a of the surface of the capacitor body 11. A known conductive paste for external electrodes can be used.

[0055] Subsequently, a plating process is performed on the first base electrode layer 142a and the second base electrode layer 142b to form a first metal layer 141a and a second metal layer 141b.

[0056] Finally, the first bump 20a is formed at a position in contact with the first metal layer 141a, and the second bump 20b is formed at a position in contact with the second metal layer 141b. As described above, the first bump 20a and the second bump 20b can be formed by a method such as a screen printing method or a dispensing method.

[0057] Through the above-described steps, the multilayer ceramic capacitor 10 can be manufactured. However, the method for manufacturing the multilayer ceramic capacitor 10 is not limited to the above-described manufacturing method, and the multilayer ceramic capacitor 10 can be manufactured by another manufacturing method.

[0058] (Implementation method) A method for mounting the multilayer ceramic capacitor 10 of this embodiment by ultrasonic bonding will be described below.

[0059] 6(a), the multilayer ceramic capacitor 10 is held by a holder 40 having a flat holding surface 40a. Specifically, the holder 40 holds the multilayer ceramic capacitor 10 with the holding surface 40a in contact with the second main surface 15b of the capacitor body 11. As described above, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11.

[0060] The holder 40 may be any type that can hold the multilayer ceramic capacitor 10 with the holding surface 40a in contact with the second main surface 15b of the capacitor body 11. As an example, the holder 40 is a collet that adsorbs and holds the multilayer ceramic capacitor 10 on the holding surface 40a by suction.

[0061] 6(b), the multilayer ceramic capacitor 10 held by the holder 40 is brought into contact with the land electrodes 42a, 42b provided on the substrate 41. Specifically, the first bump 20a is brought into contact with the first land electrode 42a, and the second bump 20b is brought into contact with the second land electrode 42b.

[0062] Next, ultrasonic vibration is applied to the holder 40 while pressing the multilayer ceramic capacitor 10 toward the land electrodes 42a, 42b with the holder 40. The multilayer ceramic capacitor 10 may be heated when the ultrasonic vibration is applied. The ultrasonic vibration applied is parallel to the main surfaces 15a, 15b of the capacitor body 11. When the substrate 41 is disposed on a horizontal surface, the direction parallel to the main surfaces 15a, 15b of the capacitor body 11 is the horizontal direction. As a result, the first bump 20a is crushed, and the first metal layer 141a of the first external electrode 14a and the first land electrode 42a are bonded via the first bump 20a. In addition, the second bump 20b is crushed, and the second metal layer 141b of the second external electrode 14b and the second land electrode 42b are bonded via the second bump 20b.

[0063] As described above, in the multilayer ceramic capacitor 10 of this embodiment, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11 that contacts the holding surface 40a of the holder 40. Therefore, the holding surface 40a of the holder 40 and the second main surface 15b of the capacitor body 11 are in contact with each other. Therefore, when ultrasonic vibration is applied to the holder 40 with the holding surface 40a of the holder 40 in contact with the second main surface 15b of the capacitor body 11, the multilayer ceramic capacitor 10 vibrates in a direction parallel to the main surfaces 15a and 15b of the capacitor body 11. As a result, when ultrasonic vibration is applied, stress concentration on the first side surface 16a, the second side surface 16b, the first end surface 17a, and the second end surface 17b of the capacitor body 11 is alleviated, so that the occurrence of cracks can be suppressed.

[0064] Furthermore, the second main surface 15b of the capacitor body 11 in contact with the holding surface 40a of the holder 40 is not provided with the first external electrode 14a and the second external electrode 14b, and therefore the contact area between the holding surface 40a and the capacitor body 11 is larger than in a configuration in which external electrodes are provided. This reduces the impact load applied to the second main surface 15b of the capacitor body 11 in contact with the holding surface 40a when ultrasonic vibration is applied, thereby suppressing the occurrence of cracks.

[0065] In particular, by configuring the ratio K1 of the area Sb of the flat region 30 of the second main surface 15b to the area Sa of the second main surface 15b of the capacitor body 11 to be 0.8 or more, the contact area between the holding surface 40a of the holder 40 and the capacitor body 11 can be increased, and the occurrence of cracks can be further suppressed.

[0066] In this manner, the multilayer ceramic capacitor 10 in this embodiment is suitable for mounting by ultrasonic bonding, and therefore can be mounted by ultrasonic bonding in mounting locations where the influence of flux residue is a concern when bonding using solder, for example.

[0067] Here, the vibration state and stress distribution when ultrasonic vibration is applied to the multilayer ceramic capacitor of this embodiment in which the first external electrode 14a and the second external electrode 14b are provided only on the first main surface 15a of the capacitor body 11, and a comparative multilayer ceramic capacitor in which the external electrodes are provided on all surfaces of the capacitor body, were investigated by simulation. In the comparative multilayer ceramic capacitor, the external electrodes are provided on the entire pair of end faces of the capacitor body and in a manner that wraps around from each of the pair of end faces to a pair of main surfaces and a pair of side surfaces.

[0068] Fig. 7(a) is a perspective view showing a simulation result indicating the displacement direction and stress distribution of the multilayer ceramic capacitor 10 of this embodiment when ultrasonic vibration is applied, and Fig. 7(b) is a diagram showing the simulation result of the stress distribution of the multilayer ceramic capacitor 10 of this embodiment. Fig. 7(c) is a diagram showing the simulation result indicating the displacement direction of the multilayer ceramic capacitor 50 of the comparative example when ultrasonic vibration is applied, and Fig. 7(d) is a perspective view showing the simulation result of the stress distribution of the multilayer ceramic capacitor 50 of the comparative example. Note that Figs. 7(a) and 7(c) are views when viewed from the end face side of the capacitor body.

[0069] 7(b) and 7(d) show only half of the multilayer ceramic capacitor cut at the center in the third direction Y3. In Fig. 7(a) to (d), the stress distribution is shown by shading, and darker areas, such as black, are areas where stress is concentrated.

[0070] When ultrasonic vibration is applied, the multilayer ceramic capacitor 10 of this embodiment is displaced in the horizontal direction as shown in Fig. 7(a). In contrast, the multilayer ceramic capacitor 50 of the comparative example is displaced obliquely downward as shown in Fig. 7(c). That is, in the multilayer ceramic capacitor 50 of the comparative example, the external electrodes provided in a partial region of the second main surface of the capacitor body abut against the holding surface 40a of the holder 40, and the ridges of the external electrodes abutting against the holding surface 40a are rounded, so that when ultrasonic vibration is applied, the multilayer ceramic capacitor 50 of the comparative example is displaced obliquely downward rather than horizontally.

[0071] In addition, when ultrasonic vibration is applied to the multilayer ceramic capacitor 10 of this embodiment, there are almost no portions where stress is locally concentrated, as shown in Fig. 7(b), and therefore, when ultrasonic bonding is performed, the occurrence of cracks is suppressed.

[0072] In contrast, in the multilayer ceramic capacitor 50 of the comparative example, as shown in Fig. 7(d), there are regions where stress is concentrated on the end faces, main surface, and side surfaces, which may cause cracks to occur due to the stress concentration when ultrasonic bonding is performed.

[0073] The occurrence of cracks during ultrasonic bonding was examined for the multilayer ceramic capacitor 10 of the present embodiment and the multilayer ceramic capacitor 50 of the comparative example. Here, a plurality of samples were prepared for each of the multilayer ceramic capacitor 10 of the present embodiment and the multilayer ceramic capacitor 50 of the comparative example, and the occurrence of cracks was examined by changing the amplitude of ultrasonic vibration. The vibration time of the applied ultrasonic vibration was 0.5 seconds, and the load applied to the multilayer ceramic capacitor during the application of the ultrasonic vibration was 5N. The number of cracks indicates the number of cracks out of three samples in the case of the multilayer ceramic capacitor 10 of the present embodiment, and the number of cracks out of five samples in the case of the multilayer ceramic capacitor 50 of the comparative example. The examination results are shown in Table 1.

[0074] [Table 1]

[0075] As shown in Table 1, when the amplitude of the ultrasonic vibration was set to 0.25 μm, 0.50 μm, or 0.75 μm, no cracks occurred in any of the samples of the multilayer ceramic capacitor 10 of this embodiment. On the other hand, in the multilayer ceramic capacitor 50 of the comparative example, when the amplitude of the ultrasonic vibration was set to 0.25 μm, 0.50 μm, or 0.75 μm, cracks occurred in all five samples.

[0076] <Second embodiment> In the multilayer ceramic capacitor 10A in the second embodiment, similarly to the multilayer ceramic capacitor 10 in the first embodiment, the first external electrode 14a and the second external electrode 14b are provided on at least the first main surface 15a among the surfaces of the capacitor body 11, but are not provided on the second main surface 15b opposite to the first main surface 15a. However, in the multilayer ceramic capacitor 10A in the second embodiment, the first external electrode 14a and the second external electrode 14b are provided on a wider surface of the capacitor body 11 than in the multilayer ceramic capacitor 10 in the first embodiment.

[0077] Fig. 8 is a perspective view showing a multilayer ceramic capacitor 10A according to the second preferred embodiment. Fig. 9 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10A shown in Fig. 8 taken along line IX-IX. Fig. 10 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10A shown in Fig. 8 taken along line XX.

[0078] In this embodiment, the lamination direction is a first direction Y1, as shown in Figures 9 and 10. That is, a plurality of dielectric layers 12, a plurality of first internal electrodes 13a, and a plurality of second internal electrodes 13b are laminated in the direction in which the first main surface 15a and the second main surface 15b face each other.

[0079] 9, the first internal electrode 13a is extended to a first end face 17a of the capacitor body 11 and is electrically connected to a first external electrode 14a. The first internal electrode 13a is not extended to a second end face 17b of the capacitor body 11.

[0080] 9, the second internal electrode 13b is extended to the second end face 17b of the capacitor body 11 and is electrically connected to the second external electrode 14b. The second internal electrode 13b is not extended to the first end face 17a of the capacitor body 11.

[0081] As described above, the first external electrode 14a is provided on at least the first main surface 15a among the surfaces of the capacitor body 11. In this embodiment, as shown in Figs. 8 to 10, the first external electrode 14a is provided on the first main surface 15a and the first end surface 17a among the surfaces of the capacitor body 11. The first external electrode 14a may be provided on the entirety or part of the first end surface 17a, as long as it is provided in a manner that covers the multiple first internal electrodes 13a extended to the first end surface 17a of the capacitor body 11.

[0082] As described above, the second external electrode 14b is provided on at least the first main surface 15a among the surfaces of the capacitor body 11. In this embodiment, as shown in Figs. 8 to 10, the second external electrode 14b is provided on the first main surface 15a and the second end surface 17b among the surfaces of the capacitor body 11. The second external electrode 14b may be provided on the entire second end surface 17b or on a part of the second end surface 17b, as long as it is provided in a manner that covers the multiple second internal electrodes 13b extended to the second end surface 17b of the capacitor body 11.

[0083] In the multilayer ceramic capacitor 10A of this embodiment, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11. Therefore, like the multilayer ceramic capacitor 10 of the first embodiment, the multilayer ceramic capacitor 10A of the second embodiment can also suppress the occurrence of cracks when ultrasonic bonding is performed.

[0084] Although the multilayer ceramic capacitor 10A in the second embodiment has a different structure of the capacitor body 11, it can be manufactured basically by the same manufacturing method as the multilayer ceramic capacitor 10 in the first embodiment.

[0085] <Third embodiment> In the multilayer ceramic capacitor 10B of the third embodiment, similarly to the multilayer ceramic capacitor 10 of the first embodiment, the first external electrode 14a and the second external electrode 14b are provided on at least the first main surface 15a among the surfaces of the capacitor body 11, but are not provided on the second main surface 15b opposite to the first main surface 15a. However, in the multilayer ceramic capacitor 10B of the third embodiment, the first external electrode 14a and the second external electrode 14b are provided on a wider surface of the capacitor body 11 than in the multilayer ceramic capacitor 10 of the first embodiment and the multilayer ceramic capacitor 10A of the second embodiment.

[0086] Fig. 11 is a perspective view showing a multilayer ceramic capacitor 10B according to a third preferred embodiment of the present invention. Fig. 12 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10B shown in Fig. 11 taken along line XII-XII. Fig. 13 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10B shown in Fig. 10 taken along line XIII-XIII.

[0087] As in the second embodiment, in the present embodiment, the lamination direction is the first direction Y1 as shown in Figures 12 and 13. That is, a plurality of dielectric layers 12, a plurality of first internal electrodes 13a, and a plurality of second internal electrodes 13b are laminated in the direction in which the first main surface 15a and the second main surface 15b face each other.

[0088] As described above, the first external electrode 14a is provided on at least the first main surface 15a among the surfaces of the capacitor body 11. In this embodiment, the first external electrode 14a is provided on the first main surface 15a, the first end face 17a, the first side surface 16a, and the second side surface 16b among the surfaces of the capacitor body 11, as shown in Figs. 11 to 13.

[0089] As described above, the second external electrode 14b is provided on at least the first main surface 15a among the surfaces of the capacitor body 11. In the present embodiment, the second external electrode 14b is provided on the first main surface 15a, the second end face 17b, the first side surface 16a, and the second side surface 16b among the surfaces of the capacitor body 11, as shown in Figs. 11 to 13.

[0090] In the multilayer ceramic capacitor 10B of this embodiment, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11. Therefore, like the multilayer ceramic capacitor 10 of the first embodiment, the multilayer ceramic capacitor 10B of the third embodiment can also suppress the occurrence of cracks when ultrasonic bonding is performed.

[0091] Although the multilayer ceramic capacitor 10B in the third embodiment has a different structure of the capacitor body 11, it can be manufactured basically by the same manufacturing method as the multilayer ceramic capacitor 10 in the first embodiment.

[0092] <Fourth embodiment> In the multilayer ceramic capacitor 10C of the fourth embodiment, similarly to the multilayer ceramic capacitor 10 of the first embodiment, the first external electrode 14a and the second external electrode 14b are provided on at least the first main surface 15a of the surface of the capacitor body 11, but are not provided on the second main surface 15b opposite to the first main surface 15a. The multilayer ceramic capacitor 10C of the fourth embodiment has the same external shape as the multilayer ceramic capacitor 10 of the first embodiment, but the structure of the capacitor body 11 is different.

[0093] Fig. 14 is a perspective view showing a multilayer ceramic capacitor 10C according to a fourth preferred embodiment of the present invention. Fig. 15 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10C shown in Fig. 14 taken along line XV-XV. Fig. 16 is a cross-sectional view showing a structure of the multilayer ceramic capacitor 10C shown in Fig. 14 taken along line XVI-XVI.

[0094] As in the second and third embodiments, in this embodiment, the lamination direction is the first direction Y1 as shown in Figures 15 and 16. That is, a plurality of dielectric layers 12, a plurality of first internal electrodes 13a, and a plurality of second internal electrodes 13b are laminated in the direction in which the first main surface 15a and the second main surface 15b face each other.

[0095] As in the multilayer ceramic capacitor 10 of the first preferred embodiment, the first external electrode 14a is provided only on the first main surface 15a of the capacitor body 11, as shown in Figures 14 to 16. The second external electrode 14b is provided only on the first main surface 15a of the capacitor body 11.

[0096] Unlike the multilayer ceramic capacitors 10 to 10B in the above-described embodiments, in the multilayer ceramic capacitor 10C in this embodiment, the first internal electrodes 13a and the second internal electrodes 13b are not extended to any surface of the capacitor body 11. Inside the capacitor body 11, first via conductors 21a for electrically connecting the multiple first internal electrodes 13a to the first external electrode 14a and second via conductors 21b for electrically connecting the multiple second internal electrodes 13b to the second external electrode 14b are provided.

[0097] The first inner electrode 13a has a first through hole 131 for inserting the second via conductor 21b, and the second inner electrode 13b has a second through hole 132 for inserting the first via conductor 21a.

[0098] The first via conductor 21a is provided inside the capacitor body 11 so as to extend in a first direction Y1, and is electrically connected to the multiple first internal electrodes 13a. The first via conductor 21a passes through a second through hole 132 provided in the second internal electrode 13b, and is insulated from the second internal electrode 13b.

[0099] The first via conductor 21a is exposed at least on the first main surface 15a of the capacitor body 11. Although Figures 15 and 16 show a configuration in which the first via conductor 21a is not exposed on the second main surface 15b of the capacitor body 11, it may be exposed.

[0100] The second via conductor 21b is provided inside the capacitor body 11 so as to extend in the first direction Y1, and is electrically connected to the second internal electrodes 13b. The second via conductor 21b passes through a first through hole 131 provided in the first internal electrode 13a, and is insulated from the first internal electrode 13a.

[0101] The second via conductor 21b is exposed at least on the first main surface 15a of the capacitor body 11. Although Fig. 15 and Fig. 16 show a configuration in which the second via conductor 21b is not exposed on the second main surface 15b of the capacitor body 11, the second via conductor 21b may be exposed.

[0102] The material of the first via conductor 21a and the second via conductor 21b is arbitrary and includes, for example, metals such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or alloys containing these metals.

[0103] The first external electrode 14a is provided at a position where the first via conductor 21a is exposed on the first main surface 15a of the capacitor body 11, and is electrically connected to the first via conductor 21a. The first via conductor 21a is electrically connected to the multiple first internal electrodes 13a, and therefore the first external electrode 14a is electrically connected to the multiple first internal electrodes 13a.

[0104] The second external electrode 14b is provided at a position where the second via conductor 21b is exposed on the first main surface 15a of the capacitor body 11, and is electrically connected to the second via conductor 21b. Since the second via conductor 21b is electrically connected to the plurality of second internal electrodes 13b, the second external electrode 14b is electrically connected to the plurality of second internal electrodes 13b.

[0105] In the multilayer ceramic capacitor 10C of this embodiment, the first external electrode 14a and the second external electrode 14b are not provided on the second main surface 15b of the capacitor body 11. Therefore, like the multilayer ceramic capacitor 10 of the first embodiment, the multilayer ceramic capacitor 10C of the fourth embodiment can also suppress the occurrence of cracks when ultrasonic bonding is performed.

[0106] The multilayer ceramic capacitor 10C in the fourth embodiment can basically be manufactured by the same manufacturing method as the multilayer ceramic capacitor 10A in the second embodiment and the multilayer ceramic capacitor 10B in the third embodiment, but requires a process of forming the first via conductor 21a and the second via conductor 21b.

[0107] For this reason, after a mother laminate is produced by a method similar to that of the multilayer ceramic capacitor 10A in the second embodiment and the multilayer ceramic capacitor 10B in the third embodiment, through holes for forming the first via conductors 21a and through holes for forming the second via conductors 21b are formed. The through holes are formed, for example, by irradiating with a laser beam.

[0108] Next, the formed through holes are filled with a conductive paste for forming the first via conductors 21a and the second via conductors 21b. Thereafter, similarly to the manufacturing method of the multilayer ceramic capacitor 10A in the second embodiment and the multilayer ceramic capacitor 10B in the third embodiment, the mother laminate is pressed and cut to a predetermined size.

[0109] The present invention is not limited to the above-described embodiment, and various applications and modifications are possible within the scope of the present invention. [Explanation of symbols]

[0110] 10, 10A, 10B, 10C Multilayer Ceramic Capacitors 11 Capacitor body 12 Dielectric layer 13a First internal electrode 13b Second internal electrode 14a First external electrode 14b Second external electrode 15a: first main surface of the capacitor body 15b second main surface of the capacitor body 16a First side of the capacitor body 16b Second side of the capacitor body 17a: first end surface of the capacitor body 17b Second side of the capacitor body 20a First Bump 20b Second Bump 21a First via conductor 21b Second via conductor 30 Flat area of ​​one main surface of the capacitor body 40 Holder 40a Holding surface 41 Substrate 42a First land electrode 42b Second land electrode 141a First metal layer 141b Second metal layer 142a First base electrode layer 142b Second base electrode layer

Claims

1. a capacitor body including a plurality of laminated dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes, the capacitor body having a first main surface and a second main surface facing each other in a first direction, a first side surface and a second side surface facing each other in a second direction perpendicular to the first direction, and a first end surface and a second end surface facing each other in a third direction perpendicular to the first direction and the second direction; a first external electrode provided on at least the first main surface of the capacitor body and electrically connected to the first internal electrode; a second external electrode provided on at least the first main surface of the capacitor body and electrically connected to the second internal electrode; a first bump formed on a surface of the first external electrode that faces the first main surface of the capacitor body and made of one of Au, Cu, and Al; a second bump provided on a surface of the second external electrode that faces the first main surface of the capacitor body and made of the same material as the first bump; Equipped with the first external electrode and the second external electrode are not provided on the second main surface of the capacitor body, the first external electrode is provided at a position in contact with at least the first bump and includes a first metal layer made of the same material as the first bump; the second external electrode is provided at a position in contact with at least the second bump and includes a second metal layer made of the same material as the second bump; a thickness of the first bump and a thickness of the second bump in the first direction are 4.5 μm or more; The multilayer ceramic capacitor according to claim 1, wherein the first metal layer and the second metal layer have a thickness of 0.3 μm or more.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein a ratio of an area of ​​the flat region of the second main surface to an area of ​​the second main surface of the capacitor body is 0.8 or more.

3. 3. The multilayer ceramic capacitor according to claim 1, wherein the capacitor body has a Young's modulus of 67 GPa or more.

4. 3. The multilayer ceramic capacitor according to claim 1, wherein the first external electrode and the second external electrode are provided only on the first main surface of the capacitor body.

5. the first external electrode is provided on the first main surface and the first end surface of the capacitor body; 3. The multilayer ceramic capacitor according to claim 1, wherein the second external electrode is provided on the first main surface and the second end surface of the capacitor body.

6. the first external electrode is provided on the first main surface, the first end surface, the first side surface, and the second side surface of the capacitor body; 3. The multilayer ceramic capacitor according to claim 1, wherein the second external electrodes are provided on the first main surface, the second end surface, the first side surface, and the second side surface of the capacitor body.

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