Multilayer capacitor and its mounting substrate

Abstract

To provide a lamination type capacitor and a mounting board therefor.SOLUTION: A lamination type capacitor and a mounting board thereof are provided. The lamination type capacitor includes a capacitor main body which includes a dielectric layer and first and second internal electrodes, and has first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and facing each other, first and second site portions which are arranged on the fifth and sixth surfaces of the capacitor main body respectively, and first and second external electrodes which are arranged on the third and fourth surfaces of the capacitor main body and connected to the first and second internal electrodes, respectively. The first and second internal electrodes have an uneven pattern on one side end thereof in a direction perpendicular to the fifth and sixth surfaces of the capacitor main body.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a multilayer capacitor and a mounting substrate thereof. [Background technology]

[0002] Stacked capacitors have the advantages of being small yet high capacity and easy to implement, and therefore are widely used as IT components in computers, PDAs, mobile phones, etc., and because of their high reliability and high strength characteristics, they are also widely used as electrical components.

[0003] In recent years, with the miniaturization and multi-functionalization of electronic devices, there is a demand for multilayer capacitors that are small in size but have large capacitance. To this end, multilayer capacitors are manufactured with a structure in which the internal electrodes are exposed in the width direction of the capacitor body, and then side portions are attached to maximize the area of ​​the internal electrodes in the width direction.

[0004] The multilayer capacitor having such a structure is manufactured by laminating and cutting a plurality of dielectric layers to manufacture a capacitor body, and then attaching side parts separately to both sides in the width direction of the capacitor body before firing so that the side parts cover the exposed parts of the internal electrodes. In this case, it is possible to reduce HVS (High Voltage Shock) failures and IR (Insulation Resistance) failures.

[0005] However, stacked capacitors with this structure have a problem in that burrs generated during the process of cutting the stack into individual capacitor bodies increase the occurrence of interlayer shorts, which can be a direct cause of HVS failures. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Korean Patent No. 10-1141457 [Patent Document 2] Korean Patent Publication No. 2009-0037099 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of the present invention is to provide a multilayer capacitor and a mounting board thereof in which the area of ​​the internal electrodes is expanded to increase the capacitance of the capacitor, while reducing the occurrence of burrs that occur when cutting the laminate into capacitor bodies during the manufacturing process, and preventing interlayer short circuits even if burrs are generated. [Means for solving the problem]

[0008] According to one aspect of the present invention, there is provided a multilayer capacitor including a dielectric layer and first and second internal electrodes, the multilayer capacitor including a capacitor body having first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces and facing each other, first and second side portions disposed on the fifth and sixth surfaces of the capacitor body, respectively, and first and second external electrodes disposed on the third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, respectively, the first and second internal electrodes having uneven patterns on both side ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body.

[0009] In an embodiment of the present invention, the uneven patterns of the first and second internal electrodes may contact the first and second side portions.

[0010] In an embodiment of the present invention, the uneven pattern of the first internal electrode and the uneven pattern of the second internal electrode may be formed to be shifted from each other in a direction in which the dielectric layers are stacked.

[0011] In one embodiment of the present invention, the first internal electrode may include a plurality of first and second protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body at a predetermined interval to contact the first and second side portions, respectively, and the second internal electrode may include a plurality of third and fourth protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body at a predetermined interval to contact the first and second side portions, respectively.

[0012] In one embodiment of the present invention, the first internal electrode may include a plurality of first and second grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body at a predetermined interval so as to be spaced apart from the fifth and sixth surfaces of the capacitor body, respectively, and the second internal electrode may include a plurality of third and fourth grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body at a predetermined interval so as to be spaced apart from the fifth and sixth surfaces of the capacitor body, respectively.

[0013] In an embodiment of the present invention, the multilayer capacitor may further include first and second dummy patterns disposed in the first and second grooves at a distance from the first internal electrode, and third and fourth dummy patterns disposed in the third and fourth grooves at a distance from the second internal electrode.

[0014] In an embodiment of the present invention, the first and second dummy patterns may be in contact with the first and second side portions, respectively, and the third and fourth dummy patterns may be in contact with the first and second side portions, respectively.

[0015] In one embodiment of the present invention, the first groove portion may be formed in a portion of the first internal electrode connecting the third surface and the fifth surface of the capacitor body, the second groove portion may be formed in a portion of the first internal electrode connecting the third surface and the sixth surface of the capacitor body, the third groove portion may be formed in a portion of the second internal electrode connecting the fourth surface and the fifth surface of the capacitor body, and the fourth groove portion may be formed in a portion of the second internal electrode connecting the fourth surface and the sixth surface of the capacitor body.

[0016] In an embodiment of the present invention, the first internal electrode may have a first cutout portion formed at both corners adjacent to a fourth surface of the capacitor, and the second internal electrode may have a second cutout portion formed at both corners adjacent to a third surface of the capacitor.

[0017] In an embodiment of the present invention, the capacitor body may include an active region where the first and second internal electrodes overlap, and upper and lower cover regions disposed on upper and lower surfaces of the active region, respectively.

[0018] The first and second external electrodes may each include a first and second connection portion disposed on a third and fourth surface of the capacitor body, respectively, and connected to the first and second internal electrodes, and a first and second band portion extending from the first and second connection portions to a portion of the first surface of the body.

[0019] Another aspect of the present invention provides a mounting board for a multilayer capacitor, including: a substrate having first and second electrode pads on one surface; and a multilayer capacitor mounted such that first and second external electrodes are connected to the first and second electrode pads, respectively. Effect of the Invention

[0020] According to an embodiment of the present invention, the area of ​​the internal electrodes is expanded, thereby increasing the capacitance of the multilayer capacitor. Furthermore, by forming both ends of the internal electrodes to have an uneven shape, it is possible to reduce the generation of burrs that occur when cutting the multilayer body into capacitor bodies during the manufacturing process, and to prevent short circuits caused by such burrs. [Brief description of the drawings]

[0021] [Figure 1] 1 is a perspective view showing a multilayer capacitor according to an embodiment of the present invention; [Diagram 2] 2 is a cross-sectional view taken along line II' in FIG. [Diagram 3] 1(a) and 1(b) are plan views showing the first and second internal electrodes of the multilayer capacitor of FIG. [Figure 4] 2 is a cross-sectional view taken along line II-II' in FIG. [Diagram 5] FIG. 2 is a cross-sectional view taken along line III-III' in FIG. [Figure 6] 1A and 1B are plan views showing other embodiments of the first and second internal electrodes. [Figure 7] 7 is an XY cross-sectional view of a multilayer capacitor to which the first internal electrode of FIG. 6(a) is applied. [Figure 8] 7 is a YZ cross-sectional view of a multilayer capacitor to which the first and second internal electrodes of FIGS. 6(a) and 6(b) are applied. FIG. [Figure 9] 2 is a cross-sectional view that shows a schematic diagram of a substrate on which the multilayer capacitor of FIG. 1 is mounted. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, the embodiments of the present invention are provided to more completely explain the present invention to those having average knowledge in the art. Therefore, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation. Also, the same reference numerals are used throughout the drawings for parts having similar functions and actions.

[0023] In addition, throughout the specification, the term "comprising" a certain element does not mean to exclude other elements, but means that other elements may be further included, unless otherwise specified.

[0024] To clearly explain the embodiments of the present invention, directions are defined as follows: X, Y, and Z shown in the drawings respectively indicate the length direction, width direction, and thickness direction of the multilayer capacitor.

[0025] In addition, the Z direction may be used herein in the present embodiment with the same concept as the lamination direction in which the dielectric layers are laminated.

[0026] FIG. 1 is an oblique view showing a multilayer capacitor according to one embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line II' in FIG. 1, FIGS. 3(a) and 3(b) are plan views showing first and second internal electrodes of the multilayer capacitor of FIG. 1, FIG. 4 is a cross-sectional view taken along line II-II' in FIG. 1, and FIG. 5 is a cross-sectional view taken along line III-III' in FIG. 1.

[0027] Hereinafter, the multilayer capacitor 100 of this embodiment will be described with reference to FIGS.

[0028] 1 to 5, a multilayer capacitor 100 of the present embodiment includes a capacitor body 110, first and second side portions 141 and 142, and first and second external electrodes 131 and 132. As shown in FIG.

[0029] The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 in the Z direction and then firing them, and the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can be integrated to such an extent that it is difficult to confirm without using a scanning electron microscope (SEM).

[0030] The capacitor body 110 includes a plurality of dielectric layers 111, and first and second internal electrodes 121 and 122 having different polarities and alternately arranged in the Z direction with the dielectric layers 111 sandwiched therebetween.

[0031] In addition, the capacitor body 110 may include an active region in which first and second internal electrodes 121, 122 are alternately arranged and overlapped in the Z direction with a dielectric layer 111 sandwiched therebetween as a part that contributes to forming the capacitance of the capacitor, and upper and lower cover regions 112, 113 provided on the upper and lower surfaces of the active region in the Z direction, respectively, as margin portions.

[0032] In addition, the capacitor body 110 is not particularly limited in shape, but may be a hexahedron and may include first and second surfaces 1, 2 facing each other in the Z direction, third and fourth surfaces 3, 4 connected to the first and second surfaces 1, 2 and facing each other in the X direction, and fifth and sixth surfaces 5, 6 connected to the first and second surfaces 1, 2 and also connected to the third and fourth surfaces 3, 4 and facing each other. In this embodiment, the first surface 1 may be a mounting surface of the multilayer capacitor 100.

[0033] The dielectric layer 111 may include a ceramic powder, such as a BaTiO3-based ceramic powder.

[0034] The BaTiO3 ceramic powder is a powder in which Ca or Zr is partially dissolved in BaTiO3 (BT) (Ba 1-x Ca x )TiO3, Ba(Ti 1-y Ca y )O3, (Ba 1-x Ca x )(Ti 1-y Zr y )O3, or Ba(Ti 1-y Zr y )O3, but the present invention is not limited thereto.

[0035] In addition to the ceramic powder, the dielectric layer 111 may further contain a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like.

[0036] The ceramic additives may include, for example, transition metal oxides or carbides, rare earth elements, magnesium (Mg), or aluminum (Al), and the like.

[0037] The first and second internal electrodes 121, 122 are electrodes to which different polarities are applied, and may be formed on each dielectric layer 111 and stacked alternately in the Z direction, and may be alternately arranged to face each other along the Z direction inside the capacitor body 110 with one dielectric layer 111 sandwiched between them.

[0038] In this case, the first and second internal electrodes 121 and 122 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

[0039] In addition, the first internal electrode 121 may be exposed through the third, fifth and sixth surfaces 3 , 5 and 6 of the capacitor body 110 .

[0040] In this case, both side regions of the first internal electrode 121 in the Y direction exposed through the fifth and sixth faces 5 and 6 of the capacitor body 110 may have an uneven pattern.

[0041] To this end, the first internal electrode 121 may have a plurality of first and second protrusions 121a and 121b formed at both ends in a Y direction perpendicular to the fifth and sixth faces 5 and 6 of the capacitor body 110 at a predetermined interval.

[0042] The first protrusion 121a is exposed through the fifth surface 5 of the capacitor body 110 and contacts the first side portion 141, and the second protrusion 121b is exposed through the sixth surface 6 of the capacitor body 110 and contacts the second side portion 142.

[0043] The first internal electrode 121 may have a plurality of first and second grooves 121c and 121d formed at both ends in the Y direction perpendicular to the fifth and sixth faces 5 and 6 of the capacitor body 110 by the first and second protrusions 121a and 121b, respectively, spaced at a predetermined interval.

[0044] As a result, the first groove portion 121c prevents a portion of one side end of the first internal electrode 121 from being exposed to the fifth surface 5 of the capacitor body 110, and separates it from the fifth surface 5 of the capacitor body 110, and the second groove portion 121d prevents a portion of the other side end of the first internal electrode 121 from being exposed to the sixth surface 6 of the capacitor body 110, and separates it from the sixth surface 6 of the capacitor body 110.

[0045] In this case, the first groove portion 121c may also be formed in a portion of the first internal electrode 121 connecting the third surface 3 and the fifth surface 5 of the capacitor body 110, and the second groove portion 121d may also be formed in a portion of the first internal electrode 121 connecting the third surface 3 and the sixth surface 6 of the capacitor body 110.

[0046] In addition, the first internal electrode 121 may have first cutouts 121 e formed at both corners adjacent to the fourth surface 4 of the capacitor body 110 .

[0047] The second internal electrode 122 is exposed through the fourth, fifth and sixth faces 4 , 5 , 6 of the capacitor body 110 .

[0048] In this case, both ends of the second internal electrode 122 in the Y direction exposed through the fifth and sixth faces 5 and 6 of the capacitor body 110 may have an uneven pattern.

[0049] To this end, the second internal electrode 122 may have a plurality of third and fourth protrusions 122a and 122b formed at both ends in the Y direction perpendicular to the fifth and sixth faces 5 and 6 of the capacitor body 110 at a predetermined interval.

[0050] The third protrusion 122a is exposed through the fifth surface 5 of the capacitor body 110 and contacts the first side portion 141, and the fourth protrusion 122b is exposed through the sixth surface 6 of the capacitor body 110 and contacts the second side portion 142.

[0051] In this case, the uneven pattern of the first internal electrode 121 and the uneven pattern of the second internal electrode 122 may be formed to be shifted from each other in the Z direction in which the dielectric layers 111 are stacked.

[0052] That is, the third protrusion 122a may be formed at a position corresponding to the first groove portion 121c of the first internal electrode 121 in the Z direction, and the fourth protrusion 122b may be formed at a position corresponding to the second groove portion 121d of the first internal electrode 121 in the Z direction.

[0053] The second internal electrode 122 may have a plurality of third and fourth grooves 122c and 122d formed at both ends in the Y direction perpendicular to the fifth and sixth faces 5 and 6 of the capacitor body 110 by the third and fourth protrusions 122a and 122b, respectively, spaced at a predetermined interval.

[0054] As a result, the third groove portion 122c prevents a portion of one side end of the second internal electrode 122 from being exposed to the fifth surface 5 of the capacitor body 110, and separates it from the fifth surface 5 of the capacitor body 110, and the fourth groove portion 122d prevents a portion of the other side end of the second internal electrode 122 from being exposed to the sixth surface 6 of the capacitor body 110, and separates it from the sixth surface 6 of the capacitor body 110.

[0055] In this case, the third groove portion 122c may be formed at a position corresponding to the first protrusion portion 121a of the first internal electrode 121 in the Z direction, and the fourth groove portion 122d may be formed at a position corresponding to the second protrusion portion 121b of the first internal electrode 121 in the Z direction.

[0056] In this case, the third groove portion 122c may also be formed in a portion of the second internal electrode 122 connecting the fourth surface 4 and the fifth surface 5 of the capacitor body 110, and the fourth groove portion 122d may also be formed in a portion of the second internal electrode 122 connecting the fourth surface 4 and the sixth surface 6 of the capacitor body 110.

[0057] In addition, the second internal electrode 122 may have second cutouts 122 e formed at both corners adjacent to the third surface 3 of the capacitor body 110 .

[0058] In this case, the ends of the first and second internal electrodes 121, 122 alternately exposed through the third and fourth surfaces 3, 4 of the capacitor body 110 may be connected and coupled to the first and second external electrodes 131, 132, respectively, disposed at both ends of the capacitor body 110 in the X direction, which will be described later.

[0059] With the above-described configuration, when a predetermined voltage is applied to the first and second external electrodes 131 and 132, charges are accumulated between the first internal electrode 121 and the second internal electrode 122.

[0060] At this time, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area of ​​the first and second internal electrodes 121 and 122 that overlap each other along the Z direction in the active region.

[0061] By configuring the first and second internal electrodes 121, 122 as in this embodiment, not only is the basic area of ​​the first and second internal electrodes 121, 122 expanded, but the overlapping area between the top and bottom is also increased, thereby increasing the capacitance of the multilayer capacitor 100.

[0062] That is, when the area of ​​the overlapping region of the first and second internal electrodes 121 and 122 is maximized, the capacitance can be maximized even for capacitors of the same size.

[0063] In addition, by reducing the steps caused by laminating the internal electrodes, the accelerated life of the insulation resistance can be improved, making it possible to provide a multilayer capacitor 100 that has excellent capacitance characteristics and improved reliability.

[0064] In this case, the material for forming the first and second internal electrodes 121, 122 is not particularly limited, and may be formed using a conductive paste made of at least one of precious metal materials, nickel (Ni), and copper (Cu).

[0065] The conductive paste may be printed by a screen printing method, a gravure printing method, or the like, but the present invention is not limited thereto.

[0066] The first side portion 141 is disposed on a fifth surface 5 of the capacitor body 110 , and the second side portion 142 is disposed on a sixth surface 6 of the capacitor body 110 .

[0067] The first and second side portions 141 and 142 are in contact with and cover the tips of the portions of the first and second internal electrodes 121 and 122 that are exposed through the fifth and sixth faces 5 and 6 of the capacitor body 110, respectively.

[0068] That is, in this embodiment, the first side portion 141 contacts the first protrusion 121a of the first internal electrode 121 and the third protrusion 122a of the second internal electrode 122, and the second side portion 142 contacts the second protrusion 121b of the first internal electrode 121 and the fourth protrusion 122b of the second internal electrode 122.

[0069] The first and second side portions 141 and 142 may serve to protect the capacitor body 110 and the first and second internal electrodes 121 and 122 from external impacts and the like, and to ensure the insulation and moisture resistance reliability around the capacitor body 110.

[0070] The first and second external electrodes 131, 132 are provided with voltages of different polarities, are disposed at both ends of the capacitor body 110 in the X direction, and may be connected to and coupled to portions of the first and second internal electrodes 121, 122 exposed through the third and fourth surfaces 3, 4 of the capacitor body 110, respectively.

[0071] The first external electrode 131 may include a first connection portion 131a and a first band portion 131b.

[0072] The first connection portion 131a is arranged on the third surface 3 of the capacitor body 110 and contacts the end of the first internal electrode 121 that is exposed to the outside through the third surface 3 of the capacitor body 110, thereby serving to physically and electrically connect the first internal electrode 121 and the first external electrode 131 to each other.

[0073] The first band portion 131b is a portion that extends from the first connection portion 131a to a part of the first surface 1 of the capacitor body 110.

[0074] In this case, the first band portion 131b may be further extended toward the second, fifth, and sixth surfaces 2, 5, and 6 of the capacitor body 110, if necessary, to improve the bonding strength, and may be formed to cover one end of the first and second side portions 141 and 142.

[0075] The second external electrode 132 may include a second connection portion 132a and a second band portion 132b.

[0076] The second connection portion 132a is arranged on the fourth surface 4 of the capacitor body 110 and contacts the end of the second internal electrode 122 that is exposed to the outside through the fourth surface 4 of the capacitor body 110, thereby serving to physically and electrically connect the second internal electrode 122 and the second external electrode 132 to each other.

[0077] The second band portion 132 b is a portion that extends from the second connection portion 132 a to a part of the first surface 1 of the capacitor body 110 .

[0078] In this case, the second band portion 132b may be further extended toward the second, fifth, and sixth surfaces 2, 5, and 6 of the capacitor body 110, if necessary, to improve the bonding strength, and may be formed to cover the other ends of the first and second side portions 141 and 142.

[0079] In addition, the first and second external electrodes 131 and 132 may each include a plating layer for at least some of structural reliability, ease of mounting on a board, durability against the outside, heat resistance, and equivalent series resistance (ESR).

[0080] For example, the plating layer may be formed by sputtering or electrolytic deposition, but is not limited thereto.

[0081] In addition, the plating layer may contain nickel most frequently, but is not limited thereto, and may be realized by copper (Cu), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), lead (Pb), etc. alone or an alloy of at least one of these.

[0082] Generally, a multilayer capacitor is manufactured in such a manner that a margin is designed between adjacent chips, internal electrodes are printed and laminated, and then the chips are cut into individual chips.

[0083] In contrast, in the case of a conventional multilayer capacitor with a structure without margins, the internal electrodes are designed without margins, printed and laminated, and then cut into individual chips so that the internal electrodes are exposed in the width direction. Then, side portions are attached to both side surfaces in the width direction of the laminate where the internal electrodes are exposed, to manufacture the laminate.

[0084] Conventional multilayer capacitors with such margins have the problem of reduced HVS and IR, while multilayer capacitors with conventional structures without margins have the problem of burrs being generated on the exposed surfaces of the laminate when the internal electrodes are printed and laminated without a margin and then cut into individual chips using a blade.

[0085] Such burrs narrow the gap between adjacent electrodes above and below, which can cause problems such as a decrease in HVS or a short circuit.

[0086] According to an embodiment of the present invention, the first and second internal electrodes 121 and 122 each have a concave-convex pattern on both ends in the width direction.

[0087] As a result, portions of both ends in the Y direction of the first and second internal electrodes 121 and 122 are exposed through the fifth and sixth faces 5 and 6 of the capacitor body 110 during the manufacturing process, thereby reducing steps at the ends of the capacitor body 110.

[0088] Therefore, in the process of manufacturing the multilayer capacitor 100, the phenomenon in which the end portion of the capacitor body 110 is stretched or warped when the laminate is compressed can be suppressed, thereby improving the reliability of the product.

[0089] In addition, the concave-convex pattern of the first internal electrode 121 and the concave-convex pattern of the second internal electrode 122 may be formed such that the convex portions and the concave portions are misaligned with each other when they are overlapped in the Z direction.

[0090] Here, the convex portions are portions that are exposed through the fifth and sixth surfaces 5, 6 of the capacitor body 110 during the manufacturing process of the capacitor, and the concave portions are portions that are separated from the fifth and sixth surfaces 5, 6 of the capacitor body 110.

[0091] With this configuration, when the laminate is compressed and then cut into individual chips using a blade, not only is there less burr generation compared to a conventional multilayer capacitor having a marginless structure, but even if burr is generated, the phenomenon in which the first and second internal electrodes 121 and 122 located above and below are electrically connected to each other can be reduced or prevented, thereby reducing short circuit defects in the multilayer capacitor 100 and preventing a decrease in HVS.

[0092] 6(a) and 6(b) are plan views showing another embodiment of the first and second internal electrodes in the present invention, FIG. 7 is an XY cross-sectional view of a multilayer capacitor to which the first internal electrode of FIG. 6(a) is applied, and FIG. 8 is a YZ cross-sectional view of a multilayer capacitor to which the first and second internal electrodes of FIG. 6(a) and FIG. 6(b) are applied.

[0093] Referring to Figures 6(a) to 8, on the dielectric layer 111 on which the first internal electrode 121 is formed, a first dummy pattern 123 may be arranged in the first groove portion 121c so as to be spaced apart from the end of the first internal electrode 121, and a second dummy pattern 124 may be arranged in the second groove portion 121d so as to be spaced apart from the end of the first internal electrode 121.

[0094] In this case, the first dummy pattern 123 may be exposed through the fifth surface 5 of the capacitor body 110 and may contact the first side portion 141, and the second dummy pattern 124 may be exposed through the sixth surface 6 of the capacitor body 110 and may contact the second side portion 142.

[0095] Then, on the dielectric layer 111 on which the second internal electrode 122 is formed, a third dummy pattern 125 can be arranged in the third groove portion 122c so as to be spaced apart from the end of the second internal electrode 122, and a fourth dummy pattern 126 can be arranged in the fourth groove portion 122d so as to be spaced apart from the end of the second internal electrode 122.

[0096] In this case, the third dummy pattern 125 may be exposed through the fifth surface 5 of the capacitor body 110 and may contact the first side portion 141, and the fourth dummy pattern 126 may be exposed through the sixth surface 6 of the capacitor body 110 and may contact the second side portion 142.

[0097] This structure can further reduce the step at the end portion of the capacitor body 110, and can further suppress the phenomenon in which the end portion of the capacitor body 110 stretches or warps when the laminate is compressed in the process of manufacturing the multilayer capacitor 100, thereby further improving the reliability of the product.

[0098] In addition, when the first and third dummy patterns 123, 125 are exposed through the fifth surface 5 of the capacitor body 110 and the second and fourth dummy patterns 124, 126 are exposed through the sixth surface 6 of the capacitor body 110, the phenomenon of the internal electrodes collapsing toward the ends when the internal electrodes are stacked and then cut into each capacitor body can be more effectively prevented.

[0099] FIG. 9 is a cross-sectional view that shows a schematic diagram of a substrate on which the multilayer capacitor of FIG. 1 is mounted.

[0100] Referring to FIG. 9, the mounting substrate of the multilayer capacitor according to this embodiment includes a substrate 210 having first and second electrode pads 221, 222 on one surface, and a multilayer capacitor 100 mounted on the upper surface of the substrate 210 such that first and second external electrodes 131, 132 are connected to the first and second electrode pads 221, 222, respectively.

[0101] In this embodiment, the stacked capacitor 100 is illustrated and described as being mounted on the substrate 210 by the solders 231 and 232, but a conductive paste may be used instead of the solder if necessary.

[0102] The present invention is not limited by the above-described embodiments and the accompanying drawings, but is limited by the scope of the accompanying claims. Therefore, various substitutions, modifications, and changes can be made by a person having ordinary knowledge in the art within the scope of the technical idea of ​​the present invention described in the claims, and these also belong to the scope of the present invention. [Explanation of symbols]

[0103] 100 Stacked Capacitor 110 Capacitor body 111 Dielectric layer 121, 122 First and second internal electrodes 131, 132 First and second external electrodes 131a, 132a First and second connection parts 131b, 132b First and second band parts 141, 142 First and second side portions 210 Substrate 221, 222 First and second electrode pads 231, 232 Handa

Claims

1. a capacitor body including a dielectric layer and first and second internal electrodes, the capacitor body having first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces facing each other, and fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces facing each other; first and second side portions disposed on a fifth and sixth surface of the capacitor body, respectively; first and second external electrodes disposed on third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, the first and second internal electrodes have uneven patterns at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body; the concave-convex patterns of the first and second internal electrodes contact the first and second side portions; Stacked capacitor.

2. 2. The multilayer capacitor according to claim 1, wherein the concave-convex pattern of the first internal electrode and the concave-convex pattern of the second internal electrode are offset from each other in a direction in which the dielectric layers are stacked.

3. the first internal electrode includes a plurality of first and second protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from each other by a predetermined distance to contact the first and second side portions, respectively; 3. The multilayer capacitor of claim 1, wherein the second internal electrode includes a plurality of third and fourth protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body at a predetermined interval so as to contact the first and second side portions, respectively.

4. the first internal electrode includes a plurality of first and second grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from the fifth and sixth surfaces of the capacitor body by a predetermined distance, 4. The multilayer capacitor of claim 1, wherein the second internal electrode includes a plurality of third and fourth grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from the fifth and sixth surfaces of the capacitor body by a predetermined distance.

5. first and second dummy patterns disposed in the first and second grooves and spaced apart from the first internal electrodes; The multilayer capacitor of claim 4 , further comprising third and fourth dummy patterns disposed in the third and fourth grooves and spaced apart from the second internal electrode.

6. the first and second dummy patterns contact the first and second side portions, respectively; 6. The multilayer capacitor according to claim 5, wherein the third and fourth dummy patterns are in contact with the first and second side portions, respectively.

7. the first groove is formed in a portion of the first internal electrode connecting a third surface and a fifth surface of the capacitor body; the second groove is formed in a portion of the first internal electrode connecting a third surface and a sixth surface of the capacitor body; the third groove is formed in a portion of the second internal electrode connecting a fourth surface and a fifth surface of the capacitor body; 7. The multilayer capacitor according to claim 4, wherein the fourth groove is formed in a portion of the second internal electrode that connects the fourth surface and the sixth surface of the capacitor body.

8. The first internal electrode has first cutouts at both corners adjacent to a fourth surface of the capacitor body, 8. The multilayer capacitor of claim 1, wherein the second internal electrode has second cutouts at both corners adjacent to a third surface of the capacitor body.

9. 9. The multilayer capacitor of claim 1, wherein the capacitor body includes an active region where the first and second internal electrodes overlap, and upper and lower cover regions respectively disposed on upper and lower surfaces of the active region.

10. The first and second external electrodes are first and second connection parts disposed on third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, respectively; 10. The multilayer capacitor of claim 1, further comprising: first and second band portions extending from the first and second connection portions to a portion of the first surface of the capacitor body, respectively.

11. the concave-convex pattern of the first internal electrode and the concave-convex pattern of the second internal electrode are formed to be shifted from each other in a direction in which the dielectric layers are laminated, The first internal electrode has first cutouts at both corners adjacent to a fourth surface of the capacitor body, 11. The multilayer capacitor of claim 1, wherein the second internal electrode has second cutouts at both corners adjacent to a third surface of the capacitor body.

12. the concave-convex pattern of the first internal electrode and the concave-convex pattern of the second internal electrode are formed to be shifted from each other in a direction in which the dielectric layers are laminated, the first internal electrode includes a plurality of first and second protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from each other by a predetermined distance to contact the first and second side portions, respectively; 12. The multilayer capacitor of claim 1, wherein the second internal electrode includes a plurality of third and fourth protrusions formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from each other by a predetermined distance to contact the first and second side portions, respectively.

13. the first internal electrode includes a plurality of first and second grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from the fifth and sixth surfaces of the capacitor body by a predetermined distance, 13. The multilayer capacitor of claim 12, wherein the second internal electrode includes a plurality of third and fourth grooves formed at both ends in a direction perpendicular to the fifth and sixth surfaces of the capacitor body and spaced apart from the fifth and sixth surfaces of the capacitor body by a predetermined distance.

14. The first internal electrode has first cutouts at both corners adjacent to a fourth surface of the capacitor body, The multilayer capacitor of claim 13 , wherein the second internal electrode has second cutouts at both corners adjacent to a third surface of the capacitor body.

15. The first internal electrode has first cutouts at both corners adjacent to a fourth surface of the capacitor body, The multilayer capacitor of claim 12, wherein the second internal electrode has second cutouts at both corners adjacent to a third surface of the capacitor body.

16. a substrate having first and second electrode pads on one surface; 16. A mounting board for a multilayer capacitor comprising: the multilayer capacitor according to claim 1, which is mounted such that first and second external electrodes are connected to the first and second electrode pads, respectively.

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