Automatic Voltage Reconfiguration
Automatic voltage reconfiguration in CPUs dynamically adjusts the minimum safe operating voltage based on user-specified workloads, optimizing performance for actual usage conditions and reducing unnecessary constraints.
Patent Information
- Application Number
- JP2022536778
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-12-16
- Filing Date
- 2020-12-15
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2040-12-15
AI Technical Summary
Central processing units (CPUs) are often shipped with a frequency voltage curve margin to ensure operation in worst-case scenarios, which does not reflect actual usage environments, leading to unnecessary performance restrictions.
Implementing automatic voltage reconfiguration by performing user-specified workloads, determining the minimum safe voltage for each core, and modifying the voltage configuration based on this minimum safe voltage, thereby optimizing performance for actual usage conditions.
This approach improves computing system performance by dynamically adjusting the minimum safe operating voltage to match actual operating environments and usage patterns, reducing unnecessary performance constraints.
Smart Images

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Abstract
Description
[Background technology]
[0001] Central processing units are shipped with margins in the frequency-voltage curves that are set to ensure that the central processing unit functions properly in "worst case" scenarios. These "worst case" scenarios typically do not reflect the actual environmental and use case scenarios of the central processing unit. [Brief description of the drawings]
[0002] [Figure 1] FIG. 2 is a block diagram of an example processor for automatic voltage reconfiguration, according to some embodiments. [Diagram 2] 4 is a flowchart of an exemplary method for automatic voltage reconfiguration, according to some embodiments. [Diagram 3] 1 is a flowchart of an example method for automatic voltage reconfiguration, in accordance with some embodiments. [Figure 4] 4 is a flowchart of an exemplary method for automatic voltage reconfiguration, according to some embodiments. [Diagram 5] 4 is a flowchart of an exemplary method for automatic voltage reconfiguration, according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0003] In some embodiments, a method for automatic voltage reconfiguration includes executing one or more user-specified workloads, determining a minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying a voltage configuration for each core of the one or more cores based on the respective minimum safe voltage.
[0004] In some embodiments, determining a minimum safe voltage for each core of the one or more cores includes altering an operating voltage for each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified. In some embodiments, the method further includes receiving a selection of one or more predefined test patterns as the one or more user-specified workloads. In some embodiments, the respective voltage configurations include a frequency-voltage curve margin. In some embodiments, the execution of the one or more user-specified workloads is based on one or more user interactions with the one or more software applications. In some embodiments, the method further includes saving the minimum safe voltage for each core of the one or more cores to a storage location. In some embodiments, the method further includes loading the minimum safe voltage for each core of the one or more cores in response to a request to overclock the one or more cores.
[0005] In some embodiments, an apparatus for automatic voltage reconfiguration performs steps including running one or more user-specified workloads, determining a minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying a voltage configuration for each core of the one or more cores based on the respective minimum safe voltage.
[0006] In some embodiments, determining a minimum safe voltage for each core of the one or more cores includes varying an operating voltage for each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified. In some embodiments, this step further includes receiving a selection of one or more predefined test patterns as the one or more user-specified workloads. In some embodiments, the respective voltage configurations include a margin of a frequency-voltage curve. In some embodiments, the execution of the one or more user-specified workloads is based on one or more user interactions with one or more software applications. In some embodiments, this step further includes saving the minimum safe voltage for each core of the one or more cores to a storage location. In some embodiments, this step further includes loading the minimum safe voltage for each core of the one or more cores in response to a request to overclock the one or more cores.
[0007] In some embodiments, a computer program product for automatic voltage reconfiguration disposed on a computer-readable medium includes computer program instructions that, when executed, cause a computer to perform steps including: executing one or more user-specified workloads; determining a minimum safe voltage for each core of the one or more cores based on the user-specified workloads; and modifying a voltage configuration of each core of the one or more cores based on the respective minimum safe voltage.
[0008] In some embodiments, determining a minimum safe voltage for each core of the one or more cores includes varying an operating voltage for each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified. In some embodiments, this step further includes receiving a selection of one or more predefined test patterns as the one or more user-specified workloads. In some embodiments, the respective voltage configurations include a frequency-voltage curve margin. In some embodiments, executing the one or more user-specified workloads is based on one or more user interactions with one or more software applications. In some embodiments, this step further includes saving the minimum safe voltage for each core of the one or more cores to a storage location. In some embodiments, this step further includes loading the minimum safe voltage for each core of the one or more cores in response to a request to overclock the one or more cores.
[0009] The automatic voltage reconfiguration according to the present application is generally implemented in a computer, i.e., an automatic computing machine. Accordingly, for further explanation, FIG. 1 illustrates a block diagram of an automatic computing machine including an exemplary computer 100 configured for automatic voltage reconfiguration according to certain embodiments. The computer 100 of FIG. 1 includes at least one computer processor 102 or "CPU" and random access memory 104 (RAM) connected to the processor 102 and other components of the computer 100 via a high-speed memory bus 106 and a bus adapter 108.
[0010] Stored in RAM 104 is an operating system 110. Operating systems useful in a computer configured for automatic voltage reconfiguration according to certain embodiments include UNIX, Linux, Microsoft Windows, and others as will occur to those skilled in the art. While the example operating system 110 of FIG. 1 is shown in RAM 104, many components of such software are typically also stored in non-volatile memory, such as data storage 112, e.g., a disk drive. Also stored in RAM is a voltage reconfiguration module 114, as well as modules for automatic voltage reconfiguration according to certain embodiments.
[0011] 1 includes a disk drive adapter 116 coupled to processor 102 and other components of computer 100 via expansion bus 118 and bus adapter 108. Disk drive adapter 116 connects non-volatile data storage to computer 100 in the form of data storage 112. Disk drive adapters useful in computers configured for automatic voltage reconfiguration according to certain embodiments include integrated drive electronics (IDE) adapters, small computer system interface (SCSI) adapters, and others as will occur to those skilled in the art. In some embodiments, the non-volatile computer memory is implemented as an optical disk drive, an electrically erasable programmable read-only memory (so-called "EEPROM" or "flash" memory), a RAM drive, or the like, as will occur to those skilled in the art.
[0012] The exemplary computer 100 of Figure 1 includes one or more input / output (I / O) adapters 120. I / O adapters implement user-oriented input and output via software drivers and computer hardware for controlling, for example, output to a display device, such as a computer display screen, and user input from user input devices 122, such as a keyboard and mouse. The exemplary computer 100 of Figure 1 also includes a video adapter 124, which is an example of an I / O adapter designed specifically for graphics output to a display device 126, such as a display screen or computer monitor. The video adapter 124 is connected to the processor 102 via a high-speed video bus 128, the bus adapter 108, and a frontside bus 130, which is also a high-speed video bus.
[0013] The exemplary computer 100 of FIG. 1 includes a communications adapter 132 for data communications with other computers and with a data communications network. Such data communications may be performed serially, over an RS-232 connection, an external bus such as a Universal Serial Bus (USB), a data communications network such as an IP data communications network, and / or in any other manner as would occur to one skilled in the art. Communications adapters implement the hardware level of data communications by which one computer sends data communications to another computer directly or through a data communications network. Examples of communications adapters useful in computers configured for automatic voltage reconfiguration according to certain embodiments include modems for wired dial-up communications, Ethernet (IEEE 802.3) adapters for wired data communications, and 802.11 adapters for wireless data communications.
[0014] For further explanation, FIG. 2 shows a flow chart illustrating an example method for automatic voltage reconfiguration including executing 202 one or more user-specified workloads (e.g., by the voltage reconfiguration module 114). In an embodiment, the one or more user-specified workloads include one or more pre-defined or pre-generated workloads. For example, the pre-defined workloads include a pre-defined test pattern, test suite, stress test, or other pre-defined grouping of pre-defined operations. In an embodiment, the one or more user-specified workloads are selected from a plurality of test patterns. For example, each of a plurality of different test patterns includes operations associated with a particular type of computation or application, such as graphics rendering, code compilation, data processing, etc.
[0015] In another embodiment, the one or more user-specified workloads are user-performed or user-initiated operations. For example, a user selects a software application or process to execute. The user then interacts with the executed software application. In other words, executing the one or more user-specified workloads is based on one or more user interactions with the one or more software applications.
[0016] The method of FIG. 2 also includes determining 204 a minimum safe voltage for each of the one or more cores based on a user-specified workload. During execution of the one or more user-specified workloads (e.g., during execution of one or more selected predefined test patterns, during user interaction with one or more software applications), the voltage reconfiguration module 114 changes the operating voltage of the one or more cores. For example, the voltage reconfiguration module 114 configures the one or more cores to operate at various voltages until a predetermined condition is met. Continuing with the example, the voltage reconfiguration module 114 reduces the operating voltage of each core by a predetermined interval or increment until the predetermined condition is met. The predetermined condition may include failure to complete a function or operation, generation of an exception in code execution, failure to complete a function or operation within a predetermined time frame, etc. The minimum safe voltage for the particular core is then determined to be the last operating voltage at which the predetermined condition is not met (e.g., before the operating voltage is reduced and the predetermined condition is met).
[0017] The method of FIG. 2 also includes modifying 206 a voltage configuration of each of the one or more cores based on a respective minimum safe voltage. In an embodiment, the respective voltage configuration includes a margin of a frequency-voltage curve. For example, each core corresponds to a frequency-voltage curve that defines a corresponding frequency of the core for a particular operating voltage. Each frequency-voltage curve includes a minimum voltage and a maximum voltage at which the corresponding core can operate. Thus, modifying the respective voltage configuration includes lowering the minimum voltage of the frequency-voltage curve. Thus, after the modification, each core has a lower possible minimum operating voltage. In other words, a reduced minimum voltage is established for the lower voltage.
[0018] In embodiments, the voltage configuration of each core is modified to operate at a lower possible minimum operating voltage, but not necessarily operate the core at its minimum operating voltage. For example, in embodiments, the operating voltage of a core is not reduced (e.g., to a determined minimum safe voltage) until a request or other input is made to change the operating voltage of the core. In embodiments, by operating at a lower operating voltage, the frequency of a given core is then increased (e.g., overclocked) according to a modified frequency-voltage curve. For example, the system management unit automatically adjusts the frequency of a particular core based on the operating voltage of the core.
[0019] As mentioned above, the minimum safe voltage for each core is determined based on the user-specified workload. Before distribution, the chip is tested for functionality under "worst case" conditions (e.g., specific stress tests, higher thermal conditions, etc.). The frequency-voltage curves of the chip (e.g., each core) with operating margins to ensure operation of the chip under these "worst case" conditions. Normal user operation does not correspond to these worst case conditions. For example, a user system with adequate or high-end cooling will not reach the worst case thermal conditions for which the chip was tested. As another example, the specific stress tests applied to the chip do not reflect typical user operation of the chip. In other words, the chip is constrained to meet test conditions that do not reflect the environment and workload in which the chip will ultimately operate.
[0020] For example, assume that a chip is tested and found to cause chip failure only in code compilation stress tests at a particular voltage. The frequency-voltage curve of the chip is then modified to avoid this voltage. For example, the minimum voltage of the frequency-voltage curve is set to be greater than the voltage at which the code compilation stress test fails. For users who are unlikely or never perform similar code compilation operations, this places unnecessary limitations on the chip. To overcome this limitation, the voltage reconfiguration module 114 determines a minimum safe voltage for a user-specified workload (e.g., a predefined workload selected by the user or user-specified applications and interactions). The minimum safe voltage is then modified to reflect the operating environment and use case of the individual system.
[0021] For further explanation, FIG. 3 illustrates a flowchart illustrating an example method of automatic voltage reconfiguration that includes executing 202 one or more user-specified workloads (e.g., by the voltage reconfiguration module 114), determining 204 a minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying 206 the voltage configuration of each core of the one or more cores based on the respective minimum safe voltages.
[0022] The method of FIG. 3 differs from FIG. 2 in that determining 204 a minimum safe voltage for each core of the one or more cores based on a user-specified workload includes modifying 302 the operating voltage of each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified. For example, the voltage reconfiguration module 114 operates as a parallel or background process for the one or more user-specified workloads and modifies one or more cores to operate at different combinations or settings of operating voltages until a fault condition is identified. Fault conditions include software crashes or exceptions, failure to maintain a particular quality of service for the one or more user-specified workloads, failure to complete an operation within a threshold time, or other criteria. The minimum safe voltage for a particular core is then determined as the last tested operating voltage of the core that is greater than the operating voltage that caused the fault condition.
[0023] For further explanation, FIG. 4 depicts a flowchart illustrating an example method of automatic voltage reconfiguration that includes executing 202 one or more user-specified workloads (e.g., by the voltage reconfiguration module 114), determining 204 a minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying 206 the voltage configuration of each core of the one or more cores based on the respective minimum safe voltages.
[0024] The method of FIG. 4 differs from FIG. 2 in that the method of FIG. 4 also includes receiving 402 a selection of one or more predefined test patterns as one or more user-specified workloads. In an embodiment, each of the predefined test patterns corresponds to a particular type or category of workload (e.g., code compilation, graphic rendering, data processing, database applications, data storage, networking, etc.). The user then selects the one or more predefined test patterns to enable the voltage reconfiguration module 114 to automatically configure the minimum safe voltage for each core according to the particular type of workload selected. For example, the user selects a workload based on an expected or desired use case.
[0025] For further explanation, FIG. 5 illustrates a flowchart illustrating an example method of automatic voltage reconfiguration that includes executing 202 one or more user-specified workloads (e.g., by the voltage reconfiguration module 114), determining 204 a minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying 206 the voltage configuration of each core of the one or more cores based on the respective minimum safe voltages.
[0026] The method of Figure 5 differs from Figure 2 in that the method of Figure 5 also includes saving 502 the minimum safe voltage 504 for each core of the one or more cores to a storage location 506. In an embodiment, the storage location 506 includes non-volatile memory (e.g., disk storage) of the computer 100 executing the voltage reconfiguration module 114. In an alternative embodiment, the storage location 506 includes storage located remotely from the computer 100 executing the voltage reconfiguration module 114. For example, the storage location 506 includes a remote storage system, such as a cloud storage system or a network server.
[0027] The method of FIG. 5 also includes loading 508 (e.g., from storage location 506) a minimum safe voltage 504 for each core of the one or more cores in response to a request 510 to overclock the one or more cores. In an embodiment, the request 510 to overclock the one or more cores is generated in response to a user input (e.g., to a user interface) to overclock the one or more cores. In an alternative embodiment, the request 510 to overclock the one or more cores is generated by the operating system 110 or an application requesting to overclock the one or more cores. If the storage location 506 is a local non-volatile memory, the minimum safe voltage 504 is loaded (e.g., into random access memory or other memory) from the non-volatile memory. If the storage location 506 is a remote storage system (e.g., a cloud storage system or a network server), the minimum safe voltage 504 is requested from the remote storage system. Thus, the respective voltage configuration is modified 206 using the loaded 508 minimum safe voltage 504.
[0028] Considering the above discussion, advantages of automatic voltage reconfiguration according to embodiments of the present disclosure include: The reader will recognize that by adjusting the minimum safe operating voltage of the core to reflect the actual operating environment and use cases, the performance of the computing system can be improved.
[0029] The exemplary embodiments of the present disclosure are described primarily in the context of a fully functional computer system for automatic voltage reconfiguration. However, the skilled reader will recognize that the present disclosure may also be embodied in a computer program product disposed on a computer-readable storage medium for use with any suitable data processing system. Such a computer-readable storage medium may be any storage medium for machine-readable information, including magnetic, optical, or other suitable media. Examples of such media include magnetic disks in hard drives or diskettes, compact disks for optical drives, magnetic tapes, and others that may occur to one skilled in the art. The skilled reader will immediately recognize that any computer system with suitable programming means is capable of executing the steps of the method of the present disclosure embodied in a computer program product. The skilled reader will also recognize that, although some of the exemplary embodiments described herein are adapted to software installed and executed on computer hardware, alternative embodiments implemented as firmware or as hardware are nevertheless well within the scope of the present disclosure.
[0030] The present disclosure may be a system, a method, and / or a computer program product. The computer program product may include a computer-readable storage medium(s) having computer-readable program instructions thereon for causing a processor to execute aspects of the present disclosure.
[0031] A computer readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction execution device. A computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of computer readable storage media includes the following: portable computer diskettes, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), static random access memories (SRAM), portable compact disk read-only memories (CD-ROM), digital versatile disks (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or ridge structures in a groove with instructions recorded on them, and any suitable combination of the above. As used herein, a computer-readable storage medium should not be interpreted as a transitory signal itself, such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or an electrical signal transmitted over an electrical wire.
[0032] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network can include copper transmission cables, optical transmission fiber, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface of each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device.
[0033] The computer readable program instructions for carrying out the operations of the present disclosure may be either assembler instructions, instruction set architecture (ISA) instructions, machine language instructions, machine dependent instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including object oriented programming languages such as Smalltalk, C++, and traditional procedural programming languages such as the "C" programming language or similar programming languages. The computer readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a standalone software package, partly on the user's computer, partly on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), can execute computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry to implement aspects of the present disclosure.
[0034] Aspects of the present disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the present disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer readable program instructions.
[0035] These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine such that the instructions, executed by the processor of the computer or other programmable data processing apparatus, generate means for performing the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams. These computer readable program instructions may also be stored on a computer readable storage medium having instructions stored therein that may direct a computer, programmable data processing apparatus, and / or other device to function in a particular manner, such as including an article of manufacture containing instructions that implement aspects of the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.
[0036] Furthermore, computer readable program instructions can be loaded into a computer, other programmable data processing apparatus, or other device to execute a series of operational steps on the computer, other programmable data processing apparatus, or other device to generate a computer-implemented process such that the instructions executing on the computer, other programmable data processing apparatus, or other device perform the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.
[0037] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing a particular logical function(s). In some alternative implementations, the functions shown in the blocks may occur out of the order shown in the figures. For example, two blocks shown in succession may in fact be executed substantially simultaneously, or the blocks may be executed in the reverse order, depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by special-purpose hardware-based systems that perform specific functions or acts, or combinations of special-purpose hardware and computer instructions.
[0038] From the above description, it will be understood that modifications and changes may be made in various embodiments of the present disclosure. The descriptions herein are for illustrative purposes only and should not be construed in a limiting sense. The scope of the present disclosure is limited only by the language of the following claims.
Claims
1. 1. A method for automatic voltage reconfiguration in a computer processor including one or more cores, comprising: executing one or more user-specified workloads; determining a minimum safe voltage for each core of the one or more cores based on the user-specified workload; modifying a voltage configuration of each core of the one or more cores based on a minimum safe voltage of each core, the voltage configuration of each core including a margin of a frequency-voltage curve, and modifying the voltage configuration of each core of the one or more cores includes modifying the margin of the frequency-voltage curve by reducing a minimum voltage of the margin. method.
2. determining a minimum safe voltage for each core of the one or more cores includes varying an operating voltage for each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified.
2. The method of claim 1.
3. receiving a selection of one or more predefined test patterns as the one or more user-specified workloads; each of the one or more predetermined test patterns corresponds to a particular type of workload; the selection being indicative of one or more types of workload expected to be executed; reducing the minimum voltage of the margin is based on one or more workloads expected to be executed.
2. The method of claim 1.
4. The margin of the frequency-voltage curve indicates an allowable range of voltages within which the corresponding core can operate.
2. The method of claim 1.
5. executing the one or more user-specified workloads is based on one or more user interactions with one or more software applications; 2. The method of claim 1.
6. storing a minimum safe voltage for each core of the one or more cores in a storage location.
2. The method of claim 1.
7. and loading a minimum safe voltage for each core of the one or more cores in response to a request to overclock the one or more cores. The method of claim 6.
8. 1. An apparatus for automatic voltage reconfiguration in a computer processor including one or more cores, comprising: A voltage configuration module is provided; The voltage configuration module includes: executing one or more user-specified workloads; determining a minimum safe voltage for each core of one or more cores based on the user-specified workload; modifying a voltage configuration of each core of the one or more cores based on a minimum safe voltage of each core, the voltage configuration of each core including a margin of a frequency-voltage curve, and modifying the voltage configuration of each core of the one or more cores includes modifying the margin of the frequency-voltage curve by reducing a minimum voltage of the margin; [0023] Device.
9. determining a minimum safe voltage for each core of the one or more cores includes varying an operating voltage for each core of the one or more cores during execution of the one or more user-specified workloads until a fault condition is identified.
9. The apparatus of claim 8.
10. the voltage configuration module is configured to receive a selection of one or more predefined test patterns as the one or more user-specified workloads.
9. The apparatus of claim 8.
11. The margin of the frequency-voltage curve indicates an allowable range of voltages within which the corresponding core can operate.
9. The apparatus of claim 8.
12. executing the one or more user-specified workloads is based on one or more user interactions with one or more software applications; 9. The apparatus of claim 8.
13. configured to store a minimum safe voltage for each core of the one or more cores in a storage location; 9. The apparatus of claim 8.
14. The voltage configuration module is configured to load a minimum safe voltage for each core of the one or more cores in response to a request to overclock the one or more cores.
14. The apparatus of claim 13.
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