Resistance material, resistance element, and method for manufacturing resistance element
The resistive material, comprising a combination of crystalline and amorphous phases, addresses the challenge of achieving high specific resistance and small resistance temperature coefficient in thin film resistive elements for semiconductor devices, resulting in improved stability and reliability.
Patent Information
- Application Number
- JP2021165953
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-10-08
- Publication Date
- 2025-05-01
- Estimated Expiration
- 2041-10-08
AI Technical Summary
Existing resistive materials for thin film resistive elements in semiconductor devices face challenges in achieving high specific resistance while maintaining a small resistance temperature coefficient, and there is a physical limitation to thinning the film without reducing mechanical strength and in-plane uniformity.
A resistive material comprising a mixture of crystalline phases with a positive resistance temperature coefficient and an amorphous phase with a negative resistance temperature coefficient and higher specific resistance, achieved by annealing an amorphous material containing silicon, chromium, and carbon to crystallize part of the film.
The proposed resistive material achieves a high specific resistance while maintaining a small resistance temperature coefficient, enhancing the operational stability and reliability of semiconductor devices by providing a stable resistive element with improved mechanical strength and uniformity.
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Abstract
Description
[Technical field]
[0001] The present invention relates to a resistive material, a resistive element, and a method for manufacturing a resistive element, and more specifically to a resistive material suitable for a thin film resistive element of a semiconductor device, a resistive element using the same, and a method for manufacturing the resistive element. [Background technology]
[0002] Conventionally, a semiconductor device having a passive component made of a thin-film resistor has been known (see, for example, Patent Document 1). This semiconductor device is said to be capable of preventing an increase in contact resistance to actual wiring while eliminating etching damage to the thin-film resistor.
[0003] Suitable materials for forming the thin film resistor include, for example, SiCr, NiCr, TaN, TiN, and the like.
[0004] In recent years, thin-film resistors using non-crystalline (amorphous) materials other than metal materials have also been considered as promising resistance materials. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2014-165458 A Summary of the Invention [Problem to be solved by the invention]
[0006] In general, when forming such a resistor element, the resistance can be increased by thinning the film to reduce its cross-sectional area. However, if the film is made too thin, the mechanical strength decreases significantly and the in-plane uniformity cannot be maintained, so there is a physical limit to how thin the film can be.
[0007] It is also known that the resistivity and temperature coefficient of resistance (TCR) can be varied by adjusting the composition ratio of the components contained in the resistor material, and various compositions that optimize these characteristics are being investigated.
[0008] Therefore, the present inventors have an object to provide a novel resistance material that has excellent properties, that is, it can be made thin, has high resistivity, and maintains a small temperature coefficient of resistance. [Means for solving the problem]
[0009] In one embodiment, the resistive material has a plurality of crystalline phases having a positive temperature coefficient of resistance, and an amorphous phase having a negative temperature coefficient of resistance and a higher resistivity than the crystalline phases.
[0010] The resistive element in one embodiment has a resistive film made of the resistive material in the above embodiments.
[0011] In one embodiment, a method for manufacturing a resistance element includes depositing an amorphous material having a negative temperature coefficient of resistance so as to form part of a circuit, annealing the deposited amorphous material to crystallize a portion of it, and obtaining a resistance film having a plurality of crystalline phases having a positive temperature coefficient of resistance and an amorphous phase having a higher resistivity than the crystalline phases. Effect of the Invention
[0012] According to the resistive material of the embodiment, it is possible to provide a resistive material suitable for a resistive element having a high resistivity and a small temperature coefficient of resistance. Also, according to the resistive element of the embodiment and the method for manufacturing the same, it is possible to provide a resistive element that is provided as a part of a circuit of a semiconductor device and has stable operation, and it is possible to improve the reliability of a device having the resistive element. [Brief description of the drawings]
[0013] [Figure 1] FIG. 2 is a schematic diagram showing a configuration of a resistive material in the embodiment. [Diagram 2]1A to 1C are diagrams illustrating a manufacturing process of a test resistance element produced in an example. [Diagram 3] 1 is a graph showing the relationship between the annealing temperature and the resistivity and the temperature coefficient of resistance in the resistive materials obtained in the examples. [Figure 4] FIG. 2 is a diagram showing an X-ray diffraction pattern of the resistance material obtained in the example. [Diagram 5] 1 is a graph showing the relationship between the silicon / chromium content ratio in an amorphous material and the resistivity and temperature coefficient of resistance. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] The resistive material, resistive element, method of manufacturing the resistive element, and method of manufacturing the semiconductor device according to the present embodiment will be described in detail below.
[0015] In addition, in all the drawings for explaining the embodiments, the same members are generally designated by the same reference numerals, and the repeated explanations thereof will be omitted. In addition, in the cross-sectional views, hatching may be omitted in order to make the drawings easier to understand.
[0016] <Things to consider> Before describing the present embodiment, the matters examined by the present inventors will be described first. The inventors focused on an amorphous material (hereinafter sometimes referred to as Cr-Si-C amorphous) containing silicon (Si) and chromium (Cr) as constituent elements, and further containing carbon (C), and investigated the resistivity and temperature coefficient of resistance (TCR) of this resistive material.
[0017] Specifically, the relationship between the resistivity and temperature coefficient of resistance of the amorphous material when the ratio of silicon to chromium (Si / Cr) was varied based on the number of atoms was investigated, and the results shown in Figure 5 were obtained. The carbon content in this amorphous material is 15 to 25 at% based on the number of atoms. Note that "at%" is generally written as atomic % or atomic %.
[0018] It was found that the resistivity of this Cr-Si-C amorphous material can be improved by adjusting the silicon and chromium content, making it useful as a resistance material. Specifically, when the ratio of silicon to chromium (Si / Cr) was investigated on an atomic number basis, it was found that increasing the silicon content improved the resistivity, making it preferable as a resistance material.
[0019] On the other hand, it was found that the temperature coefficient of resistance of Cr-Si-C amorphous material gradually decreases when the Si / Cr ratio exceeds 1.2, and decreases further when it exceeds 1.5. Furthermore, when the content ratio exceeds 2.5, the temperature coefficient of resistance becomes undesirable as a resistance material (the absolute value of the temperature coefficient of resistance becomes large).
[0020] In other words, with this Cr-Si-C amorphous material, there is a trade-off between resistivity and temperature coefficient of resistance; if the balance between resistivity and temperature coefficient of resistance is taken into consideration, increasing the resistivity results in a large drop in the temperature coefficient of resistance, making it difficult to further improve the resistivity by adjusting the composition ratio.
[0021] Therefore, the inventors have conducted extensive research into a novel resistance material that is superior to Cr-Si-C amorphous and that has both high resistivity and a small temperature coefficient of resistance at a high level, and have discovered the excellent resistance material described below.
[0022] The resistivity and temperature coefficient of resistance are obtained by known methods, and in this specification, the four-probe method is used, and the resistivity is calculated by gradually cooling the sample from 130° C. to −30° C. and determining the resistance value at that time. The resistivity and temperature coefficient of resistance in this specification were all calculated by the same method.
[0023] <Resistance materials> The resistance material in this embodiment has a crystalline phase with a positive temperature coefficient of resistance and an amorphous phase with a negative temperature coefficient of resistance and a higher resistivity than the crystalline phase. In this specification, the temperature coefficient of resistance (TCR) is a value indicating the rate of change in resistance when the temperature rises by 1°C, and means the temperature coefficient of resistance.
[0024] In this embodiment, the crystalline phase having a positive temperature coefficient is composed of a crystal having a positive temperature coefficient, and the amorphous phase having a negative temperature coefficient is composed of an amorphous material having a negative temperature coefficient, and the resistance material of this embodiment is in a state in which these crystals and amorphous materials are mixed. In this way, by mixing a crystalline phase having a positive temperature coefficient and an amorphous material having a negative temperature coefficient, the absolute value of the temperature coefficient of the resistance material can be reduced, and the resistance material can be made less affected by temperature fluctuations.
[0025] In addition, the resistance material of the present embodiment has a plurality of crystalline phases having a positive temperature coefficient, and the amorphous phase has a higher resistivity than the crystalline phase. That is, the material has a higher conductivity in the crystalline phase than the amorphous phase. In this case, the crystalline phase may be composed of one crystalline grain, or may be composed of two or more crystalline grains adjacent to each other to form a mass. In this specification, "having a plurality of crystalline phases" means that there are a plurality of one crystalline grain or two or more crystalline grains that form a mass, and this can also be said that the plurality of crystalline phases exist apart from each other. In this case, the types of crystalline grains contained in the crystalline phases may be the same or different.
[0026] A schematic diagram of this resistance material is shown in Fig. 1. As shown in Fig. 1, the resistance material 1 of this embodiment is composed of a crystalline phase 2 and an amorphous phase 3. As described above, a plurality of crystalline phases 2 are present in the amorphous phase 3 while being spaced apart from each other. Fig. 1 illustrates an example in which the crystalline phase 2 is composed of one particle.
[0027] In this way, it is preferable that an amorphous phase 3 having a negative temperature coefficient exists between these multiple crystalline phases 2, and that there are portions where the crystalline phases 2 are discontinuous. By having the crystalline phases exist in a discontinuous state, when electricity is passed through the resistance material 1, the conductive path (conductive path) moves alternately between different phases, such as from the crystalline phase 2 to the amorphous phase 3, and from the amorphous phase 3 to the crystalline phase 2, while transmitting. It is believed that the conductive path moving between phases in this way increases the resistivity of the material as a whole.
[0028] In this case, the average grain size of the crystals constituting the crystalline phase 2 varies depending on the material constituting the crystals, but is preferably 50 nm or less, more preferably 35 nm or less, even more preferably 25 nm or less, and particularly preferably 16 nm or less. The average grain size is preferably 2 nm or more, more preferably 6 nm or more, and even more preferably 8 nm or more.
[0029] In this specification, the average grain size of the crystals constituting crystalline phase 2 is a value obtained by measuring the grain sizes (average values of the major and minor axes of each grain) of several tens of grains from an image obtained by a TEM (transmission electron microscope) and calculating the arithmetic average value.
[0030] The resistivity of the resistive material thus constructed is preferably 1.0 mΩ·cm or more, more preferably 1.5 mΩ·cm or more, and even more preferably 1.7 mΩ·cm or more. With the resistivity values as described above, even when the material is formed into a thin film, a resistive element having a preferable resistance value can be obtained.
[0031] Moreover, the absolute value of the temperature coefficient of this resistance material is preferably 150 ppm / ° C. or less, and more preferably 100 ppm / ° C. or less. If the above temperature coefficient is satisfied, a stable resistance element with little change in resistance value due to temperature change can be formed.
[0032] Next, the composition of this resistance material will be described. As described above, the resistance material of this embodiment is composed of a crystalline phase having a positive temperature coefficient and an amorphous phase having a negative temperature coefficient. The crystalline phase is preferably a crystal obtained by partially crystallizing the amorphous material by annealing the amorphous material or the like.
[0033] Examples of such resistive materials include materials that contain metal, silicon, and carbon as constituent elements, in which the crystalline phase contains metal-silicon crystals, and the amorphous phase contains metal atoms, silicon atoms, and carbon atoms. The metals contained therein are preferably transition metals, specifically chromium, manganese, iron, cobalt, etc., and these may be contained alone or in combination of two or more kinds.
[0034] As this metal, chromium is particularly preferable, and hereinafter, a resistive material containing chromium (Cr), silicon (Si), and carbon (C) as constituent elements will be described as an example.
[0035] The resistance material made of the above-mentioned preferred elements can be obtained by, for example, annealing (heating) an amorphous material (Cr-Si-C amorphous) containing these elements to crystallize a part of it, resulting in a mixture of crystalline and amorphous phases. The metal-silicon crystal obtained in this case is Cr 5-x S 3-z C x+z (where 0≦x≦3, 0≦z≦1), CrSi2, etc., more specifically, Cr5Si3, Cr 4.5 S 2.5 C, CrSi2, etc.
[0036] In addition, it is preferable that the constituent elements of this resistance material have a silicon to chromium content ratio (Si / Cr) of greater than 2 on an atomic number basis, and a carbon content of 15 to 30 at%. By satisfying these contents, when crystallization is performed by annealing, the resistance material can have a good balance between the desired resistivity and the absolute value of the temperature coefficient. It is more preferable that Si / Cr is 2.1 or more. It is also preferable that Si / Cr is 3.5 or less, and more preferably 2.7 or less.
[0037] The resistive material of this embodiment preferably has a resistivity of 1.0 mΩ·cm or more, more preferably 1.5 mΩ·cm or more, and even more preferably 2.0 mΩ·cm or more. The absolute value of the temperature coefficient of the resistive material is preferably 150 ppm / °C or less, and more preferably 100 ppm / °C or less. A resistive material with a resistivity of 1.0 mΩ·cm or more and an absolute value of the temperature coefficient of 150 ppm / °C or less has the desirable characteristics of high resistance and small temperature coefficient, and is preferable because it can form a resistive element with excellent operational stability.
[0038] Furthermore, by setting the resistivity as described above, it is possible to make the film thinner and reduce the area, and by reducing the temperature coefficient, it is also possible to reduce the characteristic adjustment circuitry, etc., in which case the chip to be formed can be made smaller. Next, a method for producing the resistive material according to the present embodiment will be described.
[0039] First, an amorphous material having a negative temperature coefficient is prepared. The amorphous material used here may have a composition such that when the amorphous material is crystallized, the crystals that precipitate have a positive temperature coefficient and a lower resistivity than the amorphous material.
[0040] Crystallization can be achieved, for example, by annealing (heating) to precipitate crystals in an amorphous material. The annealing can be performed under conditions in which the processing temperature and processing time are appropriately changed depending on the amorphous material used, so that the crystalline phase and the amorphous phase are in a desired mixed state.
[0041] The annealing temperature and time vary depending on the constituent elements of the amorphous material and their composition (content), but for example, the temperature is preferably 400 to 700°C, more preferably 450 to 650°C, and the time is preferably 2 to 30 minutes, more preferably 5 to 15 minutes. If these processing conditions are not satisfied, there is a risk that crystallization will be insufficient, resulting in insufficient improvement in resistivity and temperature coefficient, or that crystallization will proceed too far, resulting in low resistivity and high temperature coefficient.
[0042] In the case of the Cr-Si-C amorphous material specifically described in the above items to be considered, for example, the treatment temperature is preferably 500 to 540° C., more preferably 510 to 530° C., and even more preferably 510 to 520° C. By using such a treatment temperature, the resistivity can be made 1.0 mΩ·cm or more, and the absolute value of the temperature coefficient can be made small.
[0043] The annealing treatment may be carried out in an inert gas atmosphere such as nitrogen or argon in order to prevent oxidation or the like.
[0044] <Resistance element> The resistance element of this embodiment has a resistance film made of the resistance material described above. Since the resistance element has a resistance film made of a resistance material having a good resistivity and temperature coefficient as described above, the operation stability of the resistance element is high.
[0045] This resistance element can be manufactured by a known method, for example, by providing a resistance film on a part of a circuit of a semiconductor device or the like. The shape of this resistance film is not particularly limited, but since it has a good resistivity, it can be suitably used as a thin film resistance element. When making such a thin film resistance element, the thickness of the resistance film is preferably, for example, 50 nm or less, more preferably 2.5 nm to 10 nm.
[0046] The resistance element of the present embodiment can be manufactured, for example, by depositing an amorphous material having a negative temperature coefficient so as to form part of a circuit, and then annealing the deposited amorphous material to crystallize a portion of it, thereby obtaining a resistance film having multiple crystalline phases having a positive temperature coefficient and an amorphous phase having a higher resistivity than the crystalline phases.
[0047] The above-mentioned amorphous material can be formed into a film by any known film forming method, and is not particularly limited. For this film forming method, for example, sputtering using an alloy target, Co-sputtering using multiple targets, reactive sputtering, etc.; vacuum deposition method; etc. can be used. Since it is easy to adjust the ratio of the constituent elements of the resistive film to be formed, sputtering is preferable.
[0048] The annealing process is not particularly limited as long as it can heat the resistive film formed above to a predetermined temperature. Known methods such as heating with a heating means such as a heater or heating by laser irradiation can be used.
[0049] The conditions for the annealing treatment are as explained for the resistive material above. It is preferable that the resistivity and the absolute value of the temperature coefficient are in a range where both characteristics are balanced at a high level. For example, it is preferable that the resistivity is 1.0 mΩ·cm or more and the absolute value of the temperature coefficient is 150 ppm / °C or less.
[0050] <Semiconductor device> Furthermore, a semiconductor device can be obtained by providing the above-mentioned resistor element as a part of the circuit of the semiconductor device. An example of a method for manufacturing the semiconductor device will be described with reference to Fig. 2. Fig. 2 is a cross-sectional view of a main part showing an example of a process included in the method for manufacturing the resistor element.
[0051] First, a substrate 11 is prepared (FIG. 2(a)). The substrate 11 has a semiconductor substrate 11a, a silicide layer 11b, an interlayer insulating film 11c, and a contact Via 11d. The semiconductor substrate 11a is made of, for example, polycrystalline silicon. The silicide layer 11b is formed on the surface of the semiconductor substrate 11a. The interlayer insulating film 11c is formed on the surface of the semiconductor substrate 11a and is made of, for example, a silicon oxide film. The contact Via 11d is provided in the interlayer insulating film 11c. The contact Via 11d is made of, for example, tungsten, and electrically connects the silicide layer 11b to a resistive film described later.
[0052] Next, an amorphous film 50 is formed on the substrate 11 (FIG. 2(a)). As described above, this amorphous film 50 is made of a non-crystalline material having a negative temperature coefficient, and can be formed by sputtering, vapor deposition, or the like.
[0053] Next, the resistive film 10 is formed. The amorphous film 50 formed on the substrate 11 is annealed at a temperature of, for example, 400° C. to 700° C. to crystallize a part or the whole of the amorphous film 50, thereby forming the resistive film 10 (FIG. 2(b)).
[0054] Next, a resistive film 10a for a resistive element is formed. After the annealing process, a photoresist film 51 patterned by photolithography is formed on the resistive film 10, and a part of the resistive film 10 is removed by etching to form the resistive film 10a for a resistive element (FIG. 2(c)).
[0055] Next, the photoresist film 51 is removed, and an interlayer insulating film is formed on the interlayer insulating film 11c by a CVD method or the like to cover the resistive film 10a. A tungsten via (Via) 11e is further provided in the interlayer insulating film 11c so as to be electrically connected to one of the silicide layers 11b connected to the resistive film 10a through the contact Via 11d. A 1-metal layer 11f made of a metal such as aluminum is formed on the interlayer insulating film 11c so as to be electrically connected to this via (Via) 11e. Through the above steps, a resistive element is obtained (FIG. 2(d)).
[0056] In this embodiment, as described above, the resistive element has a high resistivity and a small absolute value of the temperature coefficient, and therefore, by providing the resistive element as part of an integrated circuit constituting a semiconductor device, a semiconductor device with good operational stability and high device reliability can be obtained. EXAMPLES
[0057] (Method of manufacturing resistive film) An example of a method for manufacturing a resistive film made of the resistive material according to this embodiment will be specifically described below.
[0058] First, a silicon substrate having a 600 nm thick silicon dioxide (SiO2) film on its surface is prepared.
[0059] Next, a Si-Cr-C amorphous film is formed on the silicon dioxide film of the silicon substrate. First, an alloy target (sputtering target) is prepared that contains, on an atomic number basis, 24 at% chromium (Cr), 52 at% silicon (Si) and 24 at% carbon (C) as constituent elements, with a silicon to chromium content ratio (Si / Cr) of 2.17.
[0060] Using this alloy target, a 300 nm thick Si-Cr-C amorphous film is formed on the silicon substrate by DC sputtering (DC power: 0.2 to 2 kW, process temperature: room temperature to 400° C., process pressure: 4 to 7 mTorr).
[0061] Next, the resistive film is formed by annealing the Si-Cr-C amorphous film formed on the substrate at a predetermined temperature for 10 minutes to crystallize a part or the whole of the Si-Cr-C amorphous film to form the resistive film.
[0062] (Measurement of resistivity and temperature coefficient of resistance) The resistivity and temperature coefficient of resistance of the resistive film obtained for testing were determined using the same test method as in Figure 5. The resistivity and temperature coefficient of resistance were also determined in the same manner for a resistive element having a Si-Cr-C amorphous film obtained by the same method as above except that no annealing treatment was performed. The relationship between the annealing temperature and the resistivity and temperature coefficient of resistance obtained is summarized in Table 1 and Figure 3.
[0063] The annealing treatment (annealing temperature) of the amorphous film was performed for 10 minutes at 12 different temperatures: 450°C, 500°C, 510°C, 520°C, 530°C, 540°C, 550°C, 600°C, 700°C, 800°C, 900°C and 1000°C.
[0064] [Table 1]
[0065] From Table 1 and Figure 3, the tendency of variation in resistivity and temperature coefficient of resistance can be understood. That is, the amorphous material (unannealed) used as the raw material has a resistivity of 0.85 mΩ·cm and a temperature coefficient of resistance of -500 ppm / ℃ or less, and the absolute value of the temperature coefficient of resistance is very large. Also, the resistive film annealed at 600 to 1000℃ has a resistivity of 0.6 to 0.9 mΩ·cm and a temperature coefficient of resistance of 700 to 1500 ppm / ℃, and the absolute value of the temperature coefficient of resistance of these resistive films is also very large. In terms of the temperature coefficient, these materials are not suitable as resistive materials for resistive elements used in semiconductor devices.
[0066] In contrast, a resistive film annealed at 500-540°C for 10 minutes has a high resistivity of 1.3 mΩ·cm or more and an absolute value of the temperature coefficient of resistance of 300 ppm / °C or less, which is preferable. Furthermore, a resistive film annealed at 520-530°C for 10 minutes has a high resistivity of 1.8 mΩ·cm or more and an absolute value of the temperature coefficient of resistance of 250 ppm / °C or less, which is even more preferable.
[0067] In addition, for five of these resistive films that were annealed at 450°C, 540°C, 600°C, and 1000°C, X-ray diffraction patterns were obtained by X-ray diffraction (XRD) (measurement conditions: Cu(Kα) target, out-of-plane measurement, 2θ measurement range: 30-50deg) to confirm the state of crystals. The results are shown in Figure 4.
[0068] In the X-ray diffraction spectrum shown in Fig. 4, the peak at 35.8° corresponds to SiC, the peak at 39.4° corresponds to Cr5Si3 and CCr 4.5 S 2.5 The peak at 40.9° is Cr5Si3, CCr 4.5 S 2.5 The peak at 43.2° is CrSi2, the peak at 44.0° is Cr5Si3, and the peak at 45.0° is CCr 4.5 S 2.5 The peak at 45.0° is Cr5Si3, CCr 4.5 S 2.5 The peak at 46.2° is CCr 4.5 S 2.5 are shown, respectively.
[0069] From the results of this X-ray diffraction, the types of crystals formed depending on the annealing temperature are as shown in Table 2 below.
[0070] [Table 2]
[0071] Furthermore, when cross-sectional images of the resistive film from which the above X-ray diffraction patterns were obtained were taken by a transmission electron microscope (TEM) to confirm the crystal state, it was confirmed that small crystals were formed in the resistive film treated for 10 minutes at 540°C, and that the crystalline phase and the amorphous phase were mixed. The average grain size of the formed crystals was calculated to be about 13 nm from the grain size and periodicity of the grains in the TEM images.
[0072] Similarly, the resistive film processed at 600°C for 10 minutes has a mixture of microcrystals and medium-sized crystals, and the above resistivity value indicates that the crystals are connected to each other, forming conductive paths through the crystals, reducing the resistivity. Furthermore, the resistive film processed at 1000°C for 10 minutes has many large crystals and is considered to be completely crystallized.
[0073] The invention made by the inventor has been specifically described above based on the embodiments thereof. However, it goes without saying that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the invention.
[0074] <Additional Notes> The present application also includes the following aspects.
[0075] A method for manufacturing a semiconductor device, comprising the steps of: preparing a substrate having a semiconductor substrate, a silicide layer formed on a surface of the semiconductor substrate, an interlayer insulating film formed on the surface of the semiconductor substrate, and a contact via provided in the interlayer insulating film; forming an amorphous film on the substrate by a sputtering method, the amorphous film being made of an amorphous material containing silicon, chromium, and carbon; and forming a resistive film by subjecting the amorphous film to an annealing treatment to crystallize a portion of the amorphous film, wherein the annealing temperature in the resistive film forming step is 400° C. or higher and 700° C. or lower. [Explanation of symbols]
[0076] 1. Resistance materials 2 Crystalline phase 3. Amorphous Phase 10,10a resistive film 11 Substrate 11a Semiconductor substrate 11b Silicide layer 11c Interlayer insulating film 11d ConductVia 11e Via 11f Metal 50 Amorphous film 51 Photoresist film
Claims
1. A plurality of crystalline phases having a positive temperature coefficient of resistance; an amorphous phase having a negative temperature coefficient of resistance and a higher resistivity than the crystalline phase; having the amorphous phase is present between the plurality of crystalline phases, and the crystalline phases have portions where they are discontinuous; The resistivity is 1.0 mΩ cm or more, and the absolute value of the temperature coefficient of resistance is 150 ppm / ° C. or less. A resistive material consisting only of chromium, silicon and carbon.
2. 2. The resistive material according to claim 1, A resistive material having a silicon to chromium content (Si / Cr) of greater than 2 on an atomic number basis and a carbon content of 15 to 30 at %.
3. 3. The resistive material according to claim 2, A resistive material having a resistivity of 1.5 mΩ·cm or more.
4. 2. The resistive material according to claim 1, A resistive material, wherein the average grain size of the crystals contained in the crystalline phase is 50 nm or less.
5. 5. The resistive material according to claim 4, The average grain size of the crystals is 5 to 35 nm.
6. A resistive element having a resistive film made of the resistive material according to claim 1.
7. depositing an amorphous material having a negative temperature coefficient of resistance to form part of the circuit; A method for manufacturing a resistance element, comprising the steps of: annealing the formed amorphous material to crystallize a portion of the amorphous material, thereby obtaining a resistance film having a plurality of crystalline phases having a positive temperature coefficient of resistance and an amorphous phase having a higher resistivity than the crystalline phases, The annealing treatment is performed so that the resistive film has a portion in which the amorphous phase is present between the plurality of crystalline phases and the crystalline phases are discontinuous with each other; The resistive element has a resistivity of 1.0 mΩ cm or more, and an absolute value of a temperature coefficient of resistance of the resistive element is 150 ppm / ° C. or less, the resistive element consists solely of chromium, silicon and carbon; The annealing temperature is 500 to 540° C.
8. 8. The method for manufacturing a resistor element according to claim 7, A method for manufacturing a resistance element, in which the content ratio of silicon to chromium (Si / Cr) is greater than 2 on an atomic number basis, and the content of carbon is 15 to 30 at %.
9. 8. The method for manufacturing a resistor element according to claim 7, The method for producing a resistance element, wherein the average grain size of the crystals constituting the crystalline phase is 35 nm or less.
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