Graphics processing unit rendering mode selection system

Abstract

The processor dynamically selects a rendering mode for each rendering pass of a frame based on characteristics of the rendering pass. A software driver of the processor receives graphics operations from an application executing on the processor and converts the graphics operations into a command stream that is provided to a graphics pipeline. Once the driver converts the graphics operations into the command stream, the driver analyzes each rendering pass of the frame to determine characteristics of the rendering pass and selects a rendering mode for each rendering pass based on the characteristics of the rendering pass.

Description

[Background technology]

[0001] A conventional graphics pipeline for processing three-dimensional (3D) graphics is formed of a sequence of programmable shaders and fixed-function hardware blocks. A software application generates frames for rendering by the graphics pipeline and provides the frames to a command processor at the front end of the graphics pipeline. The frames are subdivided into primitives, such as triangles or patches, that represent portions of objects in the image represented by the frame. For example, a primitive may represent a portion of a 3D model of an object visible in the frame. The graphics pipeline processes each primitive in response to a draw call and provides the processed primitive to a shader subsystem that performs shading of the primitive. The graphics pipeline also performs rasterization of the primitives and binners, grouping the primitives into bins or tiles that relate to different portions of the frame. The bins of primitives are then provided to the shader subsystem for additional shading before being rendered on the display. The shaders or fixed-function hardware blocks in the graphics pipeline can simultaneously process different primitives or bins of the same frame. For example, the graphics engine, shader subsystem, rasterizer, and binner can simultaneously process different primitives that represent a portion of a frame.

[0002] The present disclosure may be better understood, and its numerous features and advantages made apparent to those skilled in the art by referencing the accompanying drawings, in which: The use of the same reference numbers in different drawings indicates similar or identical items. [Brief description of the drawings]

[0003] [Figure 1]FIG. 1 is a block diagram of a processing system that implements rendering mode selection on a per-rendering-pass basis for a graphics pipeline implemented by a graphics processing unit (GPU) for generating visual images intended for output to a display, in accordance with some embodiments. [Diagram 2] FIG. 2 illustrates a graphics pipeline capable of processing high-order geometric primitives to generate rastered images of three-dimensional (3D) scenes, according to some embodiments. [Diagram 3] FIG. 2 is a block diagram of a driver's rendering mode selection engine that implements rendering mode selection on a per-rendering-pass basis for a graphics pipeline implemented by a GPU, according to some embodiments. [Figure 4] A diagram illustrating four rendering modes selectable by a driver of a processing system employed by a graphics pipeline, according to some embodiments. [Diagram 5] FIG. 2 is a flow diagram illustrating a method for selecting a rendering mode for a graphics pipeline on a per rendering pass basis, in accordance with some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0004] Throughout the drawings and the description, like numbers refer to identical drawing elements.

[0005] To render and process data efficiently, a graphics processing unit (GPU) includes a graphics pipeline dedicated to processing and rendering 3D computer graphics, images, videos, and the like. Each frame is rendered by the pipeline using primitives, which include combinations of points, lines, polygons, or primitives organized into meshes. Primitives in each frame or image are individually drawn by determining which pixels are within the edge of the primitive and calculating the attributes of the primitive corresponding to each of those pixels. Many graphics pipelines employ deferred shading, where each frame is processed by the graphics pipeline over the course of multiple rendering passes. For example, in some embodiments, on the first pass of deferred shading, only the data required for shading calculations is collected. The position, normals, and materials of each surface are rendered into a geometry buffer (G-buffer). In subsequent rendering passes, a pixel shader uses information in a texture buffer in screen space to calculate direct and indirect lighting at each pixel. The graphics driver generates a command stream for each rendering pass and stores the command stream in a GPU command buffer, such as an indirect buffer (IB) (also called a sub-command buffer (SCB)) specific to the rendering pass, for consumption by the graphics pipeline.

[0006] The graphics pipeline supports multiple rendering modes, such as coarse bin rendering (CBB), primitive batch-based bin rendering (PBB), coarse binning with batch-based bin rendering (CPBB), and immediate-mode rendering (IMR), each of which performs different rendering operations and therefore results in differences in the rendered image depending on the rendering mode used. Typically, a GPU supports a default mode, either a binning mode in hardware or IMR. Thus, the supported default mode is used for the entire frame before the frame is processed by the graphics pipeline and used for each of the frame's multiple rendering passes. However, each mode has advantages and disadvantages and is suitable for a particular type of rendering pass.

[0007] 1-5 illustrate a technique for dynamically selecting a rendering mode for each rendering pass (also called a draw call set) of a frame based on the characteristics of the rendering pass. A software driver of a processor receives graphics operations from an application executing on the processor and converts the graphics operations into a command stream that is provided to a graphics pipeline. Once the driver converts the graphics operations into a command stream, the driver analyzes each rendering pass of the frame to determine characteristics of the rendering pass and selects a rendering mode for each rendering pass based on the characteristics of the rendering pass. For example, coarse binning with primitive batch binning (CPBB) is suitable for typical geometry buffer (G-buffer) rendering passes. Coarse bin rendering (CBB) mode is well suited for rendering passes with a large number of primitives or extra geometry heavy Gbuffers. Primitive batch based bin (PBB) rendering mode is suitable for lighting and color rendering and for rendering passes where occlusion queries occur. Immediate mode rendering (IMR) is best suited for post-processing rendering passes. By selecting a rendering mode that is appropriate for the characteristics of the rendering pass, the driver increases processing performance and efficiency.

[0008] In some embodiments, the driver modifies the command stream to indicate the selected rendering mode to the graphics pipeline. For example, in some embodiments, the driver "patches" the command stream by inserting a token into the command stream corresponding to a rendering pass that indicates the rendering mode that the graphics pipeline will employ when executing the rendering pass. In some embodiments, the driver sorts each rendering pass into an indirect buffer for consumption by the graphics pipeline and inserts a token indicating the rendering mode at the start of the IB. When the graphics pipeline consumes the command stream for the rendering pass, it reads the token and switches to the selected rendering mode indicated by the token. By switching to the appropriate rendering mode for the rendering pass, the graphics pipeline improves image quality and efficiency. For fine grain control, in some embodiments, the driver inserts "start binning" and "end binning" commands into the IB and provides a pointer to the preamble state at the start of binning.

[0009] 1 is a block diagram of a processing system 100 including a graphics processing unit (GPU) 105 for generating visual images intended to be output to a display 110, according to some embodiments. The processing system 100 includes a memory 115. Some embodiments of the memory 115 are implemented as dynamic random access memory (DRAM). However, the memory 115 may also be implemented using other types of memory, including static random access memory (SRAM), non-volatile RAM, etc. In the illustrated embodiment, the GPU 105 communicates with the memory 115 over a bus 120. However, some embodiments of the GPU 105 communicate with the memory 115 over a direct connection or through other buses, bridges, switches, routers, etc. The GPU 105 executes instructions stored in the memory 115, and the GPU 105 stores information in the memory 115, such as results of executed instructions. For example, the memory 115 may store a copy 125 of instructions from a program code executed by the GPU 105. Some embodiments of GPU 105 include multiple processor cores (not shown for clarity) that independently execute instructions simultaneously or in parallel.

[0010] The processing system 100 is generally configured to execute a set of instructions (e.g., computer programs), such as an application 155, to perform designated tasks of the electronic device. Examples of such tasks include controlling aspects of the operation of the electronic device, displaying information to a user to provide a particular user experience, communicating with other electronic devices, etc. Thus, in different embodiments, the processing system 100 is employed in any of a number of types of electronic devices, such as a desktop computer, a laptop computer, a server, a game console, a tablet, a smartphone, etc. It should be understood that the processing system 100 may include more or less components than those shown in FIG. 1. For example, the processing system 100 may further include one or more input interfaces, non-volatile storage, one or more output interfaces, a network interface, and one or more displays or display interfaces.

[0011] The processing system 100 includes a central processing unit (CPU) 130 for executing instructions. Some embodiments of the CPU 130 include multiple processor cores (not shown for clarity) that independently execute instructions simultaneously or in parallel. The CPU 130 is also connected to a bus 120 and thus communicates with the GPU 105 and memory 115 via the bus 120. The CPU 130 executes instructions, such as program code 135 stored in the memory 115, and the CPU 130 stores information, such as results of executed instructions, in the memory 115. The CPU 130 can also initiate graphics processing by issuing a draw call to the GPU 105. A draw call is a command generated by the CPU 130 and sent to the GPU 105 to instruct the GPU 105 to render an object (or a portion of an object) in a frame. Some embodiments of a draw call include information defining textures, states, shaders, rendering objects, buffers, etc., used by the GPU 105 to render the object or portions thereof. GPU 105 renders objects to generate pixel values ​​that are provided to display 110, which uses the pixel values ​​to display an image representing the rendered objects.

[0012] Each frame to be rendered is processed by the graphics pipeline of the GPU 105 in multiple passes. For example, during a first pass over the scene's geometry, only the attributes necessary to compute per-pixel lighting are written to the G-Buffer. During a second pass, the graphics pipeline outputs only diffuse and specular lighting data. In a frame's third pass through the graphics pipeline, the graphics pipeline reads backlight data and outputs the final per-pixel shading. Thus, in multi-pass rendering, a frame's scene and associated objects are rendered multiple times. Each time an object is drawn, the graphics pipeline computes additional aspects of the object's appearance and combines the additional aspects with previous results. Each time a frame or a frame's objects are rendered by the graphics pipeline is called a rendering pass.

[0013] An input / output (I / O) engine 140 processes input or output operations related to the display 110 and other elements of the processing system 100, such as a keyboard, a mouse, a printer, an external disk, etc. The I / O engine 140 is coupled to the bus 120 such that the I / O engine 140 communicates with the GPU 105, the memory 115, or the CPU 130. In the illustrated embodiment, the I / O engine 140 is configured to read information stored on an external storage medium 145, such as a compact disc (CD), a digital video disc (DVD), or the like. The external storage medium 145 stores information representing program code used to implement an application, such as a video game. The program code on the external storage medium 145 can be written to the memory 115 to form a copy 125 of instructions to be executed by the GPU 105 or the CPU 130.

[0014] The GPU 105 implements a graphics pipeline (not shown in FIG. 1 for clarity) that includes multiple phases configured to simultaneously process different primitives in response to draw calls. The phases of the graphics pipeline in the GPU 105 can simultaneously process different primitives generated by an application, such as a video game. When geometry is presented to the graphics pipeline, hardware state settings are selected to define the state of the graphics pipeline. Examples of state include rasterizer state, blend state, depth stencil state, primitive topology type of the presented geometry, and shaders (e.g., vertex shader, domain shader, geometry shader, hull shader, pixel shader, etc.) used to render the scene. Shaders implemented in the graphics pipeline state are represented by corresponding bytecodes. In some cases, information representing the graphics pipeline state is hashed or compressed to provide a more efficient representation of the graphics pipeline state.

[0015] Driver 150 is a computer program that allows higher level graphic computing programs, such as from application 155, to interact with GPU 105. For example, driver 150 converts standard code received from application 155 into a native format command stream understood by GPU 105. Driver 150 allows input from application 155 to indicate settings of GPU 105. Such settings include selection of rendering mode, anti-aliasing control, texture filter control, batch binning control, and deferred pixel shading control.

[0016] The performance of the graphics pipeline is enhanced by the driver 150 selecting an appropriate rendering mode for each rendering pass. To enhance processing performance and efficiency, the driver 150 includes a rendering mode selection engine (not shown in FIG. 1 ) configured to receive a set of draw calls for a rendering pass and determine a rendering mode for the rendering pass based on characteristics of the set of draw calls. For example, in some embodiments, the graphics pipeline supports multiple rendering modes, such as coarse bin rendering (CBB), primitive batch-based bin rendering (PBB), coarse binning with batch-based bin rendering (CPBB), and immediate mode rendering (IMR). In the CBB rendering mode, the graphics pipeline bins the draw calls in large tiles across the screen. For example, for a 1080p rendering target, the graphics pipeline divides the screen into multiple 512×512 pixel bins. In some embodiments, the CBB rendering mode bins the draw calls in a command buffer of the graphics pipeline.

[0017] In PBB rendering mode, the graphics pipeline bins a limited set of draw calls and primitives in on-chip memory across the screen. For example, in PBB rendering mode, the graphics pipeline divides the screen into smaller bins, such as 64x64 pixels. In some embodiments, the PBB rendering mode bins draw calls deeper in a post-culling operation of the graphics pipeline.

[0018] In CPBB rendering mode, the graphics pipeline performs hybrid two-level binning: in the first level, the graphics pipeline divides the screen into large bins, such as 512x512 pixels, and in the second level, the graphics pipeline divides a limited set of draw calls and primitives within the large bins into smaller bins, such as 64x64 pixel bins.

[0019] With IMR, the graphics pipeline does not perform coarse binning or primitive batch binning, but instead renders the screen in the order in which draw calls and primitives are received from the application 155.

[0020] Once driver 150 converts standard code received from application 155 into a native format command stream understood by GPU 105, driver 150 analyzes each set of draw calls included in a rendering pass to determine which rendering mode the graphics pipeline will employ to execute the rendering pass. Driver 150 indicates the selected rendering mode to the graphics pipeline by modifying the command stream for the set of draw calls to include a token indicating the selected rendering mode. As the graphics pipeline consumes the command stream, it reads the token and implements the indicated selected rendering mode.

[0021] In some embodiments, if driver 150 determines that the selected rendering mode is incompatible or non-optimal for a rendering pass, driver 150 overrides the previously selected rendering mode for the rendering pass. For example, if driver 150 selects a binning rendering mode, such as CBB or CPBB, for a rendering pass, and conditions change during the processing of the rendering pass, such as the user inserting an occlusion query or using a shader operation that changes memory consistency (such as writing to an Unordered Access View (UAV)), the driver "patches" the command stream to include a token indicating a rendering mode that is compatible with the changed conditions. In some embodiments, if driver 150 overrides the selected rendering mode, driver 150 signals the graphics pipeline to revert to the default rendering mode for the rendering pass.

[0022] 2 illustrates a graphics pipeline 200 capable of processing high-order geometric primitives to generate a rasterized image of a three-dimensional (3D) scene at a given resolution, according to some embodiments. The method 200 is performed in some embodiments of the GPU 105 shown in FIG. The illustrated embodiment of the graphics pipeline 200 is implemented according to the DX11 specification. Other embodiments of the graphics pipeline 200 are implemented according to other application programming interfaces (APIs), such as Vulkan, Metal, DX12, etc.

[0023] Graphics pipeline 200 can access storage resources 201, such as one or more memories or hierarchies of caches used to implement buffers, store vertex data, texture data, etc. Storage resources 201 may be implemented using some embodiments of memory 115 shown in FIG.

[0024] The input assembler 202 is configured to access information from the storage resources 201 that is used to define objects that represent portions of a model of a scene. The vertex shader 203, which may be implemented in software, logically receives as input a single vertex of a primitive and outputs a single vertex. Some embodiments of shaders, such as the vertex shader 203, implement single instruction-multiple data (SIMD) processing such that multiple vertices are processed simultaneously. The graphics pipeline 200 shown in FIG. 2 implements a unified shader model such that all shaders included in the graphics pipeline 200 have the same execution platform on a shared SIMD compute unit. Thus, shaders, including the vertex shader 203, are implemented using a common set of resources, referred to herein as a unified shader pool 204. Some embodiments of the unified shader pool 204 are implemented using a processor within the GPU 105 shown in FIG. 1.

[0025] The hull shader 205 operates on input high-order patches or control points that are used to define the input patches. The hull shader 205 outputs tessellation coefficients and other patch data. The primitives generated by the hull shader 205 may optionally be provided to a tessellator 206. The tessellator 206 receives objects (such as patches) from the hull shader 205 and generates information identifying primitives that correspond to the input objects, e.g., by tessellating the input objects based on tessellation coefficients provided to the tessellator 106 from the hull shader 205. The tessellation subdivides input high-order primitives, such as patches, into a set of lower-order output primitives that represent finer levels of detail, e.g., as indicated by tessellation coefficients that specify the granularity of the primitives generated by the tessellation process. Thus, a model of a scene can be represented by a smaller number of high-order primitives (to save memory or bandwidth), and additional detail can be added by tessellating the high-order primitives.

[0026] The domain shader 207 inputs the domain position and (optionally) other patch data. The domain shader 207 operates on the provided information and generates a single vertex for output based on the input domain position and other information. The geometry shader 208 receives input primitives and outputs up to four primitives that are generated by the geometry shader 208 based on the input primitives. One stream of primitives is provided to the rasterizer 209, and up to four streams of primitives can be concatenated into buffers in the storage resource 201. The rasterizer 209 performs shading operations and other operations such as clipping, perspective division, cutting, and viewport selection. The pixel shader 210 inputs a pixel flow and outputs zero or another pixel flow depending on the input pixel flow. The output merger block 211 performs blending, depth, stencil, or other operations on the pixels received from the pixel shader 210.

[0027] As described herein, driver 150 determines the rendering mode implemented by graphics pipeline 200 and communicates the selected rendering mode to graphics pipeline 200. Driver 150 receives a rendering path that includes a set of draw calls from application 155. Driver 150 analyzes the rendering path to determine its characteristics. Based on the characteristics of the rendering path and the efficiency requirements of processing system 100, driver 150 selects a rendering mode for the rendering path. In some embodiments, driver 150 modifies the command stream input to graphics pipeline 200 in the indirect buffer to indicate the selected rendering mode. For example, in some embodiments, driver 150 "patches" the command stream by inserting a token into the indirect buffer at the beginning of the command stream.

[0028] 3 is a block diagram of a rendering mode selection engine 302 of driver 150 that implements rendering mode selection on a per-rendering-pass basis for a graphics pipeline 200 implemented by GPU 105, according to some embodiments. The rendering mode selection engine 302 includes a rendering pass analyzer 306, a rendering mode menu 308, and a selection override 310, each of which may be implemented as hardware, firmware, software, or any combination thereof. The rendering mode selection engine 302 is configured to analyze each rendering pass of a frame, select a rendering mode for each rendering pass, and communicate the selected rendering pass to the graphics pipeline 200 by inserting a token into an indirect buffer 320 corresponding to the rendering pass.

[0029] The rendering path analyzer 306 analyzes each rendering pass to determine characteristics of the rendering pass. In some embodiments, the characteristics determined by the rendering path analyzer 306 include the number of primitives, the rendering target bounds, whether the rendering pass includes an occlusion query, and whether a rendering pass and sub-pass API are encountered for the rendering pass. The rendering mode menu 308 includes a list of supported rendering modes of the graphics pipeline 200, such as CBB, PBB, CPBB, and IMR, as well as heuristics to apply in determining which rendering mode is suitable for a rendering pass with particular characteristics. For example, in some embodiments, if the driver 150 encounters an occlusion query, the driver 150 selects the IMR rendering mode for the rendering pass 304. In some embodiments, if the driver 150 encounters a sub-pass API, the driver 150 selects one of the binning rendering modes (such as CPBB, PBB, or CBB) based on the geometric complexity of the draw call for the rendering pass 304. Selection override 310 is configured to override the selected rendering mode and revert to a default rendering mode if conditions change such that the selected rendering mode is no longer the optimal mode for the rendering pass. For example, if the characteristics of a frame are updated, selection override 310 may determine that the selected rendering mode is no longer optimal for the rendering pass.

[0030] During operation, the rendering mode selection engine 302 receives a rendering path 304 from the application 155. The rendering path analyzer 306 analyzes the rendering path 304 to determine its characteristics. The rendering mode selection engine 302 selects a rendering mode for the rendering path 304 from the rendering mode menu 308 based on the characteristics of the rendering path 304. The rendering mode selection engine 302 modifies the command stream for the rendering path 304 by inserting a token 312 into the indirect buffer 320 that indicates the selected rendering mode. In the event that the condition has changed such that the selected rendering mode is no longer optimal for the rendering path 304, the selection override 310 further modifies the command stream for the rendering path 304 by inserting a token (not shown) into the indirect buffer 320 that indicates that the graphics pipeline 200 should revert the rendering path 304 to a default rendering mode.

[0031] FIG. 4 illustrates four rendering modes selectable by a driver of a processing system employed by a graphics pipeline, according to some embodiments. When employing coarse-bin rendering (CBB) mode 402, graphics pipeline 200 bins draw calls into large tiles across the screen. For example, for a 1080p screen that is 1920×1080 pixels, a graphics pipeline employing CBB mode 402 divides the render target into multiple 512×512 pixel bins in some embodiments. In some embodiments, the binning in CBB mode 402 is performed in a command buffer of graphics pipeline 200. CBB mode 402 is suitable for draw calls with a large number of primitives because CBB mode 402 uses external memory to store binning information, which provides increased storage capacity for increasing the number of draw calls that can be buffered and binned. Thus, in some embodiments, if the primitive count for a rendering pass exceeds a threshold, driver 150 selects CBB mode 402 as the rendering mode for the rendering pass.

[0032] When using primitive batch-based bin (PBB) rendering mode 404, the graphics pipeline 200 bins a limited set of draw calls and primitives in on-chip memory across the screen using smaller bins than CBB mode 402. For example, in some embodiments, PBB mode 404 uses 64×64 pixel bins. In some embodiments, the binning in PBB mode 404 is performed deeper in the graphics pipeline 200 than CBB mode 402, as a post-culling operation. PBB mode 404 is suitable for draw calls that have a threshold render target bound, such as a render target bound of 1, and for draw calls where occlusion queries occur. A render target bound of 1 in a deferred shading pipeline generally refers to lighting or post-processing rendering passes with a low number of primitives. PBB mode 404 stores binning information in on-chip memory to avoid memory accesses and improve performance and efficiency. Thus, in some embodiments, if the render target bounds of a rendering pass are equal to a threshold value or if the draw call invokes an occlusion query, the driver 150 selects the PBB mode 404 as the rendering mode for the rendering pass.

[0033] In coarse binning with batch-based bin rendering (CPBB) mode 406, the graphics pipeline 200 employs a multi-level binning process in which the graphics pipeline first coarsely bins the screen into large bins, such as 512×512 pixels, and then bins a limited set of draw calls and primitives within each 512×512 pixel bin into smaller 64×64 pixel bins. CPBB mode 406 is suitable for draw calls with render target bounds that exceed the threshold used for PBB mode 404, since a high render target bound likely implies a geometry buffer (G-buffer) rendering pass. CPBB mode 406 is also suitable when rendering passes and sub-pass application programming interfaces (APIs) are seen. The first level of coarse binning divides the screen into bins that can be consumed by the PBB mode. Thus, if the screen has thousands of primitives (triangles), the coarse level binning divides the screen into regions and operates on only a portion of the screen. Each region of a screen is likely to have fewer primitives than the entire screen, and PBB mode can efficiently bin each region of a screen into on-chip memory. Thus, in some embodiments, if the render target bounds of a rendering pass exceed a threshold, or if a rendering pass and sub-pass API are encountered, driver 150 selects CPBB mode 404 as the rendering mode for a rendering pass.

[0034] In immediate mode rendering (IMR) 408, the graphics pipeline 200 is configured to render each primitive in a scene in the order in which the primitive is received by the pipeline. For example, a primitive may include a set of attributes such as x, y, z coordinates, color, or texture u, v coordinates corresponding to the primitive's vertices. Then, all front-facing primitives in the scene are rasterized and shaded (including interpolation, texturing, lighting, and combination operations). IMR mode 408 is suitable for full-screen draw calls used in post-processing. Thus, if the driver 150 determines that a rendering pass involves full-screen post-processing, the driver 150 selects IMR mode 408 for the rendering pass.

[0035] 5 is a flow diagram illustrating a method 500 for selecting a rendering mode for a graphics pipeline on a per-rendering-pass basis, according to some embodiments. At block 502, the rendering mode selection engine 302 receives a rendering pass 304 from an application 155. At block 504, the rendering pass analyzer 306 evaluates characteristics of the rendering pass 304. At block 506, the rendering mode selection engine 302 selects a rendering mode for the rendering pass 304 from the rendering mode menu 310 based on the characteristics of the rendering pass 304. At block 508, the rendering mode selection engine 302 inserts a token into the indirect buffer 320 indicating the selected rendering mode for the rendering pass 304.

[0036] At block 510, the selection override 312 determines whether an override condition is satisfied. In some embodiments, the override condition is satisfied if the characteristics of the frame are updated such that the selected rendering mode is no longer optimal for the rendering path. If at block 510, the selection override 312 determines that the override condition is satisfied, the method flow continues to block 512. At block 512, the selection override 312 signals the graphics pipeline 200 to return the rendering path 304 to a default rendering mode. For example, in some embodiments, the selection override 312 further modifies the command stream for the rendering path 304 by inserting a token into the indirect buffer 320 that indicates that the graphics pipeline 200 should return the rendering path 304 to the default rendering mode. The method flow then returns to block 502. If at block 510, the selection override 312 determines that the override condition is not satisfied, the method flow continues back to block 502.

[0037] As disclosed herein, in some embodiments, a method includes, for each rendering pass of a plurality of rendering passes for a frame, selecting a rendering mode from among a plurality of rendering modes based on characteristics of the rendering pass, and indicating the selected rendering mode for each rendering pass to a graphics processing unit (GPU) of a processor. In one aspect, the indicating includes inserting a command in a command stream to the GPU indicating the selected rendering mode for the rendering pass. In another aspect, the indicating includes inserting a start binning command indicating the selected rendering mode for the rendering pass into a command buffer corresponding to the rendering pass and an end binning command following the command stream for the rendering pass.

[0038] In one aspect, the characteristics of the rendering pass include at least one of lighting, color, post-processing, occlusion queries, whether a number of draw calls or primitives exceeds a threshold, use of out-of-order access views, and whether a number of render target bounds equals or exceeds a threshold. In another aspect, the selected rendering mode includes any of coarse bin rendering, primitive batch based bin rendering, coarse binning with batch based bin rendering, and immediate mode rendering. In yet another aspect, the method includes receiving an indication of updated characteristics of the rendering pass and updating a selection of a rendering mode of the rendering pass for the frame in response to receiving an indication that the selected rendering mode is incompatible with the updated characteristics of the rendering pass. In yet another aspect, the method includes performing a rendering pass of the frame in the GPU using the selected rendering mode of the rendering pass.

[0039] In some embodiments, a method includes sorting a plurality of rendering passes for a frame into corresponding command buffers for a graphics processing unit (GPU) of a processor, selecting a rendering mode from among a plurality of rendering modes for each rendering pass based on characteristics of each rendering pass, and indicating the selected rendering mode for each rendering pass in the command buffer corresponding to the rendering pass. In one aspect, the indicating includes inserting a command into a command stream to the GPU indicating the selected rendering mode for the rendering pass. In another aspect, the characteristics of the rendering pass include at least one of lighting, color, post-processing, occlusion queries, whether a number of draw calls or primitives exceeds a threshold, use of an out-of-order access view, and whether a number of render target bounds is equal to or exceeds a threshold. In yet another aspect, the selected rendering mode includes any of coarse bin rendering, primitive batch-based bin rendering, coarse binning with batch-based bin rendering, and immediate mode rendering.

[0040] In one aspect, the indicating includes inserting a begin binning command into a command buffer corresponding to the rendering pass and an end binning command following the command stream for the rendering pass indicating a selected rendering mode for the rendering pass. In yet another aspect, the method includes receiving an indication of updated characteristics of the rendering pass and updating a selection of a rendering mode for the rendering pass for the frame in response to receiving an indication that the selected rendering mode is incompatible with the updated characteristics of the rendering pass. In yet another aspect, the method includes performing, at the GPU, the rendering pass for the frame using the selected rendering mode for the rendering pass.

[0041] In some embodiments, a non-transitory computer-readable medium embodies a set of executable instructions to operate at least one processor to select a rendering mode from among a plurality of rendering modes for each rendering pass of a plurality of rendering passes for a frame based on characteristics of each rendering pass, and to indicate the selected rendering mode for each rendering pass to a graphics processing unit (GPU) configured to perform each rendering pass based on the indicated selected rendering mode for each rendering pass. In one aspect, the set of executable instructions operates the at least one processor to indicate the selected rendering mode by inserting a start binning command indicating the selected rendering mode for the rendering pass into a command buffer corresponding to the rendering pass and an end binning command following the command stream for the rendering pass.

[0042] In one aspect, the set of executable instructions operates at least one processor to indicate the selected rendering mode by inserting a command into a command stream to the GPU indicating the selected rendering mode for the rendering pass. In one aspect, the characteristics of the rendering pass include at least one of lighting, color, post-processing, occlusion queries, whether a number of draw calls or primitives exceeds a threshold, use of an out-of-order access view, and whether a number of render target bounds equals or exceeds a threshold. In another aspect, the selected rendering mode includes any of coarse bin rendering, primitive batch based bin rendering, coarse binning with batch based bin rendering, and immediate mode rendering. In yet another aspect, the set of executable instructions operates at least one processor to receive an indication of updated characteristics of the rendering pass and update a selection of a rendering mode for the rendering pass for the frame in response to receiving an indication that the selected rendering mode is incompatible with the updated characteristics for the rendering pass.

[0043] In some embodiments, the above-described apparatus and techniques are implemented in a system that includes one or more integrated circuit (IC) devices (also referred to as integrated circuit packages or microchips), such as the processing systems described above with reference to FIGS. 1-5. Electronic design automation (EDA) and computer-aided design (CAD) software tools are used to design and manufacture these IC devices. These design tools are typically represented as one or more software programs. The one or more software programs include code executable by a computer system for operating the computer system to operate on code representing the circuits of the one or more IC devices to perform at least a portion of a process for designing or adapting a manufacturing system for manufacturing the circuits. This code may include instructions, data, or a combination of instructions and data. The software instructions representing the design or manufacturing tools are typically stored in a computer-readable storage medium accessible to the computing system. Similarly, code representing one or more stages of the design or manufacture of the IC devices is stored in and accessed from the same computer-readable storage medium or a different computer-readable storage medium.

[0044] A computer-readable storage medium includes any non-transitory storage medium or combination of non-transitory storage media that can be accessed by a computer system during use to provide instructions and / or data to the computer system. Such storage media may include, but are not limited to, optical media (e.g., compact discs (CDs), digital versatile discs (DVDs), Blu-ray discs), magnetic media (e.g., floppy disks, magnetic tape, magnetic hard drives), volatile memory (e.g., random access memory (RAM) or cache), non-volatile memory (e.g., read-only memory (ROM) or flash memory), or micro-electromechanical systems (MEMS) based storage media. The computer-readable storage medium (e.g., system RAM or ROM) may be internal to the computing system, the computer-readable storage medium (e.g., a magnetic hard drive) may be permanently attached to the computing system, the computer-readable storage medium (e.g., an optical disk or Universal Serial Bus (USB)-based flash memory) may be removably attached to the computing system, or the computer-readable storage medium (e.g., network-accessible storage (NAS)) may be coupled to the computer system via a wired or wireless network.

[0045] In some embodiments, some aspects of the above techniques may be implemented by one or more processors of a processing system executing software. The software includes one or more sets of executable instructions stored in or tangibly embodied on a non-transitory computer-readable storage medium. The software may include instructions and specific data that, when executed by one or more processors, operate the one or more processors to perform one or more aspects of the above techniques. The non-transitory computer-readable storage medium may include, for example, a magnetic or optical disk storage device, a solid-state storage device such as a flash memory, a cache, a random access memory (RAM), or one or more other non-volatile memory devices, etc. The executable instructions stored on the non-transitory computer-readable storage medium may be source code, assembly language code, object code, or other instruction formats that can be interpreted or executed by one or more processors.

[0046] In addition to the above, it should be noted that not all activities or elements described in the summary description are required, some of the specific activities or devices may not be required, one or more additional activities may be performed, and one or more additional elements may be included. Furthermore, the order in which the activities are listed is not necessarily the order in which they are performed. Also, the concepts have been described with reference to specific embodiments. However, those skilled in the art will appreciate that various changes and modifications can be made without departing from the scope of the invention as set forth in the claims. Thus, the specification and drawings should be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the invention.

[0047] Benefits, other advantages, and solutions to problems have been described above with respect to specific embodiments. However, the benefits, advantages, solutions to problems, and features by which any benefit, advantage, or solution may occur or be manifested are not to be construed as critical, essential, or essential features of any or all claims. Moreover, the specific embodiments described above are illustrative only, as the disclosed invention may be modified and practiced in different but similar manners apparent to those skilled in the art having the benefit of the teachings herein. No limitations are intended to the details of construction or design herein shown, other than as set forth in the appended claims. It is therefore apparent that the specific embodiments described above may be altered or modified, and all such variations are considered to be within the scope of the disclosed invention. Accordingly, the protection sought herein is set forth in the appended claims.

Claims

1. 1. A method comprising: For each of a plurality of rendering passes for the frame, selecting a rendering mode from among a plurality of rendering modes based on characteristics of the rendering pass; indicating a selected rendering mode for each rendering pass to a graphics processing unit (GPU) of a processor, said indicating including inserting a begin binning command indicating the selected rendering mode for the rendering pass into a command buffer corresponding to the rendering pass and inserting an end binning command following the command stream for the rendering pass. method.

2. and wherein the indicating includes inserting a command into a command stream to the GPU indicating a selected rendering mode for a rendering pass.

2. The method of claim 1.

3. The characteristics of the rendering pass include at least one of lighting, color, post-processing, occlusion queries, whether a number of draw calls or primitives exceeds a threshold, use of an out-of-order access view, and whether a number of render target bounds equals or exceeds a threshold.

2. The method of claim 1.

4. the selected rendering mode includes any of coarse bin rendering, primitive batch-based bin rendering, coarse binning with batch-based bin rendering, and immediate mode rendering; The method of claim 3.

5. receiving an indication of an updated characteristic of the rendering path; updating a rendering mode selection of a rendering path for the frame in response to receiving an indication that a selected rendering mode is incompatible with updated characteristics of the rendering path.

2. The method of claim 1.

6. performing a rendering pass for a frame at the GPU using a selected rendering mode of the rendering pass.

2. The method of claim 1.

7. 1. A method comprising: Sorting multiple rendering passes for a frame into corresponding command buffers for a graphics processing unit (GPU) of a processor; selecting a rendering mode from among a plurality of rendering modes for each rendering pass based on characteristics of each rendering pass; indicating a selected rendering mode for each rendering pass in a command buffer corresponding to the rendering pass, the indicating including inserting a begin binning command indicating the selected rendering mode for the rendering pass into the command buffer corresponding to the rendering pass and subsequently inserting an end binning command into the command stream for the rendering pass. method.

8. and wherein the indicating includes inserting a command into a command stream to the GPU indicating a selected rendering mode for a rendering pass. The method of claim 7.

9. The characteristics of the rendering pass include at least one of lighting, color, post-processing, occlusion queries, whether a number of draw calls or primitives exceeds a threshold, use of an out-of-order access view, and whether a number of render target bounds equals or exceeds a threshold. The method of claim 7.

10. the selected rendering mode includes any of coarse bin rendering, primitive batch-based bin rendering, coarse binning with batch-based bin rendering, and immediate mode rendering; 10. The method of claim 9.

11. receiving an indication of an updated characteristic of the rendering path; updating a rendering mode selection of a rendering path for the frame in response to receiving an indication that a selected rendering mode is incompatible with updated characteristics of the rendering path. The method of claim 7.

12. performing a rendering pass for a frame at the GPU using a selected rendering mode of the rendering pass. The method of claim 7.

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