Semiconductor Device

Abstract

To provide a semiconductor device capable of reducing both reverse recovery loss and cost of a power conversion device.SOLUTION: A semiconductor includes a bidirectional energizing device including a transistor and a built-in diode built into the transistor so as to be anti-parallel to the transistor, and a diode connected in antiparallel to the bidirectional energizing device, and the bidirectional energizing device can energize a first current flowing in a first direction from a first main electrode of the transistor to an opposing second main electrode, and a second current flowing through the built-in diode in a second direction opposite to the first direction, at least the second current can be switched between energization and de-energization, and the diode has a smaller area in plan view than a bidirectional energizing device.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device, and more particularly to a semiconductor device used in a power conversion device. [Background technology]

[0002] An example of a semiconductor device used in a conventional power conversion device is disclosed in Patent Document 1, which includes a switching device and a Schottky barrier diode (SBD) made of silicon carbide (SiC) and connected in inverse parallel to the switching device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 3804978 Summary of the Invention [Problem to be solved by the invention]

[0004] The Schottky barrier diode connected in inverse parallel to the switching device used in conventional power conversion equipment has a small reverse recovery loss, but is expensive and has a wide band gap. t However, because these devices use silicon semiconductors as the base material, it has not been possible to achieve both a reduction in reverse recovery loss in the power conversion device and a reduction in costs.

[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor device that can achieve both reduced reverse recovery loss and reduced costs in a power conversion device. [Means for solving the problem]

[0006] A semiconductor device according to the present disclosure includes a bidirectional current-carrying device having a transistor and a built-in diode built into the transistor so as to be in anti-parallel to the transistor, and a diode connected in anti-parallel to the bidirectional current-carrying device, wherein the bidirectional current-carrying device can carry a first current flowing in a first direction from a first main electrode of the transistor toward an opposing second main electrode, and a second current flowing through the built-in diode in a second direction opposite to the first direction, and can switch between carrying and not carrying at least the second current, and the diode has an area smaller than that of the bidirectional current-carrying device in a plan view. and a control unit that detects a forward current flowing through the diode in a forward direction and switches the bidirectional current-carrying device to a state in which the second current flows when the forward current exceeds a current threshold or detects a forward voltage applied to the diode and switches the bidirectional current-carrying device to a state in which the second current flows when the forward current exceeds a voltage threshold. Effect of the Invention

[0007] According to the semiconductor device of the present disclosure, when a forward current exceeding a predetermined magnitude flows through the diode, the current flowing through the diode can be diverted to the bidirectional current-carrying device as a second current by switching the signal input to the gate electrode of the transistor, thereby preventing current concentration in the diode and reducing the risk of thermal breakdown. Therefore, the diode can be made smaller in area in a plan view than the bidirectional current-carrying device, and when used in a power conversion device, it is possible to achieve both reduced reverse recovery loss and reduced costs. [Brief description of the drawings]

[0008] [Figure 1] 1 is a circuit diagram showing an inverter circuit according to a first embodiment. [Diagram 2] 2 is a cross-sectional view showing the configuration of a transistor and a diode of the inverter circuit according to the first embodiment. [Diagram 3] 4 is a diagram showing the gate voltage dependency of forward voltage-forward current characteristics of a diode built into a transistor of the inverter circuit of the first embodiment. FIG. [Figure 4] 4 is a time chart of a return current flowing through an arm of the inverter circuit of the first embodiment, a gate signal input, a return current flowing through a diode, and a return current flowing through a transistor. [Diagram 5]4 is a time chart of a return current flowing through an arm of the inverter circuit of the first embodiment, a gate signal input, a return current flowing through a diode, and a return current flowing through a transistor. [Figure 6] 4 is a diagram showing a distribution state of a return current of the inverter circuit according to the first embodiment. FIG. [Figure 7] 4 is a diagram showing a distribution state of a return current of the inverter circuit according to the first embodiment. FIG. [Figure 8] 2 is a diagram showing, in a table form, gate control of the inverter circuit of the first embodiment, and the energization states and operational characteristics of currents flowing through transistors and diodes. FIG. [Figure 9] FIG. 11 is a circuit diagram showing an inverter circuit according to a second embodiment. [Figure 10] FIG. 11 is a cross-sectional view showing a configuration of a transistor in an inverter circuit according to a second embodiment. [Figure 11] FIG. 11 is a diagram showing the gate voltage dependence of forward voltage-forward current characteristics when a transistor of the inverter circuit according to the second embodiment is operated as an FWD. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] <Introduction> In one aspect, the semiconductor device according to the present disclosure is a semiconductor device in which a switching device and a free wheeling diode (FWD) are arranged in anti-parallel, and the switching device is a bidirectional current-carrying device having a function of conducting current in both directions.

[0010] Representative bidirectional current-carrying devices include the reverse conducting (RC)-IGBT, an insulated gate bipolar transistor with built-in FWD functionality that allows current to flow in the reverse direction, and the metal-oxide-semiconductor (MOS) field effect transistor (FET) with built-in FWD functionality that allows current to flow in the reverse direction.

[0011] RC-IGBTs and MOSFETs use inexpensive large-diameter silicon (Si) semiconductors as their base material, which reduces manufacturing costs. In addition, the gate signal of RC-IGBTs and MOSFETs is a voltage signal, so the commutation operation can be adjusted by the magnitude of the voltage of the on and off signals supplied to the gate electrode.

[0012] The FWD connected in inverse parallel to the RC-IGBT is a unipolar operation type with a small reverse recovery charge, such as a Schottky Barrier Diode (SBD) made of wide band-gap (WBG) semiconductor crystal. The gate electrode on the cathode side of the switching device is connected to a control circuit that supplies a signal to drive the switching device.

[0013] The semiconductor device according to the present disclosure can be said to be a semiconductor device that detects the forward current flowing through the FWD, i.e., the current (such as a return current) flowing from the anode to the cathode of the FWD, and when the return current exceeds a preset value (current threshold), supplies an off signal from a control circuit to the gate electrode of a switching device, thereby switching the gate from on to off.

[0014] The relationship between the forward current and forward voltage flowing through the FWD is the ideal diode equation J = Js(e qv / kt-1), where J is the current density, Js is the saturation current density, e is the Napier's number, q is the elementary charge, v is the voltage, k is the Boltzmann constant, and t is the temperature. Therefore, the semiconductor device according to the present disclosure can be said to be a semiconductor device that detects the forward voltage of the FWD, that is, the voltage of the anode with respect to the cathode of the FWD, and when the forward voltage exceeds a preset value (voltage threshold), supplies an off signal from a control circuit to the gate electrode of a switching device to perform control to switch the gate from on to off.

[0015] The present disclosure provides a semiconductor device in which a switching device and a diode are arranged in anti-parallel, which is inexpensive, has low loss, and is small in size and capable of passing a large current.

[0016] <Embodiment 1> In the following description, n and p indicate the conductivity type of a semiconductor. In this disclosure, the first conductivity type is described as n type and the second conductivity type is described as p type, but the first conductivity type may be p type and the second conductivity type may be n type. - indicates that the impurity concentration is lower than n, and n + indicates that the impurity concentration is higher than n, and n ++ is the impurity concentration n + Similarly, p - indicates that the impurity concentration is lower than p, and p + indicates that the impurity concentration is higher than p.

[0017] <Device configuration> 1 is a circuit diagram showing an inverter circuit 100 which is a semiconductor device according to a first embodiment of the present disclosure. As shown in Fig. 1, the inverter circuit 100 is a single-phase inverter which constitutes one phase (leg) of a three-phase AC power supply device for a load R4.

[0018] The inverter circuit 100 includes a DC voltage power supply R1 having a positive electrode R2 and a negative electrode R3. The DC voltage supplied by the DC voltage power supply R1 is converted by the inverter circuit 100 into an AC voltage that drives a one-phase load R4, shown as an inductance.

[0019] In the inverter circuit 100, transistors R5 and R6, which are RC-IGBTs, are connected in series between a power line P to which the potential (first potential) of the positive electrode R2 of the DC voltage power supply R1 is supplied, and a power line N to which the potential (second potential) of the negative electrode R3 of the DC voltage power supply R1 is supplied.

[0020] Diodes R8 and R7, which are SBDs made of SiC, are connected in anti-parallel to the transistors R5 and R6, respectively.

[0021] The transistor R5 connected to the power line P constitutes a first arm, and the transistor R6 connected to the power line N constitutes a second arm.

[0022] The current ratings of the diodes R8 and R7 are less than half the current ratings of the transistors R5 and R6, respectively. In other words, the planar area of ​​the active regions through which the forward current of the diodes R8 and R7 flows is less than half the planar area of ​​the active regions through which the main current of the transistors R5 and R6 flows, and the diodes R8 and R7 functioning as FWDs are sufficiently miniaturized. By miniaturizing the diodes R8 and R7, it is possible to reduce the cost of using the diodes R8 and R7 made of expensive wide-band gap semiconductors.

[0023] A connection node ND between the transistors R5 and R6 is connected as an output node to a load R4.

[0024] The gate electrodes of the transistors R5 and R6 are connected to the gate drive circuits GD1 and GD2 via the gate resistor R22, and the gate drive circuits GD1 and GD2 are connected to a control circuit CC (control unit). The control circuit CC supplies the gate drive circuits GD1 and GD2 with signals for controlling the on / off of the transistors R5 and R6.

[0025] The gate drive circuit GD1 operates between the potential of the power supply of the gate drive circuit GD1 and the potential of the connection node ND, and the gate drive circuit GD2 operates between the potential of the power line N and the potential of the power supply of the gate drive circuit GD2.

[0026] FIG. 2 is a cross-sectional view showing the configuration of the transistor R5 and the diode R8, but the transistor R6 and the diode R7 also have the same configuration.

[0027] The transistor R5 has an n-type semiconductor substrate R10 as its base material, and a portion that operates as an IGBT (IGBT element) and a portion that operates as an FWD (FWD element) are integrated on the semiconductor substrate R10.

[0028] The semiconductor substrate R10 has an impurity concentration of, for example, 1×10 14 cm -3 About n-type (n - The single crystal bulk silicon substrate (FZ wafer) is used. This semiconductor substrate R10 is the n-type IGBT element. - The base layer R10a and the cathode layer of the FWD element (pn junction diode) function as the cathode layer.

[0029] A p-type base layer R11 of p-type (p) is formed on the surface layer of the upper surface (first main surface) of the semiconductor substrate R10 on which the emitter electrode R19 is provided. In this p-type base layer R11, a plurality of trenches R17 are selectively formed, each of which penetrates the p-type base layer R11 from the first main surface of the semiconductor substrate R10 and has a bottom surface reaching into the semiconductor substrate R10. The inner surface of each trench R17 is covered with a gate insulating film R18, and in the trench R17 covered with the gate insulating film R18, an impurity concentration of, for example, 1×10 20 cm-3 A gate electrode R12 is formed by filling the gate electrode R12 with polysilicon of about 1000 nm. A drive signal for driving the IGBT element is input to the gate electrode R12 via a gate terminal GT.

[0030] In the upper layer of the p-type base layer R11 having a mesa shape defined by the trench R17, Trench R17 Adjacent to some sides of + )n + A type emitter layer R13 is selectively formed. + The emitter layer R13 has a thickness of about 0.5 μm and an impurity concentration of 3×10 19 cm -3 It is about that level.

[0031] In addition, n + The p-type base layer in which the n-type emitter layer R13 is formed is referred to as the p-type base layer R11a (first p-type base layer), + The p-type base layer in which the type emitter layer R13 is not formed is distinguished as a p-type base layer R11b (a second p-type base layer). The p-type base layers R11a and R11b are provided alternately.

[0032] n + The p-type base layer R11a including the p-type emitter layer R13 is electrically connected to an emitter electrode R19, and an emitter potential is applied to the emitter electrode R19 via an emitter terminal ET. The p-type base layer R11a connected to the emitter electrode R19 functions as a p-type anode layer of the FWD element.

[0033] The p-type base layer R11a facing the gate electrode R12 with the gate insulating film R18 therebetween functions as a channel forming region of the IGBT element.

[0034] Most of the surface of the p-type base layer R11b is covered with the insulating film R21, and only the uncovered portion (not shown) is connected to the emitter electrode R19 to fix the potential, but this portion has a small connection area and has a resistance component.

[0035] The semiconductor substrate R10 has a lower surface (second main surface) on which the collector electrode R20 is provided. The surface layer of the lower surface (second main surface) of the semiconductor substrate R10 has a p-type (p + )p + n-type collector layer R14 and the n-type (n + )n + A mold collector layer R15 is selectively formed.

[0036] p + The collector layer R14 is about 0.5 μm thick and has an impurity concentration of 1×10 18 cm -3 About n + The collector layer R15 is about 0.5 μm thick and has an impurity concentration of 1×10 19 cm -3 That's about it.

[0037] Semiconductor Substrate R The p+ collector layer R14, which is also the bottom surface of 10, and the n + A collector electrode R20 is formed in contact with the outermost surface of the collector layer R15.

[0038] p + Type collector layer R14 and n + An n-type buffer layer R16 is formed between the p-type collector layer R15 and the semiconductor substrate R10 to stop the depletion layer. R From the top of 10, p + The outermost surfaces of the n+ collector layer R14 and the n+ collector layer R15, i.e., the semiconductor substrate R The thickness of 10 up to the bottom surface is about 120 μm.

[0039] The diode R8 is made of a SiC substrate S10. The SiC substrate S10 is an n-type (n ++ The upper surface (first main surface) of the SiC substrate S10 on which the anode electrode S19 is provided is provided with an n-type (n + )n + A n-type buffer layer S16 is formed on the n-type drift layer S10a.+ The n-type buffer layer S16 and the n-type drift layer S10a are formed by crystal growth and have a thickness of about 2 μm and about 10 μm, respectively.

[0040] A metal film S19a forming a Schottky barrier is formed on the n-type drift layer S10a of the SiC substrate S10, and a metal film functioning as an anode electrode S19 is formed on the metal film S19a. The metal film S19a is made of, for example, titanium (Ti), and the anode electrode S19 is made of, for example, aluminum (Al).

[0041] The cathode electrode S20 provided on the lower surface (second main surface) of the SiC substrate S10 is a metal film that forms an ohmic junction with the SiC substrate S10, and is composed of a multilayer film in which a titanium silicide (TiSi) film, a nickel (Ni) film, and an Al film are stacked on the lower surface of the SiC substrate S10.

[0042] The collector electrode R20 of the transistor R5 and the cathode electrode S20 of the diode R8 are soldered to a metal film on an insulating substrate (not shown), and then assembled into a case to which the emitter terminal of the RC-IGBT (anode terminal of the SiC-SBD), the collector terminal of the RC-IGBT (cathode terminal of the SiC-SBD), the gate terminal, etc. are attached. Then, the emitter terminal ET of the emitter electrode R19 and the anode terminal AT of the anode electrode S19 are electrically connected by an aluminum wire or the like, the collector electrode R20 and the metal film to which the cathode electrode S20 is soldered are electrically connected by an aluminum wire or the like, and the gate electrode R12 and the gate terminal GT are electrically connected by an aluminum wire or the like.

[0043] Next, the RC-IGBT, SiC-SBD, aluminum wires, etc. are covered with resin such as silicone gel, and then the case is packaged by attaching a lid, and the inverter circuit 100 is completed.

[0044] Here, the diodes R8 and R7, which are SiC-SBDs, can also be constructed with SBDs made of gallium nitride (GaN), a typical wide bandgap semiconductor material other than SiC. R Furthermore, even if the pn junction diode is not an SBD, if the WBG semiconductor device has a higher breakdown field strength than a Si semiconductor device, the thickness of the low-impurity-concentration n-type drift layer S10a that bears the voltage when blocking the voltage can be made thinner, and the total amount of carriers accumulated in the n-type drift layer S10a when current is applied can be reduced, thereby making it possible to reduce reverse recovery loss.

[0045] In this way, the two diodes R7 and R8 function as so-called FWDs, and have a reverse voltage blocking capability (voltage rating) approximately equal to the off-voltage (voltage rating) of the transistors R5 and R6.

[0046] <Function> The function of the inverter circuit 100 will be described below with reference to Figures 1 and 2. During the first positive half cycle of the AC voltage generated by the inverter circuit 100 for the load R4, the transistor R5 is turned on and off at high frequency. When the transistor R5 is in a conductive state (on state), that is, when an on signal is supplied from the control circuit CC to the gate electrode R12 and an on current flows from the collector electrode R20 to the emitter electrode R19, the voltage between the main electrodes at both ends of the transistor R5 is small, and most of the voltage of the DC voltage power supply device R1 is applied between the main electrodes at both ends of the diode R7 and the transistor R6, and the diode R7 and the transistor R6 are in a reverse blocking state (off state).

[0047] The voltages applied between the main electrodes of the transistor R5 and the diode R7 are, for example, several volts and several hundred volts to several kilovolts, respectively. The on-current of the transistor R5 flows to the load R4. When the transistor R5 is in the off state, that is, when the control circuit CC supplies an off signal to the gate electrode R12 to cut off the current flowing from the collector electrode R20 to the emitter electrode R19, the load R4 tries to continue to pass the same current as before because the load R4 is an inductance, so the diode R7 and the built-in diode of the transistor R6, whose gate electrode R12 is supplied with an off signal, reach the bipolar operating region and pass a reflux current as a FWD. The reflux current is turned on with the same current increase (dIon / dt) as the current decrease (dIoff / dt) at the time of the turn-off switching of the transistor R5, and passes the same current as before the transistor R5 was turned off to the load R4.

[0048] To keep switching losses small, it is desirable to quickly transition transistor R5 to the off state, but this increases dIoff / dt, causing the reflux current flowing through diode R7 and the diode built into transistor R6 to increase rapidly, generating a large surge current and increasing the risk of device destruction. Therefore, the dIoff / dt at which transistor R5 is turned off is adjusted and controlled by gate resistor R22 inserted between gate electrode R12 and control circuit CC.

[0049] The return current is divided and flows through the diode R7 and the transistor R6. When the transistor R5 turns on again, the diode R7 and the transistor R6 turn off with dIoff / dt, which is the same as the dIon / dt when the transistor R5 turns on.

[0050] When the transistor R5 is fully on, the voltage across the transistor R5 is low, and the main voltage, i.e., a high voltage of 1 kilovolt or several kilovolts, reverse-biases the diode R7 and forward-biases the transistor R6. The electrons in the diode R7, which are carriers that carry the return current, and the electrons and holes in the built-in diode of the transistor R6 are reverse-biased with respect to the FWD, i.e., the IGBT and the built-in diode of the RC-IGBT are arranged in anti-parallel, so the forward bias of the RC-IGBT is reverse-biased with respect to the built-in diode, which generates reverse recovery loss in the diode R7 and the built-in diode of the transistor R6, and increases the turn-on switching loss of the transistor R5. This is because the reverse recovery current of the diode R7 and the built-in diode of the transistor R6 is superimposed on the turn-on current flowing through the transistor R5.

[0051] The switching of transistor R5 during the first positive half-cycle of the AC voltage is repeated multiple times at short intervals during this half-cycle.To generate the second negative half-cycle of the AC voltage supplied to load R4, transistor R6 is turned on and off repeatedly, causing the freewheeling current to flow alternately from load R4 through diode R8 and the built-in diode of transistor R5.

[0052] As described above, the behavior of the transistor R6, the diode R8, and the built-in diode of the transistor R5 is the same as that when the transistor R5, the diode R7, and the built-in diode of the transistor R6 are turned on and off. This is the general operation of the inverter circuit 100.

[0053] In the inverter circuit 100 that operates in this way, the return current is divided and flows through the diodes R8 and R7 and the built-in diodes of the transistors R5 and R6, so the current carrying capacity of the diodes R7 and R8 can be reduced. In particular, by using junction diodes with high current carrying capacity instead of Schottky barrier diodes as the built-in diodes of the transistors R5 and R6, the risk of thermal destruction due to overcurrent can be reduced even if the diodes R7 and R8 are further miniaturized.

[0054] In addition, by using junction diodes for the built-in diodes of transistors R5 and R6, electrons and holes are accumulated when the return current flows, and the reverse recovery loss when turned off, i.e., the reverse recovery charge and reverse recovery current, increases, and the turn-on switching loss of transistors R5 and R6 also increases. However, the return current is also shunted to diodes R7 and R8, which have extremely small reverse recovery loss, i.e., reverse recovery charge and reverse recovery current, so that the turn-on switching loss of transistors R5 and R6 is smaller than if diodes R7 and R8 were not provided.

[0055] In order to reduce the switching loss of the built-in diodes of transistors R5 and R6, a lifetime control technique using charged particle irradiation such as an electron beam is used. However, lifetime control of transistors R5 and R6 increases the on-voltage of the IGBT.

[0056] It would be sufficient to perform lifetime control only on the built-in diodes of transistors R5 and R6, but since IGBTs and built-in diodes are mixed, it is difficult to perform lifetime control only on the built-in diodes.

[0057] In addition, the impurity concentration of the p-type base layer R11a, which corresponds to the anode layer of the built-in diode of the transistors R5 and R6, is set to 5×10 17 cm -3Reducing it below this level can reduce the amount of carriers accumulated in the n-type drift layer S10a when the return current is passing through, but it is not effective because it increases the forward voltage of the built-in diodes of transistors R5 and R6 and the on-voltage of transistors R5 and R6.

[0058] Therefore, the impurity concentration of the p-type base layer R11a is set to 6×10 17 cm -3 Even in the above case, a control method for further reducing the loss without sacrificing the forward voltage of the built-in diodes of the transistors R5 and R6 will be described below.

[0059] Figure 3 is a diagram showing the gate voltage dependence of the reverse voltage-reverse current characteristics of transistors R5 and R6 when a return current is flowing, i.e., the forward voltage-forward current characteristics of the built-in diode. The horizontal axis shows the reverse voltage, and the vertical axis shows the reverse current.

[0060] As shown in FIG. 3, the forward voltage-forward current characteristics of the built-in diodes of the transistors R5 and R6 change depending on the magnitude of the voltage signal (gate voltage) supplied to the gate electrode R12.

[0061] FIG. 3 shows three characteristics when the gate voltage is 0V (volts), 10V, and 15V, and the unipolar operating region and bipolar operating region for each characteristic are indicated by arrows.

[0062] As shown in Figure 3, if the gate voltage supplied is large, the voltage at which current starts to flow (i.e., the bipolar operation starting point) increases and the forward voltage increases. On the other hand, if the gate voltage supplied is small or zero voltage, the voltage at which current starts to flow (bipolar operation starting point) is about 0.7 volts and the forward voltage decreases.

[0063] By changing the current flowing through the built-in diodes of transistors R5 and R6 by the magnitude of the gate voltage to transistors R5 and R6, it is possible to change the ratio of currents that flow through diodes R8 and R7 and through transistors R5 and R6.

[0064] In the control method disclosed herein, the return current flowing through the diodes R8 and R7 constituting the inverter circuit 100 is detected, and when the detected return current exceeds a set current threshold, gate control is performed to change the gate signals supplied to the transistors R6 and R5 connected in anti-parallel to the diodes R7 and R8, respectively.

[0065] Figures 4 and 5 show time charts of the return current flowing through the arm and the gate signal input, the return current flowing through the FWD, and the return current (reverse current) flowing through the RC-IGBT. Figure 4 shows the case where the return current flowing through the FWD is less than the current threshold, and Figure 5 shows the case where the return current flowing through the FWD exceeds the current threshold.

[0066] In Figures 4 and 5, from top to bottom, the return current I FW , RC-IGBT gate signal V G , the forward current I of the SiC-SBD Di and the reverse current I of the RC-IGBT RC The time chart of the return current I FW is the forward current I Di and reverse current I RC The sum of (I Di +I RC )

[0067] In addition, in Fig. 4 and Fig. 5, the current threshold of the SiC-SBD is indicated by a dashed line in the time chart of the return current flowing through the arm, the time chart of the forward current of the SiC-SBD, and the time chart of the reverse current of the RC-IGBT, and the threshold voltage V GEth is shown by a dashed line.

[0068] As shown in Figure 4, when the reflux current is less than the set current threshold, the threshold voltage V GEthBy continuing to supply a gate signal exceeding this level, most of the return current flows as a forward current in the SiC-SBD, and a portion of the return current flows as a reverse current (current flowing through the gate channel) in the RC-IGBT. In this case, an on signal with an adjusted voltage is supplied to the gate electrode R12 so that the return current flowing through the SiC-SBD falls slightly below the current threshold. Slightly below the threshold current means that the return current is controlled to fall within the range of 70% to 90% of the threshold current.

[0069] The on signal supplied to the gate electrode R12 adjusts the shunt ratio of the return current flowing through the diodes R8 and R7 and the FWD built into the transistors R5 and R6. 7 The return current flowing through the capacitor is controlled to be the maximum possible without causing a risk of thermal breakdown.

[0070] Also, as shown in Figure 5, when the reflux current exceeds the set current threshold, the gate signal supply is stopped at the timing when the current threshold is exceeded, and part of the reflux current flows as a reverse current of the RC-IGBT (current flowing through the junction of the built-in diode), and part of the reflux current flows as a forward current to the SiC-SBD. Also, when the reflux current falls below the set current threshold, the threshold voltage V GEth A gate signal exceeding 1000 V is applied to change the current ratio.

[0071] In the operation of passing the return current through diode R8, the current flowing through diode R8 is detected, and if the forward current (return current) flowing through diode R8 does not exceed a set current threshold, an on signal of, for example, 15 V is supplied from control circuit CC to gate electrode R12 of transistor R5 to turn on the gate channel, and a reverse current (return current) is passed from emitter electrode R19 to collector electrode R20 through the gate channel.

[0072] The timing for supplying an on signal to the gate electrode R12 is after the return current starts to flow through the diode R8 and the voltage between the main electrodes of the transistor R6 in the paired arm reaches the power supply voltage, and is shown as the timing of the rising edge of the gate signal waveform in the time chart of the gate signal of the RC-IGBT in Figure 4. If an on signal is supplied to the gate electrode R12 of the transistor R5 before the transistor R6 bears the power supply voltage, the leg may be shorted. This will be explained further later.

[0073] When the gate channel is on, the emitter electrode R19 (same potential as the p-type base layer R11a) and the n - The pn junction, i.e., the p-type base layer R11, which functions as a built-in diode of the transistor R5, becomes the same potential as the p-type base layer R10a. a and - The junction of the type base layer R10a is unlikely to be forward biased.

[0074] As a result, the on-resistance of the diode R8 (forward voltage [volts] ÷ forward current [amperes]) is the current path of the transistor R5, which is the emitter electrode R19-n + Type emitter layer R13-gate channel-n - Type base layer R10a-n Type buffer layer R16-n + 6. Therefore, the resistance of the collector layer R15 becomes smaller than the sum of the resistance components of the collector electrode R20 and the collector layer R15, and the return current is shared, with most of the return current flowing through the diode R8 as shown in FIG.

[0075] Fig. 6 is a diagram showing the distribution of the return current between the RC-IGBT and the SiC-SBD before an off signal is supplied to the gate electrode R12 of the transistor R5, with the horizontal axis showing voltage and the vertical axis showing current. Fig. 6 shows the forward current-forward voltage characteristics of the SiC-SBD and the reverse current-reverse voltage characteristics when the RC-IGBT has a gate voltage of 15V, with the reverse current operating range of the RC-IGBT and the forward current operating range of the SiC-SBD each being hatched. The current threshold and the rated current of the SBD are also shown with dashed lines.

[0076] Since the product of the gate channel resistance and the current flowing through the gate channel is the bias voltage applied to the pn junction of the built-in diode of transistor R5, if the current flowing through the gate channel is not large, the pn junction will not reach the bipolar operation start voltage. If the applied gate voltage is large, the gate channel resistance decreases, so the bias voltage applied to the pn junction that constitutes the built-in diode decreases, and the bipolar operation start voltage (diode operation start point) becomes higher. However, even if the bipolar operation start voltage is not reached, a small reflux current flows through the gate channel in transistor R5.

[0077] In this conducting state, the transistor R5 does not operate in a bipolar manner in which both electrons and holes contribute as current carrying medium carriers, but operates in a unipolar manner in which only electrons contribute. When a device operating in a unipolar manner transitions to a reverse recovery mode, the inside of the device, i.e., n - Since there are no excess carriers stored in the base layer R10a, a depletion layer is formed quickly, the reverse recovery time is extremely short, and the reverse recovery loss is small, resulting in small switching losses.

[0078] As explained above, in inverter operation, when the transistor R5 starts to cut off the current by turning off switching, the load R4 tries to continue to pass the same current as before because it is an inductance, so the built-in diode of the transistor R6, to which the off signal is supplied to the diode R7 and the gate electrode R12, turns on and starts to pass the return current as FWD, but the gate signal to turn on the gate channel is not supplied to the transistor R6 until the voltage borne by the transistor R5 reaches the power supply voltage. In other words, the gate channel of the transistor R6 is not turned on during the turn-off switching operation of the transistor R5.

[0079] This is because if an ON signal is supplied to transistor R6 before transistor R5 has completely completed its turn-off switching operation, transistor R6 will turn on, shorting the leg and causing a large current to flow through transistors R5 and R6, resulting in a malfunction.

[0080] Therefore, after confirming that the transistor R5 is carrying the power supply voltage and that a return current is flowing through the diode R7, a gate signal is supplied to the transistor R6 to control it so that the return current is diverted, thereby preventing the leg from shorting out.

[0081] In the conduction operation of the return current of the diode R8, the current flowing through the diode R8 is detected, and when the forward current (return current) flowing through the diode R8 exceeds a set current threshold, an OFF signal of, for example, 0V or a few minus volts below the threshold voltage is supplied from the control circuit CC to the gate electrode R12 of the transistor R5, so that an ON signal is not supplied, turning off the gate channel, and a connection is made between the emitter electrode R19 (same potential as the p-type base layer R11a) and the n-type base layer R12 through the gate channel resistor. - This cancels the function of keeping the p-type base layer R11a and the n-type base layer R10a at the same potential. This reduces the bipolar operation start voltage (diode operation start point), - The built-in diode of transistor R5, which is composed of the emitter layer R19 and the base layer R10a, is forward biased, and a reverse current (freewheeling current) flows from the emitter electrode R19 to the collector electrode R20 via the built-in diode (pn junction). The current flowing through diodes R7 and R8 is detected by a current sensor (not shown) and fed back to the control circuit CC for processing, and an output signal is supplied. This can be achieved by any known method.

[0082] In this conducting state, the built-in diode of transistor R5 operates in bipolar mode, with both electrons and holes contributing as current carrying medium carriers, and n - Carriers accumulate in the base layer R10a, causing conductivity modulation, and -Since the resistance component of the type base layer R10a is significantly reduced, the forward voltage of the built-in diode of the transistor R5 becomes very small, and the on-resistance component becomes very small.

[0083] The on-resistance of the diode R8 (forward voltage [volts] ÷ current value [amperes]) is the current path of the transistor R5, which is the emitter electrode R19-pin diode (p-type base layer R11a-n - Type base layer R10a-n type buffer layer R16)-n + Resistance component of collector layer R15-collector electrode R20 Sum of 7, the return current is shared, and most of the return current flows through the built-in diode of transistor R5, as shown in FIG.

[0084] Fig. 7 is a diagram showing the distribution of the return current between the RC-IGBT and the SiC-SBD when an off signal is supplied to the gate electrode R12 of the transistor R5, with the horizontal axis showing voltage and the vertical axis showing current. Fig. 7 shows the forward current-forward voltage characteristics of the SiC-SBD and the reverse current-reverse voltage characteristics when the gate voltage of the RC-IGBT is 0V, with the reverse current operating range of the RC-IGBT and the forward current operating range of the SiC-SBD each being hatched. The current threshold and the rated current of the SBD are also shown with dashed lines.

[0085] This operation has little loss due to current flow and is suitable for large current flow. A large freewheeling current flowing through the built-in diode of transistor R5 generates a large switching loss, but because part of the freewheeling current is diverted to diode R8, the reverse recovery charge is slightly smaller than when the entire freewheeling current flows through transistor R5, and the switching loss is also smaller.

[0086] In addition, the return current exceeds the rated current and becomes a large current only during overload operation, such as at the start of operation, and most operations are performed below the rated current during normal operation. Therefore, since overload operation is not performed frequently, the effect of reducing switching loss during normal operation is large. This makes it possible to realize a semiconductor device that avoids the risk of thermal destruction due to the passage of a large current and has small switching loss during general operation.

[0087] In the return current conduction operation of the diode R7, the return current flowing through the diode R7 is controlled in the same manner as in the above-mentioned diode R8.

[0088] Here, the current threshold for detecting the current flowing through the FWD and determining whether or not a gate signal is being supplied is the rated current value of diodes R7 and R8. For instantaneous current, up to twice the rated current (or less than twice the rated current) is permitted to pass, but for DC current, the permitted value is limited to the rated current.

[0089] When a DC current exceeding the rated current is passed through it, there is a risk of thermal destruction. To prevent this, the current threshold is set to between the rated current and up to twice the rated current (less than twice), thereby reducing the risk of thermal destruction and achieving low loss.

[0090] Furthermore, the risk of thermal breakdown can be further reduced by detecting the forward voltage between the main electrodes of the FWD, i.e., the voltage of the anode with respect to the cathode of the FWD, and performing gate control when the forward voltage exceeds a preset value (voltage threshold).The forward voltages of diodes R7 and R8 are detected by the control circuit CC, and any known technology can be used for this method.

[0091] As described above, the control circuit CC not only supplies gate signals to the transistors R5 and R6, but also detects the forward current and forward voltage flowing through the diodes R7 and R8 and performs gate control based on the detection results. Therefore, a power conversion circuit having the control circuit CC can be said to be an IPM (Intelligent Power Module).

[0092] In order to minimize the return current that is diverted to the RC-IGBT below the voltage threshold, when the rated gate voltage is supplied to the gate electrode R12, it is desirable that the forward current rise voltage (bipolar operation start voltage) of the parasitic diode built into the RC-IGBT be 3 V or more. Bipolar operation does not occur up to 3 V, so the return current diverted to the RC-IGBT is small.

[0093] Diodes R8 and R7 operate in a unipolar manner, so as the temperature rises the on-resistance (forward voltage) increases, but still, as long as the forward voltage of diodes R8 and R7 is below the voltage threshold of about 3V, the rated current can flow even at high temperatures. Therefore, when the forward voltage is below the voltage threshold (about 3V), the on signal supplied to gate electrode R12 is adjusted so that the built-in diodes of the RC-IGBT do not operate in a bipolar manner, and the drive is controlled so that most of the return current flows through diodes R8 and R7. This control method limits the built-in diodes of the RC-IGBT from operating in a bipolar manner more than necessary, reducing switching losses.

[0094] The gate control of transistors R5 and R6, and the current conduction and operating characteristics of transistors R5 and R6 and diodes R8 and R7 are tabulated in FIG.

[0095] When an off signal (or no signal) is supplied as gate control for the RC-IGBT, the RC-IGBT is in an off-state and voltage blocking state, the SiC-SBD is in a reverse bias state and voltage blocking state, and no current flows to the load.

[0096] When an on signal is supplied as gate control for the RC-IGBT, the RC-IGBT turns on and current flows from the collector to the emitter, the SiC-SBD is in a reverse bias state and blocks voltage, and the on current flowing through the RC-IGBT flows to the load.

[0097] When an on signal is supplied as gate control for the RC-IGBT, the RC-IGBT is in a reverse conducting state, passing electron current from the emitter to the collector through the channel, and the SiC-SBD passes a forward current (return current). In this state, the return current flowing from the load to the power supply is split between the RC-IGBT and the SBD, but the resistance of the RC-IGBT channel is high, so most of it flows through the SBD.

[0098] Even when reverse recovery operation occurs from such a current-carrying state, the RC-IGBT does not operate in bipolar mode, so the reverse recovery loss is small.

[0099] When an off signal (or no signal) is supplied as gate control for the RC-IGBT, the RC-IGBT is in reverse conduction state, passing electron and hole current from the emitter to the collector through the built-in diode, and the SiC-SBD passes forward current (return current). In this state, the return current flowing from the load to the power supply is split between the RC-IGBT and the SBD, but most of it flows through the built-in diode of the RC-IGBT, which operates in bipolar mode and has a small forward voltage drop, allowing a large current to pass. Since the built-in diode of the RC-IGBT operates in bipolar mode, the reverse recovery loss is large.

[0100] <Embodiment 2> <Device configuration> Fig. 9 is a circuit diagram showing an inverter circuit 200 which is a semiconductor device according to a second embodiment of the present disclosure. In Fig. 9, the same components as those in the inverter circuit 100 described with reference to Fig. 1 are denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0101] The inverter circuit 200 includes a DC voltage power supply D1 having a positive electrode D2 and a negative electrode D3. The DC voltage supplied by the DC voltage power supply D1 is converted by the inverter circuit 200 into an AC voltage that drives a one-phase load D4 shown as an inductance.

[0102] As shown in FIG. 9, the inverter circuit 200 is a DC voltage power supply device D 1 positive electrodeD A power line P to which a potential of 2 (first potential) is supplied, and a DC voltage power supply device D 1 negative electrode D A double-sided gate IGBT, transistor D5 and transistor D6, are connected in series between the power line N to which a potential of 3 (second potential) is supplied.

[0103] A double-sided gate IGBT has a first IGBT that operates as an IGBT and a second IGBT that operates as a commutation device for commutating the return current. By configuring the double-sided gate IGBT with the first and second IGBTs, the gate signal is a voltage signal, so the commutation operation can be adjusted by the magnitude of the voltage of the on signal and off signal supplied to the gate electrode.

[0104] Diodes D8 and D7, which are SBDs made of SiC, are connected in anti-parallel to the transistors D5 and D6, respectively.

[0105] The transistor D5 connected to the power line P constitutes a first arm, and the transistor D6 connected to the power line N constitutes a second arm.

[0106] The current ratings of the diodes D8 and D7 are less than half the current ratings of the transistors D5 and D6, respectively. In other words, the planar area of ​​the active regions through which the forward currents of the diodes D8 and D7 flow is less than half the planar area of ​​the active regions through which the main currents of the transistors D5 and D6 flow, and the diodes D8 and D7 functioning as FWDs are sufficiently miniaturized. By miniaturizing the diodes D8 and D7, it is possible to reduce the cost of using the diodes D8 and D7, which are made of expensive wide-band gap semiconductors.

[0107] A connection node ND between the transistors D5 and D6 is connected as an output node to a load D4.

[0108] The transistors D5 and D6 each have two gate electrodes, the two gate electrodes of the transistor D5 being connected to the gate drive circuit GD1 via a gate resistor D22, and the two gate electrodes of the transistor D6 being connected to the gate drive circuit GD2 via a gate resistor D22. The gate drive circuits GD1 and GD2 are connected to a control circuit CC. The control circuit CC supplies the gate drive circuits GD1 and GD2 with signals for controlling the on / off of the transistors D5 and D6.

[0109] The gate drive circuit GD1 operates between the potential of the power supply of the gate drive circuit GD1 and the potential of the power line P and the potential of the connection node ND, and the gate drive circuit GD2 operates between the potential of the power supply of the gate drive circuit GD2 and the potential of the power line N and the potential of the connection node ND.

[0110] 10 is a cross-sectional view showing the configuration of transistor D5, and transistor D6 has the same configuration. Note that diode D8 has the same configuration as diode R8 shown in FIG. 2, so it is omitted from the drawing.

[0111] The structure of the emitter side of the double-sided gate IGBT is the same as that of the RC-IGBT. The semiconductor substrate D10 has an impurity concentration of, for example, 1×10 14 cm -3 About n-type (n - The semiconductor substrate D10 is a single crystal bulk silicon substrate (FZ wafer). - Mold Base Layer D Functions as 10a.

[0112] A p-type base layer D11 of p-type (p) is formed on the surface layer of the upper surface (first main surface) of the semiconductor substrate D10 on which the emitter electrode D19 is provided. In this p-type base layer D11, a plurality of trenches D17 (first trenches) are selectively formed, each of which penetrates the p-type base layer D11 from the first main surface of the semiconductor substrate D10 and has a bottom surface reaching the inside of the semiconductor substrate D10. The inner surface of each trench D17 is covered with a gate insulating film D18, and in the trenches D17 covered with the gate insulating film D18, an impurity concentration of, for example, 1×1020 cm -3 A gate electrode D12 (first gate electrode) is formed by filling the first IGBT with polysilicon of about 1000 . A drive signal (first switching signal) for driving the first IGBT is input to the gate electrode D12 via a gate terminal GT1.

[0113] In the upper layer portion of the p-type base layer D11 having a mesa shape defined by the trench D17, Trench D17 Adjacent to some sides of the n-type (n + )n + A type emitter layer D13 is selectively formed. + The emitter layer D13 has a thickness of about 0.5 μm and an impurity concentration of 3×10 19 cm -3 It is about that level.

[0114] In addition, n + The p-type base layer in which the n-type emitter layer D13 is formed is referred to as the p-type base layer D11a (first p-type base layer), + The p-type base layer in which the type emitter layer D13 is not formed is distinguished as a p-type base layer D11b (second p-type base layer). The p-type base layers D11a and D11b are provided alternately.

[0115] n + The p-type base layer D11a including the p-type emitter layer D13 is electrically connected to an emitter electrode D19, and an emitter potential is applied to the emitter electrode D19 via an emitter terminal ET.

[0116] The p-type base layer D11a facing the gate electrode D12 with the gate insulating film D18 therebetween functions as a channel formation region (first channel formation region) of the IGBT.

[0117] Most of the surface of the p-type base layer D11b is covered with the insulating film D21, and only the uncovered portion (not shown) is connected to the emitter electrode D19 for fixing the potential, but this portion has a small connection area and has a resistance component.

[0118] The semiconductor substrate D10 has a lower surface (second main surface) on which the collector electrode D20 is provided, and a p-type + )p + A collector layer D14 is formed. + The collector layer D14 has a thickness of about 2.0 μm and an impurity concentration of 1×10 18 cm -3 That's about it.

[0119] p + Between the collector layer D14 and the semiconductor substrate D10, an n-type (n) buffer layer D16 that stops the depletion layer is formed. The n-type buffer layer D16 has a thickness of about 2.0 μm and an impurity concentration of 2×10 16 cm -3 It is about that level.

[0120] From the bottom surface of the semiconductor substrate D10 + The n-type collector layer D14 and the n-type buffer layer D16 are penetrated, and the bottom surface is n - A plurality of trenches D23 (second trenches) reaching the inside of the mold base layer D10a are selectively formed. The inner surface of each trench D23 is covered with a gate insulating film D24. In the trench D23 covered with the gate insulating film D24, for example, an impurity concentration of 1×10 20 cm -3 A gate electrode D25 (second gate electrode) is formed by filling the gate electrode D25 with polysilicon of about 1000 .mu.m. A drive signal (second switching signal) for driving the second IGBT as a commutation device is input to the gate electrode D25 via the gate terminal GT2.

[0121] The mesa-shaped p + The lower layer of the mold collector layer D14 is Trench D23 Adjacent to some sides of + )n + A collector layer D15 is selectively formed. + The collector layer D15 has a thickness of about 0.5 μm and an impurity concentration of 3×10 19 cm -3 It is about that level.

[0122] In addition, n + The p-type collector layer D15 is formed + The collector layer is p + The first p-type collector layer D14a + collector layer), and + p type collector layer D15 is not formed + The collector layer is p + The second collector layer D14b ( + collector layer). + Type collector layers D14a and p + The mold collector layers D14b are provided alternately.

[0123] An insulating film D26 is provided on the lower surface of the semiconductor substrate D10, and a collector electrode D20 is formed on the insulating film D26.

[0124] The collector electrode D20 penetrates the insulating film D26. + collector layer D15 and p + The collector electrode D20 is electrically connected to the collector layer D14a, and a collector potential is applied to the collector electrode D20 via a collector terminal CT.

[0125] The p + The type collector layer D14a functions as a channel formation region (second channel formation region) of the IGBT.

[0126] p + Most of the surface of the collector layer D14b is covered with the insulating film D26, and only the uncovered portion (not shown) is connected to the collector electrode D20 to fix the potential, but this portion has a small connection area and has a resistance component.

[0127] From the top surface of the p-type base layer D11, that is, the upper surface of the semiconductor substrate D10, + The thickness of the uppermost surface of the type collector layer D14, that is, the thickness to the bottom surface of the semiconductor substrate D10, is about 120 μm.

[0128] <Function> The functions of the inverter circuit 200 will be described below with reference to FIGS. 9 and 10. In the transistor D5 which is a double-sided gate IGBT, by supplying an on signal to the gate electrode D25, the gate channel opens, and the n-type buffer layer D16 and the n + type collector layer D15 become conductive. Due to this conduction, the n + type collector layer D15 I functions as the n + type cathode layer of the GBT. Therefore, by supplying an on signal to the gate electrode D25, the transistors D5 and D6 can also be operated as FWDs. In other words, if an off signal is supplied to the gate electrode D25, it does not operate as an FWD, and if an on signal is supplied to the gate electrode D25, it can be operated as an FWD.

[0129] In this way, by performing gate control of the gate electrode D25, the double-sided gate IGBT can divert the reverse current flowing through the diode D8, and becomes a bidirectional conduction device capable of low-loss and high-frequency operation with low cost and controllable large current.

[0130] FIG. 11 is a diagram showing the voltage dependence of the second gate of the forward voltage-forward current characteristics when the double-sided gate IGBT is operated as an FWD. In FIG. 11, the horizontal axis shows the forward voltage as an FWD in which the emitter is at a positive voltage with respect to the collector of the IGBT, and the vertical axis shows the forward current of the FWD flowing from the emitter to the collector of the IGBT.

[0131] In FIG. 11, the characteristics for the cases where the second gate voltage supplied to the second gate is 9V, 12V, and 15V are shown, and in each characteristic, the voltage at which the current starts to flow (bipolar operation start point) is about 0.7 volts.

[0132] 11, it can be seen that by increasing the voltage supplied to gate electrode D25, the gate channel resistance decreases, and the forward voltage when current flows can be lowered. Changing the forward voltage of the FWD changes the on-resistance component of the FWD, which means that the ratio of the return current flowing through transistors D5 and D6 and diodes D8 and D7 when a large return current flows can be adjusted by the voltage signal to gate electrode D25.

[0133] Therefore, the current flowing through the diode D8 is detected, and when the forward current (return current) flowing through the diode D8 exceeds a set current threshold, the control circuit CC supplies an ON signal of, for example, 15V to the gate electrode D25 of the transistor D5 to turn on the gate channel and open the gate channel. + A collector electrode D20 connected to the n-type collector layer D15 and - The p-type base layer D10a is conductive, and the n-type base layer D11a and - The pn junction of the type base layer D10a functions as a FWD, allowing a large freewheel current to flow. This allows the freewheel current flowing through the diode D8 to be diverted to the transistor D5. By supplying an on signal close to the rated gate voltage of about 15 V to the gate electrode D25, the gate channel resistance becomes sufficiently small, and most of the freewheel current flows through the transistor D5.

[0134] The pn junctions that function as the FWDs of the transistors D5 and D6 operate bipolarly, so the reverse recovery charge is large and the switching loss is large. Therefore, when the return current flowing through the diodes D8 and D7 is not at a level that poses a risk of thermal breakdown, an off signal is supplied to the gate electrodes D25 of the transistors D5 and D6 to close the gate channels and prevent them from functioning as FWDs, which prevents the return current from flowing through the transistors D5 and D6 and is effective in reducing the switching loss.

[0135] Therefore, when the forward current (freewheel current) flowing through diodes D7 and D8 exceeds a set current threshold, an on signal is supplied to gate electrode D25 to commutate the freewheel current, and an on signal with an adjusted voltage is supplied to gate electrode D25 so that the detected freewheel current falls slightly below the current threshold. Slightly below the current threshold means that the freewheel current is controlled to fall within the range of 70% to 90% of the threshold current.

[0136] By adjusting the shunt ratio of the return current flowing through the diodes D8 and D7 and the FWD built into the transistors D5 and D6 by the on signal supplied to the gate electrode D25, the return current flowing through the diodes D8 and D7 is controlled to be the maximum possible without causing a risk of thermal breakdown. This control can further reduce switching loss.

[0137] As with transistors R5 and R6, which are RC-IGBTs, transistors D5 and D6 can shift the bipolar operation starting point and change the forward voltage by changing the voltage supplied to gate electrode D12. However, the differential resistance (dV / dI), defined as the forward voltage change / forward current change in the region beyond the bipolar operation starting point, is small, making fine adjustment difficult.

[0138] On the other hand, the differential resistance (dV / dI) of transistors D5 and D6 can be changed by changing the gate voltage supplied to gate electrode D25. Supplying a large gate voltage to gate electrode D25 decreases the gate channel resistance, and supplying a small gate voltage increases the gate channel resistance. Since the gate channel resistance component is a factor that determines the differential resistance (dV / dI), the differential resistance can be adjusted. Using this effect, it is easy to control the forward voltage of transistors D5 and D6 as FWDs.

[0139] By using this adjustment function to change the voltage supplied to the gate electrode D25, it is possible to make the return current as large as possible flow through the diodes D8 and D7 while keeping the return current slightly below the current threshold.

[0140] By suppressing the current due to the bipolar operation of the FWD in transistors D5 and D6, the loss in the switching operation can be reduced.

[0141] In the inverter circuit 200, after confirming that the transistor D5 is carrying the power supply voltage and that a return current is flowing through the diode D7, a gate signal is supplied to the transistor D6 to control the transistor D6 to shunt the return current. This, of course, makes it possible to prevent the leg from being short-circuited.

[0142] <Other application examples> In the above-described first and second embodiments, a leg of the inverter circuit is configured by connecting a single semiconductor device in series, but the same effect can be obtained by using a plurality of semiconductor devices connected in series or in parallel as a single semiconductor device.

[0143] In addition, the same effect can be obtained by connecting the bidirectional current-carrying devices in series and parallel to use them as a single bidirectional current-carrying device, and by connecting the diodes in anti-parallel to the bidirectional current-carrying devices in series and parallel to use them as a single diode.

[0144] In addition, although the present disclosure relates to a semiconductor device that combines a bidirectional current-carrying device made of a silicon semiconductor with a diode made of a wide band gap semiconductor material as a base material and a method for driving the same, it is clear that the same effects can be obtained by using a bidirectional current-carrying device made of a semiconductor material other than silicon as a base material, or by using a silicon semiconductor Schottky barrier diode having a smaller reverse recovery charge amount than a typical silicon pn junction diode, or a junction diode made of a silicon semiconductor with a lifetime control as a base material, such as a pn junction diode, or a pin diode composed of a p-type semiconductor, an intrinsic semiconductor, and an n-type semiconductor.

[0145] In addition, within the scope of the present disclosure, it is possible to freely combine the respective embodiments, and to appropriately modify or omit the respective embodiments. [Explanation of symbols]

[0146] D5, D6, R5, R6 transistors, D7, D8, R7, R8 diodes, CC control circuit.

Claims

1. a bidirectional current-carrying device including a transistor and a built-in diode built into the transistor so as to be in anti-parallel to the transistor; a diode connected in anti-parallel to the bidirectional current-carrying device; The bidirectional current-carrying device is a first current flowing in a first direction from a first main electrode of the transistor to an opposing second main electrode of the transistor; A second current flowing in a second direction opposite to the first direction can be conducted through the built-in diode, and at least the second current can be switched between being conducted and not being conducted; The diode is The area in a plan view is smaller than that of the bidirectional current-carrying device, a control unit that detects a forward current flowing through the diode in a forward direction, and switches the bidirectional current-carrying device to a state in which the second current flows when the forward current exceeds a current threshold, or detects a forward voltage applied to the diode, and switches the bidirectional current-carrying device to a state in which the second current flows when the forward current exceeds a voltage threshold.

2. The control unit is The semiconductor device according to claim 1 , wherein the bidirectional current-carrying device is switched to a state in which the second current does not pass when the forward current is less than the current threshold value or when the forward voltage is less than the voltage threshold value.

3. The current threshold value is 3. The semiconductor device according to claim 1, wherein the current is set to be equal to or greater than a rated current of said diode and equal to or less than two times the rated current.

4. 3. The semiconductor device according to claim 1, wherein said voltage threshold value is set to 3 volts or less.

5. The control unit is When a rated gate voltage of the transistor is input to a gate as a signal for switching the bidirectional current-carrying device to a state in which the second current does not flow, 5. The semiconductor device according to claim 4, wherein a rise voltage of said second current flowing through said built-in diode when said rated gate voltage is input is set to 3V or more.

6. 2 . The semiconductor device according to claim 1 , wherein an area of ​​said diode in a plan view is equal to or less than half an area of ​​said bidirectional current-carrying device in a plan view, or a rated current of said diode is equal to or less than half a rated current of said bidirectional current-carrying device.

7. The built-in diode is a pn junction diode, 2. The semiconductor device according to claim 1, wherein said transistor is a MOS transistor or a reverse conducting IGBT.

8. The control unit is 8. The semiconductor device according to claim 7, further comprising: a voltage value of a signal for switching said bidirectional current-carrying device to a state in which said second current does not flow, said voltage value being adjusted so that said forward current flowing through said diode is maximized when said forward current is less than said current threshold value or when said forward voltage is less than said voltage threshold value.

9. The bidirectional current-carrying device is The impurity concentration of the impurity layer corresponding to the anode layer of the built-in diode is 6×10 １７ cm －３ 9. The semiconductor device according to claim 7 or 8.

10. a first bidirectional current-carrying device including a first transistor and a first built-in diode built into the first transistor so as to be in anti-parallel to the first transistor; a first diode connected in anti-parallel to the first bidirectional current-carrying device; a second bidirectional current-carrying device including a second transistor and a second built-in diode built into the second transistor so as to be in anti-parallel to the second transistor; a second diode connected in anti-parallel to the second bidirectional current-carrying device; The first bidirectional current-carrying device is a first current flowing in a first direction from a first main electrode of the first transistor to an opposing second main electrode of the first transistor; a second current flowing in a second direction opposite to the first direction can be passed through the first built-in diode, and at least the second current can be switched between passing and not passing; The second bidirectional current-carrying device is a first current flowing in a first direction from a first main electrode of the second transistor to an opposing second main electrode of the second transistor; a second current flowing in a second direction opposite to the first direction can be passed through the second built-in diode, and at least the second current can be switched between passing and not passing; the first bidirectional current-carrying device and the second bidirectional current-carrying device are connected in series between a first potential and a second potential lower than the first potential; The first diode is The area in a plan view is smaller than that of the first bidirectional current-carrying device, The second diode is The area in a plan view is smaller than that of the second bidirectional current-carrying device, Detecting a forward current flowing through the first and second diodes in a forward direction or a forward voltage applied to the first and second diodes; switching the first bidirectional current-carrying device to a state in which the second current is conducted when the forward current of the first diode exceeds a current threshold or when the forward voltage of the first diode exceeds a voltage threshold; a control unit that switches the second bidirectional current-carrying device to a state in which the second current is carried when the forward current of the second diode exceeds a current threshold or when the forward voltage of the second diode exceeds a voltage threshold; The first and second transistors are MOS transistors or reverse conducting IGBTs, The control unit is Even if the forward current of the first diode is less than a current threshold or the forward voltage of the first diode is less than the voltage threshold, the first bidirectional current-carrying device is in a state in which the second current flows through the first bidirectional current-carrying device while the second bidirectional current-carrying device is performing a turn-off switching operation.

11. a first main electrode and an opposing second main electrode; a transistor including: a first gate electrode disposed on the side where the first main electrode is provided, to which a first switching signal is input for switching between conducting and non-conducting a first current flowing in a first direction from the first main electrode to the second main electrode; a second gate electrode disposed on the side where the second main electrode is provided, to which a second switching signal is input for switching between conducting and non-conducting a second current flowing in a second direction opposite to the first direction; a diode connected in anti-parallel to the bidirectional current-carrying device; The diode is The semiconductor device has a smaller area in a plan view than the bidirectional current-carrying device.

12. The semiconductor device of claim 11 , wherein the transistor and the device are IGBTs.

13. 12. The semiconductor device according to claim 11, further comprising a control unit that detects a forward current flowing through the diode in a forward direction, and when the forward current exceeds a current threshold, or detects a forward voltage applied to the diode, and when the forward voltage exceeds a voltage threshold, inputs, as the second switching signal, a signal to switch the bidirectional current-carrying device to a state in which the second current flows, to the second gate electrode.

14. The control unit is 14. The semiconductor device according to claim 13, further comprising: a first switching signal and a second switching signal of the bidirectional current-carrying device, the first switching signal and the second switching signal of the bidirectional current-carrying device being adjusted to maximize the forward current flowing through the diode when the forward current is less than the current threshold value or when the forward voltage is less than the voltage threshold value.

15. a first main electrode and an opposing second main electrode; a first transistor including: a first gate electrode disposed on a side where the first main electrode is provided, to which a first switching signal is input for switching between conducting and non-conducting a first current flowing in a first direction from the first main electrode to the second main electrode; a second gate electrode disposed on the side where the second main electrode is provided, to which a second switching signal is input for switching between conducting and non-conducting a second current flowing in a second direction opposite to the first direction; a first diode connected in anti-parallel to the first bidirectional current-carrying device; a first main electrode and an opposing second main electrode; a second transistor including: a first gate electrode disposed on the side where the first main electrode is provided, to which a first switching signal is input for switching between conducting and non-conducting a first current flowing in a first direction from the first main electrode to the second main electrode; a second gate electrode disposed on the side where the second main electrode is provided, to which a second switching signal is input for switching between conducting and non-conducting a second current flowing in a second direction opposite to the first direction; a second diode connected in anti-parallel to the second bidirectional current-carrying device; the first bidirectional current-carrying device and the second bidirectional current-carrying device are connected in series between a first potential and a second potential lower than the first potential; The first diode is The area in a plan view is smaller than that of the first bidirectional current-carrying device, The second diode is The semiconductor device has an area smaller in a plan view than the second bidirectional current-carrying device.

16. Detecting a forward current flowing through the first and second diodes in a forward direction or a forward voltage applied to the first and second diodes; inputting, as the second switching signal, a signal for switching the first bidirectional current-carrying device to a state in which the second current is conducted, to the second gate electrode when the forward current of the first diode exceeds a current threshold value or when the forward voltage of the first diode exceeds a voltage threshold value; a control unit that inputs, as the second switching signal, a signal for switching the second bidirectional current-carrying device to a state in which the second current is conducted, to the second gate electrode when the forward current of the second diode exceeds a current threshold value or when the forward voltage of the second diode exceeds a voltage threshold value; The control unit is if the forward current of the first diode is less than a current threshold, and the forward voltage of the first diode is less than the voltage threshold, and 16. The semiconductor device according to claim 15, wherein the signal for switching the first bidirectionally current-carrying device to a state in which the second current flows is input to the second gate electrode as the second switching signal when the second bidirectionally current-carrying device is not in a turn-off switching operation.

17. The diode is 12. The semiconductor device according to claim 1, wherein the semiconductor device is a Schottky barrier diode made of a wide band gap semiconductor, or a junction diode made of a silicon semiconductor that has been subjected to lifetime control.

18. The first and second diodes are 16. The semiconductor device according to claim 10, wherein the semiconductor device is a Schottky barrier diode made of a wide band gap semiconductor, or a junction diode made of a silicon semiconductor that has been subjected to lifetime control.

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