Transistor and display device

Abstract

To provide an oxide semiconductor film having more stable electrical conductivity; and provide a semiconductor device which provides stable electrical characteristics to the semiconductor device by using the oxide semiconductor film to achieve high reliability.SOLUTION: An oxide semiconductor film which includes a crystalline region composed of a crystal with a-b plane substantially parallel to a film surface and with a c-axis substantially perpendicular to the film surface has a structure where electrical conductivity is stable and which is electrically stable even to radiation of visible light, ultraviolet light and the like. By using the above-described oxide semiconductor film for a transistor, a semiconductor device having stable electrical characteristics and high reliability can be provided.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an oxide semiconductor film and a semiconductor device including the oxide semiconductor film.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general, and electro-optical devices, semiconductor circuits, and electronic equipment are all classified as semiconductor devices. [Background technology]

[0003] As typified by liquid crystal display devices, transistors formed on glass substrates are amorphous. It is made of amorphous silicon, polycrystalline silicon, etc. The transistors used in this study can easily be made larger on glass substrates. Amorphous silicon transistors have the disadvantage of low field effect mobility. In addition, transistors using polycrystalline silicon have high field effect mobility, but the glass substrate It has the disadvantage that it is not suitable for making the plate larger in area.

[0004] In contrast to silicon-based transistors, which have such drawbacks, Technology that uses this material to create transistors and apply them to electronic and optical devices is attracting attention. For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. A technique for fabricating a transistor is disclosed in Patent Document 1. A technology for fabricating such a semiconductor device and using it as a switching element for pixels in a display device is disclosed in Patent Document 2. There are.

[0005] Regarding the oxide semiconductor used in such transistors, insensitive to substances and can be used without problems even if the film contains a significant amount of metal impurities, such as sodium hydroxide, and inexpensive soda-lime glass containing a large amount of alkali metals such as lithium can also be used.” has also been described (see Non-Patent Document 1).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0007]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] However, in the process of manufacturing an oxide semiconductor film and a semiconductor device using the oxide semiconductor film, defects such as oxygen defects may occur in the oxide semiconductor film, or hydrogen that serves as a carrier supply source may be mixed in, and the electrical conductivity of the oxide semiconductor film may change. Such a phenomenon is a cause of fluctuations in electrical characteristics for a transistor using the oxide semiconductor film, resulting in a decrease in the reliability of the semiconductor device.

[0009] Such an oxide semiconductor film may change in electrical conductivity particularly when irradiated with visible light or ultraviolet light. Such a phenomenon also occurs in a transistor using the oxide semiconductor film. This will result in fluctuations in electrical characteristics and a decrease in the reliability of the semiconductor device.

[0010] In view of such problems, the objective is to provide an oxide semiconductor film having more stable electrical conductivity. In addition, by using the oxide semiconductor film, a semiconductor device can have a stable electric field. It is an object of the present invention to provide a highly reliable semiconductor device by imparting electrical characteristics. [Means for solving the problem]

[0011] One embodiment of the disclosed invention includes a region having crystallinity, and the region having crystallinity is a The oxide semiconductor is composed of crystals in which the -b plane is approximately parallel to the film surface and the c axis is approximately perpendicular to the film surface. That is, the region having crystallinity included in the oxide semiconductor film has a c-axis orientation. Note that the oxide semiconductor film is non-single-crystal. does not become non-crystalline (amorphous).

[0012] One embodiment of the disclosed invention includes a region having crystallinity, and the region having crystallinity is ab The crystals are composed of crystals whose planes are roughly parallel to the film surface and whose c-axes are roughly perpendicular to the film surface. In the electron diffraction intensity measurement, the size of the scattering vector was 3.3 nm. - 1 Above 4.1nm -1 The full width at half maximum of the following peaks and the magnitude of the scattering vector are 5.5 nm -1 Above 7.1nm -1 The full width at half maximum of the following peaks is 0.2 nm -1 That's all. The oxide semiconductor film.

[0013] In the above, the magnitude of the scattering vector is 3.3 nm -1 Above 4.1nm-1 The following peaks have a full width at half maximum of 0.4 nm -1 or more and 0.7 nm -1 or less, and the magnitude of the scattering vector is 5.5 nm -1 or more and 7.1 nm -1 or less, and it is preferable that the full width at half maximum at the following peak is 0.45 nm -1 or more and 1.4 nm -1 or less. Also, in the ESR measurement, g = 1. The spin density of the peak near 93 is 1.3×10 18 (spins / cm 3 ) or less which is preferable. Also, the oxide semiconductor film includes a plurality of crystalline regions, and the directions of the a axis or b axis of the crystal may be different from each other. Also, it is preferable to have a structure represented by InGaO 3 (ZnO) m (where m is a non-natural number).

[0014] Also, another aspect of the disclosed invention is a first insulating film, an oxide semiconductor film provided on the first insulating film and including a crystalline region, a source electrode and a drain electrode provided in contact with the oxide semiconductor film, a second insulating film provided on the oxide semiconductor film, and a gate electrode provided on the second insulating film, and the semiconductor device is composed of crystals in which the a-b plane is substantially parallel to the film surface and the c axis is substantially perpendicular to the film surface. electrode, and a second insulating film provided on the oxide semiconductor film, and a gate electrode provided on the second insulating film, and the crystalline region is composed of crystals in which the a-b plane is substantially parallel to the film surface and the c axis is substantially perpendicular to the film surface. insulating film, and the semiconductor device is composed of crystals in which the a-b plane is substantially parallel to the film surface and the c axis is substantially perpendicular to the film surface.

[0015] Also, another aspect of the disclosed invention is a gate electrode, a first insulating film provided on the gate electrode, an oxide semiconductor film provided on the first insulating film and including a crystalline region, a source electrode and a drain electrode provided in contact with the oxide semiconductor film, and an oxide semiconductor film, and a source electrode and a drain electrode provided in contact with the oxide semiconductor film, and an oxide semiconductor It has a second insulating film provided on the body film, and the region having crystallinity is such that the a-b plane is substantially parallel to the film surface and is a semiconductor device composed of crystals in which the c-axis is substantially perpendicular to the film surface.

[0016] In the above, a first metal oxide film is provided between the first insulating film and the oxide semiconductor film, and the first metal oxide film contains gallium oxide and zinc oxide and includes a region having crystallinity. The region having crystallinity is preferably composed of crystals in which the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface. Further, in the first metal oxide film, the amount of zinc oxide is preferably less than 25% of the amount of gallium oxide. Also, a second metal oxide film is provided between the oxide semiconductor film and the second insulating film, and the second metal oxide film contains gallium oxide and zinc oxide and includes a region having crystallinity. The region having crystallinity is preferably composed of crystals in which the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface. Further, in the second metal oxide film, the amount of zinc oxide is preferably less than 25% of the amount of gallium oxide. In addition, in the second metal oxide film, the amount of zinc oxide is preferably less than 25% of the amount of gallium oxide.

[0017] In this specification and the like, the fact that plane A is substantially parallel to plane B means a state where the angle formed by the normal line of plane A and the normal line of plane B is 0° or more and 20° or less. Further, in this specification and the like, the fact that line C is substantially perpendicular to plane B means a state where the angle formed by line C and the normal line of plane B is 0° or more and 20° or less. This is what is meant.

Advantages of the Invention

[0018] An oxide semiconductor film including a region having crystallinity, where the region having crystallinity has an a-b plane substantially parallel to the film surface and a c-axis substantially perpendicular to the film surface, has stable electrical conductivity. ​It has a more electrically stable structure even against irradiation with visible light, ultraviolet light, etc. Such oxidation By using the oxide semiconductor film in a transistor, a semiconductor device having stable electrical characteristics and high reliability can be provided.

Brief Description of the Drawings

[0019]

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Embodiments for Carrying Out the Invention

[0020] Embodiments and examples of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention It should not be construed as being limited to the descriptions of the embodiments and examples shown below. Hereinafter, In the configuration of the present invention described below, the same reference numerals are commonly used for the same parts or parts having similar functions among different drawings, and repeated descriptions thereof are omitted.

[0021] In each of the drawings described in this specification, the size of each component, the thickness of a layer, or the area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0022] In addition, terms such as first, second, and third used in this specification are attached to avoid confusion of components and are not numerically limiting. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third" and so on for explanation.

[0023] (Embodiment 1) In this embodiment, as one aspect of the present invention, an oxide semiconductor film will be described with reference to FIGS. 1 to 5.

[0024] The oxide semiconductor film according to this embodiment includes a crystalline region. The crystalline region is composed of crystals in which the a - b plane is substantially parallel to the film surface and the c - axis is substantially perpendicular to the film surface. That is, the crystalline region included in the oxide semiconductor film is c - axis oriented. When observing the cross - section of the crystalline region, it has a structure in which atoms arranged in layers are stacked from the substrate toward the surface, and the c - axis of the crystal is substantially perpendicular to the surface. Also, since it includes a crystalline region with the c - axis oriented in this way, the oxide semiconductor film is called a C Axis Aligned Crystalline Oxide Semiconductor Aligned Crystalline Oxide Semiconductor ​​​​​​​​​​; Also referred to as a CAAC-OS film.

[0025] Here, a cross-sectional TEM image of an oxide semiconductor film having a crystalline region actually fabricated is shown in FIG. 1. As indicated by the arrow in FIG. 1, a crystalline region 21 in which atoms are oriented in layers, that is, the c-axis is oriented is clearly observed in the oxide semiconductor film.

[0026] In addition, a similarly crystalline region 22 is observed in the oxide semiconductor film, and the crystalline region 21 and the crystalline region 22 are three-dimensionally surrounded by an amorphous-structured region Thus, although a plurality of crystalline regions exist in the oxide semiconductor film, no grain boundaries are observed in FIG. 1, and no grain boundaries are observed in the entire oxide semiconductor film either.

[0027] Also, in FIG. 1, the crystalline region 21 and the crystalline region 22 are separated by an amorphous-structured region, but the layer-oriented atoms of the crystalline region 21 and the crystalline region 2 2 seem to be stacked at approximately the same intervals, and seem to form a continuous layer across the amorphous-structured region.

[0028] Also, in FIG. 1, the sizes of the crystalline region 21 and the crystalline region 22 are about 3 nm to 7 nm, but the size of the crystalline region formed in the oxide semiconductor film shown in this embodiment can be about 1 nm or more and 1000 nm or less. For example , as shown in FIG. 31, the size of the crystalline region of the oxide semiconductor film can also be several tens of nm or more.

[0029] Also, when observing the crystalline region from a direction perpendicular to the film surface, a hexagonal lattice​​​​ It is preferable that the structure be such that atoms are arranged. By adopting such a structure, the region having the crystallinity can easily adopt a hexagonal crystal structure having three-fold symmetry. In the present specification, the hexagonal crystal structure refers to that in the hexagonal crystal family (Crystal family), and includes trigonal and hexagonal crystals in the trigonal crystal system (Crystal system). Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. In the present specification, the hexagonal crystal structure refers to that in the hexagonal crystal family (Crystal family), and includes trigonal and hexagonal crystals in the trigonal crystal system (Crystal system). Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state.

[0030] Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state. Moreover, the oxide semiconductor film according to the present embodiment may contain a plurality of regions having crystallinity, and in each region having crystallinity, the directions of the a-axis or b-axis of the crystal may be different from each other. That is, in the oxide semiconductor film according to the present embodiment, although it is crystallized with respect to the c-axis in each region having crystallinity, it is not necessarily arranged with respect to the a-b plane. However, it is preferable that regions having different directions of the a-axis or b-axis do not contact each other so that a grain boundary is not formed at the interface where the regions contact each other. Therefore, it is preferable that the oxide semiconductor film has a region with an amorphous structure so as to surround the region having crystallinity three-dimensionally. That is, the oxide semiconductor film including the region having the crystallinity is a polycrystal and the whole film does not become an amorphous state.

[0031] The oxide semiconductor film includes a quaternary metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide, a ternary metal oxide such as an In-Ga-Zn-O-based metal oxide, an In-Sn-Zn-O-based metal oxide, an In-Al-Zn-O-based metal oxide, a Sn-Ga-Zn-O-based metal oxide, an Al-Ga-Zn-O-based metal oxide, a Sn-Al-Zn-O-based metal oxide, a binary metal oxide such as an In-Zn-O-based metal oxide, a Sn-Zn-O-based metal oxide, and the like. The oxide semiconductor film includes a quaternary metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide, a ternary metal oxide such as an In-Ga-Zn-O-based metal oxide, an In-Sn-Zn-O-based metal oxide, an In-Al-Zn-O-based metal oxide, a Sn-Ga-Zn-O-based metal oxide, an Al-Ga-Zn-O-based metal oxide, a Sn-Al-Zn-O-based metal oxide, a binary metal oxide such as an In-Zn-O-based metal oxide, a Sn-Zn-O-based metal oxide, and the like. The oxide semiconductor film includes a quaternary metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide, a ternary metal oxide such as an In-Ga-Zn-O-based metal oxide, an In-Sn-Zn-O-based metal oxide, an In-Al-Zn-O-based metal oxide, a Sn-Ga-Zn-O-based metal oxide, an Al-Ga-Zn-O-based metal oxide, a Sn-Al-Zn-O-based metal oxide, a binary metal oxide such as an In-Zn-O-based metal oxide, a Sn-Zn-O-based metal oxide, and the like. The oxide semiconductor film includes a quaternary metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide, a ternary metal oxide such as an In-Ga-Zn-O-based metal oxide, an In-Sn-Zn-O-based metal oxide, an In-Al-Zn-O-based metal oxide, a Sn-Ga-Zn-O-based metal oxide, an Al-Ga-Zn-O-based metal oxide, a Sn-Al-Zn-O-based metal oxide, a binary metal oxide such as an In-Zn-O-based metal oxide, a Sn-Zn-O-based metal oxide, and the like. The oxide semiconductor film includes a quaternary metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide, a ternary metal oxide such as an In-Ga-Zn-O-based metal oxide, an In-Sn-Zn-O-based metal oxide, an In-Al-Zn-O-based metal oxide, a Sn-Ga-Zn-O-based metal oxide, an Al-Ga-Zn-O-based metal oxide, a Sn-Al-Zn-O-based metal oxide, a binary metal oxide such as an In-Zn-O-based metal oxide, a Sn-Zn-O-based metal oxide, and the like. is used.

[0032] Among them, In-Ga-Zn-O-based metal oxides have an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more, and many of them have a wide energy gap. When transistors are fabricated using them, the resistance in the off state is sufficiently high and the off current can be made sufficiently small. The crystalline regions in In-Ga-Zn-O-based metal oxides often have a crystal structure that is not mainly the hexagonal wurtzite type. For example, they can take the YbFe O 2 type structure, Yb 4 Fe 2 O 3 type structure, and its deformed type structures, etc. ( 7 M. Nakamura, N. Kimizuka, and T. Mohri 、「The Phase Relations in the In2O3-Ga2Zn O4-ZnO System at 1350℃」、J. Solid State C hem.、1991、Vol.93, p.298-315). Note that the YbFe O 2 type 4 structure has a repeating structure of ABB|ABB|ABB | when the layer containing Yb is the A layer and the layer containing Fe is the B layer. Examples of its deformed structures include, for example, the repeating structure of ABBB|ABBB|. Also, the Yb Fe O 2 type structure has a repeating structure of ABB|AB|AB 3 B|AB|, and examples of its deformed structures include, for example, the repeating structure of ABBB|ABB|ABBB|ABB|ABBB|ABB|. Also, when the amount of ZnO in the 7 said metal oxide is large, it may take the wurtzite-type crystal structure. ABBB|ABB|ABBB|ABB|. Also, when the amount of ZnO in the said metal oxide is large, it may take the wurtzite-type crystal structure. When the amount of ZnO in the metal oxide is large, it may also take the wurtzite-type crystal structure.

[0033] Examples of In-Ga-Zn-O-based metal oxides include InGaO 3 (ZnO) m (m >0). Here, examples of In-Ga-Zn-O-based metal oxides include for example, a metal oxide having a composition ratio of In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:1 [mole ratio], a metal oxide having a composition ratio of In O 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio], and a metal oxide having a composition ratio of In O 2 O 3 :Ga 2 O 3 :ZnO = 1:1:4 [mole ratio]. Here, it is more preferable that m is a non-natural number. Note that the above composition is derived from the crystal structure and is only an example. For example, as In-Ga-Zn-O-based metal oxides, a metal oxide having a composition ratio of In O 2 O 3 :Ga 2 O 3 :ZnO = 2:1:8 [mole ratio], a metal oxide having a composition ratio of In 2 O 3 :G a 2 O 3 :ZnO = 3:1:4 [mole ratio], or a metal oxide having a composition ratio of In 2 O 3 :Ga 2 O 3 :ZnO = 2:1:6 [mole ratio] may also be used.

[0034] ​An example of the structure of a crystalline region contained in an oxide semiconductor film having the above structure As, In 2 Ga 2 ZnO 7 The crystal structure of is shown in FIG. 2. In shown in FIG. 2 2 Ga 2 ZnO 7 The crystal structure of is shown using a plan view parallel to the a-axis and b-axis and a cross-sectional view parallel to the c-axis. The c-axis is perpendicular to the a-axis and b-axis, and the angle between the a-axis and b-axis is 120°. FIG 2 shows In shown in FIG Ga 2 Ga 2 ZnO 7 shows site 11 where In atoms can be taken in the plan view, and cross-section The figure shows In atom 12, Ga atom 13, Ga or Zn atom 14, and O atom 15 in the figure.

[0035] As shown in the cross-sectional view of FIG. 2, In 2 Ga 2 ZnO 7 is one layer of Ga oxide layer between In oxide layers, and two layers of oxide layers between In oxide layers, each containing one layer of Ga oxide layer and Zn oxide layer are alternately stacked in the c-axis direction. Also, as shown in the plan view of FIG. 2, In Ga 2 Ga 2 ZnO 7 has a hexagonal crystal structure with three-fold symmetry .

[0036] The oxide semiconductor film including the crystalline region shown in this embodiment preferably exhibits crystallinity above a certain level . Also, the oxide semiconductor film including the crystalline region is different from a single crystal. Thus, the oxide semiconductor film including the crystalline region has better crystallinity compared to an oxide semiconductor film having an amorphous structure as a whole , so it is typified by oxygen defects Defects such as those that can occur and impurities such as hydrogen that bind to dangling bonds are reduced. In particular, oxygen bonded to metal atoms in the crystal has a higher binding force and lower reactivity with impurities such as hydrogen compared to oxygen bonded to metal atoms in the amorphous state, so the generation of defects is reduced. For example, an oxide semiconductor film composed of an In-Ga-Zn-O-based metal oxide and including a crystalline region shows crystallinity such that the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.2 nm or more. Also preferably, the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less is 0.4 nm or more and 0.7 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.45 nm or more and 1.4 nm or less. As described above, it is preferable that the oxide semiconductor film including a crystalline region shown in this embodiment has reduced defects in the film typified by oxygen defects. Defects such as those typified by oxygen defects function as a carrier supply source in the oxide semiconductor film, so the oxide

[0037] For example, an oxide semiconductor film composed of an In-Ga-Zn-O-based metal oxide and including a crystalline region shows crystallinity such that the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.2 nm or more. Also preferably, the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less is 0.4 nm or more and 0.7 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.45 nm or more and 1.4 nm or less. In the measurement of the electron diffraction intensity by irradiating an electron beam from the c-axis direction, the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.2 nm or more. Also preferably, the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less is 0.4 nm or more and 0.7 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.45 nm or more and 1.4 nm or less. The magnitude of the scattering vector is 3.3 nm -1 or more and 4.1 nm -1 or less, and the full width at half maximum at the peak is such that the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is The magnitude of the scattering vector is 5.5 nm -1 or more and 7.1 nm -1 or less, and the full width at half maximum at the peak is 0.2 nm -1 or more, indicating crystallinity such that the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less is The magnitude of the scattering vector is 3.3 nm -1 or more and 4.1 nm -1 or less, and the full width at half maximum at the peak is 0.4 nm -1 or more and 0.7 nm -1 or less, and the magnitude of the scattering vector is 5.5 nm -1 or more and 7.1 nm - 1 or less, and the full width at half maximum at the peak is 0.45 nm -1 or more and 1.4 nm -1 or less, indicating crystallinity such that the full width at half maximum at peaks where the magnitude of the scattering vector is 3.3 nm or more and 4.1 nm or less is 0.4 nm or more and 0.7 nm or less, and the full width at half maximum at peaks where the magnitude of the scattering vector is 5.5 nm or more and 7.1 nm or less is 0.45 nm or more and 1.4 nm or less.

[0038] As described above, the oxide semiconductor film including a crystalline region shown in this embodiment preferably has reduced defects in the film typified by oxygen defects. Defects such as those typified by oxygen defects function as a carrier supply source in the oxide semiconductor film, so the oxide Defects typified by oxygen defects function as a carrier supply source in the oxide semiconductor film, so the oxide Defects such as those typified by oxygen defects function as a carrier supply source in the oxide semiconductor film, so the oxide It may cause fluctuations in the electrical conductivity of the semiconductor film. Therefore, an oxide semiconductor film containing a crystalline region in which these are reduced has a stable electrical conductivity and has a more electrically stable structure against irradiation with visible light, ultraviolet light, etc. By performing ESR (Electron Spin Resonance) measurement on an oxide semiconductor film containing a crystalline region, the amount of isolated electrons in the film can be measured, and thereby the amount of oxygen defects can be estimated. For example, an oxide semiconductor film containing a crystalline region composed of an In-Ga-Zn-O-based metal oxide has a spin density of a peak near g = 1.93 in ESR measurement of 1.3×10 It is smaller than

[0039] Note that (spins / cm ), preferably 5×10 (spins / cm ), more preferably 5× 18 (spins / cm 3 ), and even more preferably 1×10 ), and even more preferably 1×10 17 (spins / cm 3 ). 10 16 (spins / cm 3 ), and even more preferably 1×10 16 (spins / cm 3 .

[0040] As described above, it is preferable that impurities containing hydrogen such as hydrogen, water, hydroxyl groups, or hydrides in the oxide semiconductor film containing a crystalline region are reduced, and the hydrogen concentration in the oxide semiconductor film containing a crystalline region is 1×10 atoms / cm or less. Hydrogen-containing impurities such as hydrogen bonded to dangling bonds, water, hydroxyl groups, or hydrides function as a carrier supply source in the oxide semiconductor film. 19 Therefore, 3 it is preferable that it is as described above. It can cause fluctuations in the electrical conductivity of the oxide semiconductor film. Also, the hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water, and defects are formed in the lattice (or the part where oxygen has desorbed) where oxygen has desorbed. Therefore, an oxide semiconductor film containing a crystalline region with these reduced has a stable electrical conductivity and has a more electrically stable structure against irradiation with visible light, ultraviolet light, etc. The hydrogen contained reacts with the oxygen bonded to the metal atoms to form water, and at the same time, defects are formed in the lattice (or the part where oxygen has desorbed) where oxygen has desorbed. Therefore, these are reduced, and the oxide semiconductor film containing a crystalline region has a stable electrical conductivity. It has a stable electrical conductivity and has a more electrically stable structure against irradiation with visible light, ultraviolet light, etc.

[0041] Also, it is preferable that impurities such as alkali metals in the oxide semiconductor film containing a crystalline region are reduced. For example, in an oxide semiconductor film containing a crystalline region, the concentration of lithium is 5 × 10 cm 15 cm -3 or less, preferably 1 × 10 15 cm -3 or less, the concentration of sodium is 5 × 10 16 cm -3 or less, preferably 1 × 10 16 cm -3 or less, more preferably 1 × 10 cm 15 cm -3 or less, the concentration of potassium is 5 × 10 15 cm -3 or less and preferably 1 × 10 15 cm -3 or less.

[0042] Alkali metals and alkaline earth metals are harmful impurities to the oxide semiconductor containing a crystalline region, and the less the better. In particular, when using the oxide semiconductor film in a transistor, sodium among the alkali metals diffuses into the insulating film in contact with the oxide semiconductor film containing a crystalline region and can supply carriers. Also, an acid containing a crystalline region The oxide semiconductor film contacts the insulating film and can supply carriers. Also, an acid containing a crystalline region In an oxide semiconductor film, the bond between a metal and oxygen is broken or interrupted during the bonding. As a result, it causes deterioration of transistor characteristics (for example, non-normal ionization (shift of the threshold value to the negative side), decrease in mobility, etc.). In addition, it also causes variations in characteristics.

[0043] Such problems become particularly prominent when the concentration of hydrogen in the oxide semiconductor film including a crystalline region is extremely low. Therefore, when the concentration of hydrogen in the oxide semiconductor film including a crystalline region is 5×10 cm or less, especially 5×10 19 cm -3 or less, 18 cm -3 in this case, it is strongly required to set the concentration of the alkali metal to the above value. Therefore, it is preferable to extremely reduce the impurities in the oxide semiconductor film including a crystalline region and make the concentration of the alkali metal 5× 10 atoms / cm or less and the concentration of hydrogen 5×10 16 atoms / cm 3 or less. 19 atoms / cm 3 as follows. As described above, since the oxide semiconductor film including a crystalline region has better crystallinity compared to an oxide semiconductor film having an entirely amorphous structure, impurities such as hydrogen bonded to defects typified by oxygen defects and dangling bonds are reduced. These defects typified by oxygen defects and hydrogen bonded to dangling bonds and the like can function as a carrier supply source in the oxide semiconductor film, which may cause fluctuations in the electrical conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including a crystalline region in which these are reduced has a stable electrical conductivity and is also resistant to irradiation with visible light, ultraviolet light, etc.

[0044] As described above, since the oxide semiconductor film including a crystalline region has better crystallinity compared to an oxide semiconductor film having an entirely amorphous structure, defects such as oxygen defects and impurities such as hydrogen bonded to dangling bonds are reduced. These defects and impurities can function as a carrier supply source in the oxide semiconductor film, which may cause fluctuations in the electrical conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including a crystalline region in which these are reduced has a stable electrical conductivity and is also resistant to irradiation with visible light, ultraviolet light, etc. As represented by these oxygen defects, defects and hydrogen bonded to dangling bonds and the like function as a carrier supply source in the oxide semiconductor film, which may cause fluctuations in the electrical conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including a crystalline region in which these are reduced has a stable electrical conductivity and is also resistant to irradiation with visible light, ultraviolet light, etc. As a result, the oxide semiconductor film including a crystalline region in which these are reduced has a stable electrical conductivity and is also resistant to irradiation with visible light, ultraviolet light, etc. As described above, the oxide semiconductor film including a crystalline region has a stable electrical conductivity and is also resistant to irradiation with visible light, ultraviolet light, etc. has an electrically stable structure. By using an oxide semiconductor film including such a crystalline region in a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

[0045] Next, the results of examining how oxygen defects in the oxide semiconductor film affect the electrical conductivity of the oxide semiconductor film using first-principles calculations based on density functional theory will be described. For the following first-principles calculations, the first-principles calculation software “CASTEP” manufactured by Accelrys was used. Also, the generalized gradient approximation (GGA)-Perdew–Burke–Ernzerhof (PBE) functional was used, and the ultrasoft pseudopotential was used.

[0046] In this calculation, as a model of the oxide semiconductor film, a model in which one oxygen atom was removed from amorphous InGaZnO to leave a vacancy (oxygen defect) at that site was created and the calculation was performed. The number of atoms in the model was 12 In, 12 Ga, 12 Zn, and 47 O. Structural optimization regarding the atomic arrangement was performed on InGaZnO having such a structure, and the electronic density of states was calculated. At this time, the cutoff energy was set to 300 eV. 4 4

[0047] The results of the electronic density of states calculation are shown in FIG. 3. In FIG. 3, the vertical axis represents the density of states (DOS) [states / eV], the horizontal axis represents the energy [eV], and the origin of the energy shown on the horizontal axis indicates the Fermi energy. As shown in FIG. 3, the upper end of the valence band of InGaZnO is -0.74 eV, and the lower end of the conduction band is 0.56 4 It is in eV. The value of the band gap is InGaZnO 4 compared with the experimental value of 3.15 eV of is very small, but in the first-principles calculation based on the density functional theory, it is well known that the band gap becomes smaller than the experimental value, which does not necessarily mean that this calculation is inappropriate. It doesn't mean that.

[0048] From Figure 3, it can be seen that amorphous InGaZnO with oxygen defects 4 has deep levels within the band gap. That is, in the band structure of the amorphous oxide semiconductor with oxygen defects, it is speculated that the trap levels caused by oxygen defects are represented as deep levels within the band gap.

[0049] Based on the above considerations, the band diagram of the amorphous oxide semiconductor with oxygen defects is shown in Figure 4. In Figure 4, the energy is on the vertical axis and the DOS is on the horizontal axis. The energy gap from the energy level Ev at the upper end of the valence band (VB: Valence Band) to the energy level Ec at the lower end of the conduction band (CB: Conduction Band) is set to 3.15 eV based on the experimental value.

[0050] In the band diagram shown in Figure 4, the tail states due to the amorphous nature of the oxide semiconductor are represented near the lower end of the conduction band. Furthermore, a hydrogen donor level is assumed at a shallow energy level approximately 0.1 eV lower than the lower end of the conduction band, which is caused by hydrogen bonded to dangling bonds etc. within the amorphous oxide semiconductor. And at a deep energy level approximately 1.8 eV lower than the lower end of the conduction band, there is oxygen within the above-mentioned amorphous oxide semiconductor. ​​​​​​​​​​​​It represents trap levels caused by defects. Note that the energy level values of trap levels caused by oxygen defects will be described in detail in the examples below. The energy level values will be described in detail in the examples below.

[0051] Furthermore, based on the above considerations, for the case of an amorphous oxide semiconductor having such energy levels, particularly deep trap levels caused by oxygen defects, in the band gap, the recombination models of electrons and holes in the band structure are shown in FIGS. 5(A) and 5(B). For the case of an amorphous oxide semiconductor having such energy levels, particularly deep trap levels caused by oxygen defects, in the band gap. The recombination models of electrons and holes in the band structure are shown in FIGS. 5(A) and 5(B).

[0052] The recombination model shown in FIG. 5(A) is a recombination model when there are a sufficient number of holes in the valence band and a sufficient number of electrons in the conduction band. When the amorphous oxide semiconductor film is exposed to a light irradiation environment and a sufficient number of electron-hole pairs are generated, the band structure of the oxide semiconductor is represented by the recombination model as shown in FIG. 5(A). In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects. When the amorphous oxide semiconductor film is exposed to a light irradiation environment and a sufficient number of electron-hole pairs are generated, the band structure of the oxide semiconductor is represented by the recombination model as shown in FIG. 5(A). In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects. When the amorphous oxide semiconductor film is exposed to a light irradiation environment and a sufficient number of electron-hole pairs are generated, the band structure of the oxide semiconductor is represented by the recombination model as shown in FIG. 5(A). In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects. When the amorphous oxide semiconductor film is exposed to a light irradiation environment and a sufficient number of electron-hole pairs are generated, the band structure of the oxide semiconductor is represented by the recombination model as shown in FIG. 5(A). In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects. In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects. In this recombination model, holes are generated not only at the upper end of the valence band but also at the deep trap levels caused by oxygen defects.

[0053] In the recombination model shown in FIG. 5(A), it is assumed that two types of recombination processes occur in parallel. One recombination process is an interband recombination called the recombination of electrons in the conduction band with holes in the valence band. And the other recombination process is the recombination of electrons in the conduction band with holes at the trap levels caused by oxygen defects. Here, since the interband recombination is more frequent than the recombination at the trap levels caused by oxygen defects, when the number of holes in the valence band becomes sufficiently small, the interband recombination ends first. As a result, the recombination model shown in FIG. 5(A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. In the recombination model shown in FIG. 5(A), it is assumed that two types of recombination processes occur in parallel. One recombination process is an interband recombination called the recombination of electrons in the conduction band with holes in the valence band. And the other recombination process is the recombination of electrons in the conduction band with holes at the trap levels caused by oxygen defects. Here, since the interband recombination is more frequent than the recombination at the trap levels caused by oxygen defects, when the number of holes in the valence band becomes sufficiently small, the interband recombination ends first. As a result, the recombination model shown in FIG. 5(A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. And the other recombination process is the recombination of electrons in the conduction band with holes at the trap levels caused by oxygen defects. Here, since the interband recombination is more frequent than the recombination at the trap levels caused by oxygen defects, when the number of holes in the valence band becomes sufficiently small, the interband recombination ends first. As a result, the recombination model shown in FIG. 5(A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. Here, since the interband recombination is more frequent than the recombination at the trap levels caused by oxygen defects, when the number of holes in the valence band becomes sufficiently small, the interband recombination ends first. As a result, the recombination model shown in FIG. 5(A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. Here, since the interband recombination is more frequent than the recombination at the trap levels caused by oxygen defects, when the number of holes in the valence band becomes sufficiently small, the interband recombination ends first. As a result, the recombination model shown in FIG. 5(A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. (A) is that electrons at the lower end of the conduction band recombine with holes at the trap levels caused by oxygen defects. It only proceeds to the recombination process that recombines with the holes and shifts to the recombination model shown in Fig. 5(B).

[0054] In addition, in order to have a sufficient number of holes in the valence band and a sufficient number of electrons in the conduction band, the oxide semiconductor may be irradiated with sufficient light, and then the light irradiation may be stopped. By doing so, recombination of electrons and holes occurs as in the recombination model shown in Fig. 5(A). The time (relaxation time) required for the current (also called photocurrent) flowing through the oxide semiconductor at this time to decay is shorter when compared with the relaxation time of the photocurrent in the recombination model shown in Fig. 5(B). For details of these, refer to the examples described later. The time (relaxation time) required for the current (also called photocurrent) flowing through the oxide semiconductor at this time to decay is shorter when compared with the relaxation time of the photocurrent in the recombination model shown in Fig. 5(B). For details of these, refer to the examples described later. The time (relaxation time) required for the current (also called photocurrent) flowing through the oxide semiconductor at this time to decay is shorter when compared with the relaxation time of the photocurrent in the recombination model shown in Fig. 5(B). For details of these, refer to the examples described later. For details of these, refer to the examples described later.

[0055] Next, the recombination model shown in Fig. 5(B) is a recombination model after the recombination model shown in Fig. 5(A) proceeds and the number of holes in the valence band is sufficiently reduced. In the recombination model shown in Fig. 5(B), since the recombination process is almost only recombination at the trap levels caused by oxygen defects, the number of electrons in the conduction band decreases gradually compared with the recombination model shown in Fig. 5(A). Of course, during the recombination process, the electrons present in the conduction band contribute to the electrical conduction in the oxide semiconductor film. As a result, compared with the recombination model shown in Fig. 5(A), where the interband recombination is the main recombination process, the recombination model shown in Fig. 5(B) has a longer relaxation time of the photocurrent. Of course, during the recombination process, the electrons present in the conduction band contribute to the electrical conduction in the oxide semiconductor film. As a result, compared with the recombination model shown in Fig. 5(A), where the interband recombination is the main recombination process, the recombination model shown in Fig. 5(B) has a longer relaxation time of the photocurrent. As a result, compared with the recombination model shown in Fig. 5(A), where the interband recombination is the main recombination process, the recombination model shown in Fig. 5(B) has a longer relaxation time of the photocurrent. For details of these, refer to the examples described later.

[0056] Thus, the amorphous oxide semiconductor having deep trap levels caused by oxygen defects has two types of recombination models of electron-hole pairs in the band structure, and the relaxation time of the photocurrent Thus, the amorphous oxide semiconductor having deep trap levels caused by oxygen defects has two types of recombination models of electron-hole pairs in the band structure, and the relaxation time of the photocurrent It can also be divided into two types. Here, in particular, the light in the recombination model shown in Fig. 5(B) The delay in the relaxation of the photocurrent is caused by the formation of fixed charges in the oxide semiconductor film or at its interface when a negative bias is applied to the gate electrode under light irradiation using the oxide semiconductor film in a transistor or the like. This can be a cause. In this way, it is considered that oxygen defects in the oxide semiconductor film have an adverse effect on the electrical conductivity of the oxide semiconductor film. However, the oxide semiconductor film including a crystalline region according to one aspect of the present invention has better crystallinity than an oxide semiconductor film having an amorphous structure as a whole. Therefore, defects such as oxygen defects are reduced. Thus, the oxide semiconductor film including a crystalline region according to one aspect of the present invention has a stable electrical conductivity and has a more electrically stable structure against irradiation with visible light, ultraviolet light, or the like. By using such an oxide semiconductor film including a crystalline region in a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

[0057]

[0058] As described above, the configurations shown in the present embodiment can be appropriately combined with the configurations, methods, etc. shown in other embodiments and used.

[0059] (Embodiment 2) In the present embodiment, a transistor using the oxide semiconductor film including a crystalline region shown in Embodiment 1 and a method for manufacturing the transistor will be described with reference to FIGS. 6 to 10. FIG. 6 is a cross-sectional view showing a manufacturing process of a transistor 120 having a top gate structure, which is one form of the configuration of a semiconductor device.

[0060] ​​​​​​​​​​​​First, before forming an oxide semiconductor film including a crystalline region, as shown in FIG. 6(A), it is preferable to form an underlying insulating film 53 on a substrate 51.

[0061] The substrate 51 must have at least heat resistance enough to withstand subsequent heat treatment. When using a glass substrate as the substrate 51, it is preferable to use one having a strain point of 730°C or higher. For the glass substrate, for example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and barium borosilicate glass are used. Note that it is preferable to use a glass substrate containing more BaO than B 2 O 3 When the substrate 51 is mother glass, the size of the substrate is the first generation (320 mm × 400 mm), the second generation (400 mm × 500 mm), the third generation (550 mm × 650 mm), the fourth generation (680 mm × 880 m m, or 730 mm × 920 mm), the fifth generation (1000 mm × 1200 mm or 1 100 mm × 1250 mm), the sixth generation (1500 mm × 1800 mm), the seventh generation (1 900 mm × 2200 mm), the eighth generation (2160 mm × 2460 mm), the ninth generation (2 400 mm × 2800 mm, or 2450 mm × 3050 mm), the tenth generation (295 0 mm × 3400 mm), etc. can be used. Since mother glass significantly shrinks when the processing temperature is high and the processing time is long, when mass production is performed using mother glass, the heat treatment in the manufacturing process is desirably 600°C or lower, preferably 450°C or lower. Note that instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. In addition, crystallized glass or the like can be used. Since it significantly shrinks when the processing temperature is high and the processing time is long, when performing mass production using mother glass, the heat treatment in the manufacturing process is desirably 600°C or lower, preferably 450°C or lower. Note that instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. In addition, crystallized glass or the like can be used.

[0062] Note that instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. In addition, crystallized glass or the like can be used. Other than that, crystallized glass or the like can be used. Furthermore, a structure in which an insulating layer is formed on the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can also be used. The underlying insulating film 53 is preferably formed using an oxide insulating film that releases a part of oxygen upon heating.

[0063] As the oxide insulating film that releases a part of oxygen upon heating, it is preferable to use an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric ratio. By using an oxide insulating film that releases a part of oxygen upon heating for the underlying insulating film 53, oxygen can be diffused into the oxide semiconductor film in a subsequent heat treatment step. Typical examples of the oxide insulating film that releases a part of oxygen upon heating include silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide, hafnium oxide, yttrium oxide, and the like. Furthermore, a structure in which an insulating layer is formed on the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can also be used. The underlying insulating film 53 is preferably formed using an oxide insulating film that releases a part of oxygen upon heating. As the oxide insulating film that releases a part of oxygen upon heating, it is preferable to use an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric ratio. By using an oxide insulating film that releases a part of oxygen upon heating for the underlying insulating film 53, oxygen can be diffused into the oxide semiconductor film in a subsequent heat treatment step. Typical examples of the oxide insulating film that releases a part of oxygen upon heating include silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide, hafnium oxide, yttrium oxide, and the like. Furthermore, a structure in which an insulating layer is formed on the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can also be used. The underlying insulating film 53 is preferably formed using an oxide insulating film that releases a part of oxygen upon heating.

[0064] The underlying insulating film 53 has a thickness of 50 nm or more, preferably 200 nm or more and 500 nm or less. By increasing the thickness of the underlying insulating film 53, the amount of oxygen released from the underlying insulating film 53 can be increased, and the defects at the interface between the underlying insulating film 53 and the subsequently formed oxide semiconductor film can be reduced due to the increase. Furthermore, a structure in which an insulating layer is formed on the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can also be used. The underlying insulating film 53 has a thickness of 50 nm or more, preferably 200 nm or more and 500 nm or less.

[0065] The underlying insulating film 53 is formed by a sputtering method, a CVD method, or the like. In addition, an oxide insulating film that releases a part of oxygen upon heating can be easily formed by using a sputtering method. When forming an oxide insulating film that releases a part of oxygen upon heating by a sputtering method, it is preferable that the amount of oxygen in the film-forming gas is high, and oxygen, or oxygen and a rare gas Furthermore, a structure in which an insulating layer is formed on the surface of a semiconductor substrate such as a silicon wafer or a conductive substrate made of a metal material can also be used. When forming an oxide insulating film that releases a part of oxygen upon heating by a sputtering method, it is preferable that the amount of oxygen in the film-forming gas is high, and oxygen, or oxygen and a rare gas A mixed gas such as Ar can be used. Typically, it is preferable that the oxygen concentration in the film-forming gas is 6% or more and 1 00% or less.

[0066] Further, the underlying insulating film 53 does not necessarily have to be formed using an oxide insulating film that releases a part of oxygen by heating, and silicon nitride, silicon oxynitride, aluminum nitride, etc. can be used to form a nitride insulating film. Also, the underlying insulating film 53 may have a laminated structure of the above oxide insulating film and nitride insulating film. In that case, it is preferable to provide an oxide insulating film on the nitride insulating film . By using a nitride insulating film as the underlying insulating film 53, when using a glass substrate containing impurities such as alkali metals, invasion of alkali metals and the like into the oxide semiconductor film can be prevented . Alkali metals such as lithium, sodium, and potassium are malignant impurities with respect to the oxide semiconductor, so it is preferable to reduce the content in the oxide semiconductor film . The nitride insulating film can be formed by a CVD method, a sputtering method, or the like .

[0067] Next, as shown in FIG. 6(B), an oxide semiconductor film 55 having a region with crystallinity and a thickness of 30 nm or more and 50 μm or less is formed on the underlying insulating film 53 by a sputtering method using a sputtering apparatus .

[0068] Here, the processing chamber of the sputtering apparatus will be described with reference to FIG. 7(A). An exhaust means 33 and a gas supply means 35 are connected to the processing chamber 31. Also, a substrate support 40 and a target 41 are provided in the processing chamber 31. The target 41 is connected to a power supply device 37 .

[0069] The processing chamber 31 is connected to GND. In addition, the leak rate of the processing chamber 31 is set to 1×10 -10 Pa·m 3 / sec or less, impurities in the film formed by sputtering are reduced. It is possible to reduce the contamination.

[0070] To reduce the leak rate, it is necessary to reduce not only external leaks but also internal leaks. An external leak is when gas enters the vacuum system from outside due to a small hole or poor seal. Internal leaks are leaks from partitions such as valves in the vacuum system or from internal components. The leak rate is 1×10 -10 Pa·m 3 / sec or less It is necessary to take measures against both external and internal leaks.

[0071] To reduce external leakage, it is advisable to seal the opening and closing parts of the processing chamber with metal gaskets. Metal gaskets are coated with iron fluoride, aluminum oxide, or chromium oxide. Metal gaskets have a higher adhesion than O-rings and are more durable. It can reduce leakage current. It also has passivation properties such as iron fluoride, aluminum oxide, and chromium oxide. By using a metal material coated with fluorine, the gas released from the metal gasket, including hydrogen, is reduced. This suppresses the generation of noise and reduces internal leakage.

[0072] The material constituting the inner wall of the processing chamber 31 is aluminum, which emits less gas including hydrogen. Chromium, titanium, zirconium, nickel or vanadium is used. Also, the above materials The alloy material containing iron, chromium, nickel, etc. may be coated with the material. Alloy materials containing nickel and the like are rigid, heat-resistant, and suitable for processing. Here , if the surface unevenness of the member is reduced by polishing or the like to reduce the surface area, the released gas can be reduced. Alternatively, the members of the sputtering apparatus described above may be coated with a passivation film of iron fluoride, aluminum oxide, chromium oxide, or the like.

[0073] The members provided inside the processing chamber 31 are preferably composed of only metal materials as much as possible. For example, when installing a viewing window made of quartz or the like, the surface should be thinly coated with a passivation film of iron fluoride, aluminum oxide, chromium oxide, or the like to suppress the released gas.

[0074] Furthermore, it is preferable to provide a sputter gas purifier immediately before introducing the sputter gas into the processing chamber 31. At this time, the length of the pipe from the purifier to the processing chamber is 5 m or less, preferably 1 m or less. By setting the length of the pipe to 5 m or less or 1 m or less, the influence of the released gas from the pipe can be reduced according to the length.

[0075] From the cylinder to the processing chamber 31, it is preferable to use a metal pipe whose inside is coated with a passivation film of iron fluoride, aluminum oxide, chromium oxide, or the like for the pipe through which the sputter gas flows. The above-mentioned pipe, for example, compared with SUS316L-EP pipe, has less emission of hydrogen-containing gas and can reduce the mixing of impurities into the film-forming gas. Also, for the pipe joints, it is advisable to use a high-performance ultra-small metal gasket joint (UPG joint). Also, by constructing all the materials of the pipe with metal materials, compared with the case of using resin or the like, the influence of the generated released gas and external leakage can be reduced, which is preferable.

[0076] The exhaust of the processing chamber 31 is performed by a roughing pump such as a dry pump, a sputter ion pump, a thump pump, etc. It is recommended to use a suitable combination of a high vacuum pump such as a boro-molecular pump or a cryopump. While turbomolecular pumps are excellent at pumping large molecules, they have poor pumping capabilities for hydrogen and water. Therefore, we developed a cryopump with high pumping capacity for water and a sputtering pump with high pumping capacity for hydrogen. Combining it with a water pump is effective.

[0077] The adsorbates present inside the processing chamber 31 are adsorbed to the inner wall and therefore do not affect the pressure in the processing chamber. However, it can cause gas emissions when the processing chamber is evacuated. Although there is no correlation with the speed, using a pump with high exhaust capacity will remove the adsorbed matter in the treatment chamber. It is important to desorb as much as possible and evacuate the air beforehand. The treatment chamber may be baked. Baking increases the desorption rate of adsorbed substances by about 10 times. Baking can be performed at a temperature between 100°C and 450°C. By introducing an inert gas while removing adsorbed matter, water and other substances that are difficult to remove by exhaust alone can be removed. The desorption rate can be further increased.

[0078] The exhaust means 33 exhausts impurities from the processing chamber 31 and controls the pressure in the processing chamber 31. It is preferable that the exhaust means 33 is an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. By using the adsorption type vacuum pump, the amount of hydrogen contained in the oxide semiconductor film can be reduced. It can be reduced.

[0079] Note that hydrogen contained in the oxide semiconductor film can be a hydrogen molecule, water, a hydroxyl group, or the like in addition to a hydrogen atom. It may also be included as a hydride.

[0080] The gas supply means 35 is means for supplying a gas for sputtering a target into the processing chamber 31. The gas supply means 35 is composed of a cylinder filled with gas, a pressure regulating valve, a stop valve, a mass flow controller, etc. By providing a purifier in the gas supply means 35, it is possible to reduce the impurities contained in the gas introduced into the processing chamber 31. As the gas for sputtering the target, inert gases such as helium, neon, argon, krypton, and xenon are used. Alternatively, a mixed gas of one of the above inert gases and oxygen can be used.

[0081] The power supply device 37 can appropriately use an RF power supply device, an AC power supply device, a DC power supply device, etc. Although not shown, if a magnet is provided inside or outside the target support for supporting the target, high-density plasma can be confined around the target, the film formation speed can be improved, and plasma damage to the substrate can be reduced. This method is called the magnetron sputtering method. Furthermore, in the magnetron sputtering method, if the magnet is made rotatable, the deviation of the magnetic field can be reduced, so the utilization efficiency of the target is increased, and the variation in film quality within the plane of the substrate can be reduced.

[0082] The substrate support 40 is connected to GND. A heater is provided on the substrate support 40. As the heater, a device that heats the object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element can be used.

[0083] As the target 41, it is preferable to use a metal oxide target containing zinc. Typical examples of the target 41 include In-Sn-Ga-Zn-O, which is a quaternary metal oxide system metal oxide, and In-Ga-Zn-O system metal oxide, In-S n-Zn-O system metal oxide, In-Al-Zn-O system metal oxide, Sn-Ga-Zn-O system metal oxide, Al-Ga-Zn-O system metal oxide, Sn-Al-Zn-O system metal oxide and In-Zn-O system metal oxide, Sn-Zn-O system metal oxide, which are binary metal oxides and the like can be used as the target.

[0084] As an example of the target 41, a metal oxide target containing In, Ga, and Zn is In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:1 [mole ratio]. Also, I n 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] target or In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:4 [mole ratio] target, In 2 O 3 :Ga 2 O 3 :ZnO = 2:1:8 [mole ratio] target can also be used.

[0085] Note that the distance between the target 41 and the substrate 51 (T-S distance) is preferably set to a distance that allows atoms with a smaller atomic weight to preferably reach the underlying insulating film 53 on the substrate 51. .

[0086] As shown in FIG. 7(A), a substrate 51 on which an underlying insulating film 53 is formed is placed on a substrate support 40. , and it is installed in the processing chamber 31 of the sputtering apparatus. Next, a gas for sputtering the target 41 is introduced from the gas supply means 35 into the processing chamber 3 1. The purity of the target 41 is 9 9.9% or more, preferably 99.99% or more. Next, power is supplied to the power supply device 37 connected to the target 41. As a result, ions 43 and electrons of the sputtering gas introduced from the gas supply means 35 into the processing chamber 31 sputter the target 41.

[0087] Here, by setting the distance between the target 41 and the substrate 51 to a distance that allows atoms with a smaller atomic weight to preferentially reach and deposit on the underlying insulating film 53 on the substrate 5 1, as shown in FIG. 7( B), among the atoms contained in the target 41, atoms 45 with a smaller atomic weight can move preferentially to the substrate side over atoms 47 with a larger atomic weight.

[0088] In the target 41, zinc has a smaller atomic weight than indium and the like. Therefore, zinc is preferentially deposited on the underlying insulating film 53. Also, since the atmosphere during film formation contains oxygen and the substrate support 40 is provided with a heater for heating the substrate and the deposited film during film formation, the zinc deposited on the underlying insulating film 53 is oxidized, and a seed crystal 55a having a crystal containing zinc with a hexagonal crystal structure , typically a seed crystal having zinc oxide with a hexagonal crystal structure, is formed. When the target 41 contains atoms with a smaller atomic weight than zinc such as aluminum, atoms with a smaller atomic weight than zinc such as aluminum are also preferentially deposited on the underlying insulating film 53 together with zinc. ​​​​​

[0089] The seed crystal 55a has a bond having a hexagonal lattice on the a-b plane, and the a-b plane is substantially parallel to the film surface and includes zinc having a wurtzite structure of a hexagonal crystal in which the c-axis is substantially perpendicular to the film surface and has a crystal. Here, regarding the crystal including zinc having a hexagonal crystal structure having a bond having a hexagonal lattice on the a-b plane, the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface, which will be described with reference to FIG. 8. Here, as a representative example of the crystal including zinc having a hexagonal crystal structure zinc oxide is used for the description, and black circles indicate zinc and white circles indicate oxygen. FIG. 8(A) is a schematic diagram of zinc oxide having a hexagonal crystal structure on the a-b plane and FIG. 8(B) is a schematic diagram of zinc oxide having a hexagonal crystal structure with the longitudinal direction of the paper surface as the c-axis direction . As shown in FIG. 8(A), on the upper plane on the a-b plane, zinc and oxygen are bonded to form a hexagon. Further, as shown in FIG. 8(B) layers having a bond having a hexagonal lattice formed by zinc and oxygen are stacked, and the c-axis direction is perpendicular to the a-b plane. The seed crystal 55a has one atomic layer or more of a layer having a bond having a hexagonal lattice on the a-b plane in the c-axis direction . Subsequently, by sputtering the target 41 with a sputtering gas, the atoms contained in the target are deposited on the seed crystal 55a. At this time, since crystal growth occurs with the seed crystal 55a as a nucleus, an oxide semiconductor

[0090] film 55b including a region having crystallinity of a hexagonal crystal structure can be formed on the seed crystal 55a. Note that since the substrate 51 is heated by a heater provided on the substrate support 40, crystal growth occurs with the seed crystal 55a as a nucleus and the atoms deposited on the surface to be oxidized .

[0091] ​​​The oxide semiconductor film 55b is nucleated with the seed crystal 55a, and the heavy atoms in terms of atomic weight on the surface of the target 41 and the light atoms in terms of atomic weight sputtered after the formation of the seed crystal 55a are oxidized while crystal growth occurs. Thus, similar to the seed crystal 55a, it has bonds with a hexagonal lattice on the a-b plane, and includes a region having a crystalline property of a hexagonal crystal structure in which the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface. That is, the oxide semiconductor film 55 composed of the seed crystal 55a and the oxide semiconductor film 55 b has bonds with a hexagonal lattice on the a-b plane substantially parallel to the surface of the underlying insulating film 53, and includes a region having a crystalline property of a hexagonal crystal structure in which the c-axis is substantially perpendicular to the film surface. That is, the region having the crystalline property of the hexagonal crystal structure included in the oxide semiconductor film 55 is c-axis oriented. In FIG. 6(B), the interface between the seed crystal 55a and the oxide semiconductor film 55 b is shown by a dotted line and is described as a laminate of the oxide semiconductor films, but there is actually no distinct interface, and it is illustrated only for the sake of easy understanding. At this time, the heating temperature of the substrate by the heater is greater than 200°C and 400°C or less, preferably 250°C or more and 350°C or less. By forming the film while heating the substrate to a temperature greater than 200°C and 400°C or less, preferably 25 0°C or more and 350°C or less, a heat treatment is performed simultaneously with the film formation, so that an oxide semiconductor film including a region having good crystallinity can be formed.

[0092] Note that the temperature of the film formation surface during sputtering is 250°C or more and below the upper limit temperature of the heat treatment of the substrate. Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen

[0093] That is, the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Appropriately use the mixed gas. Further, for the sputtering gas, it is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed. By setting the pressure in the processing chamber having the substrate support 40 and the target 41 to 0.4 Pa or less, the incorporation of impurities such as alkali metals and hydrogen into the surface and the film of the oxide semiconductor film including the crystalline region can be reduced.

[0094] Moreover, by setting the pressure in the processing chamber having the substrate support 40 and the target 41 to 0.4 Pa or less, the incorporation of impurities such as alkali metals and hydrogen into the surface and the film of the oxide semiconductor film including the crystalline region can be reduced. Moreover, by setting the pressure in the processing chamber having the substrate support 40 and the target 41 to 0.4 Pa or less, the incorporation of impurities such as alkali metals and hydrogen into the surface and the film of the oxide semiconductor film including the crystalline region can be reduced. Furthermore, by setting the leak rate of the processing chamber of the sputtering apparatus to 1×10

[0095] Pa·m -10 / second or less, the incorporation of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the oxide semiconductor film including the crystalline region during film formation by the sputtering method can be reduced. Also, by using an adsorption-type vacuum pump as the exhaust system, the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides from the exhaust system can be reduced. 3 / second or less, the incorporation of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the oxide semiconductor film including the crystalline region during film formation by the sputtering method can be reduced. Also, by using an adsorption-type vacuum pump as the exhaust system, the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides from the exhaust system can be reduced. Furthermore, by setting the leak rate of the processing chamber of the sputtering apparatus to 1×10 Pa·m / second or less, the incorporation of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the oxide semiconductor film including the crystalline region during film formation by the sputtering method can be reduced. Also, by using an adsorption-type vacuum pump as the exhaust system, the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides from the exhaust system can be reduced. Furthermore, by setting the leak rate of the processing chamber of the sputtering apparatus to 1×10 Pa·m

[0096] / second or less, the incorporation of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the oxide semiconductor film including the crystalline region during film formation by the sputtering method can be reduced. Also, by using an adsorption-type vacuum pump as the exhaust system, the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides from the exhaust system can be reduced. Moreover, by setting the purity of the target 41 to 99.99% or more, the incorporation of alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the oxide semiconductor film including the crystalline region can be reduced. Also, by using the target, in the oxide semiconductor film 55, the concentration of lithium is 5×10 cm or less, preferably 1×10 15 cm -3 or less, preferably 1×10 15 cm -3 or less, preferably 1×10 cm 16 or less, preferably 1×10 -3 cm 16 or less, preferably 1×10 -3 cm or less, more preferably 1×10 15 cm-3 Hereinafter, the concentration of potassium is 5×10 15 cm -3 Hereinafter, preferably 1×10 15 cm -3 It can be made to be the following.

[0097] In the above-described film formation method, in the same sputtering process, the atoms contained in the target are utilized based on the difference in the amount, and zinc with a small atomic weight is preferentially deposited on the oxide insulating film to form a seed crystal while, on the seed crystal, indium or the like with a large atomic weight is deposited while being crystallized and grown Therefore, an oxide semiconductor film including a crystalline region can be formed without going through a plurality of steps. It is possible.

[0098] In the above-described method for forming the oxide semiconductor film 55, by film formation using the sputtering method, the seed crystal 55a and the oxide semiconductor film 55b were crystallized while being formed in a batch, but the oxide semiconductor film according to the present embodiment does not necessarily need to be formed in this way. For example, the formation and crystallization of the seed crystal and the oxide semiconductor film may be performed separately.

[0099] Hereinafter, with reference to FIG. 9, a method of separately performing the formation and crystallization of the seed crystal and the oxide semiconductor film will be described. In addition, a method of forming an oxide semiconductor film including a crystalline region as described below may be referred to as a 2step method in this specification. Note that the oxide semiconductor film including a crystalline region shown in the cross-sectional TEM image of FIG. 1 was formed using the 2step method. image of FIG. 1 was formed using the 2step method. formed.

[0100] First, a first oxide semiconductor film having a film thickness of 1 nm or more and 10 nm or less is formed on the underlying insulating film 53. The formation of the first oxide semiconductor film uses the sputtering method, and the sputtering method The substrate temperature during film formation by [method] is preferably 200°C or higher and 400°C or lower. Regarding other film formation conditions, they are the same as those of the above-described method for forming an oxide semiconductor film.

[0101] Next, the chamber atmosphere in which the substrate is placed is made nitrogen or dry air, and a first heat treatment is performed. The temperature of the first heat treatment is 400°C or higher and 750°C or lower. By the first heat treatment, the first oxide semiconductor film is crystallized to form seed crystals 56a (see Fig. 9(A)). )

[0102] Depending on the temperature of the first heat treatment, crystallization occurs from the film surface by the first heat treatment, crystal growth proceeds from the film surface toward the inside, and c-axis oriented crystals are obtained. By the first heat treatment, a large amount of zinc and oxygen gather on the film surface, and a graphene-type two-dimensional crystal composed of zinc and oxygen forming a hexagonal upper plane is formed in one or more layers on the outermost surface, and this grows in the film thickness direction and overlaps and stacks. When the temperature of the heat treatment is increased, crystal growth proceeds from the surface to the inside, and from the inside to the bottom.

[0103] Also, by using an oxide insulating film in which a part of oxygen is released by heating for the underlying insulating film 53, oxygen in the underlying insulating film 53 can be diffused to the interface with the seed crystals 56a or the vicinity thereof (±5 nm from the interface) by the first heat treatment, and the oxygen vacancies of the seed crystals 56a can be reduced.

[0104] Next, a second oxide semiconductor film thicker than 10 nm is formed on the seed crystals 56a. The formation of the second oxide semiconductor film uses a sputtering method, and the substrate temperature during film formation is 2 00°C or higher and 400°C or lower. Regarding other film formation conditions, those of the above-described oxide semiconductor film The film formation method is the same.

[0105] Next, the atmosphere in the chamber in which the substrate is placed is changed to nitrogen or dry air, and a second heating process is performed. The temperature of the second heat treatment is 400° C. or more and 750° C. or less. Thus, the second oxide semiconductor film is crystallized to form an oxide semiconductor film 56b (FIG. 9( The second heat treatment is carried out in a nitrogen atmosphere, an oxygen atmosphere, or a mixture of nitrogen and oxygen. By performing the treatment in an atmosphere, the density of the oxide semiconductor film 56b can be increased and the number of defects can be reduced. By the second heat treatment, crystals grow in the film thickness direction, i.e., from the bottom to the inside, with the seed crystals 56a as nuclei. As a result, the oxide semiconductor film 56b including a region having crystallinity is formed. As a result, an oxide semiconductor film 56 consisting of the seed crystal 56a and the oxide semiconductor film 56b is formed. In FIG. 9B, the interface between the seed crystal 56a and the oxide semiconductor film 56b is indicated by a dotted line. Although it is described as a conductor laminate, there is no clear interface, so it is merely for the sake of clarity. The figures are provided for ease of explanation.

[0106] In addition, the steps from the formation of the base insulating film 53 to the second heat treatment are performed continuously without exposure to the air. The steps from the formation of the base insulating film 53 to the second heat treatment are preferably performed in a water-based manner. An atmosphere that contains almost no oxygen or moisture (inert atmosphere, reduced pressure atmosphere, dry air atmosphere, etc.) For example, the moisture content is controlled to a dew point of -40°C or less, preferably It is preferable to use a dry nitrogen atmosphere with a dew point of -50°C or less.

[0107] In the above-mentioned film formation method, atoms with small atomic weights are preferentially deposited on the oxide insulating film. Even when the substrate temperature during film formation is lower compared to [comparison condition], an oxide semiconductor film including a region having good crystallinity can be formed. In addition, the oxide semiconductor film 56 formed by using the above two-step method also has the same degree of crystallinity as the oxide semiconductor film 55 formed by using a film formation method in which atoms with a small atomic weight are preferentially deposited on the oxide insulating film, and the electrical conductivity is also stable. Therefore, regardless of which method is used to form the oxide semiconductor film, a highly reliable semiconductor device having stable electrical characteristics can be provided. In the following steps, the manufacturing process of the transistor 120 will be described using the oxide semiconductor film 55, but of course, the oxide semiconductor film 56 can also be used in the same manner. By the above steps, an oxide semiconductor film 55 composed of a stack of seed crystals 55a and an oxide semiconductor film 55b can be formed on the underlying insulating film 53. Next, the substrate 51 is heat-treated to release hydrogen from the oxide semiconductor film 55 and at the same time diffuse a part of the oxygen contained in the underlying insulating film 53 into the oxide semiconductor film 55 and the vicinity of the interface between the underlying insulating film 53 and the oxide semiconductor film 55. It is preferable. The heat treatment temperature is preferably a temperature at which hydrogen is released from the oxide semiconductor film 55, a part of the oxygen contained in the underlying insulating film 53 is released, and further diffused into the oxide semiconductor film 55. Typically, it is 150 °C or higher and lower than the strain point of the substrate 51, preferably 250 °C or higher and 450 °C

[0108] or lower. Note that by setting the heat treatment temperature higher than the film formation temperature of the oxide semiconductor film including the region having crystallinity, more oxygen contained in the underlying insulating film 53 can be released. Next, the substrate 51 is heat-treated to release hydrogen from the oxide semiconductor film 55 and at the same time diffuse a part of the oxygen contained in the underlying insulating film 53 into the oxide semiconductor film 55 and the vicinity of the interface between the underlying insulating film 53 and the oxide semiconductor film 55. It is preferable. The heat treatment temperature is preferably a temperature at which hydrogen is released from the oxide semiconductor film 55, a part of the oxygen contained in the underlying insulating film 53 is released, and further diffused into the oxide semiconductor film 55. Typically, it is 150 °C or higher and lower than the strain point of the substrate 51, preferably 250 °C or higher and 450 °C or lower. Note that by setting the heat treatment temperature higher than the film formation temperature of the oxide semiconductor film including the region having crystallinity, more oxygen contained in the underlying insulating film 53 can be released.

[0109] The heat treatment temperature is preferably a temperature at which hydrogen is released from the oxide semiconductor film 55, a part of the oxygen contained in the underlying insulating film 53 is released, and further diffused into the oxide semiconductor film 55. Typically, it is 150 °C or higher and lower than the strain point of the substrate 51, preferably 250 °C or higher and 450 °C or lower. Note that by setting the heat treatment temperature higher than the film formation temperature of the oxide semiconductor film including the region having crystallinity, more oxygen contained in the underlying insulating film 53 can be released. The heat treatment temperature is preferably a temperature at which hydrogen is released from the oxide semiconductor film 55, a part of the oxygen contained in the underlying insulating film 53 is released, and further diffused into the oxide semiconductor film 55. Typically, it is 150 °C or higher and lower than the strain point of the substrate 51, preferably 250 °C or higher and 450 °C or lower. Note that by setting the heat treatment temperature higher than the film formation temperature of the oxide semiconductor film including the region having crystallinity, more oxygen contained in the underlying insulating film 53 can be released. The heat treatment temperature is preferably a temperature at which hydrogen is released from the oxide semiconductor film 55, a part of the oxygen contained in the underlying insulating film 53 is released, and further diffused into the oxide semiconductor film 55. Typically, it is 150 °C or higher and lower than the strain point of the substrate 51, preferably 250 °C or higher and 450 °C or lower. Note that by setting the heat treatment temperature higher than the film formation temperature of the oxide semiconductor film including the region having crystallinity, more oxygen contained in the underlying insulating film 53 can be released.

[0110] The heat treatment is preferably carried out in an inert gas atmosphere, an oxygen atmosphere, a nitrogen atmosphere, a mixed atmosphere of oxygen and nitrogen, etc., which contain almost no hydrogen and moisture. As the inert gas atmosphere it is preferably carried out, typically, in a rare gas atmosphere such as helium, neon, argon, xenon, krypton, etc. Also, the heating time of the heat treatment is set to 1 minute or more and 24 hours or less.

[0111] By this heat treatment, hydrogen is released from the oxide semiconductor film 55, and at the same time, a part of the oxygen contained in the underlying insulating film 5 3 is diffused into the oxide semiconductor film 55, the vicinity of the interface between the underlying insulating film 53 and the oxide semiconductor film 5 5. By this step, oxygen defects contained in the oxide semiconductor film 55 can be reduced. As a result, an oxide semiconductor film including a region having reduced hydrogen concentration and oxygen defects and having crystallinity can be formed. and having crystallinity can be formed.

[0112] Next, as shown in FIG. 6(C), a mask is formed on the oxide semiconductor film 55, and the oxide semiconductor film 55 is selectively etched using the mask to form an oxide semiconductor film 59. After this, the mask is removed.

[0113] The mask for etching the oxide semiconductor film 55 can be fabricated by appropriately using a photolithography process, an inkjet method, a printing method, etc. Also, for the etching of the oxide semiconductor film 55 wet etching or dry etching can be appropriately used.

[0114] Next, as shown in FIG. 6(D), a source electrode 61a and a drain electrode 61b in contact with the oxide semiconductor film 59 are formed.

[0115] ​​The source electrode 61a and the drain electrode 61b are made of aluminum, chromium, copper, tantalum, a metal element selected from titanium, molybdenum, tungsten, manganese, zirconium, an alloy containing the above-mentioned metal element as a component, or an alloy combining the above-mentioned metal elements, etc. and can be formed using them. Also, an alloy film or a nitride film in which a metal element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium is singly or multiply combined with aluminum may be used. Further, the source electrode 61a and the drain electrode 61b may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a copper film is laminated on a Cu-Mg-Al alloy film, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film, a three-layer structure in which a titanium film, an aluminum film is laminated on the titanium film, and a titanium film is further formed thereon, etc.

[0116] In addition, the source electrode 61a and the drain electrode 61b can also be applied with a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide. Also, a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal element can be used.

[0117] ​​​​​​​​The source electrode 61a and the drain electrode 61b are formed by sputtering, CVD, or vapor deposition. After forming a conductive film by a method such as a mask, the conductive film is etched to form a conductive film. The mask formed on the conductive film is applied by printing, inkjet, or photolithography. The source electrode 61a and the drain electrode 61b can be formed by a printing method or the like. Alternatively, it can be directly formed by an ink-jet method.

[0118] Here, a conductive film is formed over the oxide semiconductor film 59 and the base insulating film 53. The source electrode 61a and the drain electrode 61b are formed by etching into a predetermined shape.

[0119] After the conductive film is formed over the oxide semiconductor film 55, The oxide semiconductor film 59 and the source electrode 58 are then removed by etching the oxide semiconductor film 55 and the conductive film. A mask having a concave and convex shape may be formed on the surface of the substrate 61a and the drain electrode 61b. After etching the oxide semiconductor film 55 and the conductive film using a mask, the unevenness is removed by ashing. and selectively etching the conductive film using the separated mask. Then, the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b are formed. This process can reduce the number of photomasks and photolithography steps. This can be done.

[0120] Next, a gate electrode is formed on the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b. A gate insulating film 63 is formed.

[0121] The gate insulating film 63 is made of silicon oxide, silicon oxynitride, silicon nitride, or silicon nitride oxide. Aluminum oxide, aluminum oxide nitride, or gallium oxide in a single layer or laminated Note that the gate insulating film 63 can be formed in contact with the oxide semiconductor film 59. It is preferable that the portion contains oxygen, and it is particularly preferable that the portion contains oxygen by heating in the same manner as the base insulating film 53. The oxide insulating film that releases oxygen is formed using silicon oxide. By using the silicon film, oxygen can be diffused into the oxide semiconductor film 59 during heat treatment in a later step. This allows the transistor 120 to have good characteristics.

[0122] The gate insulating film 63 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium minate (HfAl x O y N z ), hafnium oxide, yttrium oxide and other high- By using high-k materials, gate leakage can be reduced. Silicon, silicon oxynitride, silicon nitride, silicon nitride oxide, aluminum oxide, oxide The laminated structure can be formed with at least one of aluminum nitride and gallium oxide. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or less. By making the thickness of the gate insulating film 63 5 nm or more, The leak current can be reduced.

[0123] Before forming the gate insulating film 63, the surface of the oxide semiconductor film 59 is treated with oxygen, ozone, or the like. oxidizing the surface of the oxide semiconductor film 59 by exposing it to plasma of an oxidizing gas such as dinitrogen monoxide; Oxygen deficiency may be reduced.

[0124] Next, a gate electrode 65 is formed in a region on the gate insulating film 63 and overlapping with the oxide semiconductor film 59.

[0125] The gate electrode 65 can be formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, manganese, zirconium, or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements. Further, an alloy film in which a metal element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium is combined singly or plurally with aluminum, or a nitride film may be used. Also, the gate electrode 65 may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film, a three-layer structure in which a titanium film is laminated with an aluminum film on the titanium film and a titanium film is further formed thereon, etc. are available. The gate electrode 65 can also be formed using a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide. Further, using an In-Ga-Zn-O-based metal oxide as a target, sputtering is performed in an atmosphere containing nitrogen and the like. and the like. and the like. and the like. and the like. and the like. and the like. and the like. and the like.

[0126] and the like. and the like. and the like. and the like. and the like. A compound conductor obtained by ring closure may also be used. Further, a laminated structure of the above-described translucent conductive material and the above metal element can also be formed.

[0127] Furthermore, an insulating film 69 may be formed as a protective film on the gate electrode 65 (see Fig. 6(E)). Also, after forming contact holes in the gate insulating film 63 and the insulating film 69, wiring connected to the source electrode 61a and the drain electrode 61b may be formed. The insulating film 69 can be formed by appropriately using an insulating film similar to the gate insulating film 63.

[0128] When a silicon nitride film obtained by a sputtering method is formed as the insulating film 69, it is possible to prevent the intrusion of moisture and alkali metals from the outside, and to reduce the content of impurities in the oxide semiconductor film 59. In addition, after forming the gate insulating film 63 or after forming the insulating film 69, heat treatment may be performed. By this heat treatment, hydrogen is released from the oxide semiconductor film 59, and a part of the oxygen contained in the base insulating film 53, the gate insulating film 63 or the insulating film 69 can be diffused into the oxide semiconductor film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. By this process, oxygen defects contained in the oxide semiconductor film 59 can be reduced, and defects at the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. As a result, an oxide semiconductor film 59 with reduced hydrogen concentration and oxygen defects can be formed. Thus purified to a high purity, of type i (intrinsic semiconductor) or limited to type i from the outside, and the content of impurities in the oxide semiconductor film 59 can be reduced. The content of impurities can be reduced.

[0129] Note that heat treatment may be performed after forming the gate insulating film 63 or after forming the insulating film 69. By this heat treatment, hydrogen is released from the oxide semiconductor film 59, and a part of the oxygen contained in the base insulating film 53, the gate insulating film 63 or the insulating film 69 can be diffused into the oxide semiconductor film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. By this process, oxygen defects contained in the oxide semiconductor film 59 can be reduced, and defects at the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. As a result, an oxide semiconductor film 59 with reduced hydrogen concentration and oxygen defects can be formed. Thus purified to a high purity, of type i (intrinsic semiconductor) or limited to type i from the oxide semiconductor film 59, and at the same time, a part of the oxygen contained in the base insulating film 53, the gate insulating film 63 or the insulating film 69 is diffused into the oxide semiconductor film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. The oxygen contained in the base insulating film 53, the gate insulating film 63 or the insulating film 69 can be diffused into the oxide semiconductor film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. The oxygen contained in the base insulating film 53, the gate insulating film 63 or the insulating film 69 can be diffused into the oxide semiconductor film 59, near the interface between the base insulating film 53 and the oxide semiconductor film 59, and near the interface between the gate insulating film 63 and the oxide semiconductor film 59. By this process, oxygen defects contained in the oxide semiconductor film 59 can be reduced, and defects at the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. As a result, oxygen defects contained in the oxide semiconductor film 59 can be reduced, and defects at the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. The oxygen defects contained in the oxide semiconductor film 59 can be reduced, and defects at the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. As a result, an oxide semiconductor film 59 with reduced hydrogen concentration and oxygen defects can be formed. formed. Thus purified to a high purity, of type i (intrinsic semiconductor) or limited to type i By forming an oxide semiconductor film that is close to being non-crystalline, a transistor with extremely excellent characteristics can be realized. This can be achieved.

[0130] Through the above steps, a transistor 120 having an oxide semiconductor film including a crystalline region in the channel region can be fabricated. As shown in Fig. 6(E), the transistor 1 20 includes a base insulating film 53 provided on a substrate 51, an oxide semiconductor film 59 provided on the base insulating film 53, a source electrode 61a and a drain electrode 61b provided so as to be in contact with the upper surface and side surfaces of the oxide semiconductor film 59, a gate insulating film 63 provided on the oxide semiconductor film 59, and a gate electrode 65 provided on the gate insulating film 63 so as to overlap the oxide semiconductor film 59, and an insulating film 69 provided on the gate electrode 65.

[0131] The oxide semiconductor film including a crystalline region used in the transistor 120 has better crystallinity compared to an oxide semiconductor film having an entirely amorphous structure. Therefore, defects such as oxygen vacancies and impurities such as hydrogen bonded to dangling bonds are reduced. Defects such as those typified by oxygen vacancies and hydrogen bonded to dangling bonds, etc., can function as carriers in the oxide semiconductor film, which can cause fluctuations in the electrical conductivity of the oxide semiconductor film. Thus, an oxide semiconductor film including a crystalline region in which these are reduced has a stable electrical conductivity and has a more electrically stable structure against irradiation with visible light or ultraviolet light. By using such an oxide semiconductor film including a crystalline region in a transistor, a semiconductor device having stable electrical characteristics and high reliability can be provided.

[0132] Also, the semiconductor device according to the present invention is not limited to the transistor 120 shown in FIG. 6. For example, a structure such as the transistor 130 shown in FIG. 10(A) may be used. The transistor 130 includes a base insulating film 53 provided on a substrate 51, a source electrode 61a and a drain electrode 61b provided on the base insulating film 53, an oxide semiconductor film 59 provided so as to be in contact with the upper and side surfaces of the source electrode 61a and the drain electrode 61b, a gate insulating film 63 provided on the oxide semiconductor film 59, a gate electrode 65 provided so as to overlap the oxide semiconductor film 59 and on the gate insulating film 63, and an insulating film 69 provided on the gate electrode 65. That is, the transistor 130 is different from the transistor 120 in that the oxide semiconductor film 59 is provided so as to be in contact with the upper and side surfaces of the source electrode 61a and the drain electrode 61b. Also, a structure such as the transistor 140 shown in FIG. 10(B) may be used. The transistor 140 includes a base insulating film 53 provided on a substrate 51, a gate electrode 65 provided on the base insulating film 53, a gate insulating film 63 provided on the gate electrode 65, an oxide semiconductor film 59 provided on the gate insulating film 6 3, source electrodes 61a and a drain electrode 61b provided so as to be in contact with the upper and side surfaces of the oxide semiconductor film 59, and an insulating film 69 provided on the oxide semiconductor film 59. That is, the transistor 140 is different from the transistor 120 in that it has a bottom gate structure in which the gate electrode 65 and the

[0133] gate insulating film 63 are provided under the oxide semiconductor film 59.

[0134] Alternatively, the structure may be like that of the transistor 150 shown in FIG. 10(C). The transist or 150 includes a base insulating film 53 provided on a substrate 51, and a gate electrode 65 provided on the base insulating film 53, a gate insulating film 63 provided on the gate electrode 65, and source electrode 61a and drain electrode 61b provided on the gate insulating film 6 3, and an oxide semiconductor film 59 provided so as to be in contact with the upper and side surfaces of the source electrode 61a and the drain electrode 61b, and an insulating film 69 provided on the oxide semiconductor film 59. That is, the transistor 15 0 is different from the transistor 130 in that the gate electrode 65 and the gate insulating film 63 are provided under the oxide semiconductor film 59, and it has a bottom gate structure.

[0135] As described above, the configurations, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0136] (Embodiment 3) In the present embodiment, a transistor having a structure different from that of the transistor using the oxide semiconductor film including a crystalline region shown in the previous embodiment will be described with reference to FIGS. 11 and 12.

[0137] The top gate structure transistor 160 shown in FIG. 11(A) includes a base insulating film 353 provided on a substrate 351, a metal oxide film 371 provided on the base insulating film 353, an oxide semiconductor film 359 provided on the metal oxide film 371, source electrodes 361a and drain electrodes 361b provided so as to be in contact with the upper and side surfaces of the oxide semiconductor film 359, a metal oxide film 373 provided on the oxide semiconductor film 359, and a gate insulating film 363 provided on the metal oxide film 373, and a gate electrode 365 provided on the gate insulating film 363. That is, the transistor 160 has a top gate structure in which the gate electrode 365 and the gate insulating film 363 are provided on the oxide semiconductor film 359, and is different from the transistor 150 shown in FIG. 10(C) in this respect. The formed gate insulating film 363, the gate electrode 365 provided on the gate insulating film 363 so as to overlap with the oxide semiconductor film 359, and the insulating film 369 provided on the gate electrode 365 are provided.

[0138] That is, the transistor 160 is different from the transistor 120 shown in the previous embodiment in that a metal oxide film 371 is provided between the base insulating film 353 and the oxide semiconductor film 359, and a metal oxide film 373 is provided between the oxide semiconductor film 359 and the gate insulating film 363. Note that other configurations of the transistor 160 are the same as those of the transistor 120 shown in the previous embodiment. That is, for the details of the substrate 351, refer to the description of the substrate 51; for the details of the base insulating film 353, refer to the description of the base insulating film 53; for the details of the oxide semiconductor film 359, refer to the description of the oxide semiconductor film 59; for the details of the source electrode 361a and the drain electrode 361b, refer to the description of the source electrode 61a and the drain electrode 61b; for the details of the gate insulating film 363, refer to the description of the gate insulating film 63; and for the details of the gate electrode 365, refer to the description of the gate electrode 65.

[0139] It is desirable to use a metal oxide having the same components as those of the oxide semiconductor film 359 for the metal oxide film 371 and the metal oxide film 373. Here, "the same components as those of the oxide semiconductor film" means including one or more atoms selected from the constituent metal atoms of the oxide semiconductor film. In particular, it is preferable that the constituent atoms have a crystal structure similar to that of the crystalline region of the oxide semiconductor film 359. In this manner, the metal oxide films 371 and 373 are formed using a metal oxide having the same components as those of the oxide semiconductor film 359. ​​​​​​​​​​​​​​​It is preferable to include a region having crystallinity similar to that of the oxide semiconductor film 359. The region having crystallinity preferably consists of crystals in which the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface. That is, the region having crystallinity preferably has c-axis orientation. Further, when the region having crystallinity is observed from a direction perpendicular to the film surface, it preferably has a structure in which atoms are arranged in a hexagonal lattice. By providing the metal oxide film 371 including a region having crystallinity as described above, a region having continuous c-axis orientation can be formed at the interface between the metal oxide film 371 and the oxide semiconductor film 359 and in the vicinity thereof. As a result, defects such as oxygen defects and impurities such as hydrogen bonded to dangling bonds can be reduced at the interface between the metal oxide film 371 and the oxide semiconductor film 359 and in the vicinity thereof. Similarly, a region having continuous c-axis orientation can be formed at the interface between the metal oxide film 373 and the oxide semiconductor film 359 and in the vicinity thereof. As described above, defects such as those typified by these oxygen defects and hydrogen such as hydrogen bonded to dangling bonds function as a carrier supply source, which can cause fluctuations in the electrical conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film 359 also has these reduced at the interface with and in the vicinity of the metal oxide film 371 and the metal oxide film 373. Therefore, the oxide semiconductor film 359 has stable electrical conductivity and has a more electrically stable structure even under irradiation with visible light, ultraviolet light, or the like. Such an oxide semiconductor film 359, metal oxide

[0140]

[0141] ​​​​​​​​​​​​​By using the film 371 and the metal oxide film 373 in a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

[0142] As the metal oxide film 371 and the metal oxide film 373, for example, when an In-Ga-Zn-O-based metal oxide is used for the oxide semiconductor film 35 9, a metal oxide containing gallium oxide, particularly, a Ga-Zn-O-based metal oxide obtained by adding zinc oxide to gallium oxide, etc. can be used to form it. The Ga-Zn-O-based metal oxide is made such that the amount of substance of zinc oxide with respect to gallium oxide is less than 50%, more preferably less than 25%. Also, the energy barrier in the case where the Ga-Zn-O-based metal oxide is brought into contact with the In-Ga-Zn-O-based metal oxide can be about 0.5 eV on the conduction band side and about 0.7 eV on the valence band side. In addition, due to the relationship of using the oxide semiconductor film 359 as the active layer, the energy gap of the metal oxide film 371 or the metal oxide film 373 is required to be larger than the energy gap of the oxide semiconductor film 359. Also, between the metal oxide film 371 and the oxide semiconductor film 359, or between the metal oxide film 373 and the oxide semiconductor film 359, the formation of an energy barrier is required such that carriers do not flow out from the oxide semiconductor film 359 at least at room temperature (20 °C).

[0143] For example, the energy difference between the lower end of the conduction band of the metal oxide film 371 or the metal oxide film 373 and the lower end of the conduction band of the oxide semiconductor film 359, or the energy difference between the upper end of the valence band of the metal oxide film 371 or the metal oxide film 373 and the upper end of the valence band of the oxide semiconductor film 359. ​​​​​​​The energy difference is desirably 0.5 eV or more, more desirably 0.7 eV or more. Also, it is desirably 1.5 eV or less.

[0144] Also, the energy gap of the metal oxide film 371 is preferably smaller than the energy gap of the underlying insulating film 353, and the energy gap of the metal oxide film 373 is preferably smaller than the energy gap of the gate insulating film 363.

[0145] Here, FIG. 12 shows the energy band diagram (schematic diagram) in the structure in which the transistor 160, that is, the gate insulating film 363, the metal oxide film 373, the oxide semiconductor film 359, the metal oxide film 371, and the underlying insulating film 353 are joined from the gate electrode 365 side. FIG. 12

[0146] There are energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 373. Similarly, on the back channel side (the side opposite to the gate electrode) of the oxide semiconductor film 359, there are also energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 371. At the interface between the oxide semiconductor and the metal oxide, the presence of such energy barriers hinders the movement of carriers at that interface. Therefore, the carriers move within the oxide semiconductor without moving from the oxide semiconductor film 359 to the metal oxide film 371 or the metal oxide film 373. That is, by providing the oxide semiconductor film 359 to be sandwiched between materials (here, the metal oxide film and the insulating film) whose band gaps are gradually larger than that of the oxide semiconductor, the carriers move within the oxide semiconductor film. Similarly, on the back channel side (the side opposite to the gate electrode) of the oxide semiconductor film 359, there are also energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 371. There are energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 371. Similarly, on the back channel side (the side opposite to the gate electrode) of the oxide semiconductor film 359, there are also energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 371. At the interface between the oxide semiconductor and the metal oxide, the presence of such energy barriers hinders the movement of carriers at that interface. Therefore, the carriers move within the oxide semiconductor without moving from the oxide semiconductor film 359 to the metal oxide film 371 or the metal oxide film 373. That is, by providing the oxide semiconductor film 359 to be sandwiched between materials (here, the metal oxide film and the insulating film) whose band gaps are gradually larger than that of the oxide semiconductor, the carriers move within the oxide semiconductor film. There are energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 373. Similarly, on the back channel side (the side opposite to the gate electrode) of the oxide semiconductor film 359, there are also energy barriers of approximately 0.5 eV and approximately 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 371. At the interface between the oxide semiconductor and the metal oxide, the presence of such energy barriers hinders the movement of carriers at that interface.

[0147] There are no particular limitations on the method for fabricating the metal oxide film 371 and the metal oxide film 373. For example, the metal oxide film 371 and the metal oxide film 373 can be fabricated using a film-forming method such as plasma CVD or sputtering. In terms of being less likely to be contaminated with hydrogen, water, etc., a sputtering method or the like is suitable. On the other hand, in terms of improving the film quality, a plasma CVD method or the like is suitable. Also, when using a Ga-Zn-O-based metal oxide film as the metal oxide film 371 and the metal oxide film 373, since the conductivity of the metal oxide is improved by using zinc, it can be fabricated using a DC sputtering method. There are no particular limitations on the method for fabricating the metal oxide film 371 and the metal oxide film 373. For example, the metal oxide film 371 and the metal oxide film 373 can be fabricated using a film-forming method such as plasma CVD or sputtering. In terms of being less likely to be contaminated with hydrogen, water, etc., a sputtering method or the like is suitable. On the other hand, in terms of improving the film quality, a plasma CVD method or the like is suitable. Also, when using a Ga-Zn-O-based metal oxide film as the metal oxide film 371 and the metal oxide film 373, since the conductivity of the metal oxide is improved by using zinc, it can be fabricated using a DC sputtering method. There are no particular limitations on the method for fabricating the metal oxide film 371 and the metal oxide film 373. For example, the metal oxide film 371 and the metal oxide film 373 can be fabricated using a film-forming method such as plasma CVD or sputtering. In terms of being less likely to be contaminated with hydrogen, water, etc., a sputtering method or the like is suitable. On the other hand, in terms of improving the film quality, a plasma CVD method or the like is suitable.

[0148] Also, the semiconductor device according to the present invention is not limited to the transistor 160 shown in FIG. 11(A). It is not. For example, it may have a structure such as the transistor 170 shown in FIG. 11(B). It is okay. The transistor 170 includes a base insulating film 353 provided on a substrate 351, a metal oxide film 371 provided on the base insulating film 353, an oxide semiconductor film 359 provided on the metal oxide film 371, a source electrode 361a and a drain electrode 361b provided so as to be in contact with the upper surface and side surfaces of the oxide semiconductor film 359, a gate insulating film 363 provided on the oxide semiconductor film 359, a gate electrode 365 provided so as to overlap the oxide semiconductor film 359 and on the gate insulating film 363, and an insulating film 369 provided on the gate electrode 365. That is, the transistor 170 is different from the transistor 160 in that a metal oxide film 373 is not provided between the oxide semiconductor film 359 and the gate insulating film 363. It may also have a structure such as the transistor 180 shown in FIG. 11(C). The transistor 180 includes a base insulating film 353 provided on a substrate 351, an oxide semiconductor film 359 provided on the base insulating film 353, a source electrode 361a and a drain electrode 361b provided so as to be in contact with the upper surface and side surfaces of the oxide semiconductor film 359, a metal oxide film 373 provided on the oxide semiconductor film 359, a gate insulating film 363 provided on the metal oxide film 373, a gate electrode 365 provided so as to overlap the oxide semiconductor film 359 and on the gate insulating film 363, and an insulating film 369 provided on the gate electrode 365. That is, the transistor 180 is different from the transistor 160 in that a metal oxide film 371 is not provided between the base insulating film 353 and the oxide semiconductor film 359.

[0149]

[0150] ​​​​​​​​​​Also, in the present embodiment, the transistors shown in FIGS. 11(A) to 11(C) are of a top gate structure, and the source electrode 361a and the drain electrode 361b are in contact with the upper surface and the side surface of the oxide semiconductor film 359. However, the semiconductor device according to the present invention is not limited to this. In the previous embodiment, similar to the transistors shown in FIGS. 10(A) to 10(C ), a bottom gate structure may be used, or the oxide semiconductor film 359 may be provided in a structure that is in contact with the upper surface and the side surface of the source electrode 361a and the drain electrode 361b.

[0151] As described above, the configurations, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0152] (Embodiment 4) In the present embodiment, an example of fabricating at least a part of a driving circuit and a transistor disposed in a pixel portion on the same substrate will be described below.

[0153] The transistor disposed in the pixel portion is formed according to Embodiment 2 or 3. Also, since it is easy to make the transistor an n-channel type, a part of the driving circuit that can be configured by n-channel type transistors is formed on the same substrate as the transistor in the pixel portion. In this way, by using the transistors shown in the previous embodiments for the pixel portion and the driving circuit, a highly reliable display device can be provided.

[0154] An example of a block diagram of an active matrix type display device is shown in FIG. 29(A). On the substrate 500 of the display device , there are a pixel portion 501, a first scanning line driving circuit 502, and a second scanning line driving circuit ​​​​​It has a path 503 and a signal line driving circuit 504. In the pixel section 501, a plurality of signal lines are arranged extending from the signal line driving circuit 504, and a plurality of scanning lines are arranged extending from the first scanning line driving circuit 502 and the scanning line driving circuit 503. In the intersection region of the scanning lines and the signal lines, pixels each having a display element are provided in a matrix. Also, the substrate 500 of the display device is connected to a timing control circuit (also referred to as a controller or a control IC) via a connection part such as an FPC (Flexible Printed Circuit).

[0155] In FIG. 29(A), the first scanning line driving circuit 502, the second scanning line driving circuit 503, and the signal line driving circuit 504 are formed on the same substrate 500 as the pixel section 501. Therefore, the number of components such as driving circuits provided externally is reduced, and cost reduction can be achieved. Also, when a driving circuit is provided outside the substrate 500, it is necessary to extend the wiring, and the number of connections between the wirings increases. When the driving circuit is provided on the same substrate 500, the number of connections between the wirings can be reduced, and reliability improvement or yield improvement can be achieved.

[0156] Also, an example of the circuit configuration of the pixel section is shown in FIG. 29(B). Here, the pixel structure of a VA type liquid crystal display panel is shown.

[0157] This pixel structure has a plurality of pixel electrode layers in one pixel, and a transistor is connected to each pixel electrode layer. Each transistor is configured to be driven by a different gate signal. That is, in a pixel designed with a multi-domain, it has a configuration to independently control the signals applied to the individual pixel electrode layers.

[0158] ​​The gate wiring 512 of the transistor 516 and the gate wiring 513 of the transistor 517 are separated so as to be able to supply different gate signals. On the other hand, the source electrode layer or the drain electrode layer 514 that functions as a data line is commonly used in the transistor 516 and the transistor 517. The transistor 516 and the transistor 517 can appropriately use the transistors shown in the previous embodiments . Thereby, a highly reliable liquid crystal display panel can be provided. The shape of the first pixel electrode layer electrically connected to the transistor 516 and the shape of the second pixel electrode layer electrically connected to the transistor 517 are different and are separated by a slit . The second pixel electrode layer is formed so as to surround the outside of the first pixel electrode layer that spreads in a V shape

[0159] . By making the timing of the voltages applied to the first pixel electrode layer and the second pixel electrode layer different by the transistors 516 and 517, the alignment of the liquid crystal is controlled . The transistor 516 is connected to the gate wiring 512, and the transistor 517 is connected to the gate wiring 51 3. The gate wiring 512 and the gate wiring 513 can make the operation timings of the transistor 516 and the transistor 517 different by supplying different gate signals .

[0160] Further, a holding capacitor is formed by the capacitance wiring 510, a gate insulating film that functions as a dielectric, and a capacitance electrode that is electrically connected to the first pixel electrode layer or the second pixel electrode layer .

[0161] The first liquid crystal element 518 is formed by the overlapping of the first pixel electrode layer, the liquid crystal layer, and the counter electrode layer It is formed. Further, by overlapping the second pixel electrode layer, the liquid crystal layer, and the counter electrode layer, the second liquid crystal element 519 is formed. Also, it is a multi-domain structure in which a first liquid crystal element 518 and a second liquid crystal element 519 are provided in one pixel.

[0162] Note that the pixel configuration shown in FIG. 29(B) is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, sensor, or logic circuit may be added to the pixel shown in FIG. 29(B).

[0163] Further, an example of the circuit configuration of the pixel portion is shown in FIG. 29(C). Here, the pixel structure of a display panel using an organic EL element is shown.

[0164] In the organic EL element, by applying a voltage to the light-emitting element, electrons and positive holes are respectively injected into the layer containing the light-emitting organic compound, and a current flows. Then, when those carriers (electrons and positive holes) recombine, the light-emitting organic compound forms an excited state, and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0165] FIG. 29(C) is a diagram showing an example of a pixel configuration to which digital time gradation driving can be applied as an example of a semiconductor device.

[0166] The configuration and operation of a pixel to which digital time gradation driving can be applied will be described. Here, an example in which two n-channel transistors using an oxide semiconductor layer as a channel formation region are used in one pixel is shown.

[0167] Pixel 520 includes a switching transistor 521, a driving transistor 522, and a light-emitting​​ It has an element 524 and a capacitive element 523. The switching transistor 521 has a gate electrode layer connected to the scanning line 526, a first electrode (either the source electrode layer or the drain electrode layer) connected to the signal line 525, and a second electrode (the other of the source electrode layer and the drain electrode layer) connected to the gate electrode layer of the driving transistor 522. The driving transistor 522 has a gate electrode layer connected to the power supply line 527 via the capacitive element 523, a first electrode connected to the power supply line 527, and a second electrode connected to the first electrode (pixel electrode) of the light-emitting element 524. The second electrode of the light-emitting element 524 corresponds to the common electrode 528. The common electrode 528 is electrically connected to a common potential line formed on the same substrate.

[0168] As the switching transistor 521 and the driving transistor 522, the transistors shown in the previous embodiment can be appropriately used. Thereby, a display panel using a highly reliable organic EL element can be provided.

[0169] Note that a low power supply potential is set for the second electrode (common electrode 528) of the light-emitting element 524. Note that the low power supply potential is a potential that satisfies the low power supply potential < high power supply potential with respect to the high power supply potential set for the power supply line 527, and for example, GND, 0V, etc. may be set as the low power supply potential. A potential difference between this high power supply potential and the low power supply potential is applied to the light-emitting element 524, and a current is passed through the light-emitting element 524 to cause the light-emitting element 524 to emit light. Therefore, the respective potentials are set so that the potential difference between the high power supply potential and the low power supply potential is equal to or greater than the forward threshold voltage of the light-emitting element 524.

[0170] Note that the capacitive element 523 can be omitted by substituting the gate capacitance of the driving transistor 522. This is also possible. Regarding the gate capacitance of the driving transistor 522, a capacitance may be formed between the channel formation region and the gate electrode layer.

[0171] Here, in the case of the voltage input voltage drive method, a video signal that causes the gate electrode layer of the driving transistor 522 to be in one of two states, either fully on or fully off, is input. That is, the driving transistor 522 operates in the linear region. To this end, a voltage higher than the voltage of the power supply line 527 is applied to the gate electrode layer of the driving transistor 522. Note that a voltage equal to or higher than (the power supply line voltage + the Vth of the driving transistor 522) is applied to the signal line 525. That is, the driving transistor 522 operates in the linear region. Since the driving transistor 522 operates in the linear region, a voltage higher than the voltage of the power supply line 527 is applied to the gate electrode layer of the driving transistor 522. Note that a voltage higher than the voltage of the power supply line 527 is applied to the gate electrode layer of the driving transistor 522. Note that a voltage equal to or higher than (the power supply line voltage + the Vth of the driving transistor 522) is applied to the signal line 525. To this end, a voltage higher than the voltage of the power supply line 527 is applied to the gate electrode layer of the driving transistor 522. Note that a voltage equal to or higher than (the power supply line voltage + the Vth of the driving transistor 522) is applied to the signal line 525. (Power supply line voltage + Vth of the driving transistor 522) or higher voltage is applied.

[0172] Also, when performing analog gradation driving instead of digital time gradation driving, the same pixel configuration as in Fig. 29(C) can be used by changing the signal input. When performing analog gradation driving, a voltage equal to or higher than the forward voltage of the light emitting element 524 + the Vth of the driving transistor 522 is applied to the gate electrode layer of the driving transistor 522. The forward voltage of the light emitting element 524 refers to the voltage for a desired luminance and includes at least the forward threshold voltage.

[0173] When performing analog gradation driving, a voltage equal to or higher than the forward voltage of the light emitting element 524 + the Vth of the driving transistor 522 is applied to the gate electrode layer of the driving transistor 522. The forward voltage of the light emitting element 524 refers to the voltage for a desired luminance and includes at least the forward threshold voltage. By inputting a video signal such that the driving transistor 522 operates in the saturation region, current can flow through the light emitting element 524. The forward voltage of the light emitting element 524 refers to the voltage for a desired luminance and includes at least the forward threshold voltage. To cause current to flow through the light emitting element 524, a video signal is input such that the driving transistor 522 operates in the saturation region. To operate the driving transistor 522 in the saturation region, the potential of the power supply line 527 is made higher than the gate potential of the driving transistor 522. By making the video signal analog, a bias current can be applied to the light emitting element 524. To cause current to flow through the light emitting element 524, a video signal is input such that the driving transistor 522 operates in the saturation region. To operate the driving transistor 522 in the saturation region, the potential of the power supply line 527 is made higher than the gate potential of the driving transistor 522. To operate the driving transistor 522 in the saturation region, the potential of the power supply line 527 is made higher than the gate potential of the driving transistor 522. By making the video signal analog, a bias current can be applied to the light emitting element 524. A current can be passed according to the video signal to perform analog gradation driving.

[0174] Note that the pixel configuration shown in Fig. 29(C) is not limited to this. For example, a new switch, resistor element, capacitor element, sensor, transistor, or logic circuit, etc. can be added to the pixels shown in Fig. 29(C).

[0175] (Embodiment 5) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). Examples of electronic devices include, for example, television devices (also referred to as TVs or television receivers), monitors for computers, cameras such as digital cameras, digital video cameras, digital photo frames, mobile phones (also referred to as mobile phones or mobile phone devices), portable game machines, portable information terminals, audio playback devices, and large game machines such as pachinko machines. Examples of electronic devices equipped with the display device described in the above embodiment will be described.

[0176] Fig. 30(A) is a portable information terminal, which is composed of a main body 1001, a housing 1002, display units 10 03a, 1003b, etc. The display unit 1003b is a touch panel, and by touching the keyboard button 1004 displayed on the display unit 1003b, screen operations and character input can be performed. Of course, the display unit 1003a may be configured as a touch panel. By fabricating a liquid crystal panel or an organic light-emitting panel using the transistor shown in the previous embodiment as a switching element and applying it to the display units 1003a and 1003b, a highly reliable portable information terminal can be obtained.

[0177] The portable information terminal shown in Fig. 30(A) can have functions such as displaying various information (still images, moving images, text images, etc.), displaying a calendar, date, or time on the display unit, operating or editing the information displayed on the display unit, controlling processing by various software (programs), etc. Also, it may be configured to have external connection terminals (such as earphone terminals, USB terminals, etc.), a recording medium insertion part, etc. on the back or side of the housing. Furthermore, the portable information terminal shown in Fig. 30(A) may be configured to be able to wirelessly transmit and receive information. It is also possible to configure it to purchase and download desired book data, etc. from an e-book server wirelessly. Fig. 30(B) is a portable music player. The main body 1021 is provided with a display unit 1023, a fixing part 1022 for wearing on the ear, a speaker, operation buttons 1024, an external memory slot 1025, etc. By manufacturing a liquid crystal panel or an organic light-emitting panel using the transistor shown in the previous embodiment as a switching element and applying it to the display unit 1023, a more reliable portable music player can be obtained. Moreover, if the portable music player shown in Fig. 30(B) is provided with an antenna, a microphone function, and a wireless function and is made to cooperate with a mobile phone, it is possible to have a hands-free conversation wirelessly while driving a vehicle, etc. Fig. 30(C) is a mobile phone, which is composed of two housings, namely a housing 1030 and a housing 1031. The housing 1031 is provided with a display panel 1032, a speaker 1033, a microphone

[0178]

[0179]

[0180]

[0181] ​​​​​​​​​​​​​On 1034, pointing device 1036, camera lens 1037, external connection terminal It is equipped with a child 1038 and the like. Further, the housing 1030 is provided with a solar cell Cell 1040, external memory slot 1041, etc. are provided. Also, the antenna is housed inside the housing 1 031. By applying the transistor shown in the previous embodiment to the display panel 103 2, a highly reliable mobile phone can be obtained.

[0182] Also, the display panel 1032 is provided with a touch panel, and a plurality of operation keys 1035 that are video-displayed are shown by dotted lines in FIG. 30(C). Note that a booster circuit for boosting the voltage generated by the solar cell 1040 to the voltage required for each circuit is also implemented. For example, a power transistor used in a power supply circuit such as a booster circuit can also be formed by setting the film thickness of the oxide semiconductor film of the transistor shown in the previous embodiment to 2 μm or more and 50 μm or less. It can be done.

[0183] For example, the display direction of the display panel 1032 changes appropriately according to the usage form. Also, since the camera lens 1037 is provided on the same surface as the display panel 1032, a video phone is possible. The speaker 1033 and the microphone 1034 are not limited to voice calls, and video phones, recording, playback, etc. are possible. Further, the housing 1030 and the housing 1031 can be slid and

[0184] changed from the unfolded state as shown in FIG. 30(C) to an overlapping state, enabling miniaturization suitable for portability. The external connection terminal 1038 can be connected to various cables such as an AC adapter and a USB cable. 、recording, playback, etc. are possible. Further, the housing 1030 and the housing 1031 can be slid and changed from the unfolded state as shown in FIG. 30(C) to an overlapping state, enabling miniaturization suitable for portability. It is possible.

[0185] The external connection terminal 1038 can be connected to various cables such as an AC adapter and a USB cable. ​It has capabilities and can perform data communication with a charger and a personal computer, etc. Also, By inserting a recording medium into the external memory slot 1041, it can handle the storage and transfer of larger amounts of data.

[0186] In addition to the above functions, it may also be equipped with an infrared communication function, a television receiver function, etc.

[0187] Figure 30(D) shows an example of a television device. The television device 1050 has a display unit 1053 incorporated in the housing 1051. The display unit 1053 can display images. Here, it shows a configuration in which the housing 1051 is supported by a stand 1055 with a built-in CPU. By applying the transistor shown in the previous embodiment to the display unit 1053, a highly reliable television device 1050 can be obtained.

[0188] The operation of the television device 1050 can be performed by an operation switch provided on the housing 1051 or a separate remote control operation device. Also, the remote control operation device may be configured to be provided with a display unit for displaying information output from the remote control operation device itself.

[0189] Note that the television device 1050 has a configuration including a receiver, a modem, etc. The receiver can receive general television broadcasts, and further, by connecting to a communication network via a modem, either wired or wireless, one-way (from the sender to the receiver) or two-way (between the sender and the receiver, or between receivers, etc.) information communication can also be performed.

[0190] ​​​​​​​​​​In addition, the television apparatus 1050 includes an external connection terminal 1054, a storage medium playback / recording unit 1 052, and an external memory slot. The external connection terminal 1054 can be connected to various cables such as a USB cable and enables data communication with a personal computer or the like . In the storage medium playback / recording unit 1052, a disk-shaped storage medium can be inserted, and data stored on the storage medium can be read and written to the storage medium. Also, images, videos, etc. stored in the external memory 1056 inserted into the external memory slot can be projected onto the display unit 1053 .

[0191] Further, by applying the semiconductor device shown in the previous embodiment to the external memory 1056 or the CPU , a highly reliable television apparatus 1050 with sufficiently reduced power consumption can be obtained .

Example

[0192] In this example, various measurement methods were used, and the results of measuring the oxide semiconductor film according to the present invention or a semiconductor device using the oxide semiconductor film will be described .

[0193] <1. Observation of TEM image and measurement of electron beam diffraction intensity using TEM, and XRD measurement> In this item, an oxide semiconductor film was fabricated according to the previous embodiment, and the result of observing the oxide semiconductor film using a transmission electron microscope (TEM) will be described .

[0194] In this item, an oxide semiconductor film was formed on a quartz substrate using a sputtering method, and samples A, B, C, D, and E were fabricated . Sample A, The substrate temperatures during film formation of Sample B, Sample C, Sample D, and Sample E were respectively room temperature, 200 °C, 250 °C, 300 °C, and 400 °C. That is, the substrate temperature during film formation of Sample A and Sample B was made lower than that in the film formation method shown in Embodiment 2, and Sample C to Sample E had substrate temperatures within the range described in the film formation method shown in Embodiment 2. The film formation target of the oxide semiconductor film was one having a composition ratio of In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio was used. Other film formation conditions were that the film formation gas flow rate was 30 sccm of argon gas and 15 sccm of oxygen gas, the pressure was 0.4 Pa, the substrate-target distance was 6 0 mm, and the high-frequency (RF) power supply was 0.5 kW. Note that Sample A, Sample B, and Sa mple E were formed aiming for a film thickness of 50 nm, and Sample C and Sample D were formed aiming for a film thickness of 100 nm .

[0195] Furthermore, after the formation of the oxide semiconductor film, a heat treatment was performed on the quartz substrate on which the oxide semiconductor film was formed. The heat treatment was performed at a heating temperature of 450 °C for 1 hour in a dry atmosphere with a dew point of -24 °C. In this way, Samples A, B, C, D, and E of the oxide semiconductor film formed on the quartz substrate were produced.

[0196] Also, different from Samples A to E, Sample F in which an oxide semiconductor film was formed using the 2-step method shown in Embodiment 2 was produced. Sample F first had a first oxide semiconductor film with a thickness of 5 nm formed, and the first oxide semiconductor film was subjected to a first heat treatment, and the first acid A second oxide semiconductor film with a thickness of 30 nm was formed on the oxide semiconductor film, and the first oxide semiconductor film and the second oxide semiconductor film were subjected to a second heat treatment to produce it.

[0197] Here, the deposition target of the first oxide semiconductor film is In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] was used. Other film deposition conditions were that the flow rate of the film deposition gas was 30 sccm of argon gas and 15 sccm of oxygen gas, the pressure was 0.4 Pa, the base plate - target distance was 60 mm, and the high - frequency (RF) power supply was 0.5 kW. Also, the conditions of the first heat treatment were a heating temperature of 650 °C and a heating time of 1 hour in a nitrogen atmosphere.

[0198] Also, the deposition target of the second oxide semiconductor film is In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] was used. Other film deposition conditions were that the flow rate of the film deposition gas was 30 sccm of argon gas and 15 sccm of oxygen gas, the pressure was 0.4 Pa, the substrate -target distance was 60 mm, and the high - frequency (RF) power supply was 0.5 kW. Also, the second heat treatment conditions were a heating temperature of 650 °C and a heating time of 1 hour in a dry atmosphere with a dew point of - 24 °C was used.

[0199] In this way, an oxide semiconductor film was formed on a quartz substrate using a 2 - step method, and sample F was fabricated. was fabricated.

[0200] Also, as a comparison object for samples A to F, sample G was fabricated by forming a single - crystal film of IGZO with a thickness of 150 nm on a yttria - stabilized zirconia (Y SZ) substrate. .

[0201] For the above Samples A to G, an oxide semiconductor film was formed on a substrate, and an electron beam was irradiated perpendicularly to the substrate, that is, parallel to the c-axis direction in the previous embodiment, to take a TEM image and an electron diffraction pattern. Cross-sectional TEM images of Samples A to E are shown in FIGS. 13(A) to 13(E), respectively. Here, in the cross-sectional TEM image shown in FIG. 13, since the upper side of the paper surface is the surface direction of the sample, the vertical direction of the paper surface is the c-axis direction. Also, plan-view TEM images of Samples A to E are shown in FIGS. 14(A) to 14(E), respectively. Here, in the plan-view TEM image shown in FIG. 14, since the front side of the paper surface is the surface direction of the sample, the direction perpendicular to the paper surface is the c-axis direction. Also, electron diffraction patterns of Samples A to E are shown in FIGS. 15(A) to 15(E), respectively. Here, in the electron diffraction pattern shown in FIG. 15, since the front side of the paper surface is the surface direction of the sample, the direction perpendicular to the paper surface is the c-axis direction. Also, plan-view TEM images of Sample F and Sample G are shown in FIGS. 16(A) and 16(B), respectively. An electron diffraction pattern of Sample F is shown in FIG. 16(C). Electron diffraction patterns of Sample G are shown in FIGS. 16(D) and 16(E). Here, in the plan-view TEM image and the electron diffraction pattern shown in FIG. 16, since the front side of the paper surface is the surface direction of the sample, the direction perpendicular to the paper surface is the c-axis direction. Note that in this item, the cross-sectional TEM image, the plan-view TEM image, and the electron diffraction pattern were taken using an H-9000NAR manufactured by Hitachi High-Technologies Corporation, with the electron beam spot diameter set to 1 nm and the acceleration voltage set to 300 kV.

[0202] ​​​​​​​​​​​​​​​​

[0203] In the cross-sectional TEM images shown in FIGS. 13(C) to 13(E), regions having crystallinity with the c-axis oriented were observed. However, in the cross-sectional TEM images shown in FIGS. 13(A) and 13(B), regions having crystallinity with the c-axis oriented were not clearly observed. Therefore, by setting the substrate temperature during the formation of the oxide semiconductor film to be greater than 200° C., preferably 250° C. or higher, it can be seen that regions having crystallinity with the c-axis oriented are formed in the oxide semiconductor film. Also, in the order of FIGS. 13(C) to 13(E), regions having crystallinity with the c-axis oriented are clearly seen so it is speculated that the higher the substrate temperature during the formation of the oxide semiconductor film, the higher the crystallinity of the oxide semiconductor film.

[0204] In the plan-view TEM image shown in FIG. 14(E), atoms arranged in a hexagonal lattice were observed. Also, in the plan-view TEM images shown in FIGS. 14(C) and 14(D), atoms arranged in a hexagonal lattice were faintly observed. In the plan-view TEM images shown in FIGS. 14(A) and 14(B), atoms arranged in a hexagonal lattice were not clearly observed. Also, in the plan-view TEM images shown in FIGS. 16(A) and 16(B), atoms arranged in a hexagonal lattice were observed. From this, it is speculated that the regions having crystallinity with the c-axis oriented in the oxide semiconductor film tend to have a hexagonal crystal structure with three-fold symmetry as shown in FIG. 2. Also, it was found that sample F fabricated using the 2step method also has regions having crystallinity formed in the oxide semiconductor film, similar to samples C to E. Also, similar to the observation results of the cross-sectional TEM images of FIG. 13, the higher the substrate temperature during the formation of the oxide semiconductor film, ​​​​​​It is presumed that the crystallinity of the oxide semiconductor film increases. Observation of FIGS. 13 and 14 above From this, it can be seen that Sample A and Sample B are amorphous oxide semiconductor films with almost no crystallinity, and Samples C to F are oxide semiconductor films containing regions with c-axis oriented crystallinity .

[0205] The electron diffraction patterns shown in FIGS. 15(A) to 15(E) are concentric halo patterns with a wide and blurred diffraction pattern width, and the outer halo pattern has a weaker electron diffraction intensity than the inner halo pattern. Furthermore, a tendency for the electron diffraction intensity of the outer halo pattern to increase is observed in the order of FIGS. 15(A) to 15(E). Also, the electron diffraction pattern shown in FIG. 16(C) is also a concentric halo pattern, but compared with FIGS. 15(A) to 15(E), the width of the halo pattern is thinner, and the electron diffraction intensities of the inner and outer halo patterns are almost equal

[0206] Also, the electron diffraction pattern shown in FIG. 16(D) is different from FIGS. 15(A) to 15(E) and FIG. 16(C), and a spot-like electron diffraction pattern appears. Image processing was performed on the electron diffraction pattern shown in FIG. 16(D) to obtain the concentric pattern shown in FIG. 16(E), but unlike FIGS. 15(A) to 15(E) and FIG. 16(C), the width of the concentric pattern is narrow and does not form a halo shape. Also, in that the electron diffraction intensity of the outer concentric pattern is stronger than that of the inner concentric pattern, it is different from the electron diffraction patterns shown in FIGS. 15(A) to 15(E) and FIG. 16(C)

[0207] ​​​​​​​​​​​​​Figure 17 shows graphs of the electron diffraction intensities of Samples A through G. The graph shown in Figure 17 has the electron diffraction intensity (in arbitrary units) on the vertical axis and the magnitude of the scattering vector of the sample (1 / d [1 / nm]) on the horizontal axis. Note that the magnitude of the scattering vector (1 / d [1 / nm] ) of d corresponds to the interplanar spacing of the crystal in the crystal. Here, the magnitude of the scattering vector (1 / d) can be expressed by the following equation using the distance r from the spot of the central transmitted wave to the concentric circular pattern of the diffracted wave in the film of the electron diffraction pattern, the camera length L which is the distance between the sample and the film in the TEM, and the wavelength λ of the electron beam irradiated by the TEM. That is, the magnitude of the scattering vector (1 / d) shown on the horizontal axis of Figure 17 is a quantity proportional to the distance r from the spot of the central transmitted wave to the concentric circular pattern of the diffracted wave in the electron diffraction patterns shown in FIGS. 15(A) through 15(E), FIG. 16(C), and FIG. 16(E).

[0208]

Equation

[0209] That is, in the graph shown in Figure 17, the peaks corresponding to the inner halo patterns in the electron diffraction patterns shown in FIGS. 15(A) through 15(E), FIG. 16(C), and FIG. 16(E) are the first peaks at 3.3 nm ≤ 1 / d ≤ 4.1 nm

[0210] That is, in the graph shown in Figure 17, the peaks corresponding to the outer halo patterns are the second peaks at 5.5 nm ≤ 1 / d ≤ 7.1 nm -1 -1 -1 -1

[0211] ​​​​​​​The full width at half maximum of the first peak and the second peak of Samples A to G in FIGS. 18 and 19 are shown in the graphs. In the graph shown in FIG. 18, the full width at half maximum FWHM (n m -1 ) of the first peak is taken on the vertical axis, and the substrate temperature (°C) during film formation of Samples A to E is taken on the horizontal axis . Also, the dotted lines in the graph of FIG. 18 respectively show the values of the full width at half maximum of the first peak of Samples F and G. The graph shown in FIG. 19 also represents the full width at half maximum of the second peak in the same manner as FIG. 18. Further, Table 1 shows a table summarizing the peak positions (nm ) and the full width at half maximum (nm -1 ) of the first peak and the second peak shown in FIGS. 18 and 19 -1 .

[0212]

Table 1

[0213] From FIGS. 18 and 19, for both the first peak and the second peak, as the substrate temperature during film formation of the oxide semiconductor film increases, the full width at half maximum of the peak decreases, and the peak position shows a tendency to decrease. Also, for both the first peak and the second peak, it was shown that the full width at half maximum of the peak does not change significantly when the substrate temperature during film formation is changed from 300°C to 400 °C. Furthermore, for both the first peak and the second peak, the full width at half maximum and the peak position of Sample F formed using the 2step method were smaller than the full width at half maximum and the peak position of Samples A to E, and larger than the full width at half maximum and the peak position of Sample G which is a single crystal .

[0214] Since the oxide semiconductor film including a region having c-axis oriented crystallinity has different crystallinity from Sample G having a single crystal structure, in the electron diffraction intensity measurement by irradiating an electron beam from the c-axis direction ​ and the full width at half maximum (FWHM) at the first peak and the second peak is 0.2 nm -1 or more, preferably the FWHM of the first peak is 0.4 nm -1 or more, and the FWHM of the second peak is 0.45 nm -1 or more.

[0215] Furthermore, considering that no clear crystallinity was observed in the oxide semiconductor films of Sample A and Sample B, that is, the substrate temperature during film formation was 200°C or lower, from FIGS. 13 and 14, it can be said that in the oxide semiconductor film including a region having c-axis oriented crystallinity, in the electron diffraction intensity measurement by irradiating an electron beam from the c-axis direction, the FWHM of the first peak is 0.7 nm or less, and the FWHM of the second peak is 1.4 nm or less. -1 the second peak -1 or less.

[0216] In addition, X-ray diffraction (XRD) measurements were further performed on Sample A, Sample E, and Sample G to obtain measurement results that reinforce the above measurement results obtained by TEM.

[0217] FIG. 20 shows the results of measuring the XRD spectra of Sample A and Sample E using the out-of-plane method. FIG. 20 shows the x-ray diffraction intensity (arbitrary unit) on the vertical axis and the rotation angle 2θ (deg.) on the horizontal axis.

[0218] From FIG. 20, it can be seen that a strong peak is observed near 2θ = 30° in Sample E, while almost no peak is observed near 2θ = 30° in Sample A. The peak is due to the diffraction on the (009) plane of the IGZO crystal. From this also, Sample Sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, and is clearly different from sample A having an amorphous structure. It can be seen that it is clearly different from sample A having an amorphous structure.

[0219] Also, FIG. 21(A) shows the result of measuring the XRD spectrum of sample E using the in-plane method. Similarly, FIG. 21(B) shows the result of measuring the XRD spectrum of sample G using the in-plane method. FIGS. 21(A) and 21(B) have the x-ray diffraction intensity (arbitrary unit) on the vertical axis and the rotation angle φ (deg.) on the horizontal axis. In the in-plane method used in this example, the sample was rotated at the rotation angle φ while rotating the sample with the c-axis direction of the sample as the axis of rotation for XRD measurement. It shows the result of measuring the XRD spectrum of sample G using the in-plane method. Similarly, FIG. 21(B) shows the result of measuring the XRD spectrum of sample G using the in-plane method. FIGS. 21(A) and 21(B) have the x-ray diffraction intensity (arbitrary unit) on the vertical axis and the rotation angle φ (deg.) on the horizontal axis. In the in-plane method used in this example, the sample was rotated at the rotation angle φ while rotating the sample with the c-axis direction of the sample as the axis of rotation for XRD measurement. It shows the result of measuring the XRD spectrum of sample G using the in-plane method. Similarly, FIG. 21(B) shows the result of measuring the XRD spectrum of sample G using the in-plane method. FIGS. 21(A) and 21(B) have the x-ray diffraction intensity (arbitrary unit) on the vertical axis and the rotation angle φ (deg.) on the horizontal axis. In the in-plane method used in this example, the sample was rotated at the rotation angle φ while rotating the sample with the c-axis direction of the sample as the axis of rotation for XRD measurement. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure.

[0220] The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure. The XRD spectrum of sample G shown in FIG. 21(B) shows peaks at equal intervals every 60° of the rotation angle, indicating that sample G is a single crystal film having six-fold symmetry. On the other hand, the XRD spectrum of sample E shown in FIG. 21(A) does not have regular peaks, and it can be seen that there is no orientation in the a-b plane direction of the region having crystallinity. That is, in sample E, in each region having crystallinity, it is crystallized with respect to the c-axis, but is not necessarily arranged with respect to the a-b plane. From this also, it can be seen that sample E is an oxide semiconductor film including a region having crystallinity with the c-axis oriented, but is clearly different from sample G having a single crystal structure.

[0221] From the above, the oxide semiconductor film according to the present invention, including a region having crystallinity with the c-axis oriented, can be said to have crystallinity that is clearly different from both the oxide semiconductor film having an amorphous structure and the oxide semiconductor film having a single crystal structure. From the above, the oxide semiconductor film according to the present invention, including a region having crystallinity with the c-axis oriented, can be said to have crystallinity that is clearly different from both the oxide semiconductor film having an amorphous structure and the oxide semiconductor film having a single crystal structure. From the above, the oxide semiconductor film according to the present invention, including a region having crystallinity with the c-axis oriented, can be said to have crystallinity that is clearly different from both the oxide semiconductor film having an amorphous structure and the oxide semiconductor film having a single crystal structure.

[0222] An oxide semiconductor film including a region having crystallinity with the c-axis oriented as described above has better crystallinity compared to an oxide semiconductor film with an amorphous structure as a whole. Therefore, defects such as oxygen defects and impurities such as hydrogen bonded to dangling bonds are reduced. Defects such as those typified by oxygen defects and hydrogen such as that bonded to dangling bonds function as carriers' supply sources in the oxide semiconductor film, which can cause fluctuations in the electrical conductivity of the oxide semiconductor film. Therefore, an oxide semiconductor film including a region having crystallinity with these reduced has stable electrical conductivity and has a more electrically stable structure against irradiation with visible light, ultraviolet light, etc. By using such an oxide semiconductor film including a region having crystallinity in a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided. Defects such as those typified by these oxygen defects and hydrogen such as that bonded to dangling bonds

[0223] <2. ESR Measurement> In this item, an oxide semiconductor film was fabricated according to the previous embodiment, and the results of evaluating the oxide semiconductor film using the electron spin resonance (ESR) method will be described.

[0224] In this item, a sample H in which an oxide semiconductor film was formed on a quartz substrate using a sputtering method and a sample I in which heat treatment was performed on the quartz substrate on which the oxide semiconductor film was formed were fabricated. The film formation target of the oxide semiconductor film was In 2 O 3 :Ga 2 O 3 :ZnO = 1 Those having a composition ratio of 1:2 [mole ratio] were used. Other film formation conditions were that the film formation gas flow rate was 30 sccm of argon gas and 15 sccm of oxygen gas, the substrate temperature during film formation was 400 °C , the pressure was 0.4 Pa, the substrate-target distance was 60 mm, the high-frequency (RF) power supply was 0.5 kW, and the film thickness was 100 nm.

[0225] For Sample I, after the formation of the oxide semiconductor film, heat treatment was performed on the quartz substrate on which the oxide semiconductor film was formed. The heat treatment was carried out at a heating temperature of 450 °C for 1 hour in a dry atmosphere with a dew point of -24 °C. In this way, Samples H and I, in which the oxide semiconductor film was formed on the quartz substrate, were prepared.

[0226] In this item, ESR measurement is performed on the above Samples H and I. ESR measurement is a method for measuring isolated electrons in a substance that utilizes the Zeeman effect. While irradiating the sample with microwaves of a specific frequency ν, by sweeping the magnetic field H applied to the sample, at a specific magnetic field H, the isolated electrons in the sample absorb the microwaves, and transition from the energy level of the spin parallel to the magnetic field to the energy level of the spin antiparallel to the magnetic field. At this time, the relationship between the frequency ν of the microwaves absorbed by the isolated electrons in the sample and the magnetic field H applied to the sample can be expressed by the following equation.

[0227]

Equation

[0228] Here, h is Planck's constant, μ B is the Bohr magneton. And g is a coefficient called the g-value and changes depending on the local magnetic field applied to the isolated electron in the material. In other words, from the above equation, g value is By calculating this, we can determine the environment of isolated electrons such as dangling bonds.

[0229] In this embodiment, the ESR measurement was performed using a Bruker E500. The constant temperature was room temperature, the microwave frequency was 9.5 GHz, and the microwave power was 0.2 mW.

[0230] The results of ESR measurements on Sample H and Sample I are shown in the graph in Figure 22. The graph in FIG. 22 shows the first derivative of microwave absorption intensity on the vertical axis and Take the g value.

[0231] As shown in the graph in Figure 22, the signal corresponding to microwave absorption in sample I was Although not observed, in sample H, microwave absorption occurs near g = 1.93. A signal was observed. By calculating the integral value of the signal near g=1.93, , the spin density of the isolated electron corresponding to the absorption of the microwave is 1.3×10 18 (spins / cm 3 In sample I, the microwave absorption was below the detection limit. Therefore, the spin density of the isolated electron in sample I is 1×10 16 (spin s / cm 3 )The result is as follows.

[0232] Here, in the In-Ga-Zn-O based oxide semiconductor film, the sigma Quantum chemical calculations were performed to investigate which dangling bond the null belongs to. As a specific calculation method, the metal atom has a dangling bond corresponding to an oxygen vacancy. A cluster model was created for structural optimization, and for the structurally optimized model the g-value was calculated.

[0233] For the structural optimization of the model and the calculation of the g-value of the structurally optimized model, ADF (Amst erdam Density Functional software) was used. Also, for both the structural optimization of the model and the calculation of the g-value of the structurally optimized model, the generalized function G GA:BP was used, and for the basis function, TZ2P was used. Also, as the Core Type, Large was used for the structural optimization of the model and None was used for the calculation of the g-value.

[0234] The model of the dangling bonds in the In-Ga-Zn-O-based oxide semiconductor film obtained by the above-mentioned quantum chemical calculation is shown in Fig. 23. Fig. 23 shows the dangling bond (g = 1.984) due to the oxygen defect of the indium-oxygen bond, the dangling bond (g = 1.995) due to the oxygen defect of the gallium-oxygen bond, and the dangling bond (g = 1.996) due to the oxygen defect of the zinc-oxygen bond. The g-values of these dangling bonds are relatively close to the g = 1.93 of the signal corresponding to the microwave absorption of sample H. That is, in sample H, it is suggested that oxygen defects may have occurred in the bond between any one or more of indium, gallium, or zinc and oxygen. However, in sample I, no signal corresponding to microwave absorption appears near g = 1.93. This suggests that oxygen was replenished to the oxygen defects by performing heat treatment in a dry atmosphere after the formation of the oxide semiconductor film. In the above-described embodiments

[0235] As described above, oxygen defects in the oxide semiconductor film can function as carriers that change the electrical conductivity. Therefore, by reducing the oxygen defects, the reliability of a transistor using the oxide semiconductor film can be improved. Thus, the oxide semiconductor film including a region having c-axis oriented crystallinity according to one aspect of the present invention is preferably heat-treated after film formation to replenish oxygen to the oxygen defects, and the spin density near g = 1.93 in the ESR measurement is preferably less than 1.3×10 (spins / cm

[0236] ), and more preferably, the spin density is 1×10 or less. (spins / cm 18 (spins / cm 3 ) or smaller. 16 (spins / cm 3 ) or less is even more preferable.

[0237] <3. Low-temperature PL measurement> In this section, the results of evaluating an oxide semiconductor film fabricated according to the previous embodiment using low-temperature photoluminescence (PL) measurement will be described. In this section, sample J in which an oxide semiconductor film was formed on a quartz substrate at a substrate temperature of 200°C during film formation and sample K in which an oxide semiconductor film was formed at a substrate temperature of 400°C during film formation were fabricated using a sputtering method. That is, sample J is an oxide semiconductor film that does not include a region having c-axis oriented crystallinity, and sample K is an oxide semiconductor film that includes a region having c-axis oriented crystallinity. The film formation target of the oxide semiconductor film is In O

[0238] :Ga O :Ga O 2 O 3 :Ga 2 O 3 :ZnO=1:1:2 [molar ratio] was used. Other film formation conditions were as follows: The flow rate of the film formation gas was 30 sccm of argon gas and 15 sccm of oxygen gas, the pressure was 0.4 Pa, the distance between the substrate and the target was 60 mm, the high-frequency (RF) power supply was 0.5 kW, and the film thickness was 100 n m.

[0239] Furthermore, after the formation of the oxide semiconductor film, both sample J and sample K were heat-treated on the quartz substrate on which the oxide semiconductor film was formed. The heat treatment was carried out at a heating temperature of 450 °C for 1 hour in a dry atmosphere with a dew point of -24 °C. In this way, samples J and K with the oxide semiconductor film formed on the quartz substrate were fabricated.

[0240] In this item, for the above samples J and K, low-temperature PL measurement was performed . In the low-temperature PL measurement, the sample was irradiated with excitation light in an extremely low-temperature atmosphere to give energy , generating electrons and holes in the sample. Then, the irradiation of the excitation light was stopped, and the light emission due to the recombination of the electrons and holes generated by the irradiation of the excitation light was detected using a CCD (Charge Coupled Device), etc.

[0241] In this example, the low-temperature PL measurement was performed at a measurement temperature of 10 K in a helium gas atmosphere . The excitation light was irradiated with light having a wavelength of 325 nm using a He-Cd gas laser oscillator . Also, a CCD was used for the detection of the light emission.

[0242] For samples J and K, the emission spectra detected by the low-temperature PL measurement are shown in the graph of Figure 2 4. The graph shown in Figure 24 has the PL emission detection count (counts ) on the vertical axis and the energy (eV) of the detected light emission on the horizontal axis.

[0243] From the graph of FIG. 24, both Sample J and Sample K have a peak near the emission energy of 1.8 eV. However, it can be seen that the PL emission detection count of Sample K is about 100 less than that of Sample J. Note that the peak near the emission energy of 3.2 eV for Sample J and Sample K is derived from the quartz window of the low-temperature PL measurement apparatus.

[0244] Here, the peak near 1.8 eV shown in the graph of FIG. 24 suggests that there is an energy level at a depth of about 1.8 eV from the lower end of the conduction band in the band structure of the oxide semiconductor film. This deep energy level in the bandgap coincides with the trap level caused by oxygen defects shown in the result of the electron state density calculation of FIG. 3. Therefore, the emission peak near 1.8 eV shown in the graph of FIG. 24 can be considered to represent the energy level of the trap level caused by oxygen defects in the band diagram shown in FIG. 4. That is, the fact that the emission detection count near 1.8 eV in Sample K is less than that in Sample J means that the oxide semiconductor film including the region having c-axis oriented crystallinity has a reduced number of trap levels caused by oxygen defects, that is, it is considered that the number of oxygen defects is reduced.

[0245] <4. Photon Negative Bias Degradation Measurement> In this example, a transistor using an oxide semiconductor film was fabricated according to the previous embodiment, and a negative voltage was applied to the gate while irradiating the transistor with light to apply stress, and the results of evaluating the threshold voltage of the transistor that changes according to the time of applying the stress are as follows. ​​​​​​​​This will be described. Note that due to such stress, the threshold voltage of the transistor changes, etc. This is called photo-negative bias degradation.

[0246] In this section, a transistor (Sample L) provided with an oxide semiconductor film in which a region having c-axis oriented crystallinity as shown in the previous embodiment is formed, and, as a comparative example, the same as Sample L made of the material, but a transistor (Sample M) provided with an oxide semiconductor film in which a region having c-axis oriented crystallinity is not formed, were fabricated. Then, a negative voltage was applied to the gate while irradiating Samples L and Sample M with light to apply stress, and the threshold voltages Vth of Samples L and Sample M that change according to the time when stress is applied were evaluated. The manufacturing methods of Samples L and Sample M will be described below. First, using the plasma CVD method, a silicon nitride film with a thickness of 100 nm and a silicon oxynitride film with a thickness of 150 nm were successively formed on a glass substrate as a base film, and then a tungsten film with a thickness of 100 nm was formed on the silicon oxynitride film using the sputtering method. Here, by selectively etching the tungsten film, a gate electrode having a tapered shape was formed. Then, using the plasma CVD method, a silicon oxynitride film with a thickness of 100 nm was formed on the gate electrode as a gate insulating film. Next, an oxide semiconductor film was formed on the gate insulating film using the sputtering method. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed.

[0247] First, using the plasma CVD method, a silicon nitride film with a thickness of 100 nm and a silicon oxynitride film with a thickness of 150 nm were successively formed on a glass substrate as a base film, and then a tungsten film with a thickness of 100 nm was formed on the silicon oxynitride film using the sputtering method. Here, by selectively etching the tungsten film, a gate electrode having a tapered shape was formed. Then, using the plasma CVD method, a silicon oxynitride film with a thickness of 100 nm was formed on the gate electrode as a gate insulating film. Next, an oxide semiconductor film was formed on the gate insulating film using the sputtering method. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed. Here, by selectively etching the tungsten film, a gate electrode having a tapered shape was formed. Then, using the plasma CVD method, a silicon oxynitride film with a thickness of 100 nm was formed on the gate electrode as a gate insulating film. Next, an oxide semiconductor film was formed on the gate insulating film using the sputtering method. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed. Next, an oxide semiconductor film was formed on the gate insulating film using the sputtering method. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed.

[0248] Next, an oxide semiconductor film was formed on the gate insulating film using the sputtering method. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed. Here, the oxide semiconductor film of Sample L was formed by laminating an oxide semiconductor film with a thickness of 30 nm on an oxide semiconductor film with a thickness of 5 nm that functions as a seed crystal, and a region having c-axis oriented crystallinity was formed. ​It is formed by performing a heat treatment as described. The oxide semiconductor film of sample M is formed by performing a heat treatment on an oxide semiconductor film with a film thickness of 25 n m.

[0249] First, the method for fabricating the oxide semiconductor film of sample L will be described. The oxide semiconductor film that functions as a seed crystal is formed by sputtering. As the sputtering target, In O 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] was used. Other film formation conditions were a substrate temperature of 200 °C during film formation, an oxygen gas flow rate ratio of 50% and an argon gas flow rate ratio of 50% for the film formation gas, a pressure of 0.6 Pa, a substrate-target distance of 100 mm, a DC (DC ) power supply of 5 kW, and a film thickness of 5 nm. After film formation, a heat treatment was performed at a heating temperature of 450 °C for 1 hour in a nitrogen atmosphere to crystallize the oxide semiconductor film that functions as a seed crystal. Then, an oxide semiconductor film with a film thickness of 30 n m was formed on the oxide semiconductor film that functions as a seed crystal using the sputtering method under the same film formation conditions as the oxide semiconductor film that functions as a seed crystal. A heat treatment was performed using an oven at a heating temperature of 450 °C for 1 hour in a nitrogen atmosphere, and further a heat treatment was performed at a heating temperature of 450 °C for 1 hour in a mixed atmosphere of nitrogen and oxygen to form an oxide semiconductor film having a c-axis oriented crystalline region.

[0250] Also, the oxide semiconductor film of sample M was formed by sputtering. As the sputtering target, In O 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] was used. was used. Other film formation conditions were a substrate temperature of 200 °C during film formation, the ratio of the film formation gas flow rate being 50% oxygen gas and 50% argon gas, a pressure of 0.6 Pa, a substrate-target distance of 10 0 mm, a DC power supply of 5 kW, and a film thickness of 25 nm. After film formation, heat treatment was performed using the RTA (Rapid Thermal Annealing) method at a heating temperature of 650 °C for 6 minutes in a nitrogen atmosphere, and further heat treatment was performed using an oven at a heating temperature of 450 °C for 1 hour in a mixed atmosphere of nitrogen and oxygen to form an oxide semiconductor film having no region with c-axis orientation. Next, a conductive film in which a titanium film, an aluminum film, and a titanium film were laminated was formed on the oxide semiconductor film using a sputtering method, and the conductive film was selectively etched to form a source electrode and a drain electrode. Then, a silicon oxide film with a thickness of 400 nm was formed as the first interlayer insulating film. Furthermore, an insulating film made of an acrylic resin with a thickness of 1.5 μm was formed as the second interlayer insulating film. Finally, heat treatment was performed at a heating temperature of 250 °C for 1 hour in a nitrogen atmosphere to fabricate Sample L and Sample M.

[0251] Regarding the above Sample L and Sample M, a negative voltage was applied to the gate while irradiating light to apply stress, and the Id-Vg characteristics of Sample L and Sample M were measured according to the stress time, and the change amount of the threshold voltage before and after applying stress was obtained. The above stress was applied in an atmospheric atmosphere at room temperature, with the gate voltage set to -20 V, the drain voltage set to 0.1 V, the source voltage set to 0 V, and the illuminance of the irradiation light set to 36000 (lx). Stress

[0252]

[0253] ​​​​​​​The time was 100 seconds, 300 seconds, 600 seconds, 1000 seconds, 1800 seconds, 3600 seconds, 720 0 seconds, 10000 seconds, 18000 seconds, 43200 seconds (12 hours), and the Id-Vg characteristics of sample L and sample M were measured. When measuring the Id-Vg characteristics, the drain voltage was set to +10 V, the gate voltage was swept in the range from -10 V to +10 V, and other conditions were the same as when stress was applied.

[0254] Fig. 25 shows a graph of the change amount of the threshold voltage of sample L and sample M. Fig. 25 shows a graph with the change amount of the threshold voltage ΔVth (V) on the vertical axis and the stress time (sec) on the horizontal axis.

[0255] From Fig. 25, the change amount ΔVth of the threshold voltage of sample L is at most about -1 V, while the variation of the change amount ΔVth of the threshold voltage of sample M is as large as about -2 V, and the change amount ΔVth of the threshold voltage of sample L is reduced to about half of that of sample M.

[0256] Thus, a transistor using an oxide semiconductor film in which a region having crystallinity with the c-axis oriented in the film is formed has more stable electrical characteristics against light irradiation and gate voltage stress and it was shown that the reliability is improved.

[0257] <5. Measurement by Photoresponse Defect Evaluation Method> In this section, a transistor using an oxide semiconductor film was fabricated according to the previous embodiment, and the stability of the oxide semiconductor film against light irradiation was evaluated using the photoresponse defect evaluation method for the transistor. The results of the evaluation will be described.

[0258] In this item, a photoresponse defect evaluation method was performed using Sample N and Sample O fabricated in the same manner as Sample L and Sample M. The photoresponse defect evaluation method is a method of measuring the relaxation of the current (photocurrent) flowing by irradiating a semiconductor film with light, fitting a graph of the relaxation of the photocurrent with an equation represented by a linear combination of exponential functions to obtain the relaxation time τ, and evaluating the defects in the semiconductor film from the relaxation time τ. Here, by using the relaxation time τ corresponding to a fast response and the relaxation time τ corresponding to a slow response (τ > τ), when the current ID is represented by a linear combination of binary exponential functions, the following equation is obtained. In the photoresponse defect evaluation method shown in this item, after 60 seconds in the dark state, the irradiation light was irradiated for 600 seconds, the irradiation light was stopped, and the relaxation of the photocurrent was measured for 3000 seconds. The irradiation light had a wavelength of 400 nm and an intensity of 3.5 mW / cm. The gate electrodes and source electrodes of Sample N and Sample O were fixed at 0 V, and a minute voltage of 0.1 V was applied to the drain electrode to measure the current value of the photocurrent. The channel length L and channel width W of Sample N and Sample O were set to L / W = 30 μm / 10000 μm. Graphs of the change in photocurrent in the photoresponse defect evaluation method for Sample N and Sample O are shown in FIGS. 26(A) and 26(B). The graphs shown in FIGS. 26(A) and 26(B) are

[0259] Here, the relaxation time τ corresponding to a fast response 1 and the relaxation time τ corresponding to a slow response 2 (τ 2 > τ 1 ) are used. When the current ID is represented as a linear combination of binary exponential functions, the following equation is obtained.

[0260]

Equation

[0261] In the photoresponse defect evaluation method shown in this item, after 60 seconds in the dark state, the irradiation light was irradiated for 600 seconds, the irradiation light was stopped, and the relaxation of the photocurrent was measured for 3000 seconds. The irradiation light had a wavelength of 400 nm and an intensity of 3.5 mW / cm². The gate electrodes and source electrodes of Sample N and Sample O were fixed at 0 V, and a minute voltage of 0.1 V was applied to the drain electrode to measure the current value of the photocurrent. The channel length L and channel width W of Sample N and Sample O were set to L / W = 30 μm / 10000 μm. Here, the relaxation time τ corresponding to a fast response and the relaxation time τ corresponding to a slow response 2 (τ > τ ) are used. When the current ID is represented as a linear combination of binary exponential functions, the following equation is obtained. Graphs of the change in photocurrent in the photoresponse defect evaluation method for Sample N and Sample O are shown in FIGS. 26(A) and 26(B). The graphs shown in FIGS. 26(A) and 26(B) are

[0262] Graphs of the change in photocurrent in the photoresponse defect evaluation method for Sample N and Sample O are shown in FIGS. 26(A) and 26(B). The graphs shown in FIGS. 26(A) and 26(B) are shown in FIGS. 26(A) and 26(B). The graphs shown in FIGS. 26(A) and 26(B) are ​The photocurrent ID is plotted on the vertical axis, and the elapsed time t (sec) is plotted on the horizontal axis. Also, when the graphs shown in FIGS. 26(A) and 26(B) are fitted with an equation represented by a linear combination of exponential functions, they are represented by the following equation.

[0263]

Equation

[0264]

Equation

[0265] From FIGS. 26(A) and 26(B), the sample N having an oxide semiconductor film including a region having c-axis oriented crystallinity has a smaller maximum value of photocurrent than sample O, and the relaxation times τ and τ are also shorter. Here, the maximum value Imax of the photocurrent of sample N is 6. 1 2×10 2 A, the relaxation time τ is 0.3 seconds, and the relaxation time τ -11 is 39 seconds. On the other hand, the maximum value Imax of the photocurrent of sample O is 8.0×10 1 A, the relaxation time τ 2 is 3.9 seconds, and the relaxation time τ is 98 seconds. -9 For sample N and sample O, it was shown that the relaxation of the photocurrent ID can be fitted by a linear combination of exponential functions consisting of at least two types of relaxation times. This suggests that the relaxation of the photocurrent ID in both sample N and sample O has two or more types of relaxation processes. This is related to the two types of recombination models shown in FIGS. 5(A) and 5(B), where the photoelectric 1 current ID relaxation can be fitted by a linear combination of exponential functions consisting of at least two types of relaxation times. This suggests that the relaxation of the photocurrent ID in both sample 2 N and sample O has two or more types of relaxation processes. This is related to the two types of recombination models shown in FIGS. 5(A) and 5(B), where the photoelectric

[0266] For both sample N and sample O, it was shown that the relaxation of the photocurrent ID can be fitted by a linear combination of exponential functions consisting of at least two types of relaxation times. This suggests that the relaxation of the photocurrent ID in both sample N and sample O has two or more types of relaxation processes. This is related to the two types of recombination models shown in FIGS. 5(A) and 5(B), where the photoelectric current ID relaxation can be fitted by a linear combination of exponential functions consisting of at least two types of relaxation times. This suggests that the relaxation of the photocurrent ID in both sample N and sample O has two or more types of relaxation processes. This is related to the two types of recombination models shown in FIGS. 5(A) and 5(B), where the photoelectric It is consistent with the relaxation process of the current. That is, as in the band diagram shown in FIG. 5 in the previous embodiment, it is suggested that trap levels exist in the band gap of the oxide semiconductor.

[0267] Furthermore, for sample N, which is an oxide semiconductor film including a region having c-axis-oriented crystallinity, the relaxation time τ 1 and the relaxation time τ 2 were shorter than those of sample O. This suggests that the trap levels caused by oxygen defects were fewer in sample N in the recombination models shown in FIGS. 5(A ) and 5(B). That is, it can be considered that the defects in the oxide semiconductor film that can function as trap levels were reduced because a region having c-axis-oriented crystallinity was included.

[0268] From the above, it was found that by forming a region having c-axis-oriented crystallinity in the oxide semiconductor film, the film takes a more stable structure against light irradiation. Therefore, by using such an oxide semiconductor film for a transistor, a highly reliable transistor having stable electrical characteristics can be provided.

[0269] <6.TDS Analysis> In this section, an oxide semiconductor film was fabricated according to the previous embodiment, and the oxide semiconductor film was evaluated using TDS (Thermal Desorption Spectroscopy), and the results will be described.

[0270] In this section, an oxide semiconductor film was formed on a quartz substrate using a sputtering method. For sample P1, the substrate temperature during film formation was room temperature, for sample P2, the substrate temperature during film formation Sample P3 with a substrate temperature of 200 °C during film formation, sample P4 with a substrate temperature of 300 °C during film formation, and sample P5 with a substrate temperature of 400 °C during film formation were prepared. Here, sample P1, sample P2, and sample P3 are oxide semiconductor films that do not contain regions with c-axis oriented crystallinity, and sample P4 and sample P5 are oxide semiconductor films that contain regions with c-axis oriented crystallinity. The film formation target for the oxide semiconductor film is In 2 O 3 :Ga 2 O 3 :ZnO = 1:1:2 [mole ratio] was used. Other film formation conditions were a film formation gas flow rate of 30 sccm of argon gas and 15 sccm of oxygen gas, a pressure of 0.4 Pa, a substrate-target distance of 60 mm, a high-frequency (RF) power supply of 0.5 kW, and a film thickness of 50 nm For the quartz substrate, in order to reduce the factors of desorbed gas from the substrate during TDS analysis, a heat treatment at 850 °C was performed in a dry atmosphere in advance.

[0271] TDS analysis is an analytical method in which a sample in a vacuum chamber is heated with a halogen lamp, and gas components generated from the entire sample during heating are detected by a quadrupole mass spectrometer (QMS: Quardrupole Ma ss Spectrometer). The detected gas components are distinguished by M / z (mass / charge) and detected as a mass spectrum. / z (mass / charge) and detected as a mass spectrum.

[0272] In this example, TDS analysis was performed using WA1000S manufactured by Denshi Kagaku Co., Ltd. The measurement conditions were an SEM voltage of 1500 V, a substrate surface temperature from room temperature to 400 °C, a vacuum degree of 1.5 × 10 -7 Pa or less, a Dwell Time of 0.2 (sec / U), and a heating rate of 30 (°C / min), and H2 The mass spectrum of M / z = 18 corresponding to O was detected.

[0273] For samples P1 to P5, the results of the TDS analysis are shown in the graph of Fig. 27. The graph shown in Fig. 27 has the desorbed water molecular weight (M / z = 18) [molecule s / cm 3 (counts) on the vertical axis and the substrate temperature (°C) during film formation on the horizontal axis. Here, The desorbed water molecular weight is an amount obtained by taking the integral value in the vicinity of the temperature rise of 300 °C in the mass spectrum of M / z = 18, and is the molecular weight of water desorbed from the oxide semiconductor film. Note that although there is also a peak in the mass spectrum of M / z = 18 in the vicinity of the temperature rise of 100 °C, this is considered to be the amount of water adsorbed on the surface of the oxide semiconductor film, and thus is not counted as the desorbed water molecular weight. (counts) on the vertical axis and the substrate temperature (°C) during film formation on the horizontal axis. Here, The desorbed water molecular weight is an amount obtained by taking the integral value in the vicinity of the temperature rise of 300 °C in the mass spectrum of M / z = 18, and is the molecular weight of water desorbed from the oxide semiconductor film. Note that although there is also a peak in the mass spectrum of M / z = 18 in the vicinity of the temperature rise of 100 °C, this is considered to be the amount of water adsorbed on the surface of the oxide semiconductor film, and thus is not counted as the desorbed water molecular weight.

[0274] From the graph of Fig. 27, it can be seen that the higher the substrate temperature during film formation, the smaller the molecular weight of water desorbed from each sample. Therefore, by raising the substrate temperature during film formation, that is, by forming a region having crystallinity with the c-axis oriented in the oxide semiconductor film, it is possible to reduce molecules and ions containing H (hydrogen atoms), represented by H 2O (water) molecules, contained in the oxide semiconductor film. From the above, by forming an oxide semiconductor film containing a region having crystallinity with the c-axis oriented, 2 it is possible to reduce impurities such as molecules and ions containing H (hydrogen atoms), represented by H 2O (water) molecules, which can serve as a carrier supply source in the oxide semiconductor film. As a result,

[0275] it is possible to prevent a change in the electrical conductivity of the oxide semiconductor film and use the oxide semiconductor film for a transistor. From the above, by forming an oxide semiconductor film containing a region having crystallinity with the c-axis oriented, 2 it is possible to reduce impurities such as molecules and ions containing H (hydrogen atoms), represented by H 2O (water) molecules, which can serve as a carrier supply source in the oxide semiconductor film. As a result, it is possible to prevent a change in the electrical conductivity of the oxide semiconductor film and use the oxide semiconductor film for a transistor. The reliability of the resistor can be improved.

[0276] <7. Secondary Ion Mass Spectrometry> In this section, an oxide semiconductor film was fabricated according to the previous embodiment, and the oxide semiconductor film was evaluated using secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectr ometry), and the results will be described.

[0277] In this section, an oxide semiconductor film was formed on a quartz substrate using a sputtering method, and during film formation samples Q1 to Q7 with a substrate temperature of room temperature and samples R1 to R7 with a substrate temperature of 400 °C during film formation were fabricated. Here, samples Q1 to Q7 are oxide semiconductor films that do not contain regions with c-axis oriented crystallinity, and samples R1 to R7 are oxide semiconductor films that contain regions with c-axis oriented crystallinity. The film formation target of the oxide semiconductor film is In O 2 :Ga 3 O 2 :ZnO = 1:1:2 [molar ratio 3 was used. Other film formation conditions were a film formation gas flow rate of 30 sccm of argon gas and 15 sccm of oxygen gas, a pressure of 0.4 Pa, a substrate-target distance of 60 mm, a high-frequency (RF) power supply of 0.5 kW, and a film thickness of 300 nm. Regarding the quartz substrate it was heat-treated in a nitrogen atmosphere at 850 °C for 1 hour in advance.

[0278] Furthermore, for samples Q2 to Q7 and samples R2 to R7, after the formation of the oxide semiconductor film, the quartz substrate on which the oxide semiconductor film was formed was heat-treated. The heat treatment was to raise the temperature to a predetermined temperature in a nitrogen atmosphere and then switch to an oxygen atmosphere to maintain the predetermined temperature It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced. It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced. It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced. It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced. It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced. It was maintained for 1 hour and then cooled down in an oxygen atmosphere. The predetermined temperatures were 200 °C for sample Q2 and sample R2, 250 °C for sample Q3 and sample R3, 350 °C for sample Q4 and sample R4, 450 °C for sample Q5 and sample R5, 550 °C for sample Q6 and sample R6, and 650 °C for sample Q7 and sample R7. In this way, samples Q1 to Q7 and samples R1 to R7 of an oxide semiconductor film formed on a quartz substrate were produced.

[0279] In this item, SIMS analysis was performed on the above samples Q1 to Q7 and samples R1 to R7. The results of the SIMS analysis of samples Q1 to Q7 are shown in Fig. 28(A), and the results of the SIMS analysis of samples R1 to R7 are shown in the graph of Fig. 28(B). The vertical axis of the graphs in Fig. 28(A) and Fig. 28(B) shows the concentration of hydrogen (atoms / cm In this item, SIMS analysis was performed on the above samples Q1 to Q7 and samples R1 to R7. The results of the SIMS analysis of samples Q1 to Q7 are shown in Fig. 28(A), and the results of the SIMS analysis of samples R1 to R7 are shown in the graph of Fig. 28(B). The vertical axis of the graphs in Fig. 28(A) and Fig. 28(B) shows the concentration of hydrogen (atoms / cm In this item, SIMS analysis was performed on the above samples Q1 to Q7 and samples R1 to R7. The results of the SIMS analysis of samples Q1 to Q7 are shown in Fig. 28(A), and the results of the SIMS analysis of samples R1 to R7 are shown in the graph of Fig. 28(B). The vertical axis of the graphs in Fig. 28(A) and Fig. 28(B) shows the concentration of hydrogen (atoms / cm In this item, SIMS analysis was performed on the above samples Q1 to Q7 and samples R1 to R7. The results of the SIMS analysis of samples Q1 to Q7 are shown in Fig. 28(A), and the results of the SIMS analysis of samples R1 to R7 are shown in the graph of Fig. 28(B). The vertical axis of the graphs in Fig. 28(A) and Fig. 28(B) shows the concentration of hydrogen (atoms / cm ) and the horizontal axis shows the depth (nm) from the surface of the oxide semiconductor film of the oxide semiconductor film and the quartz substrate. 3 ) and the horizontal axis shows the depth (nm) from the surface of the oxide semiconductor film of the oxide semiconductor film and the quartz substrate. ) and the horizontal axis shows the depth (nm) from the surface of the oxide semiconductor film of the oxide semiconductor film and the quartz substrate.

[0280] From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor From the graphs in Fig. 28(A) and Fig. 28(B), the hydrogen concentrations in the oxide semiconductor films of sample Q1 and sample R1 are almost the same, but the hydrogen concentrations in the oxide semiconductor films of samples R2 to R7 tend to be lower than those of samples Q2 to Q7. This indicates that the higher the substrate temperature during the formation of the oxide semiconductor film, the less likely hydrogen will be incorporated during the subsequent heat treatment. In particular, looking at the graphs of samples Q3 to Q5, as the temperature of the heat treatment increases, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor The layer with high hydrogen concentration spreads deep into the film, and when the temperature is further increased, hydrogen is released from the surface side of the oxide semiconductor film. As shown in the figure, hydrogen is released from the oxide semiconductor film. If a crystalline region is not formed, hydrogen will be mixed in and removed during the heat treatment. In the sample R2, a region having crystallinity in which the c-axis is aligned is formed in the oxide semiconductor film. No such behavior is observed in sample R7.

[0281] This is because the substrate temperature during oxide semiconductor film formation is increased so that the c-axis is aligned in the oxide semiconductor film. By forming a region having high crystallinity, hydrogen is easily bonded from the oxide semiconductor film. This is thought to be due to the reduction in dangling bonds and the like.

[0282] Therefore, the substrate temperature during the formation of the oxide semiconductor film is increased so that the c-axis is aligned in the oxide semiconductor film. By forming a region having crystallinity, a carrier supply source can be formed in the oxide semiconductor film. This prevents the increase of hydrogen that may occur due to heat treatment. The present invention also provides a transistor including the oxide semiconductor film, which is capable of suppressing a change in electrical conductivity of the oxide semiconductor film. The reliability can be improved. [Explanation of symbols]

[0283] 11 Sites 12 In atoms 13 Ga atoms 14 Zn atoms 15 O atoms 31 Processing Room 33 Exhaust means 35 Gas supply means 37 Power supply 40 Substrate support 41 Target 43 Aeon 45 atoms 47 atoms 51 substrates 53 underlayer insulating film 55 oxide semiconductor film 56 oxide semiconductor film 59 oxide semiconductor film 63 gate insulating film 65 gate electrode 69 insulating film 120 transistors 130 transistors 140 transistors 150 transistors 160 transistors 170 transistors 180 transistors 351 substrates 353 underlayer insulating film 359 oxide semiconductor film 363 gate insulating film 365 gate electrode 369 insulating film 371 metal oxide film 373 metal oxide film 55a seed crystal 55b oxide semiconductor film 56a seed crystal 56b oxide semiconductor film 61a source electrode 61b drain electrode 361a source electrode 361b drain electrode 500 substrates 501 pixel section 502 scanning line drive circuit 503 scanning line drive circuit 504 signal line drive circuit 510 capacitor wiring 512 gate wiring 513 gate wiring 514 drain electrode layer 516 transistors 517 transistors 518 liquid crystal element 519 liquid crystal element 520 pixels 521 switching transistor 522 driving transistor 523 capacitive element 524 light-emitting element 525 signal line 526 scanning line 527 power supply line 528 common electrode 1001 main body 1002 housing 1004 keyboard button 1021 main body 1022 fixing part 1023 display part 1024 operation button 1025 external memory slot 1030 housing 1031 housing 1032 display panel 1033 speaker 1034 microphone 1035 operation key 1036 pointing device 1037 camera lens 1038 external connection terminal 1040 solar cell 1041 external memory slot 1050 television apparatus 1051 housing 1052 memory medium playback / recording unit 1053 display part 1054 external connection terminal 1055 stand 1056 external memory 1003a display part 1003b display part

Claims

1. A gate electrode, a gate insulating film, an oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak is detected at 2θ of 55.7° or more and 56.732° or less as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film having a nitrogen concentration of 7% or more represented by N / (N + O) in the film), wherein the oxide semiconductor film contains In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a region having crystallinity in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

2. A gate electrode, a gate insulating film, an oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak is detected at 2θ of 55.7° or more and 56.732° or less as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film having a nitrogen concentration of 7% or more represented by N / (N + O) in the film), wherein the oxide semiconductor film contains In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a plurality of regions having crystallinity in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

3. A gate electrode, a gate insulating film, an oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak due to diffraction in the (1m0) plane (where m is a positive integer) is detected as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film having a nitrogen concentration of 7% or more represented by N / (N + O) in the film), wherein the oxide semiconductor film contains In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a region having crystallinity in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

4. A gate electrode, a gate insulating film, An oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak due to diffraction in the (1m0) plane (where m is a positive integer) is detected as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film containing 7% or more of the nitrogen concentration represented by N / (N + O) in the film), and the oxide semiconductor film includes In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a plurality of crystalline regions in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

5. a gate electrode, a gate insulating film, an oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak other than the peak due to diffraction in the (00n) plane (where n is a positive integer) is detected as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film containing 7% or more of the nitrogen concentration represented by N / (N + O) in the film), and the oxide semiconductor film includes In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a crystalline region in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

6. a gate electrode, a gate insulating film, an oxide semiconductor film having a region overlapping with the gate electrode via the gate insulating film (however, excluding the case where a peak other than the peak due to diffraction in the (00n) plane (where n is a positive integer) is detected as a result of measuring the spectrum using the out-of-plane method of XRD measurement and the case of an oxide semiconductor film containing 7% or more of the nitrogen concentration represented by N / (N + O) in the film), and the oxide semiconductor film includes In, Ga, and Zn, the oxide semiconductor film is non-single crystal, the oxide semiconductor film has a plurality of crystalline regions in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, a transistor.

7. In any one of Claims 1 to 6, In the measurement of electron beam diffraction intensity by irradiating an electron beam from the thickness direction, in the case where the magnitude of the scattering vector is taken as the horizontal axis, the first peak is at 3.3 nm －１ or more and 4.1 nm －１ or less, and the full width at half maximum of the first peak is 0.2 nm －１ or more, and the transistor having a region thereof.

8. In any one of Claims 1 to 6, In the measurement of electron beam diffraction intensity by irradiating an electron beam from the thickness direction, in the oxide semiconductor film, when the magnitude of the scattering vector is taken as the horizontal axis, the first peak is measured at 3.3 nm －１ or more and 4.1 nm －１ or less, and the full width at half maximum of the first peak is 0.4 nm －１ or more and 0.7 nm －１ or less, and having a region, a transistor.

9. In any one of Claims 1 to 8, the gate insulating film has a region on the gate electrode, The oxide semiconductor film has a region on the gate insulating film, and is a transistor.

10. In any one of Claims 1 to 8, the gate insulating film has a region on the oxide semiconductor film, the gate electrode has a region on the gate insulating film, and is a transistor.

11. In any one of Claims 1 to 10, a source electrode, a drain electrode, and has the source electrode has a region in contact with the upper surface of the oxide semiconductor film, the drain electrode has a region in contact with the upper surface of the oxide semiconductor film, and is a transistor.

12. In any one of Claims 1 to 10, a source electrode, a drain electrode, and has the oxide semiconductor film has a region in contact with the upper surface of the source electrode and a region in contact with the upper surface of the drain electrode, and is a transistor.

13. In any one of Claims 1 to 12, The oxide semiconductor film has a region where the concentration of lithium is 5×10 １５ cm －３ or less, the concentration of sodium is 5×10 １６ cm －３ or less, and the concentration of potassium is 5×10 １５ cm －３ or less, and is a transistor.

14. In any one of Claims 1 to 13, the gate insulating film is a laminate of a first layer having oxygen and silicon and a second layer having nitrogen and silicon, and is a transistor.

15. In any one of Claims 1 to 13, the gate insulating film has a third layer having oxygen and silicon, the third layer has a region in contact with the oxide semiconductor film, and is a transistor.

16. In any one of Claims 1 to 15, has a fourth layer having oxygen and silicon, the oxide semiconductor film has a region between the gate insulating film and the fourth layer, and is a transistor.

17. In Claim 16, the fourth layer has a region in contact with the gate insulating film in a cross-sectional view in the channel length direction, and is a transistor.

18. has a pixel portion, the pixel portion has a transistor according to any one of Claims 1 to 17, and is a display device.

19. has a pixel portion and a driving circuit, each of the pixel portion and the driving circuit has a transistor according to any one of Claims 1 to 17, and is a display device.

20. In Claim 18 or Claim 19, the pixel portion has a liquid crystal element, and is a display device.

21. In Claim 18 or Claim 19, the pixel portion has a light emitting element, and is a display device.

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