Apparatus and method for depositing a layer of semiconductor material on a substrate wafer
By coating stainless steel components in semiconductor deposition apparatuses with amorphous silicon and hydrogen layers, the issue of metal impurities entering the semiconductor layer is addressed, achieving higher purity and improved minority charge carrier lifetimes.
Patent Information
- Application Number
- JP2023510449
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-08-14
- Filing Date
- 2021-07-16
- Publication Date
- 2025-05-26
- Estimated Expiration
- 2041-07-16
AI Technical Summary
Stainless steel components in semiconductor deposition apparatuses can release metal impurities like iron into the semiconductor layer, compromising the purity and functionality of electronic components.
Coating stainless steel components with an amorphous layer containing silicon and hydrogen, such as hydrogenated amorphous silicon (a-Si:H) or functional silica-like coatings, to prevent metal impurities from entering the semiconductor layer.
The amorphous coatings effectively prevent metal impurities from contaminating the semiconductor layer, resulting in higher purity and longer minority charge carrier lifetimes, which meet the stringent requirements of the electronics industry.
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Abstract
Description
Technical Field
[0001] The subject matter of this invention is an apparatus for depositing a layer of semiconductor material on a substrate wafer by deposition from the gas phase. Yet another subject matter of this invention is a method of employing such an apparatus.
Background Art
[0002] Prior Art / Problems Demanding applications in the field of the production of base materials for the electronics industry include the deposition of a layer of semiconductor material on a substrate wafer, more particularly the deposition of an epitaxial layer on a substrate wafer.
[0003] During the deposition of the layer, the substrate wafer is positioned on a susceptor at the deposition temperature. Process gas is passed over the upper surface of the substrate wafer, and the decomposition products of the compounds (precursors) contained in said gas crystallize as a layer of material on said upper surface.
[0004] An apparatus such as a single-wafer reactor described in US2009 314 205 A1 is particularly suitable for the above-mentioned purpose. The reactor has a base ring disposed between an upper dome and a lower dome. Together they form a reaction chamber that houses a susceptor for holding a substrate wafer during the deposition of a layer of semiconductor material. The substrate wafer is conveyed into the reaction chamber through a slit valve door and a slit valve tunnel. Process gas is passed from a gas inlet to a gas outlet by a gas supply line. The substrate wafer is brought to the deposition temperature by thermal radiation.
[0005] Base materials for the electronics industry must contain very low levels of foreign substances that can affect the function of electronic components. Such substances include in particular metallic impurities. In order to meet this requirement even under common deposition conditions such as the deposition temperature, apparatus components such as the base ring, gas inlet, gas outlet, gas supply line, delivery gas line (including bellows and cones), slit valve door, and slit valve tunnel are generally made of stainless steel.
Summary of the Invention
Problems to be Solved by the Invention
[0006] Stainless steel is considered to be particularly corrosion-resistant, but it is highly desirable to prevent metal impurities such as iron from stainless steel from entering the layer of semiconductor material deposited on the substrate wafer.
Means for Solving the Problems
[0007] The problem addressed by this invention is an apparatus for depositing a layer of semiconductor material on a substrate wafer, a base ring between an upper dome and a lower dome, a susceptor as a carrier for the substrate wafer during layer deposition, a gas inlet and a gas outlet for passing a process gas over the upper surface of the substrate wafer, and a gas supply line, a slit valve tunnel and a slit valve door, and raising and rotating means for raising and rotating the susceptor and the substrate wafer, which is solved by an apparatus in which one or more apparatus components made of stainless steel are covered with an amorphous layer containing silicon and hydrogen.
[0008] It has been found that a certain amorphous coating for stainless steel is particularly suitable for the intended protection of the substrate wafer having a deposited layer of semiconductor material against impurities. These are coatings for stainless steel that are themselves produced by thermally induced chemical vapor deposition and contain silicon and hydrogen.
[0009] At least one device component made of stainless steel is preferably coated with a coating for stainless steel, at least on the surface that is exposed to the process gas during the deposition of the layer of semiconductor material on the substrate wafer. Preferably, at least one component, such as a base ring, a gas inlet, a gas outlet, a gas supply line, a slit valve door, a slit valve tunnel, and a lift and rotation unit for lifting and rotating the susceptor and the substrate wafer, is coated with this coating. It is more preferable if all or almost all of the device components made of stainless steel and in contact with the process gas under the deposition conditions are covered with a coating for stainless steel.
[0010] The coating preferably contains hydrogenated amorphous silicon (a-Si:H) or (a-Si x C 1-x :H), and more preferably a functional silica-like coating (a-SiO x :CH y ). The hydrogenated amorphous silicon coating on stainless steel is available, for example, under the trade name Silicolloy® from SilcoTek Corp. and under the trade name Silcor® SiC from PT&B SILCOR GmbH. The functional silica-like coating is similarly available under the trade name Dursan® from SilcoTek. The stainless steel is preferably coated by CVD (chemical vapor deposition) or PCVD (plasma-activated CVD). Such a method for placing such a coating on stainless steel is described, for example, in EP 2 988 327 A1.
[0011] Yet another subject of the present invention is a method for depositing an epitaxial layer of semiconductor material on a substrate wafer, wherein the substrate wafer is coated with the epitaxial layer in an apparatus having the above-described characteristics.
[0012] The substrate wafer is preferably a semiconductor wafer of single-crystalline silicon, on which a layer of single-crystalline silicon is deposited epitaxially under standard pressure. The deposition temperature is preferably from 1000 °C to 1300 °C. The substrate wafer and / or the epitaxial layer may be doped with an electrically active dopant. The type of dopant (p-type, n-type) may be the same or different. The substrate wafer preferably has a diameter of at least 200 mm, more preferably at least 300 mm.
[0013] In the following description, reference is made to the drawings.
Brief Description of the Drawings
[0014]
Figure 1
Figure 2
Embodiments for Carrying Out the Invention
[0015] Figure 1 shows in cross-sectional representation a plurality of shape configurations of the device to which this invention pertains. The device 3 includes a base ring 7, an upper dome 1, and a lower dome 2. Arranged above the upper dome 1 and below the lower dome 2 are lamps 6 for heating the substrate wafer to the deposition temperature. During layer deposition, the substrate wafer 4 is positioned on a susceptor 5, which itself is carried by a susceptor carrier arm. The susceptor carrier arm is part of the lifting and rotating means for raising and rotating the susceptor and the substrate wafer. Process gas is introduced into the device 3 via a gas supply line and through a gas inlet 8, and is discharged from the device through a gas outlet 10. Further, the illustrated embodiment includes yet another gas inlet 9 and yet another gas outlet 11 for passing purge gas through a region below the susceptor during the process of depositing a layer on the substrate wafer.
[0016] Exemplary embodiment The exemplary embodiment shows that useful effects can be observed even when the use of coated stainless steel components is restricted to the use of coated gas supply lines and coated delivery gas lines. In an Epi 300 Centura (registered trademark) device from Applied Materials, Inc, an epitaxial layer of single crystal silicon was deposited on a single crystal silicon substrate wafer having a diameter of 300 mm. During one series of experiments, the surface of the gas supply line in contact with the process gas and the first meter of the delivery gas line (including bellows and cones) were coated with a Darson (registered trademark) layer, while during a second series of experiments, they were coated with silicon dioxide, and during a third series of experiments, they were not coated and were in their original state with a stainless steel surface. At the start of each series of experiments, the device was in a newly serviced state.
[0017] After deposition of the epitaxial layer, the lifetime of minority charge carriers was determined by μPCD for the product wafers.
[0018] In FIG. 2, the measured μPCD values are plotted against the number N of measured substrate wafers having the deposited epitaxial layer. In the case of substrate wafers having an epitaxial layer generated according to this invention, longer lifetimes were measured, and it was suggested that they reached the applied threshold (dashed line) faster and had fewer impurities such as iron released and incorporated into the epitaxial layer.
Explanation of Signs
[0019] List of Symbols 1: Upper Dome 2: Lower Dome 3: Apparatus 4: Substrate Wafer 5: Susceptor 6: Lamp 7: Base Ring 8: Gas Inlet for Process Gas 9: Gas Inlet for Purge Gas 10: Gas Outlet for Process Gas 11: Gas Outlet for Purge Gas μPCD: Lifetime Value Measured by μPCD Measurement N: Number of Measured Substrate Wafers Having the Deposited Epitaxial Layer
Claims
Claim 1 An apparatus for depositing a layer of semiconductor material on a substrate wafer, comprising: a base ring between an upper dome and a lower dome; a susceptor serving as a carrier for the substrate wafer during deposition of the layer; a gas inlet, a gas outlet, a delivery gas line, and a gas supply line for passing a process gas over the upper surface of the substrate wafer; a slit valve tunnel and a slit valve door; lifting and rotating means for lifting and rotating the susceptor and the substrate wafer; and One or more device components made of stainless steel are covered with a functional silica-like coating (a-SiO x :CH y ), the apparatus components of stainless steel include the base ring, the gas inlet, the gas outlet, the gas supply line, the delivery gas line including a bellows and a cone, the slit valve tunnel, the slit valve door, and the lifting and rotating means; The apparatus is characterized in that it is designed to deposit an epitaxial layer on the substrate wafer under standard pressure. Claim 2 The apparatus according to claim 1, characterized in that it is configured as a single-wafer reactor. Claim 3 A method for depositing an epitaxial layer of semiconductor material on a substrate wafer, comprising: The method is characterized in that the substrate wafer is coated with the epitaxial layer in the apparatus according to claim 1 or claim 2.
Citation Information
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