Semiconductor device and manufacturing method

The semiconductor device addresses the challenge of forming deep high-concentration regions by incorporating a hydrogen peak and specific trench and donor concentration designs, resulting in improved performance and adjustable carrier lifetimes.

JP7683287B2Active Publication Date: 2025-05-27FUJI ELECTRIC CO LTD
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Patent Information

Application Number
JP2021066101
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-04-08
Publication Date
2025-05-27
Estimated Expiration
2041-04-08

AI Technical Summary

Technical Problem

There is a challenge in forming a high-concentration region, such as a buffer region, that extends deeply in the depth direction within semiconductor devices.

Method used

A semiconductor device with a hydrogen peak located 25 μm or more away from the lower surface, and a high-concentration region extending 4 μm or more from the hydrogen peak's vertex toward the upper surface, is implemented. This device includes a trench portion on the upper surface with specific carrier lifetime distributions and donor concentration profiles.

Benefits of technology

The solution effectively forms a deep high-concentration region, enhancing the semiconductor device's performance and allowing for the adjustment of carrier lifetimes and donor concentrations to optimize device characteristics.

✦ Generated by Eureka AI based on patent content.

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Abstract

To form a high-concentration region which is long in a depth direction.SOLUTION: There is provided a semiconductor device provided with an IGBT, including: a semiconductor substrate which has upper and lower surfaces, and throughout which bulk donors are distributed; a hydrogen peak including an apex which is arranged 25 μm or more away from the lower surface of the semiconductor substrate in a depth direction, and at which a hydrogen chemical concentration shows a local maximum value, an upper tail where the hydrogen chemical concentration decreases in a direction from the apex toward the upper surface, and a lower tail where the hydrogen chemical concentration decreases in a direction from the apex toward the lower surface more gradually than the upper tail; and a first high concentration region having a donor concentration higher than a bulk donor concentration and including a region extending for 4 μm or more in a direction from the apex of the hydrogen peak toward the upper surface.SELECTED DRAWING: Figure 2
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Description

Technical Field

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof.

Background Art

[0002] Conventionally, a technique of implanting protons into a semiconductor substrate to form a buffer region is known (see, for example, Patent Document 1). Patent Document 1 Japanese Patent Application Laid-Open No. 2014-138173

Summary of the Invention

Problems to be Solved by the Invention

[0003] There may be a case where a high-concentration region such as a buffer region is desired to be formed long in the depth direction.

Means for Solving the Problems

[0004] In order to solve the above problems, in a first aspect of the present invention, a semiconductor device provided with an IGBT is provided. The semiconductor device may include a semiconductor substrate having an upper surface and a lower surface, and a bulk donor distributed throughout. The semiconductor device may include a hydrogen peak. The hydrogen peak may have a vertex at which the hydrogen chemical concentration shows a maximum value and is located 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction. The hydrogen peak may have an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface. The hydrogen peak may have a lower skirt in which the hydrogen chemical concentration decreases more gently from the vertex toward the lower surface than the upper skirt. The semiconductor device may include a first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the vertex of the hydrogen peak toward the upper surface.

[0005] The semiconductor device may include a trench portion provided on the upper surface of the semiconductor substrate. In a region from the lower end of the trench portion to the hydrogen peak, the carrier lifetime may be flat, monotonically increasing, or monotonically decreasing.

[0006] The lower end of the trench portion may be disposed at a first distance from the bottom surface. The second distance between the hydrogen peak and the bottom surface may be 0.3 times or more and 0.8 times or less of the first distance.

[0007] The semiconductor device may be provided at the same depth position as the hydrogen peak and include a donor concentration peak where the donor concentration distribution in the depth direction exhibits a peak. The semiconductor device may be disposed on the upper surface side of the semiconductor substrate with respect to the donor concentration peak and include an upper flat portion where the donor concentration distribution in the depth direction is flat. The semiconductor device may be disposed on the lower surface side of the semiconductor substrate with respect to the donor concentration peak and include a lower flat portion where the donor concentration distribution in the depth direction is flat. The donor concentration of the upper flat portion may be 0.5 times or more and 2 times or less of the donor concentration of the lower flat portion.

[0008] The hydrogen peak may be disposed on the upper surface side of the semiconductor substrate.

[0009] The semiconductor substrate may have a transistor portion provided with an IGBT and a diode portion provided with a diode. The diode portion may be disposed on the upper surface side with respect to the hydrogen peak and have a lifetime adjustment portion where the carrier lifetime distribution in the depth direction exhibits a minimum value. The transistor portion may have a lifetime non-adjustment portion where the carrier lifetime distribution does not exhibit a minimum value at the same depth position as the lifetime adjustment portion of the diode portion. A hydrogen peak and a first high-concentration region may be provided in a region overlapping with the lifetime non-adjustment portion in the depth direction.

[0010] The lifetime adjustment portion may have a helium peak where the helium chemical concentration distribution in the depth direction exhibits a peak. The lifetime non-adjustment portion may have a flat helium chemical concentration distribution at the same depth position as the helium peak.

[0011] The diode portion may have a hydrogen peak. The diode portion may have a second high-concentration region where the donor concentration is higher than the bulk donor concentration and includes a region extending from the hydrogen peak toward the upper surface. The length by which the second high-concentration region extends toward the upper surface may be longer than the length by which the first high-concentration region extends toward the upper surface.

[0012] In a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device including a semiconductor substrate having an upper surface and a lower surface and in which a bulk donor is distributed throughout, and an IGBT is provided. The manufacturing method may include a hydrogen ion implantation step of implanting hydrogen ions into the semiconductor substrate from the lower surface at an acceleration energy greater than 1.4 MeV to form a hydrogen peak at which the hydrogen chemical concentration exhibits a maximum value. The manufacturing method may include an annealing step of annealing the semiconductor substrate to form a first high-concentration region including a region in which the donor concentration is higher than the bulk donor concentration and extending 4 μm or more from the apex of the hydrogen peak toward the upper surface.

[0013] The dose amount of hydrogen ions in the hydrogen ion implantation step may be 1×10 12 / cm 2 or more.

[0014] Note that the above summary of the invention does not list all the necessary features of the present invention. Also, sub-combinations of these feature groups may also be inventions.

Brief Description of the Drawings

[0015]

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Embodiments for Carrying Out the Invention

[0016] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention.

[0017] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of the substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction during mounting of the semiconductor device.

[0018] In this specification, when explaining technical matters, orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis may be used. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without indicating positive or negative, it means directions parallel to the +Z-axis and -Z-axis.

[0019] In this specification, orthogonal axes parallel to the upper surface and the lower surface of the semiconductor substrate are the X-axis and the Y-axis. Also, an axis perpendicular to the upper surface and the lower surface of the semiconductor substrate is the Z-axis. In this specification, the direction of the Z-axis may sometimes be referred to as the depth direction. Also, in this specification, including the X-axis and the Y-axis, a direction parallel to the upper surface and the lower surface of the semiconductor substrate may sometimes be referred to as the horizontal direction. When referred to as the upper surface side of the semiconductor substrate in this specification, it refers to the region from the center in the depth direction of the semiconductor substrate to the upper surface. When referred to as the lower surface side of the semiconductor substrate, it refers to the region from the center in the depth direction of the semiconductor substrate to the lower surface.

[0020] In this specification, when referred to as "identical" or "equal", it may include cases having errors due to manufacturing variations or the like. Such errors are, for example, within 10%.

[0021] In this specification, the conductivity type of the doped region doped with impurities is described as P-type or N-type. In this specification, impurities may particularly mean either an N-type donor or a P-type acceptor, and may be referred to as dopants. In this specification, doping means introducing a donor or an acceptor into a semiconductor substrate to obtain a semiconductor showing an N-type conductivity type or a semiconductor showing a P-type conductivity type.

[0022] In this specification, the doping concentration means the concentration of donors or acceptors in the thermal equilibrium state. In this specification, the net doping concentration means the net concentration obtained by adding together the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including the polarity of the charges. As an example, when the donor concentration is N D , and the acceptor concentration is N A , the net net doping concentration at any position is N D - N A .

[0023] Donors have the function of supplying electrons to a semiconductor. Acceptors have the function of receiving electrons from a semiconductor. Donors and acceptors are not limited to the impurities themselves. For example, a VOH defect in which a vacancy (V), oxygen (O), and hydrogen (H) existing in a semiconductor are combined functions as a donor that supplies electrons.

[0024] When described as P+ type or N+ type in this specification, it means that the doping concentration is higher than that of P-type or N-type. When described as P- type or N- type, it means that the doping concentration is lower than that of P-type or N-type. Also, when described as P++ type or N++ type in this specification, it means that the doping concentration is higher than that of P+ type or N+ type.

[0025] In this specification, the chemical concentration refers to the atomic density of impurities measured regardless of the electrically activated state. The chemical concentration (atomic density) can be measured, for example, by secondary ion mass spectrometry (SIMS). The net doping concentration described above can be measured by voltage-capacitance measurement (CV method). Also, the carrier density measured by the spreading resistance measurement (SR method) may be used as the net doping concentration. The carrier density measured by the CV method or the SR method may be a value in the thermal equilibrium state. Also, in the N-type region, since the donor concentration is sufficiently larger than the acceptor concentration, the carrier density in the region may be used as the donor concentration. Similarly, in the P-type region, the carrier density in the region may be used as the acceptor concentration.

[0026] Also, when the concentration distribution of donors, acceptors, or net doping has a peak, the peak value may be used as the concentration of donors, acceptors, or net doping in the region. In cases where the concentration of donors, acceptors, or net doping is substantially uniform, etc., the average value of the concentration of donors, acceptors, or net doping in the region may be used as the concentration of donors, acceptors, or net doping.

[0027] The carrier density measured by the SR method may be lower than the concentration of donors or acceptors. In the range where current flows when measuring the spreading resistance, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. The decrease in carrier mobility occurs due to the scattering of carriers caused by the disorder of the crystal structure (disorder) such as lattice defects.

[0028] The concentration of donors or acceptors calculated from the carrier density measured by the CV method or the SR method may be lower than the chemical concentration of the element indicating the donor or acceptor. As an example, in a silicon semiconductor, the donor concentration of phosphorus or arsenic that acts as a donor, or the acceptor concentration of boron that acts as an acceptor, is about 99% of these chemical concentrations. On the other hand, the donor concentration of hydrogen that acts as a donor in a silicon semiconductor is about 0.1% to 10% of the chemical concentration of hydrogen.

[0029] FIG. 1 is a cross-sectional view showing an example of the semiconductor device 100. The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate.

[0030] In the semiconductor substrate 10 of this example, an IGBT (Insulated Gate Bipolar Transistor) is formed. A diode element such as an FWD (Free Wheeling Diode) may be further formed in the semiconductor substrate 10. In FIG. 1, each electrode of the IGBT and the diode element and each region provided inside the semiconductor substrate 10 are omitted.

[0031] In the semiconductor substrate 10 of this example, N-type bulk donors are distributed throughout. The bulk donor is a donor by a dopant contained substantially uniformly in the ingot during the production of the ingot that is the source of the semiconductor substrate 10. The bulk donor of this example is an element other than hydrogen. The dopant of the bulk donor is, for example, an element of Group V or Group VI, and is, for example, phosphorus, antimony, arsenic, selenium or sulfur, but is not limited thereto. The bulk donor of this example is phosphorus. The bulk donor is also included in the P-type region. The semiconductor substrate 10 may be a wafer cut out from a semiconductor ingot, or may be a chip obtained by singulating the wafer. The semiconductor ingot may be manufactured by any of the Czochralski method (CZ method), the magnetic field applied Czochralski method (MCZ method), and the float zone method (FZ method).

[0032] The oxygen chemical concentration contained in the semiconductor substrate 10 manufactured by the MCZ method is, for example, 1×10 17 ~1×10 18 atoms / cm 3 . The oxygen chemical concentration may be 7×10 17 atoms / cm 3 or less. The oxygen chemical concentration contained in the semiconductor substrate 10 manufactured by the FZ method is, for example, 1×10 15 ~5×10 16 atoms / cm 3 . The oxygen chemical concentration of the semiconductor substrate 10 may be within the above-described range throughout the substrate. However, in the vicinity of the main surface of the semiconductor substrate 10, oxygen may be released outside the substrate by annealing or the like. The oxygen chemical concentration in the vicinity of the surface of the semiconductor substrate 10 may be below the lower limit of the above-described range.

[0033] The carbon chemical concentration contained in the semiconductor substrate 10 is, for example, 1×10 13 ~1×10 16 atoms / cm 3 . The carbon chemical concentration of the semiconductor substrate 10 may be within the above-described range throughout the substrate. The oxygen chemical concentration and the carbon chemical concentration of the semiconductor substrate 10 may increase monotonically, decrease monotonically, or be constant from one main surface to the other main surface.

[0034] The bulk donor concentration may be the chemical concentration of the bulk donors distributed throughout the semiconductor substrate 10, or a value between 90% and 100% of the chemical concentration may be used. In a semiconductor substrate doped with group V or VI dopants such as phosphorus, the bulk donor concentration may be 1×10 11 / cm 3 or more and 3×10 13 / cm 3 or less. The bulk donor concentration of a semiconductor substrate doped with group V or VI dopants is preferably 1×10 12 / cm 3 or more and 1×10 13 / cm 3It is as follows. Further, as the semiconductor substrate 10, a non-doped substrate that does not substantially contain a bulk dopant such as phosphorus may be used. In that case, the bulk donor concentration of the non-doping substrate is, for example, 1×10 10 / cm 3 or more and 5×10 12 / cm 3 or less. The bulk donor concentration of the non-doping substrate is preferably 1×10 11 / cm 3 or more. The bulk donor concentration of the non-doping substrate is preferably 5×10 12 / cm 3 or less.

[0035] The semiconductor substrate 10 has an upper surface 21 and a lower surface 23. The upper surface 21 and the lower surface 23 are two main surfaces of the semiconductor substrate 10. In this specification, the orthogonal axes in the plane parallel to the upper surface 21 and the lower surface 23 are defined as the X-axis and the Y-axis, and the axis perpendicular to the upper surface 21 and the lower surface 23 is defined as the Z-axis. An IGBT gate structure may be provided on the upper surface 21. The gate structure is a structure including a gate electrode (for example, a gate conductive portion 44 described later) and a gate insulating film 42.

[0036] Hydrogen ions are implanted into the semiconductor substrate 10 from the lower surface 23 at a predetermined depth position Z1. In this specification, the distance in the Z-axis direction from the lower surface 23 may be referred to as the depth position. In this specification, the central position in the depth direction of the semiconductor substrate 10 is defined as the depth position Zc. The depth position Z1 is the position where the distance in the Z-axis direction from the lower surface 23 is Z1. The depth position Z1 in this example is 25 μm or more. The depth position Z1 in this example is arranged on the upper surface 21 side of the semiconductor substrate 10 (the region between the depth position Zc and the upper surface 21). The depth position Z1 may be arranged on the lower surface 23 side of the semiconductor substrate 10 (the region between the depth position Zc and the lower surface 23).

[0037] Injecting hydrogen ions at a depth position Z1 means that the average distance (also referred to as the range) through which the hydrogen ions pass inside the semiconductor substrate 10 is Z1. The hydrogen ions are accelerated with an acceleration energy corresponding to a predetermined depth position Z1 and introduced into the semiconductor substrate 10. Even when hydrogen ions are injected with the same acceleration energy, the injection position of the hydrogen ions can be adjusted by arranging an absorber on the injection surface (the lower surface 23 in this example) of the hydrogen ions.

[0038] Let the region through which the hydrogen ions pass inside the semiconductor substrate 10 be the passing region. In the example of FIG. 1, the region from the lower surface 23 of the semiconductor substrate 10 to the depth position Z1 is the passing region. Some hydrogen ions pass through the semiconductor substrate 10 up to the upper surface 21 side from the depth position Z1. A region through which hydrogen ions of a predetermined concentration have passed may be defined as the passing region. For example, the predetermined concentration may be a value half of the chemical concentration of hydrogen injected at the depth position Z1. In this case, the passing region includes a region on the upper surface 21 side of the depth position Z1 by the half-value width of the hydrogen chemical concentration distribution. The hydrogen ions may be injected over the entire surface of the semiconductor substrate 10 in the XY plane, or may be injected only into a part of the region. In this example, hydrogen ions are injected over the entire surface of the semiconductor substrate 10.

[0039] In the passing region of the semiconductor substrate 10 through which the hydrogen ions have passed, lattice defects mainly composed of vacancies such as single-atom vacancies (V) and double-atom vacancies (VV) are formed. The atoms adjacent to the vacancies have dangling bonds. The lattice defects include interstitial atoms, dislocations, etc., and may also include donors and acceptors in a broad sense, but in this specification, lattice defects mainly composed of vacancies may be referred to as vacancy-type lattice defects, vacancy-type defects, or simply lattice defects. Lattice defects mainly composed of vacancies may function as recombination centers for electrons and hole carriers. The recombination centers, vacancies, and lattice defects may have similar distributions to each other. Also, due to the formation of many lattice defects by injecting hydrogen ions into the semiconductor substrate 10, the crystallinity of the semiconductor substrate 10 may be strongly disturbed. In this specification, this disturbance of crystallinity may be referred to as disorder.

[0040] In addition, oxygen is contained in the entire semiconductor substrate 10. The oxygen is introduced intentionally or unintentionally during the production of the semiconductor ingot. Further, by implanting hydrogen ions, hydrogen is contained in the passing region. Further, by heat-treating (which may be referred to as annealing in this specification) the semiconductor substrate 10 after implanting hydrogen ions, the hydrogen ions diffuse in the passing region. In this example, hydrogen is distributed throughout the passing region.

[0041] After hydrogen ions are implanted into the semiconductor substrate 10, hydrogen (H), vacancies (V), and oxygen (O) combine inside the semiconductor substrate 10 to form VOH defects. Further, by annealing the semiconductor substrate 10, hydrogen diffuses, promoting the formation of VOH defects. Further, by annealing after forming the passing region, hydrogen can combine with vacancies, so that the release of hydrogen from the lower surface 23 to the outside of the semiconductor substrate 10 can be suppressed.

[0042] The VOH defects function as donors that supply electrons. In this specification, the VOH defects may be simply referred to as hydrogen donors or donors. In the semiconductor substrate 10 of this example, hydrogen donors are formed in the passing region.

[0043] In addition, by implanting hydrogen ions under predetermined conditions, lattice defects can be formed even on the upper surface 21 side further than the passing region. In this case, hydrogen donors are also formed on the upper surface 21 side further than the passing region. In particular, it has been experimentally confirmed that when hydrogen ions are implanted with an acceleration energy of 1.4 MeV or more, hydrogen donors are likely to be formed on the upper surface 21 side rather than the passing region. By setting the depth position Z1 to 25 μm or more, the acceleration energy of the hydrogen ions becomes 1.4 MeV or more. Therefore, it becomes easier to form hydrogen donors on the upper surface 21 side rather than the depth position Z1 (or the passing region).

[0044] The depth position Z1 may be disposed in a range of 3 / 4 or less of the thickness of the semiconductor substrate 10, may be disposed in a range of 1 / 2 or less of the thickness of the semiconductor substrate 10, or may be disposed in a range of 1 / 4 or less of the thickness of the semiconductor substrate 10, based on the upper surface 21. The depth position Z1 may also be disposed in a range of 1 / 4 or less of the thickness of the semiconductor substrate 10, based on the lower surface 23. By disposing an absorber on the lower surface 23, hydrogen ions can be implanted with high acceleration energy even when the distance between the depth position Z1 and the lower surface 23 is small.

[0045] The doping concentration of the hydrogen donor at each position is lower than the chemical concentration of hydrogen at each position. The ratio of the chemical concentration of hydrogen to the doping concentration of the hydrogen donor (VOH defect) may be a value of 0.1% to 30% (i.e., 0.001 or more and 0.3 or less) with respect to the chemical concentration of hydrogen. In this example, the ratio of the chemical concentration of hydrogen to the doping concentration of the hydrogen donor (VOH defect) is 1% to 5%. Note that, unless otherwise specified, in this specification, VOH defects having a distribution similar to the chemical concentration distribution of hydrogen, and VOH defects having a distribution similar to the distribution of vacancy defects in the passage region are also referred to as hydrogen donors, or hydrogen as a donor.

[0046] By forming a hydrogen donor in the passage region of the semiconductor substrate 10, the donor concentration in the passage region can be made higher than the doping concentration of the bulk donor (which may be simply referred to as the bulk donor concentration). As a result, a local N-type region can be easily formed. Also, by increasing the range of travel of hydrogen ions, the passage region can be enlarged in the Z-axis direction. In this case, a high-concentration region with a donor concentration higher than that of the bulk donor can be formed over a wide range. Usually, a semiconductor substrate 10 having a predetermined bulk donor concentration must be prepared in correspondence with the characteristics of the element to be formed on the semiconductor substrate 10, particularly the rated voltage or breakdown voltage. On the other hand, when forming a large passage region, the donor concentration of the semiconductor substrate 10 can be adjusted by controlling the dose amount of hydrogen ions. For this reason, a semiconductor device 100 can be manufactured using a semiconductor substrate having a bulk donor concentration that does not correspond to the characteristics of the element or the like. Although the variation in the bulk donor concentration during the manufacture of the semiconductor substrate 10 is relatively large, the dose amount of hydrogen ions can be controlled with relatively high precision. For this reason, the concentration of lattice defects generated by implanting hydrogen ions can also be controlled with high precision, and the donor concentration in the passage region can be controlled with high precision.

[0047] FIG. 2 shows an example of the distribution in the depth direction of the hydrogen chemical concentration, donor concentration, vacancy density, and carrier lifetime at the position shown by the line a-a in FIG. 1. The donor concentration in this example is the concentration of the hydrogen donor and the bulk donor. FIG. 2 shows each distribution after hydrogen ions are implanted at the depth position Z1 and annealing is performed.

[0048] The horizontal axis in FIG. 2 indicates the depth position from the lower surface 23, and the vertical axis indicates the chemical concentration or density per unit volume on a logarithmic axis. However, the vertical axis in the graph of the carrier lifetime indicates the time (seconds). The chemical concentration in FIG. 2 is measured, for example, by the SIMS method. The donor concentration is measured, for example, by the SR method. The carrier density in the N-type region measured by the SR method may be used as the donor concentration. In FIG. 2, the bulk donor concentration D b is indicated by a broken line. The bulk donor concentration D bIt may be uniform throughout the semiconductor substrate 10. The semiconductor substrate 10 in this example is an MCZ substrate as an example.

[0049] At the depth position Z1 of the semiconductor substrate 10, a hydrogen peak 201 is provided. The hydrogen peak 201 is the peak of the hydrogen chemical concentration distribution in the depth direction. The hydrogen peak 201 has a vertex 202, an upper skirt 203, and a lower skirt 204. The vertex 202 is the point where the hydrogen chemical concentration shows a maximum value. Let the depth position of the vertex 202 be Z1. The lower skirt 204 is a slope where the hydrogen chemical concentration decreases from the vertex 202 toward the lower surface 23 of the semiconductor substrate 10. The upper skirt 203 is a slope where the hydrogen chemical concentration decreases from the vertex 202 toward the upper surface 21 of the semiconductor substrate 10. In this example, since hydrogen ions are implanted from the lower surface 23, a relatively large number of hydrogen ions exist between the vertex 202 and the lower surface 23. The upper skirt 203 may have a steeper decrease in hydrogen chemical concentration than the lower skirt 204.

[0050] In this example, hydrogen ions are implanted from the lower surface 23 to the depth position Z1. As described above, the distance Z1 from the lower surface 23 to the depth position Z1 is 25 μm or more. The distance Z1 may be 30 μm or more, 40 μm or more, 50 μm or more, 60 μm or more, 70 μm or more, 80 μm or more. The distance Z1 may be 25% or more of the thickness of the semiconductor substrate 10, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more. The distance Z1 is smaller than 100% of the thickness of the semiconductor substrate 10. The distance Z1 may be 90% or less of the thickness of the semiconductor substrate 10, 80% or less.

[0051] Also, it is preferable to implant hydrogen ions at a dose amount equal to or greater than a predetermined value at the depth position Z1. It has been experimentally confirmed that by setting the dose amount to be equal to or greater than the predetermined value, it becomes easier to form hydrogen donors on the upper surface 21 side than at the depth position Z1. The dose amount of hydrogen ions with respect to the depth position Z1 is 1×10 12 ions / cm 2It may be as described above. The dose amount may be greater than 1×10 12 ions / cm 2 and may be greater than 1.5×10 12 ions / cm 2 and may be greater than 2×10 12 ions / cm 2 and may be greater than 3×10 12 ions / cm 2 The dose amount may also be less than or equal to 1×10 15 ions / cm 2 and may be less than or equal to 1×10 14 ions / cm 2 and may be less than or equal to 1×10 13 ions / cm 2 .

[0052] Also, the hydrogen chemical concentration H p at the peak 202 of the hydrogen peak 201 may be greater than or equal to 8×10 15 atoms / cm 3 and may be greater than or equal to 1.2×10 16 atoms / cm 3 and may be greater than or equal to 1.6×10 16 atoms / cm 3 and may be greater than or equal to 2.4×10 16 atoms / cm 3 The hydrogen chemical concentration H p may also be less than or equal to 8×10 18 atoms / cm 3 and may be less than or equal to 8×10 17 atoms / cm 3 and may be less than or equal to 8×10 16 atoms / cm 3 .

[0053] Note that the dose amount of an impurity peak such as hydrogen may be the value obtained by integrating the chemical concentration of the impurity within the range of the full width at half maximum in the depth direction of the peak. Alternatively, the value obtained by multiplying the peak concentration of the peak by the full width at half maximum may be used as the dose amount of the impurity peak such as hydrogen. On the other hand, the width of the value that becomes 10% of the peak concentration of the peak is defined as the 10% full width. The dose amount of the impurity peak such as hydrogen is , the value obtained by integrating the chemical concentration of the impurity within the range of the 10% full width in the depth direction of the peak may be used. In the example of FIG. 2, the value obtained by integrating the hydrogen chemical concentration within the range of the full width at half maximum W201 of the hydrogen peak 201 may be used as the hydrogen dose amount of the hydrogen peak 201. In the example of FIG. 2, the lower end position of the full width at half maximum W201 is Z1a and the upper end position is Z1b.

[0054] By implanting hydrogen ions into the semiconductor substrate 10 and annealing, hydrogen donors are formed in the passage region near the depth position Z1 from the lower surface 23. Further, by setting the depth position Z1 to 25 μm or more, the acceleration energy of the hydrogen ions is increased, and hydrogen donors are formed up to the upper surface 21 side from the depth position Z1. As a result, a high-concentration region 20 having a donor concentration higher than the bulk donor concentration D is formed from the lower surface 23 to the depth position Z2. The depth position Z2 is a position on the upper surface 21 side from the depth position Z1. The width in the depth direction from the depth position Z1 to the depth position Z2 is denoted as W1. By setting the depth position Z1 to 25 μm or more, the extension width W1 in which the high-concentration region 20 extends toward the upper surface 21 side from the depth position Z1 can be increased. The extension width W1 in this example is 4 μm or more. The extension width W1 may be 8 μm or more, may be 12 μm or more, or may be 16 μm or more. The extension width W1 can be adjusted by the acceleration energy and dose amount of the hydrogen ions to the depth position Z1. b The extension width W1 can be adjusted by the acceleration energy and dose amount of the hydrogen ions to the depth position Z1.

[0055] The high-concentration region 20 includes a position overlapping with the hydrogen peak 201 in the depth direction of the semiconductor substrate 10. That is, the high-concentration region 20 includes at least a part of the range of the full width at half maximum W201 of the hydrogen peak 201. In the region from the lower surface 23 to the depth position Z1b, the donor concentration distribution may have a shape corresponding to the hydrogen chemical concentration distribution. For example, the donor concentration distribution may have a donor concentration peak 221 at a position overlapping with the hydrogen peak 201.

[0056] The donor concentration peak 221 has a vertex 222, an upper skirt 223, and a lower skirt 224. The vertex 222 is a point where the donor concentration shows a maximum value. The depth position of the vertex 222 may be Z1. The lower skirt 224 is a slope where the donor concentration decreases from the vertex 222 toward the lower surface 23 of the semiconductor substrate 10. The upper skirt 223 is a slope where the donor concentration decreases from the vertex 222 toward the upper surface 21 of the semiconductor substrate 10. The upper skirt 223 may decrease in donor concentration more steeply than the lower skirt 224.

[0057] Also, the donor concentration distribution has a lower flat portion 226 disposed on the lower surface 23 side than the donor concentration peak 221, and an upper flat portion 225 disposed on the upper surface 21 side than the donor concentration peak 221. Each flat portion is a region where the donor concentration is substantially constant. Substantially constant means, for example, a state where the variation range of the donor concentration is within ±50%. The length of the upper flat portion 225 in the depth direction may be 1 μm or more, 2 μm or more, 4 μm or more, 8 μm or more, 12 μm or more, or 16 μm or more. A drift region 18 may be provided on the upper surface 21 side of the upper flat portion 225. The drift region 18 is a region where the doping concentration in the depth direction is substantially constant. The doping concentration of the drift region 18 may be the bulk donor concentration Db, or may be higher than the bulk donor concentration Db.

[0058] The pore density distribution may have a pore density peak 231. The pore density distribution in this example is a density distribution including both pore defects that function as hydrogen donors and pore defects that do not function as hydrogen donors. The pore density distribution in this example is substantially the same as the pore density distribution after hydrogen ion implantation and before annealing. Note that after annealing, the distribution 232 of the pore density remaining without hydrogen donor formation is shown by a broken line. By implanting hydrogen ions at a high acceleration energy, the pore density is likely to be distributed on the upper surface 21 side rather than at the depth position Z1. Thereby, the extension width W1 of the high-concentration region 20 can be increased. Also, by increasing the extension width W1, it is possible to suppress a sharp decrease in the donor concentration on the upper surface 21 side rather than at the depth position Z1. Thereby, when a depletion layer reaches the vicinity of the depth position Z1, the characteristics of the semiconductor device 100 can be improved. Note that the carrier lifetime distribution in this example does not have a clear peak at the depth position Z1. The concentration of the pore density distribution 232, which is the distribution of the pore density remaining without donor formation after annealing, may be substantially 0, and the pore density distribution 232 may be substantially flat.

[0059] FIG. 3 is an enlarged view of the donor concentration distribution in the vicinity of the donor concentration peak 221. In this example, the donor concentration at the apex 222 of the donor concentration peak 221 is P1, the donor concentration in the drift region 18 is P2, and the difference between the donor concentrations P1 and P2 (i.e., P1 - P2) is X1. Also, 5% of the difference between the donor concentrations P1 and P2 (i.e., 0.05×(P1 - P2)) is X2.

[0060] In this example, the position where the donor concentration first becomes P2 + X2 from the apex 222 toward the upper surface 21 is defined as the depth position Z2. As described above, the depth position Z2 is the upper end position of the high-concentration region 20. The extension width W1 of the high-concentration region 20 is the distance between the depth position Z2 and the depth position Z1.

[0061] Also, between the depth position Z1 and the depth position Z2, the region where the width W2 in the depth direction is the largest among the regions where the variation range of the donor is within ±50% of the average value is defined as the upper flat portion 225. The average value of the donor concentration in this region is defined as the donor concentration P4 of the upper flat portion 225.

[0062] Between the depth position Z1 and the lower surface 23, over the width W2, the variation range of the donor falls within ±50% of the average value, and the region closest to the depth position Z1 is defined as the lower flat portion 226. The average value of the donor concentration in this region is defined as the donor concentration P3 of the lower flat portion 226. The donor concentration P4 may be 0.5 times or more and 2 times or less of the donor concentration P3. That is, the donor concentration P4 of the upper flat portion 225 and the donor concentration P3 of the lower flat portion 226 are substantially the same. The donor concentration P4 may be 0.7 times or more of the donor concentration P3, and may also be 0.9 times or more. The donor concentration P4 may be 1.3 times or less of the donor concentration P3, and may also be 1.1 times or less.

[0063] FIG. 4A is a diagram showing the measurement results of the relationship between the extension width W1 of the high-concentration region 20 and the acceleration energy of hydrogen ions. In this example, the acceleration energy of the hydrogen ions implanted at the depth position Z1 was changed in the range of 0.8 MeV to 2.3 MeV, and the extension width W1 of the formed high-concentration region 20 was measured. Also, the dose amount of hydrogen ions was changed in the range of 3.0×10 11 ions / cm 2 to 1.0×10 13 ions / cm 2 After the hydrogen ions were implanted, annealing was performed at 350° C. for 5 hours.

[0064] FIG. 4B is a diagram in which the acceleration energy of the hydrogen ions in FIG. 4A is replaced with the peak position that is the range of travel of the hydrogen ions implanted at that acceleration energy. In this example, an acceleration energy of 1.4 MeV corresponds to a peak position of 24 μm, an acceleration energy of 1.8 MeV corresponds to a peak position of 40 μm, and an acceleration energy of 2.3 MeV corresponds to a peak position of 58 μm.

[0065] FIG. 5 is a diagram showing the relationship between the extension width W1 of the high-concentration region 20 and the dose amount of hydrogen ions. In FIG. 5, the relationship between the extension width W1 and the dose amount is shown for each acceleration energy of hydrogen ions. In FIG. 5, examples with acceleration energies of 2.3 MeV, 1.8 MeV, and 1.4 MeV are shown. However, when the acceleration energy is less than 1.4 MeV, the same tendency as that when the acceleration energy is 1.4 MeV was observed.

[0066] As shown in FIG. 4A, when the acceleration energy of hydrogen ions becomes greater than 1.4 MeV, the extension width W1 of the high-concentration region 20 tends to become particularly large. The acceleration energy of hydrogen ions may be greater than 1.4 MeV, may be 1.41 MeV or more, may be 1.5 MeV or more, may be 1.8 MeV or more, or may be 2.0 MeV or more.

[0067] As shown in FIG. 4B, when the peak position of hydrogen ions becomes greater than 24 μm, the extension width W1 of the high-concentration region 20 tends to become particularly large. The acceleration energy of hydrogen ions may be greater than 24 μm, may be 25 μm or more, may be 30 μm or more, may be 40 μm or more, may be 50 μm or more, or may be 60 μm or more.

[0068] As shown in FIGS. 4A, 4B, and 5, when the dose amount of hydrogen ions is 1.0×10 12 ions / cm 2 or more, it becomes easier to increase the extension width W1. In particular, when the dose amount of hydrogen ions is 3.0×10 12 ions / cm 2 or more, the increase in the extension width W1 is remarkable. The dose amount of hydrogen ions may be 1.0×10 12 ions / cm 2 or more, may be greater than 1.0×10 12 ions / cm 2 may be 1.5×10 12 ions / cm 2 or more, may be 2.0×10 12 ions / cm 2 or more, may be 3.0×1012 ions / cm 2 It may also be the above.

[0069] In particular, as shown in FIG. 5, when the acceleration energy is 1.4 MeV or less (the peak position is 24 μm or less), the width W1 decreases with an increase in the dose amount, and when it is greater than 1.4 MeV (when the peak position is greater than 24 μm), the width W1 critically increases with an increase in the dose amount. Therefore, the width W1 has the characteristic that the mode of increase and decrease critically changes when the acceleration energy of hydrogen ions is greater than 1.4 MeV or the peak position is greater than 24 μm.

[0070] FIG. 6 is an example of a top view of the semiconductor device 100. In FIG. 6, the positions where each member is projected onto the upper surface of the semiconductor substrate 10 are shown. In FIG. 6, only some members of the semiconductor device 100 are shown, and some members are omitted.

[0071] The semiconductor device 100 includes the semiconductor substrate 10 described with reference to FIGS. 1 to 5. The semiconductor substrate 10 has an end side 102 in a top view. When simply referred to as a top view in this specification, it means looking from the upper surface side of the semiconductor substrate 10. The semiconductor substrate 10 of this example has two sets of end sides 102 facing each other in a top view. In FIG. 6, the X-axis and the Y-axis are parallel to any one of the end sides 102. The Z-axis is perpendicular to the upper surface of the semiconductor substrate 10.

[0072] An active portion 160 is provided on the semiconductor substrate 10. The active portion 160 is a region where a main current flows in the depth direction between the upper surface and the lower surface of the semiconductor substrate 10 when the semiconductor device 100 operates. An emitter electrode is provided above the active portion 160 but is omitted in FIG. 6.

[0073] In the active part 160 of this example, a transistor part 70 including an IGBT and a diode part 80 including a diode element such as an FWD are provided. In the example of FIG. 6, the transistor part 70 and the diode part 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the upper surface of the semiconductor substrate 10. In other examples, only the transistor part 70 may be provided in the active part 160.

[0074] In FIG. 6, the region where the transistor part 70 is arranged is marked with the symbol "I", and the region where the diode part 80 is arranged is marked with the symbol "F". In this specification, in a top view, the direction perpendicular to the arrangement direction may be referred to as the extending direction (the Y-axis direction in FIG. 6). The transistor part 70 and the diode part 80 may each have a longitudinal direction in the extending direction. That is, the length of the transistor part 70 in the Y-axis direction is larger than the width in the X-axis direction. Similarly, the length of the diode part 80 in the Y-axis direction is larger than the width in the X-axis direction. The extending direction of the transistor part 70 and the diode part 80 may be the same as the longitudinal direction of each trench part described later.

[0075] The diode part 80 has an N+-type cathode region in a region in contact with the lower surface of the semiconductor substrate 10. In this specification, the region where the cathode region is provided is referred to as the diode part 80. That is, the diode part 80 is a region that overlaps the cathode region in a top view. On the lower surface of the semiconductor substrate 10, a P+-type collector region may be provided in a region other than the cathode region. In this specification, the extended region 81 obtained by extending the diode part 80 in the Y-axis direction up to the gate wiring described later may also be included in the diode part 80. A collector region is provided on the lower surface of the extended region 81.

[0076] The transistor part 70 has a P+-type collector region in a region in contact with the lower surface of the semiconductor substrate 10. Further, in the transistor part 70, a gate structure having an N-type emitter region, a P-type base region, a gate conductive part, and a gate insulating film is periodically arranged on the upper surface side of the semiconductor substrate 10.

[0077] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 in this example has a gate pad 112. The semiconductor device 100 may have pads such as an anode pad, a cathode pad, and a current detection pad. Each pad is disposed in the vicinity of the end side 102. The vicinity of the end side 102 refers to the region between the end side 102 and the emitter electrode in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via a wiring such as a wire.

[0078] A gate potential is applied to the gate pad 112. The gate pad 112 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes a gate wiring that connects the gate pad 112 and the gate trench portion. In FIG. 6, the gate wiring is hatched with diagonal lines.

[0079] The gate wiring in this example has an outer peripheral gate wiring 130 and an active side gate wiring 131. The outer peripheral gate wiring 130 is disposed between the active portion 160 and the end side 102 of the semiconductor substrate 10 in a top view. The outer peripheral gate wiring 130 in this example surrounds the active portion 160 in a top view. The region surrounded by the outer peripheral gate wiring 130 in a top view may be regarded as the active portion 160. Further, the outer peripheral gate wiring 130 is connected to the gate pad 112. The outer peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The outer peripheral gate wiring 130 may be a metal wiring containing aluminum or the like.

[0080] The active side gate wiring 131 is provided in the active portion 160. By providing the active side gate wiring 131 in the active portion 160, the variation in the wiring length from the gate pad 112 can be reduced for each region of the semiconductor substrate 10.

[0081] The active side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active side gate wiring 131 is disposed above the semiconductor substrate 10. The active side gate wiring 131 may be a wiring formed of a semiconductor such as impurity-doped polysilicon.

[0082] The active-side gate wiring 131 may be connected to the outer peripheral gate wiring 130. The active-side gate wiring 131 in this example is provided to extend in the X-axis direction so as to cross the active portion 160 from one outer peripheral gate wiring 130 to the other outer peripheral gate wiring 130 at approximately the center in the Y-axis direction. When the active portion 160 is divided by the active-side gate wiring 131, in each divided region, the transistor portions 70 and the diode portions 80 may be alternately arranged in the X-axis direction.

[0083] Further, the semiconductor device 100 may include a temperature sensing portion (not shown) which is a PN junction diode formed of polysilicon or the like, and a current detecting portion (not shown) that simulates the operation of the transistor portions provided in the active portion 160.

[0084] The semiconductor device 100 in this example includes an edge termination structure portion 90 between the active portion 160 and the end side 102. The edge termination structure portion 90 in this example is disposed between the outer peripheral gate wiring 130 and the end side 102. The edge termination structure portion 90 alleviates the electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure portion 90 has a plurality of guard rings 92. The guard ring 92 is a P-type region in contact with the upper surface of the semiconductor substrate 10. The guard ring 92 may surround the active portion 160 in a top view. The plurality of guard rings 92 are arranged at a predetermined interval between the outer peripheral gate wiring 130 and the end side 102. The guard ring 92 disposed on the outside may surround one guard ring 92 disposed on the inside. The outside refers to the side close to the end side 102, and the inside refers to the side close to the outer peripheral gate wiring 130. By providing the plurality of guard rings 92, the depletion layer on the upper surface side of the active portion 160 can be extended outward, and the breakdown voltage of the semiconductor device 100 can be improved. The edge termination structure portion 90 may further include at least one of a field plate and RESURF provided to surround the active portion 160 in an annular shape.

[0085] FIG. 7 is an enlarged view of region E in FIG. 6. Region E is a region including the transistor portion 70, the diode portion 80, and the active side gate wiring 131. The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15 provided inside the upper surface side of the semiconductor substrate 10. The gate trench portion 40 and the dummy trench portion 30 are each an example of a trench portion. Further, the semiconductor device 100 of this example includes an emitter electrode 52 and an active side gate wiring 131 provided above the upper surface of the semiconductor substrate 10. The emitter electrode 52 and the active side gate wiring 131 are provided separately from each other.

[0086] An interlayer insulating film is provided between the emitter electrode 52 and the active side gate wiring 131 and the upper surface of the semiconductor substrate 10, but is omitted in FIG. 7. A contact hole 54 is provided in the interlayer insulating film of this example so as to penetrate the interlayer insulating film. In FIG. 7, each contact hole 54 is hatched with oblique lines.

[0087] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the well region 11, the emitter region 12, the base region 14, and the contact region 15. The emitter electrode 52 contacts the emitter region 12, the contact region 15, and the base region 14 on the upper surface of the semiconductor substrate 10 through the contact hole 54. Further, the emitter electrode 52 is connected to the dummy conductive portion in the dummy trench portion 30 through a contact hole provided in the interlayer insulating film. The emitter electrode 52 may be connected to the dummy conductive portion of the dummy trench portion 30 at the tip of the dummy trench portion 30 in the Y-axis direction.

[0088] The active side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active side gate wiring 131 may be connected to the gate conductive portion of the gate trench portion 40 at the tip portion 41 of the gate trench portion 40 in the Y-axis direction. The active side gate wiring 131 is not connected to the dummy conductive portion in the dummy trench portion 30.

[0089] The emitter electrode 52 is formed of a material containing a metal. In FIG. 7, the range where the emitter electrode 52 is provided is shown. For example, at least a part of the emitter electrode 52 is formed of aluminum or an aluminum-silicon alloy, such as a metal alloy like AlSi, AlSiCu, etc. The emitter electrode 52 may have a barrier metal formed of titanium, a titanium compound, etc. under the region formed of aluminum or the like. Further, in the contact hole, a plug formed by embedding tungsten or the like so as to be in contact with the barrier metal and aluminum or the like may be provided.

[0090] The well region 11 is provided so as to overlap with the active side gate wiring 131. The well region 11 is also provided to extend with a predetermined width in a range where it does not overlap with the active side gate wiring 131. The well region 11 in this example is provided away from the active side gate wiring 131 side from the end in the Y-axis direction of the contact hole 54. The well region 11 is a region of the second conductivity type having a higher doping concentration than the base region 14. The base region 14 in this example is P-type, and the well region 11 is P+-type.

[0091] Each of the transistor portion 70 and the diode portion 80 has a plurality of trench portions arranged in the array direction. In the transistor portion 70 of this example, one or more gate trench portions 40 and one or more dummy trench portions 30 are alternately provided along the array direction. In the diode portion 80 of this example, a plurality of dummy trench portions 30 are provided along the array direction. The diode portion 80 of this example is not provided with a gate trench portion 40.

[0092] The gate trench portion 40 of this example may have two straight portions 39 (portions of the trench that are linear along the extending direction) extending along the extending direction perpendicular to the array direction, and a tip portion 41 connecting the two straight portions 39. The extending direction in FIG. 7 is the Y-axis direction.

[0093] At least a part of the tip portion 41 is preferably provided in a curved shape in a top view. By connecting the ends of the two straight portions 39 in the Y-axis direction with the tip portion 41, the electric field concentration at the ends of the straight portion 39 can be alleviated.

[0094] In the transistor portion 70, the dummy trench portion 30 is provided between the respective straight portions 39 of the gate trench portion 40. One dummy trench portion 30 may be provided between the respective straight portions 39, or a plurality of dummy trench portions 30 may be provided. The dummy trench portion 30 may have a linear shape extending in the extending direction, and may have a straight portion 29 and a tip portion 31 similar to the gate trench portion 40. The semiconductor device 100 shown in FIG. 7 includes both a linear dummy trench portion 30 without a tip portion 31 and a dummy trench portion 30 with a tip portion 31.

[0095] The diffusion depth of the well region 11 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. The ends of the gate trench portion 40 and the dummy trench portion 30 in the Y-axis direction are provided in the well region 11 in a top view. That is, at the ends of each trench portion in the Y-axis direction, the bottom in the depth direction of each trench portion is covered by the well region 11. Thereby, the electric field concentration at the bottom of each trench portion can be alleviated.

[0096] A mesa portion is provided between the respective trench portions in the array direction. The mesa portion refers to a region sandwiched by the trench portions inside the semiconductor substrate 10. As an example, the upper end of the mesa portion is the upper surface of the semiconductor substrate 10. The depth position of the lower end of the mesa portion is the same as the depth position of the lower end of the trench portion. The mesa portion in this example is provided to extend in the extending direction (Y-axis direction) along the trench on the upper surface of the semiconductor substrate 10. In this example, a mesa portion 60 is provided in the transistor portion 70, and a mesa portion 61 is provided in the diode portion 80. When simply referred to as a mesa portion in this specification, it refers to each of the mesa portion 60 and the mesa portion 61.

[0097] A base region 14 is provided in each mesa portion. Among the base regions 14 exposed on the upper surface of the semiconductor substrate 10 in the mesa portion, the region closest to the active side gate wiring 131 is defined as the base region 14-e. In FIG. 7, the base region 14-e disposed at one end in the extending direction of each mesa portion is shown, but the base region 14-e is also disposed at the other end of each mesa portion. In each mesa portion, at least one of an emitter region 12 of a first conductivity type and a contact region 15 of a second conductivity type may be provided in a region sandwiched by the base regions 14-e in a top view. The emitter region 12 in this example is of N+ type, and the contact region 15 is of P+ type. The emitter region 12 and the contact region 15 may be provided between the base region 14 and the upper surface of the semiconductor substrate 10 in the depth direction.

[0098] The mesa portion 60 of the transistor portion 70 has an emitter region 12 exposed on the upper surface of the semiconductor substrate 10. The emitter region 12 is provided in contact with the gate trench portion 40. The mesa portion 60 in contact with the gate trench portion 40 may be provided with a contact region 15 exposed on the upper surface of the semiconductor substrate 10.

[0099] Each of the contact region 15 and the emitter region 12 in the mesa portion 60 is provided from one trench portion in the X-axis direction to the other trench portion. As an example, the contact region 15 and the emitter region 12 of the mesa portion 60 are alternately arranged along the extending direction (Y-axis direction) of the trench portion.

[0100] In another example, the contact region 15 and the emitter region 12 of the mesa portion 60 may be provided in a stripe shape along the extending direction (Y-axis direction) of the trench portion. For example, the emitter region 12 is provided in a region in contact with the trench portion, and the contact region 15 is provided in a region sandwiched by the emitter regions 12.

[0101] The mesa portion 61 of the diode section 80 is not provided with an emitter region 12. A base region 14 and a contact region 15 may be provided on the upper surface of the mesa portion 61. Contact regions 15 may be provided in contact with the respective base regions 14-e in the region sandwiched by the base regions 14-e on the upper surface of the mesa portion 61. A base region 14 may be provided in the region sandwiched by the contact regions 15 on the upper surface of the mesa portion 61. The base region 14 may be disposed over the entire region sandwiched by the contact regions 15.

[0102] A contact hole 54 is provided above each mesa portion. The contact hole 54 is disposed in the region sandwiched by the base regions 14-e. The contact hole 54 of this example is provided above each of the regions of the contact region 15, the base region 14, and the emitter region 12. The contact hole 54 is not provided in the region corresponding to the base region 14-e and the well region 11. The contact hole 54 may be disposed at the center in the arrangement direction (X-axis direction) of the mesa portions 60.

[0103] In the diode section 80, an N+-type cathode region 82 is provided in the region adjacent to the lower surface of the semiconductor substrate 10. A P+-type collector region 22 may be provided in the region where the cathode region 82 is not provided on the lower surface of the semiconductor substrate 10. In FIG. 7, the boundary between the cathode region 82 and the collector region 22 is indicated by a dotted line.

[0104] The cathode region 82 is disposed away from the well region 11 in the Y-axis direction. Thereby, a distance between the P-type region (well region 11) having a relatively high doping concentration and formed to a deep position and the cathode region 82 is ensured, and the breakdown voltage can be improved. The end portion of the cathode region 82 in the Y-axis direction of this example is disposed farther from the well region 11 than the end portion of the contact hole 54 in the Y-axis direction. In other examples, the end portion of the cathode region 82 in the Y-axis direction may be disposed between the well region 11 and the contact hole 54.

[0105] FIG. 8 is a diagram showing an example of a cross-section taken along line b-b in FIG. 7. The cross-section taken along line b-b is an XZ plane passing through the emitter region 12 and the cathode region 82. The semiconductor device 100 of this example has, in this cross-section, a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The interlayer insulating film 38 is provided on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as a silicate glass doped with impurities such as boron or phosphorus, a thermal oxide film, and other insulating films. A contact hole 54 described in FIG. 7 is provided in the interlayer insulating film 38.

[0106] The emitter electrode 52 is provided above the interlayer insulating film 38. The emitter electrode 52 is in contact with the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum. In this specification, the direction (Z-axis direction) connecting the emitter electrode 52 and the collector electrode 24 is referred to as the depth direction.

[0107] The semiconductor substrate 10 has an N-type drift region 18. The doping concentration of the drift region 18 may coincide with the bulk donor concentration. In other examples, the doping concentration of the drift region 18 may be higher than the bulk donor concentration. The drift region 18 is provided in each of the transistor portion 70 and the diode portion 80.

[0108] An N+-type emitter region 12 and a P-type base region 14 are provided in the mesa portion 60 of the transistor portion 70 in order from the upper surface 21 side of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. An N+-type accumulation region 16 may be provided in the mesa portion 60. The accumulation region 16 is disposed between the base region 14 and the drift region 18.

[0109] The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10 and is provided in contact with the gate trench portion 40. The emitter region 12 may be in contact with the trench portions on both sides of the mesa portion 60. The emitter region 12 has a higher doping concentration than the drift region 18.

[0110] The base region 14 is provided below the emitter region 12. In this example, the base region 14 is provided in contact with the emitter region 12. The base region 14 may be in contact with the trench portions on both sides of the mesa portion 60.

[0111] The accumulation region 16 is provided below the base region 14. The accumulation region 16 is an N+-type region having a higher doping concentration than the drift region 18. By providing the high-concentration accumulation region 16 between the drift region 18 and the base region 14, the carrier injection promotion effect (IE effect) can be enhanced and the on-voltage can be reduced. The accumulation region 16 may be provided so as to cover the entire lower surface of the base region 14 in each mesa portion 60.

[0112] In the mesa portion 61 of the diode portion 80, a P-type base region 14 is provided in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. In the mesa portion 61, an accumulation region 16 may be provided below the base region 14.

[0113] In each of the transistor portion 70 and the diode portion 80, an N+-type high-concentration region 20 is provided on the lower surface 23 side than the drift region 18. The doping concentration of the high-concentration region 20 is higher than the doping concentration of the drift region 18. The high-concentration region 20 includes the hydrogen peak 201 and the donor concentration peak 221 described in FIGS. 1 to 5. The high-concentration region 20 may have a hydrogen peak other than the hydrogen peak 201, and may have a donor concentration peak 241 other than the donor concentration peak 221. The high-concentration region 20 of this example has a plurality of donor concentration peaks 241 arranged on the lower surface 23 side than the donor concentration peak 221. The high-concentration region 20 may function as a field stop layer that prevents the depletion layer extending from the lower end of the base region 14 from reaching the P+-type collector region 22 and the N+-type cathode region 82.

[0114] In the transistor portion 70, a P+-type collector region 22 is provided under the high-concentration region 20. The acceptor concentration of the collector region 22 is higher than the acceptor concentration of the base region 14. The collector region 22 may contain the same acceptor as the base region 14, or may contain a different acceptor. The acceptor of the collector region 22 is, for example, boron.

[0115] In the diode portion 80, an N+-type cathode region 82 is provided under the high-concentration region 20. The donor concentration of the cathode region 82 is higher than the donor concentration of the drift region 18. The donor of the cathode region 82 is, for example, hydrogen or phosphorus. Note that the elements serving as donors and acceptors in each region are not limited to the above-described examples. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 may be in contact with the entire lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum.

[0116] On the upper surface 21 side of the semiconductor substrate 10, one or more gate trench portions 40 and one or more dummy trench portions 30 are provided. Each trench portion penetrates from the upper surface 21 of the semiconductor substrate 10 through the base region 14 and reaches the drift region 18. In a region where at least one of the emitter region 12, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates these doping regions and reaches the drift region 18. The trench portion penetrating the doping region is not limited to the one manufactured in the order of forming the doping region after forming the trench portion. Those in which the doping region is formed between the trench portions after forming the trench portion are also included in those in which the trench portion penetrates the doping region.

[0117] As described above, the transistor portion 70 is provided with a gate trench portion 40 and a dummy trench portion 30. The diode portion 80 is provided with a dummy trench portion 30 and is not provided with a gate trench portion 40. In this example, the boundary in the X-axis direction between the diode portion 80 and the transistor portion 70 is the boundary between the cathode region 82 and the collector region 22.

[0118] The gate trench portion 40 includes a gate trench provided on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate trench portion 40 is an example of a gate structure. The gate insulating film 42 is provided to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate insulating film 42 inside the gate trench. That is, the gate insulating film 42 insulates the gate conductive portion 44 and the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.

[0119] The gate conductive portion 44 may be provided longer than the base region 14 in the depth direction. In the cross section, the gate trench portion 40 is covered by the interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. The gate conductive portion 44 is electrically connected to the gate wiring. When a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed in the surface layer of the interface of the base region 14 that contacts the gate trench portion 40.

[0120] The dummy trench portion 30 may have the same structure as the gate trench portion 40 in the cross section. The dummy trench portion 30 includes a dummy trench provided on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 may be connected to an electrode different from the gate pad. For example, the dummy conductive portion 34 may be connected to a dummy pad (not shown) connected to an external circuit different from the gate pad, and control different from that of the gate conductive portion 44 may be performed. Alternatively, the dummy conductive portion 34 may be electrically connected to the emitter electrode 52. The dummy insulating film 32 is provided to cover the inner wall of the dummy trench. The dummy conductive portion 34 is provided inside the dummy trench and inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 may be formed of the same material as the gate conductive portion 44. For example, the dummy conductive portion 34 is formed of a conductive material such as polysilicon. The dummy conductive portion 34 may have the same length as the gate conductive portion 44 in the depth direction.

[0121] In this example, the gate trench portion 40 and the dummy trench portion 30 are covered by the interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. Note that the bottoms of the dummy trench portion 30 and the gate trench portion 40 may be curved surfaces convex downward (curved in the cross section).

[0122] The diode section 80 is disposed on the upper surface 21 side of the hydrogen peak 201 (or the donor concentration peak 221), and has a lifetime adjustment section 250 in which the carrier lifetime distribution in the depth direction exhibits a minimum value. The lifetime adjustment section 250 may be provided over the entire diode section 80 in the X-axis direction. The lifetime adjustment section 250 has a hole density peak 251 in the hole density distribution in the depth direction. By providing the lifetime adjustment section 250, for example, the reverse recovery time of the diode section 80 at the turn-off of the semiconductor device 100 can be adjusted, and the turn-off loss can be reduced.

[0123] The lifetime adjustment section 250 may also be provided in a region of the transistor section 70 that is in contact with the diode section 80. The lifetime adjustment section 250 does not have to be disposed below the gate trench section 40. The lifetime adjustment section 250 may be disposed up to the lower part of the gate trench section 40 that is located closest to the diode section 80 among the gate trench sections 40 of the transistor section 70.

[0124] The transistor section 70 has a lifetime non-adjustment section 260 in which the carrier lifetime distribution in the depth direction does not exhibit a minimum value at the same depth position as the lifetime adjustment section 250. The lifetime non-adjustment section 260 does not have a hole density peak 251. The lifetime adjustment section 250 may be formed by injecting charged particles such as helium. The lifetime adjustment section 250 may contain helium. The helium concentration in the lifetime non-adjustment section 260 is substantially 0 or 1% or less of the helium concentration in the lifetime adjustment section 250. The high-concentration region 20 located on the lower surface 23 side of the lifetime adjustment section 250 may extend to the upper surface 21 side more than the high-concentration region 20 located on the lower surface 23 side of the lifetime non-adjustment section 260. That is, the high-concentration region 20 located on the lower surface 23 side of the lifetime adjustment section 250 may have a region 19 that extends to the upper surface 21 side more than the high-concentration region 20 located on the lower surface 23 side of the lifetime non-adjustment section 260.

[0125] FIG. 9 shows an example of the depth-direction distributions of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, the helium chemical concentration, and the vacancy density at the position indicated by the c-c line in FIG. 8. The c-c line is parallel to the Z axis and passes through the lifetime non-adjustment portion 260. The high-concentration region 20 provided in the transistor portion 70 is referred to as a first high-concentration region 20-1.

[0126] The first high-concentration region 20-1 has the hydrogen peak 201, the donor concentration peak 221, the upper flat portion 225, and the lower flat portion 226 described in FIGS. 1 to 5. The first high-concentration region 20-1 in this example has donor concentration peaks 241-1, 241-2, 241-3, and 241-4 on the lower surface 23 side of the donor concentration peak 221. Each donor concentration peak 241 is a peak of a hydrogen donor. The first high-concentration region 20-1 in this example has hydrogen peaks 271-1, 271-2, 271-3, and 271-4 on the lower surface 23 side of the hydrogen peak 201. Each hydrogen peak 271 may be arranged at the same depth position as the corresponding donor concentration peak 241. That two peaks are arranged at the same depth position means that the apex of the other peak is arranged within the range of the full width at half maximum of one peak.

[0127] The plurality of donor concentration peaks 241 may be arranged on the lower surface 23 side of the semiconductor substrate 10. The plurality of donor concentration peaks 241 may be arranged in a region within 1 / 4 of the thickness of the semiconductor substrate 10 with respect to the lower surface 23. At least one donor concentration peak 241 may have a higher donor concentration than the donor concentration peak 221. For example, the donor concentration peak 241 arranged on the lowermost lower surface 23 side may be 2 times or more, 5 times or more, or 10 times or more the donor concentration of the donor concentration peak 221. The plurality of donor concentration peaks 241 may include those having a lower donor concentration than the donor concentration peak 221. One or more donor concentration peaks 241 selected from the ones with a larger distance from the lower surface 23 may have a lower donor concentration than the donor concentration peak 221. Any donor concentration peak 241 may have a higher donor concentration than the upper flat portion 225.

[0128] Also, let the depth position at the lower end of the gate trench portion 40 or the dummy trench portion 30 shown in FIG. 8 be Zt. The lifetime non-adjustment portion 260 overlaps in the depth direction, and in the region where the depth position is from Zt to Z1, charged particles such as an electron beam or a helium ion for forming a lifetime killer do not pass through. Therefore, in the region from the depth position Zt to the depth position Z1, the carrier lifetime may be flat, monotonically increasing, or monotonically decreasing. That is, the carrier lifetime distribution does not have a valley or a peak in the region. The minimum value of the carrier lifetime in the region from the depth position Zt to Z1 is larger than the minimum value of the carrier lifetime in the region from the hydrogen peak 271-1 to the hydrogen peak 271-4. The carrier lifetime in the region from the depth position Zt to Z1 may be 80% or more of the maximum value of the carrier lifetime in the semiconductor substrate 10, and may be 90% or more. The variation range of the carrier lifetime in the region from the depth position Zt to Z1 may be ±20% or less with respect to the average value of the carrier lifetime in the region. Also, in the region from the depth position Zt to Z1, the helium chemical concentration is substantially 0 or 1% or less of the peak value of the helium chemical concentration in the lifetime adjustment portion 250. The carrier lifetime in the semiconductor substrate 10 may be 10 μs or more, and may be 30 μs or more. The carrier lifetime in the semiconductor substrate 10 may be 1000 μs or less, may be 300 μs or less, and may be 100 μs or less.

[0129] Note that in the region from the depth position Zt to Z1, the hole density distribution 232 (or the recombination center distribution) may have the same distribution as the above-described carrier lifetime. For example, in the region from the depth position Zt to the depth position Z1, the hole density may be flat, monotonically increasing, or monotonically decreasing. That is, the hole density distribution does not have a valley or a peak in the region. In the region from the depth position Zt to Z1, the hole density of the hole density distribution 232 is 1×10 13 / cm 3 or less, and may be 1×10 12 / cm3 may be as follows: 1×10 11 / cm 3 may be as follows. The pore density may be 1×10 13 / cm 3 If it is below this value, it may be said to be substantially zero.

[0130] The pore density or carrier lifetime at the central portion in the depth direction of the semiconductor substrate 10 and the pore density or carrier lifetime in the first high-concentration region 20-1 may be substantially equal. The value of the pore density or carrier lifetime in the first high-concentration region 20-1 may use the average value of the distribution in the depth direction. When the ratio of the two carrier lifetimes is 0.8 or more and 1.2 or less, they may be considered substantially equal. The central portion of the semiconductor substrate 10 may be the drift region 18 or may be the first high-concentration region 20-1.

[0131] Let the distance from the lower surface 23 of the semiconductor substrate 10 to the lower end position Zt of the trench portion be the first distance L1. Also, let the distance from the lower surface 23 to the depth position Z1 be the second distance Z1. The second distance Z1 may be 0.3 times or more and 0.8 times or less of the first distance L1. By setting the second distance Z1 to be 0.3 times or more of the first distance L1, it becomes easier to increase the acceleration energy of hydrogen ions and increase the extension width W1. The second distance Z1 may be 0.4 times or more of the first distance L1. By setting the second distance Z1 to be 0.8 times or less of the first distance L1, it is possible to suppress the first high-concentration region 20-1 from reaching the base region 14. The second distance Z1 may be 0.6 times or less of the first distance L1, or may be 0.45 times or less.

[0132] FIG. 10 shows an example of the depth-direction distribution of the hydrogen chemical concentration, doping concentration, carrier lifetime, and helium chemical concentration at the position shown by the d-d line in FIG. 8. The d-d line is parallel to the Z axis and passes through the lifetime adjustment portion 250. Also, the high-concentration region 20 provided in the diode portion 80 is referred to as the second high-concentration region 20-2.

[0133] The hydrogen chemical concentration distribution in this example is the same as the hydrogen chemical concentration distribution shown in FIG. 9. Further, the doping concentration distribution in this example is the same as that obtained by replacing the collector region 22 of the doping concentration distribution shown in FIG. 9 with the cathode region 82.

[0134] The diode portion 80 has a lifetime adjustment portion 250 in which the carrier lifetime exhibits a minimum value in the region between the depth position Zt and the depth position Z1. The lifetime adjustment portion 250 in this example is formed by injecting helium. The diode portion 80 may have a helium peak 252 at the same depth position as the lifetime adjustment portion 250. On the other hand, in the non-lifetime adjustment portion 260 shown in FIG. 9, the helium chemical concentration distribution at the same depth position as the helium peak 252 is flat.

[0135] When helium ions are injected from the lower surface 23 of the semiconductor substrate 10, many lattice defects such as vacancies are formed in the region through which the helium ions pass. In this case, the diode portion 80 has a higher vacancy density in the region from the depth position Z1 to the helium injection position than the transistor portion 70. For this reason, the length by which the second high-concentration region 20-2 extends toward the upper surface 21 may be longer than the length by which the first high-concentration region 20-1 extends toward the upper surface 21. That is, in the depth direction from the upper surface 21 to the lower surface 23 of the semiconductor substrate 10, the diode portion 80 may have a portion with a higher vacancy density than the transistor portion 70. However, the extension widths W1 (see FIG. 2) of both the first high-concentration region 20-1 and the second high-concentration region 20-2 are 4 μm or more. By adjusting the acceleration energy of the hydrogen ions, the extension width W1 of the high-concentration region 20 can be made 4 μm or more even in a region not irradiated with charged particles. For this reason, a long first high-concentration region 20-1 can be formed in the depth direction without providing an unnecessary lifetime adjustment portion 250 on the upper surface 21 side of the transistor portion 70. The upper flat portion 225-d of the diode portion 80 may extend more toward the upper surface 21 than the upper flat portion 225-t of the transistor portion 70. In this case, helium ions may be injected from the lower surface 23 side.

[0136] FIG. 11 shows another example of the depthwise distribution of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, and the helium chemical concentration at the position indicated by the c-c line in FIG. 8. The hydrogen chemical concentration distribution in this example has one hydrogen peak 271 in the region from the lower surface 23 to the depth position Z1. Further, the doping concentration distribution in this example has one donor concentration peak 241 in the region from the lower surface 23 to the depth position Z1. The other distributions are the same as those in the example of FIG. 9. The distances between the hydrogen peak 271 and the donor concentration peak 241 and the lower surface 23 may be half or less of the distance Z1, or may be 1 / 4 or less.

[0137] FIG. 12 shows another example of the depthwise distribution of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, and the helium chemical concentration at the position indicated by the c-c line in FIG. 8. The hydrogen chemical concentration distribution in this example has two hydrogen peaks 271-1 and 271-2 in the region from the lower surface 23 to the depth position Z1. Further, the doping concentration distribution in this example has two donor concentration peaks 241-1 and 241-2 in the region from the lower surface 23 to the depth position Z1. The other distributions are the same as those in the example of FIG. 9. The distances between the hydrogen peak 271-2 and the donor concentration peak 241-2, which are arranged farthest from the lower surface 23, and the lower surface 23 may be half or less of the distance Z1, or may be 1 / 4 or less.

[0138] FIG. 13 shows another example of the depthwise distribution of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, and the helium chemical concentration at the position indicated by the c-c line in FIG. 8. The hydrogen chemical concentration distribution in this example has three hydrogen peaks 271-1, 271-2, and 271-3 in the region from the lower surface 23 to the depth position Z1. Further, the doping concentration distribution in this example has three donor concentration peaks 241-1, 241-2, and 241-3 in the region from the lower surface 23 to the depth position Z1. The other distributions are the same as those in the example of FIG. 9. The hydrogen peak 271-3 and the donor concentration peak 241-3 , lower surface 23 The distances between them and the lower surface 23 may be half or less of the distance Z1, or may be 1 / 4 or less.

[0139] FIG. 14 shows another example of the depthwise distributions of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, and the helium chemical concentration at the position indicated by the c-c line in FIG. 8. The hydrogen chemical concentration distribution in this example does not have a hydrogen peak 271 in the region from the lower surface 23 to the depth position Z1. The hydrogen chemical concentration decreases monotonically from the depth position Z1 toward the lower surface 23. Also, the doping concentration distribution in this example has one or more donor concentration peaks 241 in the region from the lower surface 23 to the depth position Z1. Any of the donor concentration peaks 241 is a peak of a donor other than a hydrogen donor (e.g., phosphorus). In FIG. 14, an example having one donor concentration peak 241 is shown, but a plurality of donor concentration peaks 241 may be provided as shown in FIGS. 9, 12, or 13. In this case, the donor concentration peak 241 closest to the lower surface 23 may be a peak of a donor such as phosphorus. The other donor concentration peaks 241 may be peaks of hydrogen donors.

[0140] FIG. 15 shows another example of the depthwise distributions of the hydrogen chemical concentration, the doping concentration, the carrier lifetime, and the helium chemical concentration at the position indicated by the c-c line in FIG. 8. The hydrogen chemical concentration distribution in this example does not have a hydrogen peak 271 in the region from the lower surface 23 to the depth position Z1. The hydrogen chemical concentration decreases monotonically from the depth position Z1 toward the lower surface 23. Also, the doping concentration distribution in this example does not have a donor concentration peak 241 in the region from the lower surface 23 to the depth position Z1. The doping concentration may decrease monotonically from the depth position Z1 toward the collector region 22. In this example, it is preferable that the thickness of the semiconductor substrate 10 is made sufficiently large so that the depletion layer spreading from the upper surface 21 side does not reach the collector region 22. Also, the distance from the lower surface 23 to the depth position Z1 may be 80 μm or more, 100 μm or more, 150 μm or more, or 200 μm or more. The other distributions are the same as the example in FIG. 9.

[0141] FIG. 16 is a diagram showing an example of a method for manufacturing a semiconductor device 100. In FIG. 16, only some of the manufacturing steps of the semiconductor device 100 are shown. In this example, first, an upper surface side structure of the semiconductor device 100 is formed (S1600). The upper surface side structure includes at least a part of the structure above the center Zc of the semiconductor substrate 10. The upper surface side structure may include at least one of each trench portion, emitter region 12, base region 14, accumulation region 16, contact region 15, interlayer insulating film 38, emitter electrode 52, and gate wiring.

[0142] Next, in the substrate thinning step S1602, the lower surface 23 of the semiconductor substrate 10 is ground to adjust the thickness of the semiconductor substrate 10. In S1602, the thickness of the semiconductor substrate 10 is adjusted according to the breakdown voltage that the semiconductor device 100 should have.

[0143] Next, in the lower surface side region forming step S1604, a collector region 22 is formed. In the lower surface side region forming step S1604, a cathode region 82 may also be formed. In the lower surface side region forming step S1604, a predetermined impurity may be implanted into the lower surface 23 of the semiconductor substrate 10 and locally annealed with a laser or the like to form the collector region 22 and the cathode region 82.

[0144] Next, in the hydrogen implantation step S1606, hydrogen ions are implanted into the semiconductor substrate 10 from the lower surface 23 of the semiconductor substrate 10 with an acceleration energy greater than 1.4 MeV. Thereby, a hydrogen peak 201 in which the hydrogen chemical concentration shows a maximum value at the depth position Z1 is formed. The acceleration energy may be greater than 1.4 MeV, may be 1.5 MeV or more, may be 1.8 MeV or more, or may be 2.0 MeV or more.

[0145] The hydrogen dose amount in the hydrogen implantation step S1606 may be 1×10 12 / cm 2 or more. The dose amount may be greater than 1×10 12 ions / cm 2 may be greater than 1.5×10 12 ions / cm 2 or more, and may be 2×1012 ions / cm 2 may be the above, 3×10 12 ions / cm 2 or more. The dose amount may be 1×10 15 ions / cm 2 or less, and may be 1×10 14 ions / cm 2 or less, and may be 1×10 13 ions / cm 2 or less.

[0146] Also, when the high-concentration region 20 has one or more hydrogen peaks 271, in the hydrogen injection step S1606, hydrogen ions are injected at the positions of the respective hydrogen peaks 271. In the hydrogen injection step S1606, among the hydrogen peaks, hydrogen ions may be injected in order from the hydrogen peak having a larger distance from the lower surface 23. In other examples, hydrogen ions may be injected in order from the hydrogen peak having a smaller distance from the lower surface 23.

[0147] Next, in the annealing step S1608, the semiconductor substrate 10 is annealed. In the annealing step S1608, the entire semiconductor substrate 10 may be annealed in an annealing furnace. The annealing temperature in the annealing step S1608 may be 300°C or higher and 420°C or lower. The annealing temperature may be 350°C or higher. The annealing temperature may be 390°C or lower. The annealing temperature in this example is 370°C. The annealing time in the annealing step S1608 is 0.5 hours or more and 10 hours or less. The annealing time may be 3 hours or more. The annealing time may be 7 hours or less. The annealing in this example time is 5 hours. By the annealing step S1608, a high-concentration region 20 including a region extending 4 μm or more from the apex 202 of the hydrogen peak 201 toward the upper surface 21 is formed.

[0148] Also, when providing the lifetime adjustment unit 250 in the diode unit 80, after the annealing step S1608, charged particles such as helium are injected into the semiconductor substrate 10. Also, after the annealing step S1608, the collector electrode 24 is formed. Through such steps, the semiconductor device 100 can be manufactured.

[0149] FIG. 17 is a diagram showing another example of the manufacturing method of the semiconductor device 100. In this example, instead of the steps after the hydrogen injection step S1606 in FIG. 16, a first hydrogen injection step S1700, a first annealing step S1702, a second hydrogen injection step S1704, and a second annealing step S1706 are provided. The steps from S1600 to S1604 are the same.

[0150] In the first hydrogen injection step S1700, hydrogen ions are injected at the depth position Z1. Then, in the first annealing step S1702, the semiconductor substrate 10 is annealed. In the first annealing step S1702, the entire semiconductor substrate 10 may be annealed in an annealing furnace. The annealing temperature and annealing time in the first annealing step S1702 are the same as those in the annealing step S1608 in FIG. 16.

[0151] Next, in the second hydrogen injection step S1704, hydrogen ions are injected at the position where the hydrogen peak 271 is to be formed. Then, in the second annealing step S1706, the semiconductor substrate 10 is annealed. In the second annealing step S1706, the entire semiconductor substrate 10 may be annealed in an annealing furnace. The annealing temperature in the second annealing step S1706 may be lower than the annealing temperature in the first annealing step S1702. The annealing temperature may be 300°C or higher and 420°C or lower. The annealing temperature in this example is 360°C. Also, the annealing time in the second annealing step S1706 may be the same as the annealing time in the first annealing step S1702. The annealing time may be 0.5 hours or more and 10 hours or less. The annealing time in this example is 5 hours.

[0152] Also in this example, when the lifetime adjustment unit 250 is provided in the diode unit 80, after the second annealing step S1706, charged particles such as helium are implanted into the semiconductor substrate 10. Further, after the second annealing step S1706, the collector electrode 24 is formed. By such a process, the semiconductor device 100 can be manufactured.

[0153] As described above, the present invention has been described using the embodiments. However, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0154] It should be noted that the execution order of each process such as operations, procedures, steps, and stages in the devices, systems, programs, and methods shown in the claims, the specification, and the drawings is not explicitly stated as "earlier" or "preceding" etc., and can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flows in the claims, the specification, and the drawings, even if they are described using "first," "next," etc. for convenience, it does not mean that it is essential to implement in this order.

Description of Reference Numerals

[0155] 10 ··· Semiconductor substrate, 11 ··· Well region, 12 ··· Emitter region, 14 ··· Base region, 15 ··· Contact region, 16 ··· Accumulation region, 18 ··· Drift region, 19 ··· Region, 20 ··· High-concentration region, 21 ··· Upper surface, 22 ··· Collector region, 23 ··· Lower surface, 24 ··· Collector electrode, 29 ··· Straight portion, 30 ··· Dummy trench portion, 31 ··· Tip portion, 32 ··· Dummy insulating film, 34 ··· Dummy conductive portion, 38 ··· Interlayer insulating film, 39 ··· Straight portion, 40 ··· Gate trench portion, 41 ··· Tip portion, 42 ··· Gate insulating film, 44 ··· Gate conductive portion, 52 ··· Emitter electrode, 54 ··· Contact hole, 60, 61 ··· Mesa portion, 70 ··· Transistor portion, 80 ··· Diode portion, 81 ··· Extension region, 82 ··· Cathode region, 90 ··· Edge termination structure portion, 92 ··· Guard ring, 100 ··· Semiconductor device, 102 ··· Side edge, 112 ··· Gate pad, 130 ··· Outer peripheral gate wiring, 131 ··· Active side gate wiring, 160 ··· Active portion, 201 ··· Hydrogen peak, 202 ··· Vertex, 203 ··· Upper skirt, 204 ··· Lower skirt, 221 ··· Donor concentration peak, 222 ··· Vertex, 223 ··· Upper skirt, 224 ··· Lower skirt, 225 ··· Upper flat portion, 226 ··· Lower flat portion, 231 ··· Vacancy density peak, 232 ··· Distribution, 241 ··· Donor concentration peak, 250 ··· Lifetime adjustment portion, 251 ··· Vacancy density peak, 252 ··· Helium peak, 260 ··· Lifetime non-adjustment portion, 271 ··· Hydrogen peak

Claims

A semiconductor device provided with an IGBT, comprising: A semiconductor substrate having an upper surface and a lower surface, with bulk donors distributed throughout; A hydrogen peak in which the hydrogen chemical concentration exhibits a maximum value, having a vertex located 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently than the upper skirt from the vertex toward the lower surface; A first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the vertex of the hydrogen peak toward the upper surface; And; The ratio of the hole concentration or carrier lifetime in the central portion of the semiconductor substrate to the hole concentration or carrier lifetime in the first high-concentration region is 0.8 or more and 1.2 or less. A semiconductor device. A semiconductor device provided with an IGBT, comprising: A semiconductor substrate having an upper surface and a lower surface, with bulk donors distributed throughout; A hydrogen peak in which the hydrogen chemical concentration exhibits a maximum value, having a vertex located 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently than the upper skirt from the vertex toward the lower surface; A first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the vertex of the hydrogen peak toward the upper surface; A trench portion provided on the upper surface of the semiconductor substrate; And; In the region from the lower end of the trench portion to the hydrogen peak, the carrier lifetime is flat, monotonically increasing, or monotonically decreasing; The lower end of the trench portion is disposed at a first distance from the lower surface; The second distance between the hydrogen peak and the lower surface is 0.3 times or more and 0.8 times or less of the first distance. A semiconductor device. A semiconductor device provided with an IGBT, comprising: A semiconductor substrate having an upper surface and a lower surface, with bulk donors distributed throughout; A hydrogen peak in which the hydrogen chemical concentration exhibits a maximum value, having a vertex located 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently than the upper skirt from the vertex toward the lower surface; a first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the apex of the hydrogen peak toward the upper surface; comprising; the semiconductor substrate has a transistor portion provided with the IGBT and a diode portion provided with a diode; the diode portion is disposed on the upper surface side of the hydrogen peak and has a lifetime adjustment portion in which the carrier lifetime distribution in the depth direction exhibits a minimum value; the transistor portion has a lifetime non-adjustment portion in which the carrier lifetime distribution does not exhibit a minimum value at the same depth position as the lifetime adjustment portion of the diode portion; the hydrogen peak and the first high-concentration region are provided in a region overlapping with the lifetime non-adjustment portion in a top view; a semiconductor device.

4. A semiconductor device provided with an IGBT, a semiconductor substrate having an upper surface and a lower surface and having a bulk donor distributed throughout; a hydrogen peak having a maximum value of the hydrogen chemical concentration, a vertex disposed more than 30 μm away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently from the vertex toward the lower surface than the upper skirt; a first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the apex of the hydrogen peak toward the upper surface; a semiconductor device comprising.

5. A semiconductor device provided with an IGBT, a semiconductor substrate having an upper surface and a lower surface and having a bulk donor distributed throughout; a hydrogen peak having a maximum value of the hydrogen chemical concentration, a vertex disposed 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently from the vertex toward the lower surface than the upper skirt; a first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the apex of the hydrogen peak toward the upper surface; two or more lower hydrogen peaks provided on the lower surface side of the hydrogen peak; comprising; the hydrogen peak is disposed on the upper surface side of the central position in the depth direction of the semiconductor substrate, Of the two or more lower hydrogen peaks, the distance between the lower hydrogen peak located closest to the hydrogen peak and the lower surface is half or less of the distance between the hydrogen peak and the lower surface. Semiconductor device.

6. A donor concentration peak provided at the same depth position as the hydrogen peak and showing a peak in the donor concentration distribution in the depth direction, An upper flat portion disposed on the upper surface side of the semiconductor substrate with respect to the donor concentration peak and having a flat donor concentration distribution in the depth direction, A lower flat portion disposed on the lower surface side of the semiconductor substrate with respect to the donor concentration peak and having a flat donor concentration distribution in the depth direction further comprising: The donor concentration of the upper flat portion is 0.5 times or more and 2 times or less of the donor concentration of the lower flat portion. The semiconductor device according to any one of claims 1 to 5.

7. The lifetime adjustment portion has a helium peak showing a peak in the helium chemical concentration distribution in the depth direction, The lifetime non-adjustment portion has a flat helium chemical concentration distribution at the same depth position as the helium peak. The semiconductor device according to claim 3.

8. The diode portion the hydrogen peak, a second high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending from the hydrogen peak toward the upper surface, having The length by which the second high-concentration region extends toward the upper surface is longer than the length by which the first high-concentration region extends toward the upper surface. The semiconductor device according to claim 3 or 7.

9. A semiconductor device provided with an IGBT, a semiconductor substrate having an upper surface and a lower surface and having bulk donors distributed throughout, a hydrogen peak including a vertex where the hydrogen chemical concentration shows a maximum value and is disposed 25 μm or more away from the lower surface of the semiconductor substrate in the depth direction, an upper skirt in which the hydrogen chemical concentration decreases from the vertex toward the upper surface, and a lower skirt in which the hydrogen chemical concentration decreases more gently than the upper skirt from the vertex toward the lower surface, a first high-concentration region having a donor concentration higher than the bulk donor concentration and including a region extending 4 μm or more from the vertex of the hydrogen peak toward the upper surface comprising The ratio of two carrier lifetimes selected from the carrier lifetime at the hydrogen peak, the carrier lifetime in the first high-concentration region, and the carrier lifetime in at least the portion of the drift region adjacent to the first high-concentration region where the donor concentration is the bulk donor concentration is all 0.8 or more and 1.2 or less. Semiconductor device. Claim 10 A method for manufacturing a semiconductor device including a semiconductor substrate having an upper surface and a lower surface and having bulk donors distributed throughout, and an IGBT provided thereon, A hydrogen injection step of injecting hydrogen ions into the semiconductor substrate from the lower surface at an acceleration energy greater than 1.8 MeV and a dose amount of 3.0×10 12 ions / cm 2 or more to form a hydrogen peak at which the hydrogen chemical concentration exhibits a maximum value, An annealing step of annealing the semiconductor substrate to form a first high-concentration region including a region where the donor concentration is higher than the bulk donor concentration and extending 8 μm or more from the apex of the hydrogen peak toward the upper surface The manufacturing method comprising the steps. Claim 11 The apex is disposed at a depth of 40 μm or more in the depth direction from the lower surface of the semiconductor substrate. The semiconductor device according to claim 5.

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