Semiconductor device and method of manufacturing the same

Abstract

To avoid the breaking of a sense IGBT.SOLUTION: A semiconductor device includes a semiconductor substrate, a transistor part provided to the semiconductor substrate, a current sense part to detect the current flowing in the transistor part, an emitter electrode set to have an emitter potential of the transistor part, a sense electrode electrically connected to the current sense part, and a Zener diode electrically connected between the emitter electrode and the sense electrode. A manufacturing method for a semiconductor device includes the steps of providing a semiconductor substrate to a transistor part, providing a current sense part to detect the current flowing in the transistor part, providing an emitter electrode set to have an emitter potential of the transistor part, providing a sense electrode electrically connected to the current sense part, and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.SELECTED DRAWING: Figure 2B

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

Background Art

[0002] Patent Document 1 discloses providing a Zener diode in a semiconductor device including a sense IGBT. [Prior Art Document] [Patent Document] [Patent Document 1] International Publication No. 2017 / 141560

Summary of the Invention

Problems to be Solved by the Invention

[0003] It is preferable to avoid destruction of the sense IGBT.

Means for Solving the Problems

[0004] In a first aspect of the present invention, there is provided a semiconductor device including a semiconductor substrate, a transistor portion provided on the semiconductor substrate, a current sense portion for detecting a current flowing through the transistor portion, an emitter electrode set to an emitter potential of the transistor portion, a sense electrode electrically connected to the current sense portion, and a Zener diode electrically connected between the emitter electrode and the sense electrode.

[0005] The Zener diode may be provided on the semiconductor substrate.

[0006] The semiconductor device may include an emitter potential electrode set to the emitter potential and electrically connected to the Zener diode.

[0007] The semiconductor device may be provided on a semiconductor substrate and include a well region of a second conductivity type set to an emitter potential. The semiconductor device may include an interlayer insulating film provided between the emitter potential electrode and the well region. The semiconductor device may include a contact portion provided in a contact hole of the interlayer insulating film and electrically connecting the emitter potential electrode and the well region.

[0008] The sense electrode may be formed in a rectangle in a top view. The Zener diode may be provided along at least two sides of the sense electrode.

[0009] The Zener diode may be provided along at least three sides of the sense electrode.

[0010] The semiconductor device may include an electrode connection portion that connects the emitter potential electrode and the emitter electrode above the semiconductor substrate.

[0011] The Zener diode may have a first conductivity type region and a second conductivity type region. The first conductivity type region and the second conductivity type region may be arranged side by side in a top view.

[0012] The film thicknesses of the first conductivity type region and the second conductivity type region may each be 0.3 μm or more and 1 μm or less.

[0013] The semiconductor device may include a temperature sensing portion having a diode provided on the semiconductor substrate. The film thickness of the diode in the temperature sensing portion and the Zener diode may be substantially the same.

[0014] The junction length of the Zener diode may be 0.6 mm or more and 3.0 mm or less.

[0015] The Zener diode may have a second conductivity type well region, a first conductivity type region provided above the well region in the semiconductor substrate, and a second conductivity type region provided above the first conductivity type region in the semiconductor substrate.

[0016] The transistor section may include a drift region of a first conductivity type, a base region of a second conductivity type provided on the front surface side of the drift region, an emitter region of the first conductivity type having a higher doping concentration than the drift region, and a collector region of the second conductivity type having a higher doping concentration than the base region. The first conductivity type region may have the same film thickness and doping concentration as the emitter region.

[0017] In a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of providing a semiconductor substrate to the transistor section, providing a current sense section for detecting a current flowing through the transistor section, providing an emitter electrode set to the emitter potential of the transistor section, providing a sense electrode electrically connected to the current sense section, and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.

[0018] The PN structure of the Zener diode may be formed by a process common to the PN structure of the diode of the temperature sense section.

[0019] The method of manufacturing a semiconductor device may include the step of providing an emitter potential electrode set to the emitter potential and electrically connected to the Zener diode.

[0020] The method of manufacturing a semiconductor device may include the steps of providing a well region of the second conductivity type provided on the semiconductor substrate and set to the emitter potential, providing an interlayer insulating film between the emitter potential electrode and the well region, providing a contact hole in the interlayer insulating film, and providing a contact portion for electrically connecting the emitter potential electrode and the well region in the contact hole.

[0021] The method of manufacturing a semiconductor device may include the step of providing an electrode connection portion for connecting the emitter potential electrode and the emitter electrode above the semiconductor substrate.

[0022] The region of the first conductivity type of the Zener diode may be formed by a process common to the emitter region of the first conductivity type of the transistor section.

[0023] Note that the above summary of the invention does not list all the necessary features of the present invention. Also, sub-combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0024]

Figure 1A

Figure 1B

Figure 1C

Figure 2A

Figure 2B

Figure 2C

Figure 2D

Figure 3A

Figure 3B

Figure 3C

Figure 4

Figure 5A

Figure 5B

Figure 6

Figure 7A

Figure 7B

Best Mode for Carrying Out the Invention

[0025] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution of the invention.

[0026] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "front" or "top", and the other side is referred to as "back" or "bottom". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "front", "top", "back", and "bottom" are not limited to the direction of gravity or the direction during mounting of the semiconductor device.

[0027] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without indicating positive or negative, it means directions parallel to the +Z-axis and -Z-axis. Also, in this specification, viewing from the +Z-axis direction may be referred to as a top view.

[0028] When referred to as "identical" or "equal" in this specification, it may include cases having errors due to manufacturing variations or the like. The error is, for example, within 10%.

[0029] In this specification, the conductivity type of the doped region doped with impurities is described as P-type or N-type. However, the conductivity type of each doped region may be of the opposite polarity. Also, when described as P+ type or N+ type in this specification, it means that the doping concentration is higher than that of the P-type or N-type, and when described as P- type or N- type, it means that the doping concentration is lower than that of the P-type or N-type.

[0030] In this specification, the doping concentration refers to the concentration of impurities activated as donors or acceptors. In this specification, the concentration difference between donors and acceptors may be taken as the higher concentration of donors or acceptors. The concentration difference can be measured by the voltage-capacitance measurement method (CV method). Also, the carrier concentration measured by the spreading resistance measurement method (SR) may be taken as the concentration of donors or acceptors. Further, when the concentration distribution of donors or acceptors has a peak, the peak value may be taken as the concentration of donors or acceptors in the region. In cases where the concentration of donors or acceptors in the region where donors or acceptors exist is substantially uniform, etc., the average value of the donor concentration or acceptor concentration in the region may be taken as the donor concentration or acceptor concentration.

[0031] FIG. 1A shows an example of a top view of a semiconductor device 100 according to Example 1. The semiconductor device 100 is a semiconductor chip including a transistor portion 70 and a diode portion 80. The semiconductor device 100 includes a temperature sense portion 180 and may be mounted on a module such as an IPM (Intelligent Power Module).

[0032] The transistor portion 70 includes transistors such as IGBTs (Insulated Gate Bipolar Transistors). The diode portion 80 includes diodes such as free wheel diodes (FWDs). The semiconductor device 100 in this example is a reverse conducting IGBT (RC-IGBT: Reverse Conducting IGBT) having the transistor portion 70 and the diode portion 80 on the same chip.

[0033] The semiconductor substrate 10 may be a silicon substrate, may be a silicon carbide substrate, or may be a nitride semiconductor substrate such as gallium nitride. The semiconductor substrate 10 in this example is a silicon substrate. The semiconductor substrate 10 has an active region 110 and an outer peripheral region 120.

[0034] The transistor portion 70 is an area obtained by projecting the collector region provided on the lower surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The collector region has a second conductivity type. The collector region is, for example, P+ type.

[0035] The diode portion 80 is an area obtained by projecting the cathode region provided on the lower surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The cathode region has a first conductivity type. The cathode region in this example is, for example, N+ type.

[0036] The transistor portion 70 and the diode portion 80 may be alternately and periodically arranged in the XY plane. The transistor portion 70 and the diode portion 80 in this example have a plurality of transistor portions and diode portions. In the region between the transistor portion 70 and the diode portion 80, a gate metal layer 50 may be provided above the semiconductor substrate 10.

[0037] Note that the transistor portion 70 and the diode portion 80 in this example have a trench portion extending in the Y-axis direction. However, the transistor portion 70 and the diode portion 80 may have a trench portion extending in the X-axis direction.

[0038] The active region 110 has the transistor portion 70 and the diode portion 80. The active region 110 is a region where a main current flows between the upper surface and the lower surface of the semiconductor substrate 10 when the semiconductor device 100 is controlled to be in an on state. That is, it is a region where current flows in the depth direction inside the semiconductor substrate 10 from the upper surface to the lower surface, or from the lower surface to the upper surface of the semiconductor substrate 10. In this specification, the transistor portion 70 and the diode portion 80 are respectively referred to as element portions or element regions.

[0039] Note that in a top view, the region sandwiched between two element portions is also regarded as the active region 110. In this example, the region where the gate metal layer 50 is provided and sandwiched by the element portions is also included in the active region 110.

[0040] The gate metal layer 50 is formed of a material containing metal. For example, the gate metal layer 50 is formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The gate metal layer 50 is electrically connected to the gate conductive portion of the transistor portion 70 and supplies a gate voltage to the transistor portion 70. The gate metal layer 50 is provided so as to surround the outer periphery of the active region 110 in a top view. The gate metal layer 50 is electrically connected to a gate pad 130 provided in the outer peripheral region 120. The gate metal layer 50 may be provided along the outer peripheral end of the semiconductor substrate 10. Also, the gate metal layer 50 may be provided around the temperature sense portion 180 or between the transistor portion 70 and the diode portion 80 in a top view.

[0041] The outer peripheral region 120 is a region between the active region 110 and the outer peripheral end of the semiconductor substrate 10 in a top view. The outer peripheral region 120 is provided so as to surround the active region 110 in a top view. One or more metal pads for connecting the semiconductor device 100 and an external device with a wire or the like may be arranged in the outer peripheral region 120. Note that the outer peripheral region 120 may have an edge termination structure portion. The edge termination structure portion relaxes the electric field concentration on the upper surface side of the semiconductor substrate 10. For example, the edge termination structure portion has a guard ring, a field plate, a RESURF, and a structure combining these.

[0042] The front surface electrode is provided above the semiconductor substrate 10. The front surface electrode includes an emitter electrode 52 described later. The front surface electrode may include the gate pad 130, the sense electrode 140, the anode pad 150, and the cathode pad 160. The front surface electrode may be connected to an external electrode of the semiconductor device 100 by wire bonding or the like. Note that the number and position of the front surface electrodes are not limited to this example.

[0043] The gate pad 130 is electrically connected to the gate conductive portion of the transistor portion 70 via the gate metal layer 50. The gate pad 130 is set to a gate potential. The gate pad 130 in this example is rectangular in a top view.

[0044] The sense electrode 140 is electrically connected to the current sense unit 141. The sense electrode 140 detects the current flowing through the current sense unit 141. The sense electrode 140 in this example is rectangular in top view.

[0045] The current sense unit 141 detects the current flowing through the transistor unit 70. The current sense unit 141 is provided below the sense electrode 140. The current sense unit 141 has a structure corresponding to the transistor unit 70 and simulates the operation of the transistor unit 70. A current proportional to the current flowing through the transistor unit 70 flows through the current sense unit 141. Therefore, the current flowing through the transistor unit 70 can be monitored.

[0046] The anode pad 150 is electrically connected to the anode region of the temperature sense unit 180. The anode pad 150 is connected to the anode region of the temperature sense unit 180 by the anode wiring 152. The anode pad 150 in this example is rectangular in top view.

[0047] The cathode pad 160 is electrically connected to the cathode region of the temperature sense unit 180. The cathode pad 160 is connected to the cathode region of the temperature sense unit 180 by the cathode wiring 162. The cathode pad 160 in this example is rectangular in top view.

[0048] The temperature sense unit 180 is provided above the active region 110. The temperature sense unit 180 detects the temperature of the active region 110. The temperature sense unit 180 may have a diode formed of single-crystal or polycrystalline silicon. The temperature sense unit 180 is used to detect the temperature of the semiconductor device 100 and protect the semiconductor chip from overheating. The temperature sense unit 180 is connected to a constant current source. When the temperature of the semiconductor device 100 changes, the forward voltage of the current flowing through the temperature sense unit 180 changes. The semiconductor device 100 can detect the temperature based on the change in the forward voltage. The temperature sense unit 180 has a longitudinal direction in the Y-axis direction and a short-side direction in the X-axis direction, but is not limited thereto.

[0049] In this example, the temperature sensing unit 180 is provided near the center of the active region 110 in a top view. The temperature sensing unit 180 may be provided in any region of the transistor unit 70 and the diode unit 80. That is, on the lower surface side of the semiconductor substrate 10 where the temperature sensing unit 180 is provided, a collector region of the second conductivity type or a cathode region of the first conductivity type may be provided. The temperature sensing unit 180 is provided adjacent to the transistor unit 70 and the diode unit 80.

[0050] The anode wiring 152 and the cathode wiring 162 are provided above the active region 110 in a top view. Also, the anode wiring 152 and the cathode wiring 162 are provided to extend from the temperature sensing unit 180 to the outer peripheral region 120. The anode wiring 152 and the cathode wiring 162 of this example are provided to extend in the Y-axis direction from the temperature sensing unit 180. The anode wiring 152 and the cathode wiring 162 may be formed of the same material as the front surface electrode.

[0051] FIG. 1B shows an example of a top view of the semiconductor device 100 according to Example 1. In this example, an enlarged view of an end portion of the active region 110 is shown.

[0052] The transistor unit 70 is a region obtained by projecting a collector region 22 provided on the back surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The collector region 22 has the second conductivity type. The collector region 22 of this example is P+ type as an example. The transistor unit 70 includes a boundary portion 90 located at the boundary between the transistor unit 70 and the diode unit 80.

[0053] The diode unit 80 is a region obtained by projecting a cathode region 82 provided on the back surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The cathode region 82 has the first conductivity type. The cathode region 82 of this example is N+ type as an example.

[0054] In the semiconductor device 100 of this example, on the front surface of the semiconductor substrate 10, a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 are provided. Further, the semiconductor device 100 of this example includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface of the semiconductor substrate 10.

[0055] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. Also, the gate metal layer 50 is provided above the gate trench portion 40 and the well region 17. The emitter electrode 52 of this example is set to the emitter potential of the transistor portion 70.

[0056] The emitter electrode 52 and the gate metal layer 50 are formed of a material containing metal. For example, at least a part of the emitter electrode 52 may be formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The emitter electrode 52 may have a barrier metal formed of titanium or a titanium compound or the like under a region formed of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other.

[0057] The emitter electrode 52 and the gate metal layer 50 are provided above the semiconductor substrate 10 with the interlayer insulating film 38 interposed therebetween. The interlayer insulating film 38 is omitted in FIG. 1A. Contact holes 54, 55, and 56 are provided penetrating the interlayer insulating film 38.

[0058] The contact hole 55 connects the gate metal layer 50 and the gate conductive portion in the transistor portion 70. A plug formed of tungsten or the like may be formed inside the contact hole 55.

[0059] The contact hole 56 connects the emitter electrode 52 and the dummy conductive part in the dummy trench part 30. A plug formed of tungsten or the like may be formed inside the contact hole 56.

[0060] The connection part 25 electrically connects the front surface electrode such as the emitter electrode 52 or the gate metal layer 50 and the semiconductor substrate 10. In one example, the connection part 25 is provided between the gate metal layer 50 and the gate conductive part. The connection part 25 is also provided between the emitter electrode 52 and the dummy conductive part. The connection part 25 is a conductive material such as polysilicon doped with impurities. Here, the connection part 25 is polysilicon doped with N-type impurities (N+). The connection part 25 is provided above the front surface of the semiconductor substrate 10 via an insulating film such as an oxide film.

[0061] The gate trench parts 40 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). The gate trench parts 40 in this example may have two extending parts 41 that extend along an extending direction (the Y-axis direction in this example) that is parallel to the front surface of the semiconductor substrate 10 and perpendicular to the arrangement direction, and a connecting part 43 that connects the two extending parts 41.

[0062] At least a part of the connecting part 43 is preferably formed in a curved shape. By connecting the ends of the two extending parts 41 of the gate trench part 40, the electric field concentration at the ends of the extending parts 41 can be alleviated. In the connecting part 43 of the gate trench part 40, the gate metal layer 50 may be connected to the gate conductive part.

[0063] The dummy trench part 30 is a trench part electrically connected to the emitter electrode 52. The dummy trench parts 30 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example), similar to the gate trench parts 40. The dummy trench parts 30 in this example may have a U shape on the front surface of the semiconductor substrate 10, similar to the gate trench parts 40. That is, the dummy trench part 30 may have two extending parts 31 that extend along the extending direction, and a connecting part 33 that connects the two extending parts 31.

[0064] The transistor portion 70 in this example has a structure in which two gate trench portions 40 and three dummy trench portions 30 are repeatedly arranged. That is, the transistor portion 70 in this example has the gate trench portion 40 and the dummy trench portion 30 at a ratio of 2:3. For example, the transistor portion 70 has one extension portion 31 between two extension portions 41. Also, the transistor portion 70 has two extension portions 31 adjacent to the gate trench portion 40.

[0065] However, the ratio of the gate trench portion 40 to the dummy trench portion 30 is not limited to this example. The ratio of the gate trench portion 40 to the dummy trench portion 30 may be 1:1 or 2:4. Also, it may be a so-called full gate structure in which no dummy trench portion 30 is provided in the transistor portion 70 and all are gate trench portions 40.

[0066] The well region 17 is a region of the second conductivity type provided on the front surface side of the semiconductor substrate 10 rather than the drift region 18 described later. The well region 17 is an example of a well region provided on the edge side of the semiconductor device 100. The well region 17 is, as an example, P+-type. The well region 17 is formed within a predetermined range from the end of the active region on the side where the gate metal layer 50 is provided. The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. A part of the regions of the gate trench portion 40 and the dummy trench portion 30 on the gate metal layer 50 side are formed in the well region 17. The bottoms of the ends in the extending direction of the gate trench portion 40 and the dummy trench portion 30 may be covered by the well region 17.

[0067] The contact hole 54 is formed above each of the emitter region 12 and the contact region 15 in the transistor portion 70. Also, the contact hole 54 is provided above the base region 14 in the diode portion 80. The contact hole 54 is provided above the contact region 15 in the boundary portion 90. The contact hole 54 is provided above the base region 14 in the diode portion 80. None of the contact holes 54 is provided above the well regions 17 provided at both ends in the Y-axis direction. Thus, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 may be provided to extend in the extending direction.

[0068] The boundary portion 90 is provided in the transistor portion 70 and is a region adjacent to the diode portion 80. The boundary portion 90 has the contact region 15. The boundary portion 90 in this example does not have the emitter region 12. In one example, the trench portion of the boundary portion 90 is the dummy trench portion 30. The boundary portion 90 in this example is arranged such that both ends in the X-axis direction are the dummy trench portions 30.

[0069] The mesa portions 71, 91, and 81 are mesa portions provided adjacent to the trench portions in a plane parallel to the front surface of the semiconductor substrate 10. The mesa portion is a portion of the semiconductor substrate 10 sandwiched between two adjacent trench portions, and may be a portion from the front surface of the semiconductor substrate 10 to the depth of the deepest bottom portion of each trench portion. The extending portions of each trench portion may be regarded as one trench portion. That is, the region sandwiched between the two extending portions may be regarded as the mesa portion.

[0070] The mesa portion 71 is provided adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40 in the transistor portion 70. The mesa portion 71 has the well region 17, the emitter region 12, the base region 14, and the contact region 15 on the front surface of the semiconductor substrate 10. In the mesa portion 71, the emitter region 12 and the contact region 15 are alternately provided in the extending direction.

[0071] The mesa portion 91 is provided in the boundary portion 90. The mesa portion 91 has a contact region 15 and a well region 17 on the front surface of the semiconductor substrate 10.

[0072] The mesa portion 81 is provided in the region sandwiched by adjacent dummy trench portions 30 in the diode portion 80. The mesa portion 81 has a base region 14, a contact region 15, and a well region 17 on the front surface of the semiconductor substrate 10.

[0073] The base region 14 is a region of the second conductivity type provided on the front surface side of the semiconductor substrate 10 in the transistor portion 70 and the diode portion 80. The base region 14 is, for example, a P-type. The base region 14 may be provided at both ends in the Y-axis direction of the mesa portion 71 and the mesa portion 91 on the front surface of the semiconductor substrate 10. Note that FIG. 1A shows only one end in the Y-axis direction of the base region 14.

[0074] The emitter region 12 is a region of the first conductivity type having a higher doping concentration than the drift region 18. The emitter region 12 in this example is, for example, an N+ type. An example of the dopant in the emitter region 12 is arsenic (As). The emitter region 12 is provided in contact with the gate trench portion 40 on the front surface of the mesa portion 71. The emitter region 12 may be provided to extend in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The emitter region 12 is also provided below the contact hole 54.

[0075] Further, the emitter region 12 may or may not be in contact with the dummy trench portion 30. The emitter region 12 in this example is in contact with the dummy trench portion 30. The emitter region 12 does not have to be provided in the mesa portion 91 of the boundary portion 90.

[0076] The contact region 15 is a region of the second conductivity type with a doping concentration higher than that of the base region 14. The contact region 15 in this example is P+ type as an example. The contact region 15 in this example is provided on the front surface of the mesa portion 71 and the mesa portion 91. The contact region 15 may be provided in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 or the mesa portion 91 to the other. The contact region 15 may or may not be in contact with the gate trench portion 40. Also, the contact region 15 may or may not be in contact with the dummy trench portion 30. In this example, the contact region 15 is in contact with the dummy trench portion 30 and the gate trench portion 40. The contact region 15 is also provided below the contact hole 54. Note that the contact region 15 may also be provided on the mesa portion 81.

[0077] FIG. 1C is a diagram showing an example of the a-a' cross-section in FIG. 1B. The a-a' cross-section is an XZ plane passing through the emitter region 12 in the transistor portion 70. The semiconductor device 100 in this example has the semiconductor substrate 10, the interlayer insulating film 38, the emitter electrode 52, and the collector electrode 24 in the a-a' cross-section. The emitter electrode 52 is formed above the semiconductor substrate 10 and the interlayer insulating film 38.

[0078] The drift region 18 is a region of the first conductivity type provided in the semiconductor substrate 10. The drift region 18 in this example is N- type as an example. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doping regions being formed. That is, the doping concentration of the drift region 18 may be the doping concentration of the semiconductor substrate 10.

[0079] The buffer region 20 is a region of the first conductivity type provided below the drift region 18. The buffer region 20 in this example is N type as an example. The doping concentration of the buffer region 20 is higher than that of the drift region 18. The buffer region 20 may function as a field stop layer that prevents the depletion layer spreading from the lower surface side of the base region 14 from reaching the collector region 22 of the second conductivity type and the cathode region 82 of the first conductivity type.

[0080] In the transistor section 70, the collector region 22 is provided below the buffer region 20. In the diode section 80, the cathode region 82 is provided below the buffer region 20. The boundary between the collector region 22 and the cathode region 82 is the boundary between the transistor section 70 and the diode section 80.

[0081] The collector electrode 24 is formed on the back surface 23 of the semiconductor substrate 10. The collector electrode 24 is formed of a conductive material such as metal.

[0082] The base region 14 is a region of the second conductivity type provided above the base region 14 in the mesa portion 71, the mesa portion 91, and the mesa portion 81. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0083] In the mesa portion 71, the emitter region 12 is provided between the base region 14 and the front surface 21. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30. Note that the emitter region 12 does not have to be provided in the mesa portion 91.

[0084] In the mesa portion 91, the contact region 15 is provided above the base region 14. In the mesa portion 91, the contact region 15 is provided in contact with the gate trench portion 40. In other cross-sections, the contact region 15 may be provided on the front surface 21 of the mesa portion 71.

[0085] The accumulation region 16 is a region of the first conductivity type provided closer to the front surface 21 of the semiconductor substrate 10 than the drift region 18. The accumulation region 16 in this example is of the N+ type as an example. The accumulation region 16 is provided in the transistor section 70 and the diode section 80. The accumulation region 16 in this example is also provided at the boundary portion 90. Thereby, the semiconductor device 100 can avoid misalignment of the accumulation region 16.

[0086] Further, the accumulation region 16 is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the accumulation region 16 is higher than the doping concentration of the drift region 18. By providing the accumulation region 16, the carrier injection promotion effect (IE effect) can be enhanced, and the on-voltage of the transistor portion 70 can be reduced.

[0087] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the front surface 21. Each trench portion is provided from the front surface 21 to the drift region 18. In the region where at least any one of the emitter region 12, the base region 14, the contact region 15, and the accumulation region 16 is provided, each trench portion penetrates these regions and reaches the drift region 18. The trench portion penetrating the doping region is not limited to the one manufactured in the order of forming the doping region after forming the trench portion. The one in which the doping region is formed between the trench portions after forming the trench portion is also included in the one in which the trench portion penetrates the doping region.

[0088] The gate trench portion 40 has a gate trench formed on the front surface 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is formed to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is formed inside the gate insulating film 42 in the gate trench. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon. The gate trench portion 40 is covered by the interlayer insulating film 38 on the front surface 21.

[0089] The gate conductive portion 44 includes a region facing the base region 14 adjacent on the mesa portion 71 side with the gate insulating film 42 interposed therebetween in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel by an electron inversion layer is formed on the surface layer of the interface of the base region 14 in contact with the gate trench.

[0090] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench formed on the front surface 21 side, a dummy insulating film 32, and a dummy conductive portion 34. The dummy insulating film 32 is formed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and is formed inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 is covered with an interlayer insulating film 38 on the front surface 21.

[0091] The interlayer insulating film 38 is provided on the front surface 21. An emitter electrode 52 is provided above the interlayer insulating film 38. The interlayer insulating film 38 is provided with one or a plurality of contact holes 54 for electrically connecting the emitter electrode 52 and the semiconductor substrate 10. Similarly, the contact hole 55 and the contact hole 56 may also be provided through the interlayer insulating film 38.

[0092] FIG. 2A shows an example of an enlarged view of the upper surface around the sense electrode 140. The semiconductor device 100 includes a Zener diode 170.

[0093] The Zener diode 170 is a diode for overvoltage protection. By providing the Zener diode 170 in the semiconductor device 100, destruction of the current sense portion 141 due to overvoltage can be prevented. The Zener diode 170 of this example is electrically connected between the emitter electrode 52 and the sense electrode 140. The Zener diode 170 is provided on the semiconductor substrate 10. However, since the Zener diode 170 of this example is provided in the outer peripheral region 120, it is not necessary to reduce the area of the active region 110.

[0094] In one example, the Zener diode 170 is provided along the outer periphery of the sense electrode 140 in a top view. The Zener diode 170 may be provided along two sides of the sense electrode 140. The Zener diode 170 in this example is provided along at least three sides of the sense electrode 140.

[0095] For example, the junction length of the Zener diode 170 is 20% or more and 100% or less of the outer periphery of the sense electrode 140. The junction length of the Zener diode 170 refers to the length that the Zener diode 170 extends in a top view. In one example, the junction length of the Zener diode 170 is 0.6 mm or more and 3.0 mm or less. As the junction length of the Zener diode 170 increases, the current flowing through the Zener diode 170 increases.

[0096] The emitter potential electrode 142 is set to the emitter potential of the transistor portion 70. The emitter potential electrode 142 is electrically connected to the Zener diode 170. The emitter potential electrode 142 is provided along the outer periphery of the sense electrode 140 in a top view. The emitter potential electrode 142 in this example is provided so as to cover the entire circumference of the sense electrode 140, but is not limited thereto. The emitter potential electrode 142 may be provided with the same material as the front surface electrode such as the sense electrode 140.

[0097] FIG. 2B is an example of an enlarged view of the sense electrode 140 and the emitter potential electrode 142. The Zener diode 170 is provided below the sense electrode 140 and the emitter potential electrode 142. The Zener diode 170 is provided along the outer periphery of the sense electrode 140 and the inner periphery of the emitter potential electrode 142.

[0098] The contact portion 144 sets the emitter potential electrode 142 to the emitter potential. The contact portion 144 electrically connects the emitter potential electrode 142 and the well region 17 set to the emitter potential. The contact portion 144 is provided in a region where the Zener diode 170 is not provided. The contact portion 144 will be described later. In this example, the contact portion 144 is provided along one side of the sense electrode 140, and the Zener diode 170 is provided along the other three sides of the sense electrode 140. The contact portion 144 may be provided along two or more sides of the sense electrode 140.

[0099] FIG. 2C is a diagram showing an example of the cross section taken along the line b-b' of FIG. 2B. The cross section taken along the line b-b' is the XZ plane passing through the Zener diode 170.

[0100] The Zener diode 170 has a first conductivity type region 171 and a second conductivity type region 172. The second conductivity type region 172 includes a second conductivity type region 172a and a second conductivity type region 172b. The first conductivity type region 171 and the second conductivity type region 172 are arranged side by side in a top view. In this example, the first conductivity type region 171 is provided between the second conductivity type region 172a and the second conductivity type region 172b.

[0101] The first conductivity type region 171 is a first conductivity type region having a higher doping concentration than the drift region 18. The first conductivity type region 171 is provided between the second conductivity type region 172a and the second conductivity type region 172b. For example, the first conductivity type region 171 is formed by ion implantation of arsenic. Note that the first conductivity type region 171 may be formed by a process common to other first conductivity type regions. The common process refers to a process that is executed simultaneously under the same conditions.

[0102] The p-type region 172 is a region of the p-type with a higher doping concentration than the base region 14. The p-type region 172a is electrically connected to the sense electrode 140 via the contact hole 58. The p-type region 172b is electrically connected to the emitter potential electrode 142 via the contact hole 59. For example, the p-type region 172 is formed by ion implantation of boron. Note that the p-type region 172 may be formed by a process common to other p-type regions.

[0103] In one example, the Zener diode 170 is formed by ion implanting a semiconductor layer such as polysilicon. The n-type region 171 and the p-type region 172 have the same film thickness. The film thicknesses of the n-type region 171 and the p-type region 172 may each be 0.3 μm or more and 1 μm or less. For example, the film thicknesses of the n-type region 171 and the p-type region 172 are 0.5 μm. By appropriately setting the film thickness of the Zener diode 170, after forming a region of either conductivity type over the entire surface of the Zener diode 170, a part thereof can be inverted to a region of the other conductivity type.

[0104] The interlayer insulating film 38 is provided between the emitter potential electrode 142 and the well region 17. For example, the interlayer insulating film 38 has a film thickness of 0.8 μm or more and 1.2 μm or less. Below the interlayer insulating film 38, a gate runner 48 set to the gate potential is provided.

[0105] The interlayer insulating film 174 is provided below the Zener diode 170. The interlayer insulating film 174 is provided between the Zener diode 170 and the well region 17. For example, the film thickness of the interlayer insulating film 174 is 0.2 μm or less. The interlayer insulating film 174 may be an HTO (High Temperature Oxide) film.

[0106] The gate runner 48 is provided on the front surface 21 of the semiconductor substrate 10 and is a wiring set to a gate potential. For example, the gate runner 48 is formed by covering a conductive material such as polysilicon doped with impurities or metal with an insulating film such as polyimide. The film thickness of the gate runner 48 may be the same as the film thickness of the semiconductor layer of the Zener diode 170, or may be thicker. In one example, the film thickness of the gate runner 48 is 0.8 μm.

[0107] The gate oxide film 49 is provided between the front surface 21 of the semiconductor substrate 10 and the gate runner 48. By providing the gate oxide film 49, a short circuit between the front surface 21 and the gate runner 48 can be prevented. The film thickness of the gate oxide film 49 is preferably 0.08 μm or more and 0.12 μm or less, and more preferably 0.1 μm. The gate oxide film 49 may be formed by the same process as the dummy insulating film 32 and the gate insulating film 42.

[0108] FIG. 2D is a diagram showing an example of the c-c' cross section of FIG. 2B. The c-c' cross section is the YZ plane passing through the contact portion 144.

[0109] The contact portion 144 is provided in the contact hole of the interlayer insulating film 38 and electrically connects the emitter potential electrode 142 and the well region 17. The contact portion 144 in this example has contact portions 144a and 144b formed in different contact holes. The contact portion 144 may be provided extending in the X-axis direction. The shape of the contact portion 144 is not limited to this.

[0110] The well region 17 in this example is set to the emitter potential. Therefore, the emitter potential electrode 142 connected to the well region 17 by the contact portion 144 is set to the emitter potential.

[0111] FIG. 3A shows an outline of the configuration of the semiconductor module 200 including the semiconductor device 100. The semiconductor module 200 includes a DCB substrate 210, a printed circuit board 220, and a copper base 230.

[0112] The DCB substrate 210 has a semiconductor device 100 provided with a Zener diode 170. That is, the Zener diode 170 is provided on the DCB substrate 210 side. The printed circuit board 220 has a sense resistor Rs. The DCB substrate 210 is provided on a copper base 230 for heat dissipation. There is a parasitic capacitance between the DCB substrate 210 and the copper base 230.

[0113] Here, due to accidental external discharge or the like, a noise current may flow through the drive-emitter wiring, generating a di / dt electromotive force. There is a failure mode in which the sense IGBT of the current sense unit 141 with a small capacitance component is destroyed by the di / dt electromotive force. The semiconductor device 100 of this example can prevent the failure of the sense IGBT by providing the Zener diode 170. Further, since the semiconductor device 100 of this example has the Zener diode 170 provided on the semiconductor substrate 10, the destruction of the sense IGBT can be suppressed without adding an external protection circuit.

[0114] FIG. 3B shows an example of the circuit configuration of a semiconductor device according to a comparative example. Since the semiconductor device of this example does not include the Zener diode 170, the sense IGBT may fail due to the breakdown voltage between G and S when a di / dt electromotive force occurs.

[0115] The main IGBT includes a collector electrode and a gate electrode common to the sense IGBT. The area of the active region of the sense IGBT is smaller than the area of the active region of the main IGBT. For example, the area of the active region of the sense IGBT is 1 / 1000 or less of the area of the active region of the main IGBT.

[0116] For example, when a di / dt electromotive force occurs, an overvoltage is generated between G and E of the main IGBT and between G and S of the sense IGBT. Then, depending on the capacitance ratio between the gate capacitance Cge of the main IGBT and the gate capacitance Cgs of the sense IGBT, the voltage is shared between G and S. Here, when a voltage exceeding the breakdown voltage between G and S of the sense IGBT occurs, the sense IGBT may fail.

[0117] FIG. 3C shows an example of the circuit configuration of the semiconductor module 200 according to the embodiment. In the semiconductor device of this example, even when an in-circuit overvoltage occurs, the Zener diode 170 breaks down, thereby avoiding the concentration of voltage between the G-S of the current sense unit 141. As a result, the current sense unit 141 is protected.

[0118] FIG. 4 shows an example of the configuration of the semiconductor device 100 according to Embodiment 2. The semiconductor device 100 of this example includes an electrode connection portion 146.

[0119] The electrode connection portion 146 connects the emitter potential electrode 142 and the emitter electrode 52 above the semiconductor substrate 10. Thereby, the emitter potential electrode 142 is set to the emitter potential. The electrode connection portion 146 may be provided with the same material as the emitter electrode 52 or the emitter potential electrode 142. The electrode connection portion 146 may be formed by the same process as the front surface electrode such as the emitter electrode 52.

[0120] The electrode connection portion 146 of this example connects the emitter potential electrode 142 and the emitter electrode 52 outside the chip rather than the cathode pad 160. The position of the electrode connection portion 146 is not limited to this example. The gate metal layer 50 may not be provided in the region where the electrode connection portion 146 is provided. The gate metal layer 50 interrupted by the electrode connection portion 146 may be connected via the gate runner 48.

[0121] FIG. 5A shows an example of a top view of the semiconductor device 100 according to Embodiment 3. The semiconductor device 100 of this example has a Zener diode 170 electrically connected to the emitter electrode 52 via the semiconductor substrate 10. The semiconductor device 100 of this example is different from Embodiment 1 and Embodiment 2 in that it does not have the emitter potential electrode 142.

[0122] In FIG. 5A, the Zener diode 170 is provided at the positive end of the sense electrode 140 in the Y-axis direction in a top view. However, it may be provided anywhere between the positive end of the sense electrode 140 in the Y-axis direction and the current sense section 141. The Zener diode 170 is provided to extend in the X-axis direction in a top view. However, the shape of the Zener diode 170 is not limited to this example. That is, the shape and position of the Zener diode 170 are not particularly limited as long as it is electrically connected between the emitter electrode 52 and the sense electrode 140.

[0123] FIG. 5B shows an example of the d-d' cross section of FIG. 5A. The Zener diode 170 in this example is composed of a first conductivity type region 171 and a second conductivity type region 172 formed in the depth direction. The second conductivity type region 172 includes a second conductivity type region 172a and a second conductivity type region 172b.

[0124] The first conductivity type region 171 is provided above the well region 17 in the semiconductor substrate 10. The first conductivity type region 171 in this example is provided above the second conductivity type region 172b which is the well region 17. The first conductivity type region 171 may be formed by the same process as other first conductivity type regions. For example, the first conductivity type region 171 may be formed by the same process as the emitter region 12 and may have the same film thickness and doping concentration as the emitter region 12.

[0125] The second conductivity type region 172a is provided above the first conductivity type region 171 in the semiconductor substrate 10. The second conductivity type region 172a may be formed by the same process as other second conductivity type regions. For example, the second conductivity type region 172a is formed by the same process as the second conductivity type contact plug of the transistor section 70.

[0126] The second conductivity type region 172b is provided below the first conductivity type region 171. The second conductivity type region 172b is at least a part of the well region 17. The second conductivity type region 172b functions as the second conductivity type region of the Zener diode 170.

[0127] The oxide film 147 is provided above the front surface 21 between the well regions 17. For example, the film thickness of the oxide film 147 is 1 μm or less. A gate runner 48 may be provided on the upper surface of the oxide film 147. The gate runner 48 may be provided to extend below the sense electrode 140 and the emitter electrode 52. The gate runner 48 may be separated from the front surface electrode by the interlayer insulating film 38.

[0128] FIG. 6 shows an example of a cross section of the temperature sense portion 180. This figure shows a cross section particularly in the vicinity of the region where the temperature sense portion 180 is formed.

[0129] The temperature sense portion 180 has a diode provided in the semiconductor substrate 10. The temperature sense portion 180 detects the temperature of the semiconductor device 100 by utilizing the fact that the current-voltage characteristics of the diode change according to the temperature. The temperature sense portion 180 is disposed above the semiconductor substrate 10 via the interlayer insulating film 186. Further, the temperature sense portion 180 is formed above the well region 17. The temperature sense portion 180 in this example includes a first conductivity type region 181, a second conductivity type region 182, a first connection portion 183, a second connection portion 184, and an interlayer insulating film 185.

[0130] The first conductivity type region 181 and the second conductivity type region 182 constitute a PN diode. For example, the first conductivity type region 181 is formed of an N-type semiconductor and functions as a cathode region. The second conductivity type region 182 may be formed of a P-type semiconductor and function as an anode region. The first conductivity type region 181 and the second conductivity type region 182 are provided on the interlayer insulating film 186.

[0131] Note that the film thicknesses of the diode of the temperature sense portion 180 and the Zener diode 170 may be substantially the same. That is, the film thicknesses of the first conductivity type region 181 and the second conductivity type region 182 may be the same as the film thicknesses of the first conductivity type region 171 and the second conductivity type region 172. The first conductivity type region 181 and the second conductivity type region 182 may be formed by the same process as the first conductivity type region 171 and the second conductivity type region 172.

[0132] The first connection part 183 is electrically connected to the first conductivity type region 181. The second connection part 184 is electrically connected to the second conductivity type region 182. The first connection part 183 is electrically connected to the cathode pad 160 by the cathode wiring 162. The second connection part 184 is electrically connected to the anode pad 150 by the anode wiring 152.

[0133] The interlayer insulating film 185 is provided on the upper surfaces of the first conductivity type region 181 and the second conductivity type region 182. Also, the interlayer insulating film 185 is provided on the upper surface of the interlayer insulating film 186. The interlayer insulating film 185 has contact holes for electrically connecting the first connection part 183 to the first conductivity type region 181. The interlayer insulating film 185 has contact holes for electrically connecting the second connection part 184 to the second conductivity type region 182. The interlayer insulating film 185 may be formed in a process common to the interlayer insulating film 38.

[0134] The temperature sensing part 180 in this example has a well region 17 on the back surface 23 side of the corresponding semiconductor substrate 10. Element regions such as a transistor part 70 and a diode part 80 may be provided below the temperature sensing part 180. A collector region 22 is provided below the temperature sensing part 180 in this example. That is, the temperature sensing part 180 is provided in the transistor part 70. Note that the temperature sensing part 180 may be provided in the diode part 80.

[0135] FIG. 7A is an example of a manufacturing flowchart of the semiconductor device 100 according to the first embodiment or the second embodiment. In step S100, the well region 17 is formed. In step S102, the interlayer insulating film 174 is formed. The interlayer insulating film 174 may be provided on the entire surface of the semiconductor substrate 10. Simultaneously with the interlayer insulating film 174, the interlayer insulating film 186 of the temperature sensing part 180 may be formed.

[0136] In step S104, a semiconductor layer is formed. For example, the semiconductor layer is a polysilicon layer for forming the Zener diode 170 or the temperature sensing section 180. The semiconductor layer may be formed on the entire surface of the semiconductor substrate 10. The PN structure of the Zener diode 170 may be formed in the same process as the PN structure of the diode of the temperature sensing section 180. That is, there is no need to provide a new process for the Zener diode 170.

[0137] In step S106, a second conductivity type region is formed by ion implantation into the semiconductor layer. As the second conductivity type regions, the second conductivity type region 172 and the second conductivity type region 182 may be formed in the same process. In step S108, regions necessary as the first conductivity type region and the second conductivity type region are left by patterning and etching.

[0138] In step S110, a first conductivity type region is formed by ion implantation into the semiconductor layer. As the first conductivity type regions, the first conductivity type region 171 and the first conductivity type region 181 may be formed in the same process. For example, the first conductivity type region 171 and the first conductivity type region 181 are formed by inverting the conductivity type of a part of the regions formed as the second conductivity type region 172 and the second conductivity type region 182 in step S106.

[0139] In step S112, an interlayer insulating film 38 is formed. Simultaneously with the interlayer insulating film 38, an interlayer insulating film 185 of the temperature sensing section 180 may be formed. In step S114, contact holes are formed in the interlayer insulating film 38. Simultaneously with the contact holes in the interlayer insulating film 38, contact holes in the interlayer insulating film 185 may be formed. In step S116, a front surface electrode is formed. In step S116, the contact portion 144 may be formed in the same process as the emitter potential electrode 142.

[0140] In Example 2, in the step of forming the contact hole in step S114, it is not necessary to form a contact hole for providing the contact portion 144. On the other hand, in step S116, when forming the front surface electrode, the electrode connection portion 146 is formed in the same process as the emitter potential electrode 142 and the emitter electrode 52.

[0141] In the manufacturing method of the semiconductor device 100 of this example, by sharing the formation process of the Zener diode 170 with other processes, the Zener diode 170 can be formed without providing a dedicated process. Therefore, it is easy to add the Zener diode 170.

[0142] FIG. 7B is an example of a manufacturing flowchart of the semiconductor device 100 according to Example 3. In step S300, the well region 17 is formed. In step S302, the emitter region 12 and the first conductivity type region are formed. As the first conductivity type region, the first conductivity type region 171 and the first conductivity type region 181 may be formed in the same process. Further, the first conductivity type region 171 may be formed in the same process as the emitter region 12 of the transistor portion 70.

[0143] In step S304, the second conductivity type region is formed. As the second conductivity type region, the second conductivity type region 172 and the second conductivity type region 182 may be formed in the same process. In step S306, the interlayer insulating film 38 is formed. Simultaneously with the interlayer insulating film 38, the interlayer insulating film 185 of the temperature sensing portion 180 may be formed.

[0144] In step S308, a contact hole is formed in the interlayer insulating film 38. Simultaneously with the contact hole in the interlayer insulating film 38, a contact hole in the interlayer insulating film 185 may be formed. In step S310, the front surface electrode is formed.

[0145] As described above, the present invention has been described using embodiments. However, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0146] It should be noted that the execution order of each process such as operations, procedures, steps, and stages in the apparatus and methods shown in the claims, the specification, and the drawings is not explicitly indicated as "earlier" or "preceding" etc., and can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flows in the claims, the specification, and the drawings, even if they are described for convenience using "first," "next," etc., it does not mean that it is essential to implement them in this order.

Explanation of Reference Numerals

[0147] 10 ··· Semiconductor substrate, 12 ··· Emitter region, 14 ··· Base region, 15 ··· Contact region, 16 ··· Accumulation region, 17 ··· Well region, 18 ··· Drift region, 20 ··· Buffer region, 21 ··· Front surface, 22 ··· Collector region, 23 ··· Back surface, 24 ··· Collector electrode, 25 ··· Connection part, 30 ··· Dummy trench part, 31 ··· Extension part, 32 ··· Dummy insulating film, 33 ··· Connection part, 34 ··· Dummy conductive part, 38 ··· Interlayer insulating film, 40 ··· Gate trench part, 41 ··· Extension part, 42 ··· Gate insulating film, 43 ··· Connection part, 44 ··· Gate conductive part, 48 ··· Gate runner, 49 ··· Gate oxide film, 50 ··· Gate metal layer, 52 ··· Emitter electrode, 54 ··· Contact hole, 55 ··· Contact hole, 56 ··· Contact hole, 58 ··· Contact hole, 59 ··· Contact hole, 70 ··· Transistor part, 71 ··· Mesa part, 80 ··· Diode part, 81 ··· Mesa part, 82 ··· Cathode region, 90 ··· Boundary part, 91 ··· Mesa part, 100 ··· Semiconductor device, 110 ··· Active region, 120 ··· Peripheral region, 130 ··· Gate pad, 140 ··· Sense electrode, 141 ··· Current sense part, 142 ··· Emitter potential electrode, 144 ··· Contact part, 146 ··· Electrode connection part, 147 ··· Oxide film, 150 ··· Anode pad, 152 ··· Anode wiring, 160 ··· Cathode pad, 162 ··· Cathode wiring, 170 ··· Zener diode, 171 ··· First conductivity type region, 172 ··· Second conductivity type region, 174 ··· Interlayer insulating film, 180 ··· Temperature sense part, 181 ··· First conductivity type region, 182 ··· Second conductivity type region, 183 ··· First connection part, 184 ··· Second connection part, 185 ··· Interlayer insulating film, 186 ··· Interlayer insulating film, 200 ··· Semiconductor module, 210 ··· DCB substrate, 220 ··· Printed circuit board, 230 ··· Copper base

Claims

1. A semiconductor substrate, a transistor section provided on the semiconductor substrate, a current sense section for detecting a current flowing through the transistor section, an emitter electrode set to the emitter potential of the transistor section, a sense electrode electrically connected to the current sense section, an emitter potential electrode set to the emitter potential and different from the emitter electrode and the sense electrode, and a Zener diode electrically connected between the emitter potential electrode and the sense electrode and comprising, wherein the Zener diode is provided below the sense electrode. A semiconductor device.

2. A semiconductor substrate, a transistor section provided on the semiconductor substrate, a current sense section for detecting a current flowing through the transistor section, an emitter electrode set to the emitter potential of the transistor section, a sense electrode electrically connected to the current sense section, an emitter potential electrode set to the emitter potential and provided along the outer periphery of the sense electrode in a top view, a Zener diode electrically connected between the emitter potential electrode and the sense electrode, and an electrode connection section connecting the emitter potential electrode and the emitter electrode above the semiconductor substrate and comprising, wherein, in a top view, the emitter potential electrode is provided spaced apart from the emitter electrode. A semiconductor device.

3. A semiconductor substrate, a transistor section provided on the semiconductor substrate, a current sense section for detecting a current flowing through the transistor section, an emitter electrode set to the emitter potential of the transistor section, a sense electrode electrically connected to the current sense section, an emitter potential electrode set to the emitter potential and different from the emitter electrode and the sense electrode, a Zener diode electrically connected between the emitter potential electrode and the sense electrode, a well region of a second conductivity type provided on the semiconductor substrate and set to the emitter potential, an interlayer insulating film provided between the emitter potential electrode and the well region, and a contact section provided in a contact hole of the interlayer insulating film and electrically connecting the emitter potential electrode and the well region and comprising a semiconductor device.

4. The Zener diode is provided on the semiconductor substrate The semiconductor device according to any one of Claims 1 to 3.

5. The sense electrode is formed in a rectangle in a top view, The Zener diode is provided along at least two sides of the sense electrode The semiconductor device according to any one of claims 1 to 4.

6. The Zener diode is provided along at least three sides of the sense electrode The semiconductor device according to claim 5.

7. The Zener diode has a first conductivity type region and a second conductivity type region, The first conductivity type region and the second conductivity type region are arranged side by side in a top view The semiconductor device according to any one of claims 1 to 6.

8. The film thicknesses of the first conductivity type region and the second conductivity type region are each 0.3 μm or more and 1 μm or less The semiconductor device according to claim 7.

9. A temperature sensing unit having a diode provided on the semiconductor substrate is provided, The film thickness of the diode in the temperature sensing unit and the Zener diode is substantially the same The semiconductor device according to any one of claims 1 to 8.

10. The junction length of the Zener diode is 0.6 mm or more and 3.0 mm or less The semiconductor device according to any one of claims 1 to 9.

11. A semiconductor substrate, A transistor section provided on the semiconductor substrate, A current sensing unit for detecting the current flowing through the transistor section, An emitter electrode set to the emitter potential of the transistor section, A sense electrode electrically connected to the current sensing unit, A Zener diode electrically connected between the emitter electrode and the sense electrode is provided, The Zener diode is A second conductivity type well region, In the semiconductor substrate, a first conductivity type region provided above the well region, In the semiconductor substrate, a second conductivity type region provided above the first conductivity type region has Semiconductor device.

12. The transistor section is A first conductivity type drift region, A second conductivity type base region provided on the front side of the drift region, A first conductivity type emitter region having a higher doping concentration than the drift region, A second conductivity type collector region having a higher doping concentration than the base region has The first conductivity type region has the same film thickness and doping concentration as the emitter region The semiconductor device according to claim 11.

13. Providing a transistor section on a semiconductor substrate, Providing a current sensing unit for detecting the current flowing through the transistor section, providing an emitter electrode set to the emitter potential of the transistor section; providing a sense electrode electrically connected to the current sense section; providing an emitter potential electrode set to the emitter potential and different from the emitter electrode and the sense electrode; providing a Zener diode electrically connected between the emitter potential electrode and the sense electrode; comprising; The Zener diode is provided below the sense electrode, and a method for manufacturing a semiconductor device.

14. providing a transistor section on a semiconductor substrate; providing a current sense section for detecting a current flowing through the transistor section; providing an emitter electrode set to the emitter potential of the transistor section; providing a sense electrode electrically connected to the current sense section; providing an emitter potential electrode set to the emitter potential and provided along the outer periphery of the sense electrode in a top view; providing a Zener diode electrically connected between the emitter potential electrode and the sense electrode; providing an electrode connection section for connecting the emitter potential electrode and the emitter electrode above the semiconductor substrate comprising; In a top view, the emitter potential electrode is provided spaced apart from the emitter electrode, and a method for manufacturing a semiconductor device.

15. Providing a transistor section on a semiconductor substrate; providing a current sense section for detecting a current flowing through the transistor section; providing an emitter electrode set to the emitter potential of the transistor section; providing a sense electrode electrically connected to the current sense section; providing an emitter potential electrode set to the emitter potential and different from the emitter electrode and the sense electrode; providing a Zener diode electrically connected between the emitter potential electrode and the sense electrode; providing a well region of a second conductivity type provided on the semiconductor substrate and set to the emitter potential; providing an interlayer insulating film between the emitter potential electrode and the well region; providing a contact hole in the interlayer insulating film; providing a contact section for electrically connecting the emitter potential electrode and the well region in the contact hole comprising a method for manufacturing a semiconductor device.

16. The PN structure of the Zener diode is formed by the same process as the PN structure of the diode in the temperature sensing section. A method for manufacturing a semiconductor device according to any one of claims 13 to 15.

17. The region of the first conductivity type of the Zener diode is formed by the same process as the emitter region of the first conductivity type of the transistor section. A method for manufacturing a semiconductor device according to claim 13 or 14.

18. Providing a transistor section on a semiconductor substrate; Providing a current sensing section for detecting a current flowing through the transistor section; Providing an emitter electrode set to the emitter potential of the transistor section; Providing a sense electrode electrically connected to the current sensing section; Providing a Zener diode electrically connected between the emitter electrode and the sense electrode; comprising The Zener diode a well region of the second conductivity type; in the semiconductor substrate, a region of the first conductivity type provided above the well region; in the semiconductor substrate, a region of the second conductivity type provided above the region of the first conductivity type and having A method for manufacturing a semiconductor device.

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