Method for Controlling Resistivity and Crystallinity of Low-Resistance Material Based on PVD Method

Abstract

A method for depositing low-resistivity materials in which an amorphous TiN film increases the grain size of Ru, improving crystallinity, suppressing the generation of Ru voids and improving crystallinity, and depositing Ru on a TiN layer to obtain a Ru film with low resistivity. [Solution] The method for forming a low-resistance material film in the present invention is a method for forming a low-resistance material film on a semiconductor substrate using physical vapor deposition, and includes the steps of: a) depositing a barrier layer on a SiO2 wafer using low-temperature magnetron sputtering at a pressure of 1 to 40 Pa; b) after depositing the barrier layer, modifying the surface of the barrier layer by applying an RF bias in an Ar gas atmosphere without applying DC power; and c) depositing a low-resistance material on the barrier layer using magnetron sputtering, wherein the low-resistance material is one or more selected from the group consisting of tungsten, ruthenium, molybdenum, cobalt, and rhodium.

Description

Technical Field

[0001] The present invention relates to a method for controlling the resistivity and crystallinity of a semiconductor substrate film using Physical Vapor Deposition (PVD). Specifically, using PVD, SiO 2 A barrier layer made of titanium nitride (TiN), tantalum nitride (TaN), or silicon nitride (SiN x ; x>0) is laminated on a wafer, and after performing an After Bias treatment, a step of laminating W, Ru, Co, Rh, or Mo is included. The present invention relates to a method for controlling the resistivity and crystallinity of a semiconductor substrate film or a method for forming a low-resistance material (such as W, Ru, Mo, Co, Rh, etc.).

Background Art

[0002] With the miniaturization of semiconductor elements, in the next-generation wiring structure, materials with low resistivity such as tungsten (W), molybdenum (Mo), cobalt (Co), rhodium (Rh), and ruthenium (Ru) are being studied. Among them, Ru is one of the substances that are actively researched and developed as an alternative material for Cu. Ru is used by being laminated together with TiN (TaN, SiNx) as an adhesion and barrier layer. When Ru is laminated on the lower layer (TiN), problems such as the generation of voids and a decrease in crystallinity occur based on the orientation of TiN.

[0003] To solve this problem, in the present invention, an amorphous (non-crystalline) similar film is deposited on the lower film TiN through a PVD low-temperature (100°C or lower) and high-pressure process, and an After Bias treatment is continuously performed to improve the roughness of TiN. When Ru is laminated on the TiN layer formed by the above process, the effects of improving voids and reducing resistivity were confirmed.

Prior Art Documents

Patent Documents

[0004] (Patent Document 1) Korean Patent Publication No. 10-2019-0051082 (May 14, 2019)

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

[0005] In the case of TiN, CVD (Chemical Vapor Deposition) and ALD (Atomic Layer Deposition) processes are used to improve film quality such as film density and resistance. In the PVD (Physical Vapor Deposition) process, TiN is deposited through RF bias application and a high-temperature film formation process. However, the present invention aims to intentionally obtain an amorphous-like (high resistivity) film quality of the TiN layer through the PVD method, and through this, the amorphous (non-crystalline) TiN film increases the grain size of Ru and improves the crystallinity.

[0006] Also, by applying an after-bias (Treatment, Bombardment) to the amorphous-like TiN film before depositing Ru, not only is the roughness of TiN improved, the generation of voids in Ru is suppressed, and the crystallinity is improved, but also a Ru film with a low resistivity is obtained by depositing Ru on the TiN layer.

[0007] However, the problems to be solved by the present invention are not limited to the problems mentioned above, and further problems not mentioned will be clearly understood by those with ordinary knowledge in the art from the following description.

MEANS FOR SOLVING THE PROBLEMS

[0008] According to an embodiment of the present invention, there is provided a method for forming a low-resistance material film on a semiconductor substrate using Physical Vapor Deposition (PVD), comprising: a) SiO 2A step of laminating a barrier layer on a wafer using a pressure of 1 to 40 Pa and low-temperature magnetron sputtering; b) after laminating the barrier layer, applying an RF bias in an atmosphere of Ar gas without applying DC power to modify the surface of the barrier layer; and c) laminating a low-resistance material on the barrier layer using magnetron sputtering, wherein the low-resistance material is one or more selected from the group consisting of tungsten (W), ruthenium (Ru), molybdenum (Mo), cobalt (Co), and rhodium (Rh). A method for forming a low-resistance material is provided.

[0009] The barrier layer may be one or more selected from the group consisting of titanium nitride (TiN), tantalum nitride (TaN), and silicon nitride (SiN x ;x>0).

[0010] Step c) may include a step of forming a nucleation layer (seed layer) of the low-resistance material and a step of forming a crystalline layer of the low-resistance material.

Advantages of the Invention

[0011] The method for forming a low-resistance material such as Ru, W, Mo, Co, or Rh for a semiconductor substrate film according to an embodiment of the present invention has the effect of obtaining an amorphous-like film quality for the TiN layer using a PVD method and improving crystallinity by increasing the particle size of Ru or the like through it. Further, by treating the TiN layer with an after-bias, the roughness of the TiN layer can be improved, and by adjusting an appropriate RF bias and time, it shows the effect of suppressing optimal void generation and improving crystallinity through the improvement of the roughness of the TiN layer, thereby enabling the ultimate control of resistivity and crystallinity.

[0012] Also, by laminating the Ru layer on the TiN layer in two steps (2 steps), regardless of the lamination conditions of the second step (2 nd step), in the first step (1 stThere is an effect that it is possible to control the nucleation in step) to increase the particle size and reduce the specific resistance.

[0013] Furthermore, by adjusting the film formation conditions of TiN (DC voltage, RF voltage, Ar, N 2 flow rate, pressure, etc.), the effect of the after-bias can be optimally adjusted, and through this, ultimately, a semiconductor substrate film with improved voids and reduced specific resistance can be provided, and there is an effect that the specific resistance and crystallinity of the semiconductor substrate film can be controlled via PVD without using ALD, CVD, etc.

[0014] The effects of the present invention are not limited to the above effects, and it should be understood that they include all effects that can be inferred from the configuration of the invention described in the detailed description or claims of the present invention.

Brief Description of the Drawings

[0015]

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Figure 7A

Figure 7B

Figure 7C

Figure 7D

Figure 7E

Figure 7F

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. However, various changes may be made to the embodiments, and the scope of the patent application is not limited or restricted by such embodiments. It should be understood that all changes, equivalents, or alternatives to the embodiments are included in the scope of the rights.

[0017] The terms used in the embodiments are merely for the purpose of explanation and are not to be construed as having an intention of limitation. Singular expressions include plural expressions unless the context clearly gives a different meaning. In this specification, terms such as "including" or "having" indicate the presence of the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and it should not be understood as precluding the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0018] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by those of ordinary skill in the technical field to which this embodiment belongs. Commonly used pre-defined terms should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted as having an ideal or overly formal meaning unless clearly defined herein.

[0019] Also, in the description with reference to the accompanying drawings, regardless of the reference numerals in the drawings, the same components are given the same reference numerals, and duplicate descriptions thereof are omitted. In the description of the embodiments, when it is determined that a specific description of related known technologies makes the gist of the embodiments needlessly ambiguous, the detailed description thereof is omitted.

[0020] According to an embodiment of the present invention, there is provided a method for forming a low-resistance material film on a semiconductor substrate using physical vapor deposition (Physical Vapor Deposition; PVD), a) SiO 2 A step of depositing a barrier layer on a wafer using magnetron sputtering at a pressure of 1 to 40 Pa and a low temperature (100 °C or lower); b) After depositing the barrier layer, a step of modifying the surface of the barrier layer by applying an RF bias in an Ar gas atmosphere without applying DC power; c) A step of depositing a low-resistance material on the barrier layer using magnetron sputtering; comprising A method for forming a low-resistance material is provided, wherein the low-resistance material is one or more selected from the group consisting of tungsten (W), ruthenium (Ru), molybdenum (Mo), cobalt (Co), and rhodium (Rh).

[0021] The barrier layer formed through step a) is not only titanium nitride (TiN), but also tantalum nitride (TaN) or silicon nitride (SiN x ; x>0), and the thickness of the barrier layer may preferably be 4 nm or less.

[0022] On the other hand, when it exceeds 4 nm, as the specific resistance of a low-resistance material such as Ru increases during the film formation of Ru / TiN, problems such as signal delay and voltage drop may occur, and the problem of device performance degradation may occur.

[0023] The deposition conditions of TiN and the like related to the implementation of magnetron sputtering in step a) are implemented under various conditions, but magnetron sputtering may be used at high pressure and low temperature (100 °C or lower). In particular, in the conventional PVD process, it is usually implemented under a pressure of 0.1 to 0.9 Pa, while in the present invention, it can be implemented at a high pressure such as 1 to 40 Pa.

[0024] Also, depending on the film formation conditions of TiN and the like, the after-bias effect is shown to be somewhat different, and in terms of showing the best results (low specific resistivity) with TiN and the like amorphized under optimized film formation conditions, the film formation conditions of TiN are DC power: 10 to 30 kW, RF power: 200 W or less, Ar / N2 The ratio of 1 / 10 or less, pressure: 1 to 40 Pa, and low temperature (100°C or less) are most suitable for the conditions.

[0025] On the other hand, for adhesion and barrier, SiO 2 On the wafer, a low-resistance material such as Ru is laminated on top of a lower film such as TiN and used. In this case, however, there is a problem that the specific resistance increases due to the Ru / TiN structure.

[0026] In order to solve such problems, according to an embodiment of the present invention, after the deposition of the barrier layer in step a) and before the deposition of the low-resistance material, an RF bias is applied under an Ar gas atmosphere to perform an after-bias, thereby enabling the modification of the TiN surface.

[0027] The specific resistivity of the semiconductor substrate on which the low-resistance material is finally formed through the after-bias in step b) decreases. This is because the surface roughness of the unstable TiN layer that existed when the existing after-bias was not performed is improved, and impurities (such as oxygen) in the bond are removed, so that the particle size of the low-resistance material (Ru, Mo, W, Co, Rh, etc.) formed thereon increases and voids decrease, ultimately having the effect of improving the specific resistivity.

[0028] On the other hand, as shown in FIG. 5, it can be confirmed that such specific resistivity can be finally adjusted by adjusting the RF power and time in step b). When an RF bias is applied between 50 and 300 W and between 10 and 100 seconds, preferably between 100 and 300 W and between 10 and 100 seconds, more preferably between 100 and 300 W and between 10 and 60 seconds, and particularly preferably between 300 W and between 10 and 50 seconds, it can be seen that the specific resistivity is significantly reduced compared to the existing situation, and the particle size increases and voids decrease.

[0029] According to an embodiment of the present invention, after performing the post-bias in step b), a low-resistance material such as Ru, W, Mo, Co, or Rh is deposited using magnetron sputtering, and the deposition is performed until the desired thickness is deposited (step c).

[0030] In this case, the thickness of the low-resistance material deposited through step c) may be 10 to 30 nm. When the desired thickness is deposited, the wafer is removed from the chamber, and the film formation process of the low-resistance material is completed.

[0031] On the other hand, as described above, step c) is performed by deposition in a single step (1 step), but it can be classified into a first step (1 st step) of forming a nucleation layer which is a seed layer and a second step (2 nd step) of forming a crystal layer, and it is also possible to form it in a double layer (2 steps).

[0032] In this case, as shown in FIG. 7, in the cases of FIGS. 7E and 7F where the low-resistance material (such as Ru) is formed in a double layer, the particle size is larger, the number of particles is smaller, and the specific resistance is smaller compared to the cases of FIGS. 7C and 7D deposited in a single step. It can be said that forming the low-resistance material in a double layer (2 steps) is more preferable than forming it in a single step (1 step). Here, the number of particles was calculated by directly counting the number of particles in a certain part (area) of the same size in each SEM image.

[0033] On the other hand, by controlling nucleation by changing the implementation conditions of the first step, the specific resistance can be reduced regardless of the deposition conditions of the second step. Also, even though a higher DC power is applied in the crystal layer formation step than in the nucleation layer formation step, a specific resistance equivalent to that in the case of performing the same DC power as the nucleation layer formation step in a single step can be ensured, and thus there is an advantage that the film formation time is shortened and the distribution is improved.

[0034] As an embodiment, for example, when the Ru layer is laminated using 0.5 kW, 2 kW, and 4 kW of DC power respectively in a single step (1 step), it is confirmed that as the DC power increases, the particle size decreases and the specific resistance increases (Figure 6). It is also confirmed that the particle size when using 0.5 kW of DC power in a single step is almost the same as the particle size when using 0.5 kW in the first step and 2 kW in the second step (Figure 6).

[0035] On the other hand, in the deposition of a low-resistance material, when deposited in a single step (1 step), the film deposition conditions of the low-resistance material may be that the DC power is 2 - 8 kW and the RF power is 50 W. When the DC power is lower than 2 kW, not only does the film deposition time become long, which has an adverse effect on mass production, but also the film deposition distribution deteriorates. When it exceeds 8 kW, the particle size is formed extremely small, resulting in an increase in the specific low-resistance value.

[0036] Also, it is classified into the first step (1 st step) of forming a nucleation layer as a seed layer and the second step (2 nd step) of forming a crystal layer. When forming a film of a low-resistance material in a double layer (2 steps), the DC power during film deposition in the first step may be 0.3 - 1 kW, and in this case, no RF power is applied. When the DC power is lower than 0.3 kW, it is difficult to discharge. If it exceeds 1 kW, there will be a problem that the specific resistance value increases. Furthermore, during film deposition in the second step, if the DC power is lower than 2 kW, the film deposition time may become long, which may have an adverse effect on mass production, and the film deposition distribution deteriorates. If it exceeds 10 kW, the particle size is formed small, resulting in an increase in the specific resistance value. Therefore, 2 - 10 kW is preferable, and in this case, the RF power may be 50 W.

[0037] Also, when the thickness of the nucleation layer (seed layer) is less than 4 nm, it is preferably 4 nm or more in that nucleation cannot be performed smoothly, and the sum of the thicknesses of the nucleation layer and the crystal layer is preferably 10 to 30 nm. On the other hand, the larger the thickness of the nucleation layer formed with low power, the larger the particle size, which leads to the improvement of the specific resistance. There is no large upper limit to the thickness of the nucleation layer. Considering the mass production aspect, when thickening the nucleation layer, the film formation process takes a long time. Therefore, it is considered appropriate that the thickness of the nucleation layer is 4 nm.

[0038] A semiconductor substrate on which a barrier layer such as TiN manufactured by the method described above and a low-resistance material such as Ru, W, Mo, Co, or Rh are formed is used for the next-generation wiring structure due to the miniaturization of semiconductor elements. In particular, it is suitable for use in fine patterns with a pitch of less than 28 nm.

[0039] Hereinafter, the present invention will be described in detail through embodiments. The following embodiments are described for the purpose of exemplifying the present invention, and the scope of the present invention is not limited thereto. <Embodiment> 1) Method for depositing TiN

[0040] Using a test equipment called ENTRON-EX, film formation was performed based on a physical vapor deposition (PVD) system. The deposition of TiN and Ru was performed in different process chambers, and the substrate used was SiO 2 substrate.

[0041] The substrate was transferred to the TiN chamber through the Load lock chamber, the substrate was fixed, power was applied to the ESC for an appropriate substrate temperature for film formation, and Ar / N in the chamber 2Supply gas. For the discharge in the chamber, apply DC to the target part and RF to the substrate stage part, and form a film so that the vapor deposition material goes from the target to the substrate. Here, RF plays a role in controlling the film quality and distribution by pulling ions to the stage side, and the film formation conditions for TiN are as follows.

[0042] DC: 10 kW to 30 kW, RF: 200 W or less, Ar / N 2 Ratio: 1 / 10 or less, Pressure: 1 to 40 Pa (high pressure), Temperature: low temperature (100 °C or less) 2) After bias treatment method

[0043] To perform after bias, after the TiN deposition is completed, move the substrate to the Ru chamber. Supply Ar gas in the chamber, apply RF bias to the stage, and process by pulling Ar ions to the substrate. The after bias conditions are as follows.

[0044] DC: 0 kW, Ar: 170 sccm, RF: 300 W, Time and temperature: 10 sec, high temperature of 200 °C or more 3) Deposition method of low-resistance material (Ru) - Single-step film formation method

[0045] After the after bias treatment, to deposit a Ru film on the TiN film treated with after bias in the same Ru chamber, deposit Ru under the film formation conditions of DC power of 2 kW, RF power of 50 W, Ar flow rate of 170 sccm, 470 °C, and 65 seconds. As a result, a Ru film consisting of a single layer with a thickness of 30 nm was obtained. - Two-step film formation method

[0046] Similar to the single film deposition step, after the after-bias treatment, a 30-nm Ru film was deposited on the TiN film that had been after-bias treated in the same Ru chamber. Here, for the deposition of Ru, the first stage under low-power conditions and the second stage under high-power conditions were applied in sequence for deposition, and the conditions implemented and the film thickness in the corresponding stage are as follows.

[0047] First stage: DC 0.5 kW, RF 0 W, Ar 170 sccm, 76 sec, 470 °C, 4 nm (film thickness)

[0048] Second stage: DC 2 kW, RF 50 W, Ar 170 sccm, 56 sec, 470 °C, 26 nm (film thickness)

[0049] On the other hand, the specific resistance is improved as the particle size increases, but the particle size tends to be even larger when performed at low power. However, considering mass production, the time aspect is also important, so it is necessary to shorten the time for high-power film deposition. Therefore, film deposition is performed by classifying it into two steps as described above.

[0050] That is, it is affected by the particle size in the first stage of Ru film deposition, and even when high power is applied in the second stage, it has a large particle size, resulting in a partial improvement in specific resistance and mass productivity.

[0051] After Ru film deposition, the wafer returned to the Foup through the Transfer Chamber, and this test was completed.

[0052] As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the present invention is not limited to the above-described embodiments, and those having ordinary knowledge in the technical field can apply various technical modifications and deformations based on the above. For example, the described technology may be executed in a different order from the described method, and / or the described components may be combined or combined in a different form from the described method, or replaced or substituted by other components or equivalents, and appropriate results can still be achieved.

[0053] Accordingly, other realizations, other embodiments, and equivalents to the claims, etc. also fall within the scope of the claims described below.

Claims

1. A method for forming a low-resistance material film on a semiconductor substrate using Physical Vapor Deposition (PVD), comprising: a) depositing a barrier layer on a SiO2 wafer using low-temperature magnetron sputtering at a pressure of 1 to 40 Pa; b) after depositing the barrier layer, applying an RF bias in an Ar gas atmosphere without applying DC power to modify the surface of the barrier layer; c) depositing a low-resistance material on the barrier layer using magnetron sputtering; wherein the low-resistance material is one or more selected from the group consisting of tungsten (W), ruthenium (Ru), molybdenum (Mo), cobalt (Co), and rhodium (Rh); the barrier layer is one or more selected from the group consisting of titanium nitride (TiN), tantalum nitride (TaN), and silicon nitride (SiNx; > 0), characterized in that it is a method for forming a low-resistance material film.

2. The method for forming a low-resistance material film according to claim 1, wherein the thickness of the barrier layer is 4 nm or less.

3. The barrier layer is a TiN layer, The method for forming a low-resistance material film according to claim 1, wherein the implementation conditions of magnetron sputtering in step a) are DC 10 to 30 kW, RF 200 W or less, an Ar / N2 ratio of 1 / 10 or less, and a pressure of 1 to 40 Pa.

4. The method for forming a low-resistance material film according to claim 1, wherein step b) applies an RF bias between 100 and 300 W for 10 to 60 seconds.

5. The method for forming a low-resistance material film according to claim 1, wherein step b) applies an RF bias at 300 W for 10 seconds.

6. The method for forming a low-resistance material film according to claim 1, wherein the thickness of the deposition in step c) is 10 to 30 nm.

7. The method for forming a low-resistance material film according to claim 1, wherein step c) includes forming a nucleation layer (seed layer) of the low-resistance material and forming a crystal layer of the low-resistance material.

8. The method for forming a low-resistance material film according to claim 7, wherein the thickness of the nucleation layer (seed layer) is 4 nm or more.

9. The method for forming a low-resistance material according to claim 7, wherein the crystal layer forming step is characterized by applying a DC power higher than that in the nucleation layer forming step.

10. The method for forming a low-resistance material according to claim 7, wherein the RF in the nucleation layer forming step is 0 W.

11. The method for forming a low-resistance material according to claim 8, wherein the sum of the thicknesses of the nucleation layer (seed layer) and the crystal layer is 10 to 30 nm.

12. The method for forming a low-resistance material according to claim 1 or 7, wherein the low-resistance material is ruthenium (Ru).

13. The method for forming a low-resistance material according to claim 1, wherein the semiconductor substrate on which the barrier layer and the low-resistance material are formed is for a fine pattern with a pitch of less than 28 nm.

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