Display device

Abstract

To provide a display device capable of suppressing infiltration of moisture into a light-emitting layer and suppressing stress generated in a lamination structure.SOLUTION: A display device 1 comprises: a flexible first substrate 21; a thin-film transistor layer 40 arranged above the first substrate 21; a first flattening layer 51 arranged above the thin-film transistor layer 40 and formed of an organic material; a first barrier layer 61 arranged above the first flattening layer 51 and formed of an inorganic material; and a first electrode 71 arranged above the first barrier layer 61. The first flattening layer 51 is formed with a first penetration part 51h penetrating through the first flattening layer 51. The first barrier layer 61 is formed with a second penetration part 61h penetrating through the first barrier layer 61 and at least a part of which is connected with the first penetration part 51h. The first penetration part 51h and the second penetration part 61h are filled with a part of the first electrode 71. In a plan view, an area of the second penetration part 61h is 30% or more of an area of the first electrode 71.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a display device.

Background Art

[0002] In recent years, display devices using flexible substrates formed of organic materials such as plastic have been proposed. In such a display device, for example, an organic EL (Electro-Luminescence) element is used as a light-emitting element. Such an organic EL element can be deteriorated by the ingress of moisture. In particular, when a substrate formed of an organic material is used, it is more difficult to suppress the ingress of moisture in the substrate than when a substrate formed of an inorganic material such as glass is used. For this reason, there is a risk that moisture may enter the organic EL element from the substrate side.

[0003] In the image display device described in Patent Document 1, an inorganic insulating film is disposed between the light-emitting layer included in the organic EL element and the organic planarization film covering the thin-film transistor, in an attempt to suppress the ingress of moisture from the organic planarization film into the light-emitting layer.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, in the image display device described in Patent Document 1, when forming the electrode film disposed on the upper surface of the inorganic insulating film, the organic planarization film is heated, and gas is generated in the organic planarization film. This gas cannot permeate through the inorganic insulating film and remains in the organic planarization film, applying stress to the inorganic insulating film. For this reason, there is a risk that the inorganic insulating film may peel off from the organic planarization film.

[0006] The present disclosure has been made to solve the above problems, and provides a display device capable of suppressing moisture from entering the light-emitting layer and suppressing stress generated in the laminated structure.

Means for Solving the Problems

[0007] To achieve the above object, a display device according to an aspect of the present disclosure includes a flexible first substrate, a first lower barrier layer disposed above one main surface of the first substrate and formed of an inorganic material, a thin-film transistor layer including a thin-film transistor disposed above the first lower barrier layer, a first planarization layer disposed above the thin-film transistor layer and formed of an organic material, a first barrier layer disposed above the first planarization layer and formed of an inorganic material, a first electrode disposed above the first barrier layer, a second electrode disposed above the first electrode, and a light-emitting layer disposed between the first electrode and the second electrode and configured to emit light when current is supplied through the first electrode and the second electrode. A first through-hole penetrating the first planarization layer is formed in the first planarization layer, and a second through-hole penetrating the first barrier layer and at least partially connected to the first through-hole is formed in the first barrier layer. A part of the first electrode is filled in the first through-hole and the second through-hole. In a plan view of the main surface of the first substrate, the area of the second through-hole is 30% or more of the area of the first electrode.

[0008] In addition, in order to achieve the above object, a display device according to another aspect of the present disclosure includes a flexible first substrate, a first lower barrier layer disposed above one main surface of the first substrate and formed of an inorganic material, a thin-film transistor layer including thin-film transistors disposed above the first lower barrier layer, a first planarization layer disposed above the thin-film transistor layer and formed of an organic material, a first barrier layer disposed above the first planarization layer and formed of an inorganic material, a first electrode disposed above the first barrier layer, a second electrode disposed above the first electrode, a light-emitting layer disposed between the first electrode and the second electrode and configured to emit light when current is supplied through the first electrode and the second electrode, a second planarization layer disposed between the thin-film transistor layer and the first planarization layer and formed of an organic material, a second barrier layer disposed between the second planarization layer and the first planarization layer and formed of an inorganic material, and a relay electrode disposed between the second barrier layer and the first planarization layer. A first through hole penetrating the first planarization layer is formed in the first planarization layer. A second through hole penetrating the first barrier layer and at least a part of which is connected to the first through hole is formed in the first barrier layer. A third through hole penetrating the second planarization layer is formed in the second planarization layer. A fourth through hole penetrating the second barrier layer and at least a part of which is connected to the third through hole is formed in the second barrier layer. A part of the first electrode fills the first through hole and the second through hole. A part of the relay electrode fills the third through hole and the fourth through hole. At least a part of the fourth through hole is disposed at a position different from that of the second through hole in a plan view of the main surface of the first substrate. The relay electrode is electrically connected to the first electrode at the first through hole.

Advantages of the Invention

[0009] According to the present disclosure, it is possible to provide a display device that suppresses the intrusion of moisture into the light-emitting layer and suppresses the stress generated in the laminated structure.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that all the embodiments described below show specific examples in the present disclosure. Therefore, numerical values, shapes, materials, components, arrangement positions and connection forms of the components, processes, and the order of the processes shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Thus, among the components in the following embodiments, components not described in the independent claims indicating the uppermost concept in the present disclosure are described as arbitrary components.

[0012] Also, each figure is a schematic diagram and is not necessarily drawn precisely. Therefore, scales and the like in each figure do not necessarily match. In each figure, substantially the same components are denoted by the same reference numerals, and overlapping descriptions are omitted or simplified.

[0013] In this specification, the terms "above" and "below" do not refer to the upward (vertically upward) and downward (vertically downward) directions in an absolute spatial perception, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. Also, the terms "above" and "below" are applicable not only when two components are arranged at intervals and there is another component between the two components, but also when the two components are arranged in contact with each other.

[0014] (Embodiment 1) The display device according to Embodiment 1 will be described.

[0015] [1-1. Overall Configuration] First, the overall configuration of the display device according to this embodiment will be described with reference to FIG. 1. FIG. 1 is a block diagram showing an example of the overall configuration of the display device 1 according to this embodiment.

[0016] As shown in FIG. 1, the display device 1 according to this embodiment includes a display unit 12, a gate driver 13, a data driver 15, a controller 16, and a power supply 17. In this embodiment, the display device 1 is an active matrix type color display device.

[0017] The display unit 12 is an image display unit having a plurality of pixels 10 arranged in a matrix. Each of the plurality of pixels 10 has at least one sub-pixel. In this embodiment, each of the plurality of pixels 10 has sub-pixels 11R, 11G, and 11B corresponding to the emission colors of R, G, and B, respectively. Each of the plurality of pixels 10 includes a pixel circuit that controls the emission of the pixel. Each pixel circuit has one or more sub-pixel circuits. Each of the sub-pixels 11R, 11G, and 11B includes a sub-pixel circuit that controls the emission of the sub-pixel.

[0018] The display unit 12 has at least one control signal line cs(i) (i is an integer from 1 to N, where N is an integer greater than 1 indicating the number of rows of the matrix) connected to the pixel circuits included in the plurality of pixels 10 arranged in each row of the matrix. The control signal line cs(i) transmits the control signal supplied from the gate driver 13 to the pixel 10.

[0019] The display unit 12 has three data signal lines Ldr(j), Ldg(j), and Ldb(j) (j is an integer from 1 to M, where M is an integer greater than 1 indicating the number of columns of the matrix) connected to the pixel circuits of each of the plurality of pixels 10 arranged in each column of the matrix. The data signal lines Ldr(j), Ldg(j), and Ldb(j) transmit data signals related to the emission luminance of R, G, and B supplied from the data driver 15 to the pixel circuits of the pixel 10.

[0020] The controller 16 receives a video signal from the outside and supplies signals for displaying an image of each frame corresponding to the video signal on the display unit 12 to the gate driver 13 and the data driver 15.

[0021] The gate driver 13 is a circuit that outputs a control signal to the display unit 12 based on a signal from the controller 16. The gate driver 13 sequentially outputs one drive pulse every horizontal period.

[0022] The data driver 15 is a circuit that outputs a data signal to the display unit 12 based on a signal from the controller 16.

[0023] The power supply 17 supplies power and the like to the display unit 12, the gate driver 13, the data driver 15, and the controller 16.

[0024] [1-2. Configuration of Sub-pixels] Next, the configuration of the sub-pixel 11R will be described with reference to FIGS. 2 and 3. FIG. 2 is a schematic plan view showing an example of the configuration of the sub-pixel 11R according to the present embodiment. FIG. 2 is a plan view of the sub-pixel 11R in a plan view of the main surface 21a of the first substrate 21 described later. In FIG. 2, the outline of the first electrode 71 included in the sub-pixel 11R, as well as the outlines of the first through-hole 51h and the second through-hole 61h, are indicated by dotted lines. FIG. 3 is a schematic cross-sectional view showing the laminated structure of the sub-pixel 11R according to the present embodiment. FIG. 3 shows a cross-section taken along line III-III of FIG. 2. In each of the figures after FIG. 2, the X-axis, Y-axis, and Z-axis are shown. The X-axis, Y-axis, and Z-axis represent a right-handed orthogonal coordinate system. In the present embodiment, the sub-pixels 11R, 11G, and 11B included in the pixel 10 have the same configuration as each other. Hereinafter, the configuration of the pixel 10 will be described focusing on the sub-pixel 11R.

[0025] As shown in FIG. 3, the sub-pixel 11R of the display device 1 according to the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 61, a first electrode 71, a light emitting layer 74, and a second electrode 72. In the present embodiment, the sub-pixel 11R further includes a bank 80.

[0026] The first substrate 21 is a flexible plate-like member that serves as the base of the sub-pixel 11R. The first substrate 21 has main surfaces 21a and 21b. As the first substrate 21, for example, a substrate containing an organic material such as a polyimide-based resin like aromatic polyimide or fluorinated polyimide, or an acrylic-based resin can be used.

[0027] The first lower barrier layer 31 is an insulating layer formed of an inorganic material and is disposed above one of the main surfaces 21a of the first substrate 21. As the first lower barrier layer 31, an inorganic material film such as silicon oxide (SiO x ) or silicon nitride (SiN x ) can be used. The first lower barrier layer 31 can suppress the ingress of moisture from the first substrate 21 into the light-emitting layer 74.

[0028] The thin-film transistor layer 40 is a layer disposed above the first lower barrier layer 31, and a circuit including thin-film transistors and the like is formed therein. The thin-film transistor layer 40 includes the main part of the sub-pixel circuit. The thin-film transistor layer 40 includes, for example, a semiconductor layer containing an oxide semiconductor or the like, an insulating layer, and a conductive layer.

[0029] The first planarization layer 51 is an insulating layer formed of an organic material and is disposed above the thin-film transistor layer 40. A first through-hole 51h penetrating the first planarization layer 51 is formed therein. The first planarization layer 51 is formed of, for example, an organic material such as a polyimide-based resin like fluorinated polyimide or an acrylic-based resin.

[0030] The first barrier layer 61 is an insulating layer formed of an inorganic material and is disposed above the first planarization layer 51. As the first barrier layer 61, an inorganic material film such as silicon oxide or silicon nitride can be used. The first barrier layer 61 suppresses the ingress of moisture from the first planarization layer 51 and the layers below it into the light-emitting layer 74.

[0031] In the first barrier layer 61, a second through-hole 61h is formed which penetrates the first barrier layer 61 and at least a part of which is connected to the first through-hole 51h. Thus, although the second through-hole 61h is formed in the first barrier layer 61, since a part of the first electrode 71 is filled in the second through-hole 61h, it is possible to suppress the intrusion of moisture into the light-emitting layer 74 through the second through-hole 61h.

[0032] Also, as shown in FIG. 2, in a plan view of the main surface 21a of the first substrate 21, the area of the second through-hole 61h is 30% or more of the area of the first electrode 71. The area of the second through-hole 61h may be 50% or more of the area of the first electrode 71. Further, the area of the second through-hole 61h may be 70% or more of the area of the first electrode 71. The effects due to the relationship between the area of the second through-hole 61h and the area of the first electrode 71 will be described later.

[0033] The first electrode 71 is a conductive layer disposed above the first barrier layer 61. The first electrode 71 and the second electrode 72 function as electrodes for supplying current to the light-emitting layer 74. In the present embodiment, the first electrode 71 is an anode to which a higher potential is applied than the second electrode 72. The first electrode 71 is also disposed in the first through-hole 51h and the second through-hole 61h. In other words, a part of the first electrode 71 is filled in the first through-hole 51h and the second through-hole 62h. In the present embodiment, the first electrode 71 is electrically connected to the conductive layer included in the thin-film transistor layer 40 through the first through-hole 51h and the second through-hole 61h. Thus, the first through-hole 51h and the second through-hole 61h function as contact holes. The first electrode 71 is formed of a metal material having a high reflectance with respect to the light generated in the light-emitting layer 74, such as an Ag alloy or Al, for example. Thereby, the light generated in the light-emitting layer 74 can be efficiently utilized.

[0034] The second electrode 72 is a conductive layer disposed above the first electrode 71. The second electrode 72 functions as an electrode for supplying current to the light-emitting layer 74. In the present embodiment, the second electrode 72 is a cathode to which a lower potential than that of the first electrode 71 is applied. The second electrode 72 is formed of a conductive material having translucency with respect to light generated in the light-emitting layer 74, such as indium tin oxide (ITO), for example.

[0035] The light-emitting layer 74 is a layer disposed between the first electrode 71 and the second electrode 72 and emits light when current is supplied through the first electrode 71 and the second electrode 72. The light-emitting layer 74 includes, for example, a hole injection layer, a hole transport layer, an organic EL layer, an electron transport layer, an electron injection layer, and the like. Thereby, an organic EL element can be formed by the light-emitting layer 74, the first electrode 71, and the second electrode 72. Note that the light-emitting layer 74 may include an inorganic material layer. In the present embodiment, the light-emitting layer 74 is disposed within a region surrounded by the bank 80, but may also be disposed above the bank 80.

[0036] The bank 80 is a wall-shaped insulating layer that partitions the pixel 10 and the sub-pixels 11R, 11G, and 11B. In other words, the bank 80 is disposed on the boundary between adjacent sub-pixels. The bank 80 is formed using, for example, a polyimide fluoride-based material, an acrylic material, a phenol resin, or the like. The first electrode 71 and the light-emitting layer 74 are disposed within the region surrounded by the bank 80. As shown in FIG. 3, the second electrode 72 is disposed above the light-emitting layer 74 and the bank 80. That is, the second electrode 72 is disposed over the entire area of the region in the display portion 12 where the plurality of pixels 10 are disposed.

[0037] Note that other layers or the like may be formed above the second electrode 72. For example, a polarizing plate or the like may be disposed above the second electrode 72. Further, a resin film, an inorganic barrier film, or the like may be disposed between the second electrode 72 and the polarizing plate. Further, an adhesive or the like for adhering the polarizing plate may be disposed between the polarizing plate and the second electrode 72.

[0038] [1-3. Manufacturing Method] Next, a method for manufacturing the display device 1 according to the present embodiment will be described with reference to FIG. 4. FIG. 4 is a flowchart showing the process of the method for manufacturing the display device 1 according to the present embodiment.

[0039] As shown in FIG. 4, first, a first substrate 21 is prepared (S10).

[0040] Subsequently, a first lower barrier layer 31 disposed above the main surface 21a of the first substrate 21 is formed (S12). Specifically, as the first lower barrier layer 31, a silicon oxide film, a silicon nitride film, or the like is formed in a region of the main surface 21a of the first substrate 21 corresponding to at least a plurality of pixels 10. The first lower barrier layer 31 can be formed, for example, by using a plasma CVD (Chemical Vapor Deposition) method or the like.

[0041] Subsequently, a thin film transistor layer 40 including thin film transistors and disposed above the first lower barrier layer 31 is formed (S14). Specifically, each conductive layer, each insulating layer, and each semiconductor layer included in the thin film transistor layer 40 are formed. Each conductive layer and each semiconductor layer can be formed, for example, by using a sputtering method or the like. Each insulating layer can be formed, for example, by using a plasma CVD method or the like. Further, patterning of each layer can be performed, for example, by using a photolithography method, an etching method, or the like.

[0042] Subsequently, a first planarization layer 51 disposed above the thin film transistor layer 40 is formed (S16). For example, a solution in which a polyimide-based resin is dissolved in a solvent is applied onto the thin film transistor layer 40, and then fired to form the first planarization layer 51.

[0043] Subsequently, a first through-hole 51h that penetrates the first planarization layer 51 is formed in the first planarization layer 51 (S18). The first through-hole 51h can be formed, for example, using photolithography and etching methods. Note that the first through-hole 51h may be formed simultaneously when the first planarization layer 51 is formed. For example, by exposing and developing a polyimide-based resin, the first through-hole 51h may be patterned simultaneously with the formation of the first planarization layer 51.

[0044] Subsequently, a first barrier layer 61 is formed above the first planarization layer 51 (S20). Specifically, as the first barrier layer 61, a silicon oxide film, a silicon nitride film, etc. are formed on the first planarization layer 51. The first barrier layer 61 can be formed, for example, using a plasma CVD method or the like.

[0045] Subsequently, a second through-hole 61h that penetrates the first barrier layer 61 is formed in the first barrier layer 61 (S22). The second through-hole 61h can be formed, for example, using photolithography and etching methods.

[0046] Subsequently, a first electrode 71 is formed above the first barrier layer 61 (S24). Specifically, after forming a conductive film such as an Ag alloy film on the upper surface of the first barrier layer 61 and inside the first through-hole 51h and the second through-hole 61h using a sputtering method or the like, the conductive film is patterned into a predetermined shape using a photolithography method, an etching method, or the like to form the first electrode 71. When forming such a first electrode 71, the first planarization layer 51 near the second through-hole 61h is heated. Along with this, gas is generated from the first planarization layer 51 in the vicinity of the second through-hole 61h. Since the generated gas is confined by the first barrier layer 61 and the first electrode 71, stress is generated in the first barrier layer 61 in the vicinity of the second through-hole 61h. However, in the present embodiment, since the area of the second through-hole 61h in plan view is 30% or more of the area of the first electrode 71, the stress can be dispersed over a relatively wide range. Therefore, peeling and cracking of the first barrier layer 61 due to stress can be suppressed. Further, the first electrode 71 filled in the second through-hole 61h is less likely to crack and is formed of a metal material having a higher moisture barrier property than an inorganic film such as SiN, so that moisture can be prevented from entering the light-emitting layer 74 from the second through-hole 61h.

[0047] Subsequently, a bank is formed above the first electrode 71 (S26). Specifically, a solution in which a phenolic resin is dissolved in a solvent is uniformly applied over the entire area above the first barrier layer 61, that is, on the first barrier layer 61 and on the first electrode 71, and then exposure and development are performed to form a bank 80 having a predetermined shape.

[0048] Subsequently, a light-emitting layer 74 is formed above the first electrode 71 (S28). Specifically, the light-emitting layer 74 is formed in the region surrounded by the bank 80. Each organic material layer included in the light-emitting layer 74 can be formed, for example, using an inkjet coating method (in other words, a printing method). Note that a part of the light-emitting layer 74 may also be formed on the bank 80.

[0049] Subsequently, a second electrode 72 is formed above the light-emitting layer 74 and the bank 80 (S30). Specifically, the second electrode 72 is formed on the entire surface of the light-emitting layer 74 and the bank 80 by using a sputtering method or the like.

[0050] By the manufacturing method as described above, the display unit 12 of the display device 1 can be manufactured.

[0051] [1-4. Summary] As described above, the display device 1 according to the present embodiment includes a flexible first substrate 21, a first lower barrier layer 31 disposed above one main surface 21a of the first substrate 21 and formed of an inorganic material, a thin-film transistor layer 40 including a thin-film transistor disposed above the first lower barrier layer 31, a first planarization layer 51 disposed above the thin-film transistor layer 40 and formed of an organic material, a first barrier layer 61 disposed above the first planarization layer 51 and formed of an inorganic material, a first electrode 71 disposed above the first barrier layer 61, a second electrode 72 disposed above the first electrode 71, and a light-emitting layer 74 disposed between the first electrode 71 and the second electrode 72 and emitting light when current is supplied through the first electrode 71 and the second electrode 72. A first through-hole 51h penetrating the first planarization layer 51 is formed in the first planarization layer 51. A second through-hole 61h penetrating the first barrier layer 61 and at least partially connected to the first through-hole 51h is formed in the first barrier layer 61. A part of the first electrode 71 is filled in the first through-hole 51h and the second through-hole 61h. In a plan view of the main surface 21a of the first substrate 21, the area of the second through-hole 61h is 30% or more of the area of the first electrode 71.

[0052] Thus, since the first barrier layer 61 is disposed below the light-emitting layer 74 and the first electrode 71 is filled in the second through-hole 61h formed in the first barrier layer 61, it is possible to suppress the intrusion of moisture from below the first barrier layer 61 into the light-emitting layer 74. Further, when the first electrode 71 is formed, the first planarization layer 51 in the vicinity of the second through-hole 61h is heated. Along with this, gas is generated from the first planarization layer 51 in the vicinity of the second through-hole 61h. Since the generated gas is confined by the first barrier layer 61, stress is generated in the first barrier layer 61 in the vicinity of the second through-hole 61h. Conventionally, the area of the portion of the second through-hole 61h in plan view that penetrates the first barrier layer 61 was designed to be covered with the first barrier layer 61 having as large an area as possible for moisture barrier while ensuring the required contact resistance value. Therefore, it was about several percent of the area of the first electrode 71. As a result, stress was applied to the vicinity of the second through-hole 61h of the first barrier layer 61, and there was a risk that the first barrier layer 61 would peel off. However, in the present embodiment, since the area of the portion of the second through-hole 61h in plan view that penetrates the first barrier layer 61 is 30% or more of the area of the first electrode 71, the stress can be dispersed over a relatively wide range. Therefore, peeling and cracking of the first barrier layer 61 due to stress can be suppressed.

[0053] (Embodiment 2) The display device according to Embodiment 2 will be described. The display device according to the present embodiment is different from the display device 1 according to Embodiment 1 in that, in addition to the first lower barrier layer 31 below the thin-film transistor layer 40, it further includes another barrier layer. Hereinafter, the display device according to the present embodiment will be described with reference to FIG. 5, focusing on the differences from the display device 1 according to Embodiment 1. FIG. 5 is a schematic cross-sectional view showing the laminated structure of the sub-pixel 111R of the display device according to the present embodiment.

[0054] As shown in FIG. 5, the sub-pixel 111R according to the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 61, a first electrode 71, a light-emitting layer 74, a second electrode 72, and a bank 80, in the same manner as the sub-pixel 11R according to the first embodiment. In the present embodiment, the sub-pixel 111R further includes a second substrate 122 and a second lower barrier layer 132.

[0055] The second substrate 122 is a flexible plate-like member disposed between the first lower barrier layer 31 and the thin film transistor layer 40. As the second substrate 122, for example, a substrate containing an organic material such as a polyimide-based resin such as polyimide fluoride or an acrylic-based resin can be used.

[0056] The second lower barrier layer 132 is an insulating layer formed of an inorganic material and disposed between the second substrate 122 and the thin film transistor layer 40. As the second lower barrier layer 132, an inorganic material film such as silicon oxide or silicon nitride can be used.

[0057] As described above, the display device according to the present embodiment includes the second lower barrier layer 132 in addition to the first lower barrier layer 31. Thereby, even when a crack or the like occurs in one of the first lower barrier layer 31 and the second lower barrier layer 132, the intrusion of moisture from the first substrate 21 toward the light-emitting layer 74 can be suppressed by the other barrier layer. Therefore, the intrusion of moisture into the light-emitting layer 74 can be more reliably suppressed.

[0058] (Embodiment 3) A display device according to Embodiment 3 will be described. The display device according to this embodiment is different from the display device 1 according to Embodiment 1 in the shape of the first through-hole. Hereinafter, the display device according to this embodiment will be described with reference to FIGS. 6 and 7, centering on the differences from the display device 1 according to Embodiment 1. FIG. 6 is a schematic plan view showing an example of the configuration of the sub-pixel 211R of the display device according to this embodiment. In FIG. 6, the outline of the first electrode 271 included in the sub-pixel 211R, as well as the outlines of the first through-hole 51h and the second through-hole 261h, are shown by dotted lines. FIG. 7 is a schematic cross-sectional view showing the stacked structure of the sub-pixel 211R of the display device according to this embodiment. In FIG. 7, a cross-section taken along line VII-VII of FIG. 6 is shown.

[0059] As shown in FIG. 7, the sub-pixel 211R according to this embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 261, a first electrode 271, a light emitting layer 74, a second electrode 72, and a bank 80.

[0060] The first barrier layer 261 according to this embodiment is, like the first barrier layer 61 according to Embodiment 1, an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. A second through-hole 261h penetrating the first barrier layer 261 is formed in the first barrier layer 261 according to this embodiment. As shown in FIGS. 6 and 7, the second through-hole 261h includes a plurality of elongated through-holes 261ha, 261hb, and 261hc extending along the longitudinal direction of the first electrode 271 (that is, the Y-axis direction in FIG. 6).

[0061] The first electrode 271 according to this embodiment is a conductive layer disposed above the first barrier layer 261, as shown in FIG. 7. A part of the first electrode 271 is filled in the first through-hole 51h and the second through-hole 261h.

[0062] As described above, the second through-hole portion 261h according to the present embodiment includes a plurality of elongated through-holes 261ha, 261hb, and 261hc extending along the longitudinal direction of the first electrode 271. Thereby, the contact area between the first electrode 271, the first barrier layer 261, and the first planarization layer 51 can be increased compared to the contact area between the first electrode 71 according to the first embodiment, the first barrier layer 61, and the first planarization layer 51. Therefore, the adhesion (in other words, the bonding strength) between the first electrode 271, the first barrier layer 261, and the first planarization layer 51 can be enhanced, so that peeling of the first electrode 271 can be suppressed. Note that among the plurality of through-holes included in the second through-hole portion 261h, some of the through-holes may not be connected to the first through-hole portion 51h. In the present embodiment, the through-hole 261hb is connected to the first through-hole portion 51h, but the through-holes 261ha and 261hc are not connected to the first through-hole portion 51h.

[0063] Further, each of the through-holes 261ha, 261hb, and 261hc extends along the longitudinal direction of the first electrode 271. A portion of the upper surface of the first electrode 271 located above each through-hole may be slightly recessed. That is, a recess extending along the longitudinal direction of the first electrode 271 may be formed on the upper surface of the first electrode 271. When the light-emitting layer 74 is formed on the upper surface of the first electrode 271 using an inkjet coating method, if a solution serving as a raw material for the light-emitting layer 74 is applied along a direction intersecting the longitudinal direction of the recess, a portion where the solution is not applied may be generated in the recess.

[0064] In the present embodiment, since each through-hole extends along the longitudinal direction of the first electrode 271, the recess also extends along the longitudinal direction of the first electrode 271. Generally, since the solution is applied along the longitudinal direction of the sub-pixel 211R, that is, the longitudinal direction of the first electrode 271, when the light-emitting layer 74 according to the present embodiment is formed, the solution is applied along the longitudinal direction of the recess. Therefore, it is possible to reduce the interruption of the application of the solution in the recess. Thereby, the uniformity of the film thickness of the light-emitting layer 74 can be enhanced.

[0065] (Embodiment 4) A display device according to Embodiment 4 will be described. The display device according to this embodiment is different from the display device 1 according to Embodiment 1 in the shape of the first through-hole. Hereinafter, the display device according to this embodiment will be described with reference to FIG. 8 centering on the differences from the display device 1 according to Embodiment 1. FIG. 8 is a schematic plan view showing an example of the configuration of the sub-pixel 311R of the display device according to this embodiment. In FIG. 8, the outline of the first electrode 371 included in the sub-pixel 311R, as well as the outlines of the first through-hole 51h and the second through-hole 361h, are indicated by dotted lines. FIG. 9 is a schematic cross-sectional view showing the stacked structure of the sub-pixel 311R of the display device according to this embodiment. FIG. 9 shows a cross-section along the line IX-IX in FIG. 8.

[0066] As shown in FIG. 9, the sub-pixel 311R according to this embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 361, a first electrode 371, a light emitting layer 74, a second electrode 72, and a bank 80.

[0067] Similar to the first barrier layer 61 according to Embodiment 1, the first barrier layer 361 according to this embodiment is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. A second through-hole 361h penetrating the first barrier layer 361 is formed in the first barrier layer 361 according to this embodiment. The second through-hole 361h includes a plurality of through-holes 361ha arranged in a staggered pattern as shown in FIGS. 8 and 9.

[0068] As shown in FIG. 9, the first electrode 371 according to this embodiment is a conductive layer disposed above the first barrier layer 361. A part of the first electrode 371 is filled in the first through-hole 51h and the second through-hole 361h.

[0069] As described above, the second through-hole 361h according to the present embodiment includes a plurality of through-holes 361ha arranged in a staggered pattern. Thereby, the contact area between the first electrode 371, the first barrier layer 361, and the first planarization layer 51 can be increased compared to the contact area between the first electrode 71, the first barrier layer 61, and the first planarization layer 51 according to the first embodiment. Therefore, the adhesion (in other words, the bonding strength) between the first electrode 371, the first barrier layer 361, and the first planarization layer 51 can be enhanced, and thus peeling of the first electrode 371 can be suppressed.

[0070] (Embodiment 5) A display device according to Embodiment 5 will be described. The display device according to the present embodiment is different from the display device 1 according to the first embodiment mainly in that, in addition to the first barrier layer 61 above the thin film transistor layer 40, it further includes another layer of barrier layer. Hereinafter, the display device according to the present embodiment will be described with reference to FIGS. 10 and 11, focusing on the differences from the display device 1 according to the first embodiment. FIG. 10 is a schematic plan view showing an example of the configuration of a sub-pixel 411R of the display device according to the present embodiment. In FIG. 10, the outlines of the first electrode 471 and the relay electrode 473 included in the sub-pixel 411R, as well as the outlines of the first through-hole 51h, the second through-hole 461h, the third through-hole 452h, and the fourth through-hole 462h are indicated by dotted lines. FIG. 11 is a schematic cross-sectional view showing the laminated structure of the sub-pixel 411R of the display device according to the present embodiment. In FIG. 11, a cross-section along line XI-XI of FIG. 10 is shown.

[0071] As shown in FIG. 11, the sub-pixel 411R according to the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 461, a first electrode 471, a light emitting layer 74, a second electrode 72, and a bank 80. In the present embodiment, the sub-pixel 411R further includes a second planarization layer 452, a second barrier layer 462, and a relay electrode 473.

[0072] The first barrier layer 461 according to this embodiment is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51, similar to the first barrier layer 61 according to Embodiment 1. A second through-hole 461h penetrating the first barrier layer 461 is formed in the first barrier layer 461 according to this embodiment. In this embodiment, as shown in FIG. 10, in a plan view of the main surface 21a of the first substrate 21, the area of the second through-hole 461h does not have to be 30% or more of the area of the first electrode 471.

[0073] The first electrode 471 according to this embodiment is a conductive layer disposed above the first barrier layer 461, as shown in FIG. 11. A part of the first electrode 471 is filled in the first through-hole 51h and the second through-hole 461h.

[0074] The second planarization layer 452 is an insulating layer formed of an organic material and disposed between the thin film transistor layer 40 and the first planarization layer 51. A third through-hole 452h penetrating the second planarization layer 452 is formed in the second planarization layer 452. The second planarization layer 452 is formed of an organic material such as a polyimide-based resin such as fluorinated polyimide or an acrylic-based resin.

[0075] The second barrier layer 462 is an insulating layer formed of an inorganic material and disposed between the second planarization layer 452 and the first planarization layer 51. As the second barrier layer 462, an inorganic material film such as a silicon oxide or a silicon nitride can be used. The second barrier layer 462 suppresses the intrusion of moisture from the second planarization layer 452 and the layer below it into the light emitting layer 74.

[0076] The second barrier layer 462 is formed with a fourth through-hole 462h that penetrates the second barrier layer 462 and at least a part of which is connected to the third through-hole 452h. In this way, although the fourth through-hole 462h is formed in the second barrier layer 462, since a part of a relay electrode 473 described later is filled in the fourth through-hole 462h, it is possible to suppress the intrusion of moisture into the light-emitting layer 74 through the fourth through-hole 462h. Further, in a plan view of the main surface 21a of the first substrate 21, at least a part of the fourth through-hole 462h is disposed at a position different from that of the second through-hole 461h.

[0077] The relay electrode 473 is a conductive layer disposed between the second barrier layer 462 and the first planarization layer 51. In the present embodiment, the relay electrode 473 is electrically connected to a conductive layer included in the thin-film transistor layer 40 through the third through-hole 452h and the fourth through-hole 462h. In this way, the third through-hole 452h and the fourth through-hole 462h function as contact holes. The relay electrode 473 is formed of a metal material such as an Ag alloy or Al, for example. The relay electrode 473 is also disposed in the third through-hole 452h and the fourth through-hole 462h. In other words, a part of the relay electrode 473 is filled in the third through-hole 452h and the fourth through-hole 462h. Further, the relay electrode 473 is electrically connected to the first electrode 471 at the first through-hole 51h. Thereby, the first electrode 471 is electrically connected to a conductive layer included in the thin-film transistor layer 40 through the relay electrode 473.

[0078] As described above, the display device according to the present embodiment includes the second barrier layer 462 in addition to the first barrier layer 461. Since the relay electrode 473 is filled in the fourth through-hole 462h formed in the second barrier layer 462, it is possible to suppress the intrusion of moisture from the second planarization layer 452 into the light-emitting layer 74 through the fourth through-hole 462h. Thereby, even when a crack or the like occurs in one of the first barrier layer 461 and the second barrier layer 462, the intrusion of moisture from the second planarization layer 452 toward the light-emitting layer 74 can be suppressed by the other barrier layer. Therefore, the intrusion of moisture into the light-emitting layer 74 can be more reliably suppressed.

[0079] Regarding the manufacturing method of the display device according to the present embodiment, the second planarization layer 452, the second barrier layer 462, and the relay electrode 473 can be manufactured by the same manufacturing method as the first planarization layer 51, the first barrier layer 61, and the first electrode 71 according to Embodiment 1. Here, when forming the relay electrode 473, the second planarization layer 452 in the vicinity of the fourth through-hole 462h is heated. Along with this, gas is generated from the second planarization layer 452 in the vicinity of the fourth through-hole 462h. Since the generated gas is confined by the second barrier layer 462 and the relay electrode 473, stress is generated in the second barrier layer 462 in the vicinity of the fourth through-hole 462h.

[0080] However, in the present embodiment, at least a part of the fourth through-hole 462h is arranged at a position different from that of the second through-hole 461h in a plan view of the main surface 21a of the first substrate 21. As a result, the locations where stress is generated are dispersed between the vicinity of the fourth through-hole 462h and the vicinity of the second through-hole 461h. Therefore, compared with the case where the fourth through-hole 462h and the second through-hole 461h are formed at the same position in a plan view of the main surface 21a of the first substrate 21, stress can be dispersed. Accordingly, peeling and cracking of the first barrier layer 461 and the second barrier layer 462 due to stress can be suppressed.

[0081] (Embodiment 6) The display device according to Embodiment 6 will be described. The display device according to the present embodiment is different from the display device according to Embodiment 5 in that a through-hole for discharging gas generated from the second planarization layer is formed in the second barrier layer. Hereinafter, the display device according to the present embodiment will be described with reference to FIG. 12, centering on the differences from the display device according to Embodiment 5. FIG. 12 is a schematic cross-sectional view showing the stacked structure of the sub-pixel 511R of the display device according to the present embodiment.

[0082] As shown in FIG. 12, the sub-pixel 511R according to the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 461, a second planarization layer 452, a second barrier layer 562, a relay electrode 473, a first electrode 571, a light emitting layer 74, a second electrode 72, and a bank 80, in the same manner as the sub-pixel 11R according to Embodiment 5.

[0083] The second barrier layer 562 according to the present embodiment is an insulating layer formed of an inorganic material and is disposed between the second planarization layer 452 and the first planarization layer 51. A fourth through-hole 462h is formed in the second barrier layer 562, penetrating the second barrier layer 562 and at least partially connected to the third through-hole 452h. In the present embodiment, a fifth through-hole 562a is formed in the second barrier layer 562, disposed below the first through-hole 51h, penetrating the second barrier layer 562, and not filled with the relay electrode 473.

[0084] Hereinafter, the effect of the fifth through-hole 562a according to the present embodiment will be described. The fifth through-hole 562a is formed, for example, before the relay electrode 473 is formed. Specifically, the fifth through-hole 562a is formed by using a photolithography method, an etching method, etc. simultaneously with the fourth through-hole 462h after the second barrier layer 562 is formed. Subsequently, the relay electrode 473 is formed. The relay electrode 473 is filled in the third through-hole 452h and the fourth through-hole 462h, but not formed in the fifth through-hole 562a. When the relay electrode 473 is formed, the second planarization layer 452 in the vicinity of the fourth through-hole 462h is heated. Accordingly, gas is generated from the second planarization layer 452 in the vicinity of the fourth through-hole 462h. In the present embodiment, since the fifth through-hole 562a is formed, at least a part of the generated gas is discharged through the fifth through-hole 562a. Therefore, the stress generated by the gas generated when the relay electrode 473 is formed can be reduced.

[0085] Note that since the first electrode 571 is filled in the fifth through-hole 562a, it is possible to suppress the intrusion of moisture from the second planarization layer 452 into the light-emitting layer 74 through the fifth through-hole 562a. Also, in a plan view of the main surface 21a of the first substrate 21, the area of the fifth through-hole 562a may be smaller than the area of the fourth through-hole 462h. Thereby, heating of the second planarization layer 452 when filling the first electrode 571 in the fifth through-hole 562a can be suppressed. Therefore, since the gas generated in the second planarization layer 452 can be reduced, the stress generated in the second barrier layer 562 can be reduced. As described above, in the present embodiment, it is possible to suppress the intrusion of moisture from the second planarization layer 452 into the light-emitting layer 74 and suppress the stress generated in the second barrier layer 562. Therefore, peeling and cracking of the second barrier layer 562 can be further suppressed.

[0086] (Other embodiments) As described above, the display device according to the present disclosure has been described based on the embodiments. However, the display device and the like according to the present disclosure are not limited to the above embodiments. Another embodiment realized by combining any components in the embodiments, a modified example obtained by making various modifications conceivable by those skilled in the art without departing from the gist of the present disclosure with respect to the embodiments, and various devices incorporating the processing circuit and the like according to the present embodiment are also included in the present disclosure.

[0087] For example, the second substrate 122 and the second lower barrier layer 132 according to the second embodiment may be applied to the display devices according to the third to sixth embodiments.

[0088] Also, in a plan view of the main surface 21a of the first substrate 21 of the display devices according to the fifth and sixth embodiments, the area of the second through-hole 461h may be 30% or more of the area of the first electrode 471 or 571.

[0089] Also, in each of the above embodiments, the pixel has three sub-pixels, but the number of sub-pixels included in the pixel may be one or more. For example, the pixel may have four sub-pixels corresponding to the emission colors of R, G, B, and W (white).

Industrial Applicability

[0090] The present disclosure is useful, for example, for flexible organic EL flat panel displays.

Explanation of Signs

[0091] 1 Display device 10 Pixel 11B, 11G, 11R, 111R, 211R, 311R, 411R, 511R Sub-pixel 12 Display unit 13 Gate driver 15 Data driver 16 Controller 17 Power supply 21 First substrate 21a, 21b Main surface 31 First lower barrier layer 40 Thin film transistor layer 51 First planarization layer 51h First through-hole 61, 261, 361, 461 First barrier layer 61h, 261h, 361h, 461h Second through-hole 71, 271, 371, 471, 571 First electrode 72 Second electrode 74 Light emitting layer 80 Bank 122 Second substrate 132 Second lower barrier layer 261ha, 261hb, 261hc, 361ha Through-hole 452 Second planarization layer 452h Third through-hole 462, 562 Second barrier layer 462h Fourth through-hole 473 Relay electrode 562a Fifth through-hole

Claims

1. A flexible first substrate, A first lower barrier layer disposed above one main surface of the first substrate and formed of an inorganic material, A thin film transistor layer including a thin film transistor disposed above the first lower barrier layer, A first planarization layer disposed above the thin film transistor layer and formed of an organic material, A first barrier layer disposed above the first planarization layer and formed of an inorganic material, A first electrode disposed above the first barrier layer, A second electrode disposed above the first electrode, A light-emitting layer disposed between the first electrode and the second electrode and emitting light when current is supplied through the first electrode and the second electrode, A second planarization layer disposed between the thin film transistor layer and the first planarization layer and formed of an organic material, A second barrier layer disposed between the second planarization layer and the first planarization layer and formed of an inorganic material, And an intermediate electrode disposed between the second barrier layer and the first planarization layer, A first through-hole penetrating the first planarization layer is formed in the first planarization layer, A second through-hole penetrating the first barrier layer and at least a part of which is connected to the first through-hole is formed in the first barrier layer, A third through-hole penetrating the second planarization layer is formed in the second planarization layer, A fourth through-hole penetrating the second barrier layer and at least a part of which is connected to the third through-hole is formed in the second barrier layer, A part of the first electrode is filled in the first through-hole and the second through-hole, A part of the intermediate electrode is filled in the third through-hole and the fourth through-hole, In a plan view of the main surface of the first substrate, at least a part of the fourth through-hole is disposed at a position different from that of the second through-hole, The relay electrode is electrically connected to the first electrode in the first through-hole, In the second barrier layer, a fifth through-hole is formed below the first through-hole, penetrating the second barrier layer, not filled with the relay electrode, and filled with the first electrode. Display device.

2. In a plan view of the main surface of the first substrate, the second through-hole includes a plurality of elongated through-holes extending along the longitudinal direction of the first electrode. The display device according to claim 1.

3. In a plan view of the main surface of the first substrate, the second through-hole includes a plurality of through-holes arranged in a staggered grid pattern. The display device according to claim 1.

4. A flexible second substrate disposed between the first lower barrier layer and the thin film transistor layer; And a second lower barrier layer disposed between the second substrate and the thin film transistor layer and formed of an inorganic material. The display device according to any one of claims 1 to 3.

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