Appearance inspection method

By employing a table with a reflection-suppressing substrate region, the method addresses the issue of interference fringes in appearance inspections of polyhedral objects, resulting in clearer surface observations.

JP7696231B2Active Publication Date: 2025-06-20TDK CORP
View PDF 11 Cites 0 Cited by

Patent Information

Application Number
JP2021082544
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-06-03
Filing Date
2021-05-14
Publication Date
2025-06-20
Estimated Expiration
2041-05-14

AI Technical Summary

Technical Problem

During appearance inspections of polyhedral objects, interference fringes can occur due to light reflection from the object's side surfaces and the inspection table, making it difficult to clearly observe the object's surfaces.

Method used

The method involves using a table with a substrate region that suppresses the reflection of light incident from one surface and transmitted through the substrate at the other surface, allowing light to be irradiated onto the object's side surfaces without generating interference fringes.

Benefits of technology

This approach effectively suppresses the generation of interference fringes, enabling clearer observation of the object's side surfaces during appearance inspections.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007696231000001
    Figure 0007696231000001
  • Figure 0007696231000002
    Figure 0007696231000002
  • Figure 0007696231000003
    Figure 0007696231000003
Patent Text Reader

Abstract

To provide a visual inspection method that suppresses interference fringes due to light irradiation from being formed.SOLUTION: A visual inspection method comprises irradiating one side face of a chip element body with light, and performing visual inspection on the one side face. In this visual inspection method, a table 10 is prepared which is a table 10 where the chip element body is placed, and has a substrate region 14 including a first face 14a and a second face 14b opposed to each other and also suppresses light made incident from the second face 14b and transmitted through the substrate region 14 from being reflected by the first face 14a, and the chip element body 1 is mounted on the first face 14a with one side face (third side face 3c) opposed to the first face 14a, the one side face being irradiated with the light from the side of the second face 14b across the substrate region 14.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to an appearance inspection method.

Background Art

[0002] An appearance inspection method for inspecting the appearance of an object to be inspected is known (see, for example, Patent Document 1). The appearance inspection method disclosed in Patent Document 1 provides a method for inspecting the appearance of an object to be inspected while irradiating the object to be inspected with light.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When inspecting the appearance of each side surface of a polyhedral object to be inspected while mounted on a table, at least one side surface of the object to be inspected faces the table. When inspecting the appearance of one side surface facing the table, the following problems may occur. That is, since one side surface facing the table is inspected through the table, the light for brightly irradiating one side surface facing the table is irradiated onto one side surface of the object to be inspected through the table. The light irradiated onto one side surface of the object to be inspected is reflected by the one side surface. A part of the light irradiated toward one side surface of the object to be inspected through the table is also reflected on one surface of the table facing the object to be inspected. When performing an appearance inspection, the light reflected by one side surface of the object to be inspected and the light reflected by one surface of the table are received. When receiving these two reflected lights, there is a possibility that the two reflected lights interfere with each other. When the two reflected lights interfere with each other, interference fringes may occur. When interference fringes occur, it is difficult to clearly observe one side surface of the object to be inspected.

[0005] One aspect of the present invention aims to provide an appearance inspection method for suppressing the generation of interference fringes by light irradiation.

Means for Solving the Problems

[0006] An appearance inspection method according to one aspect is an appearance inspection method for irradiating one side surface of a chip element with light and performing an appearance inspection of the one side surface. In this appearance inspection method, a table on which the chip element is placed is prepared. The table has a substrate region including a first surface and a second surface facing each other, and reflection of light incident from the second surface and transmitted through the substrate region at the first surface is suppressed. The chip element is placed on the first surface such that one side surface faces the first surface, and the one side surface is irradiated with light from the second surface side through the substrate region.

[0007] According to the above one aspect, the light irradiated from the second surface side through the substrate region onto one side surface of the chip element is reflected at the one side surface. Since reflection at the first surface of the substrate region is suppressed, the light incident from the second surface and transmitted through the substrate region is less likely to be reflected at the first surface when reaching the first surface. Therefore, the above one aspect suppresses the generation of interference fringes by light irradiation.

Effects of the Invention

[0008] According to the present invention, an appearance inspection method for suppressing the generation of interference fringes by light irradiation is provided.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Mode for Carrying Out the Invention

[0010] Hereinafter, with reference to FIGS. 1 to 4, the appearance inspection method according to this embodiment will be described. In the description, the same reference numerals will be used for the same elements or elements having the same function, and redundant descriptions will be omitted.

[0011] First, with reference to FIG. 1, the chip element 1 that is the object of the appearance inspection method will be described. FIG. 1 is a perspective view showing the chip element that is the inspection object of the appearance inspection method according to an embodiment. In this embodiment, the chip element 1 is a ceramic fired body. The ceramic fired body is formed, for example, by laminating and pressing a plurality of ceramic green sheets, firing at a predetermined temperature for a predetermined time, and then barrel polishing. The ceramic green sheets are laminated in the first direction D1. The boundaries of the layers where the layers of the green sheets overlap each other are integrated to the extent that they are not visible. An electrode pattern serving as an internal electrode may be formed on the ceramic green sheet. The internal electrode is a conductor for an electronic component using the chip element 1 to function as, for example, a capacitor or an inductor. In this embodiment, the chip element 1 is a ceramic fired body before forming the terminal electrodes on its outer surface.

[0012] The chip body 1 has a substantially rectangular parallelepiped shape and has a first side surface 3a and a third side surface 3c that face each other. The first side surface 3a and the third side surface 3c face each other in the first direction D1 and form part of the outer surface of the chip body 1. The chip body 1 further has a second side surface 3b and a fourth side surface 3d that face each other. The second side surface 3b and the fourth side surface 3d face each other in a second direction D2 that intersects the first direction D1 and form part of the outer surface of the chip body 1. The second direction D2 is, for example, the short side direction in the substantially rectangular parallelepiped-shaped chip body 1. The chip body 1 further has a fifth side surface 3e and a sixth side surface 3f that face each other. The fifth side surface 3e and the sixth side surface 3f face each other in a third direction D3 that intersects the first direction D1 and the second direction D2 and form part of the outer surface of the chip body 1. The third direction D3 is, for example, the long side direction in the substantially rectangular parallelepiped-shaped chip body 1. In the present embodiment, the first direction D1, the second direction D2, and the third direction D3 are orthogonal to each other.

[0013] The first side surface 3a and the third side surface 3c extend in the second direction D2 so as to connect the second side surface 3b and the fourth side surface 3d. The first side surface 3a and the third side surface 3c extend in the third direction D3 so as to connect the fifth side surface 3e and the sixth side surface 3f. The second side surface 3b and the fourth side surface 3d extend in the first direction D1 so as to connect the first side surface 3a and the third side surface 3c. The second side surface 3b and the fourth side surface 3d extend in the third direction D3 so as to connect the fifth side surface 3e and the sixth side surface 3f. The fifth side surface 3e and the sixth side surface 3f extend in the first direction D1 so as to connect the first side surface 3a and the third side surface 3c. The fifth side surface 3e and the sixth side surface 3f extend in the second direction D2 so as to connect the second side surface 3b and the fourth side surface 3d.

[0014] The length of the chip body 1 in the first direction D1 is, for example, about 1.2 mm. The length of the chip body 1 in the second direction D2 is, for example, about 1.2 mm. The length of the chip body 1 in the third direction D3 is, for example, about 2.0 mm. The ridge portions of the chip body 1 are chamfered by a barrel polishing process when the chip body 1 is formed and have a rounded state.

[0015] Each side surface (from the first side surface 3a to the sixth side surface 3f) of the chip body 1 may not be flat throughout and may have scratches, depressions, and defects in part. The surface roughness of each side surface of the chip body 1 may be greater than 0 μm and 0.1 μm or less. As the surface roughness of each side surface, the maximum height (Rz) is used. The maximum height (Rz) is defined in JIS B 0601:2001 (ISO 4287:1997).

[0016] Subsequently, with reference to FIG. 2, an appearance inspection method according to this embodiment will be described. FIG. 2 is a top view showing an appearance inspection apparatus 5 for performing the appearance inspection method. The appearance inspection apparatus 5 is configured as an apparatus for performing an appearance inspection method of the chip body 1 which is an object to be inspected. The appearance inspection apparatus 5 images each side surface (from the first side surface 3a to the sixth side surface 3f) of the chip body 1 and detects the presence or absence of scratches, depressions, and defects on each side surface.

[0017] The appearance inspection apparatus 5 includes a table 10, a supply unit 20 for supplying the chip body 1 onto the table 10, a plurality of imaging units 30 for imaging each side surface of the chip body 1, and a recovery unit 40 for recovering the chip body 1 after imaging. In this embodiment, the table 10 is a member on which the chip body 1 is placed and rotates in the rotation direction R. The chip body 1 supplied from the supply unit 20 is sequentially conveyed onto the table 10 where imaging is performed by the plurality of imaging units 30 by the rotation of the table 10. The chip body 1 after imaging by all the imaging units 30 is conveyed near the recovery unit 40 by the rotation of the table 10.

[0018] The table 10 has, for example, a disc shape and has a placement area 12 for placing the chip body 1. The placement area 12 is located, for example, at the periphery of the table 10. Below the table 10, for example, a servo motor 50 is provided. By driving the servo motor 50, the table 10 rotates in the rotation direction R at a constant speed around the central axis N1. The diameter of the table 10 is, for example, 40 cm to 50 cm.

[0019] The supply unit 20 has a hopper 22 and a feeder 24. The hopper 22 accommodates a number of chip bodies 1. In the supply unit 20, when the bottom of the hopper 22 is opened, the chip bodies 1 are pushed out into the feeder 24. The chip bodies 1 are supplied onto the placement area 12 of the table 10 through the feeder 24.

[0020] The recovery unit 40 includes a good product recovery section 42 and a defective product recovery section 44. The good product recovery section 42 has a gas injection nozzle 43, and the defective product recovery section 44 has a gas injection nozzle 45. The nozzles of the gas injection nozzle 43 and the gas injection nozzle 45 are respectively directed toward the good product recovery section 42 and the defective product recovery section 44, and the timing of gas injection is controlled by the control unit 52.

[0021] The control unit 52 acquires the imaging data from the imaging unit 30 and the rotation amount of the table 10. The control unit 52 inspects the presence or absence of defects on each side surface of the chip body 1 by performing image processing based on the imaging data. Based on the inspection result, the control unit 52 determines whether the chip body 1 related to the inspection is a good product or not. When the chip body 1 determined to be a good product is conveyed to the position of the good product recovery section 42, the control unit 52 causes gas to be ejected from the gas injection nozzle 43 to recover the chip body 1 in the good product recovery section 42. For the chip body 1 determined to be a defective product, when the chip body 1 is conveyed to the position of the defective product recovery section 44, the control unit 52 causes gas to be ejected from the gas injection nozzle 45 to recover the chip body 1 in the defective product recovery section 44.

[0022] Next, the imaging unit 30 will be described. The imaging unit 30 irradiates light on each side surface (from the first side surface 3a to the sixth side surface 3f) of the chip element 1 and performs imaging of each side surface. In the present embodiment, the number of imaging units 30 is six, and the imaging unit 30 includes the first imaging unit 31 to the sixth imaging unit 36. When the chip element 1 has a substantially rectangular parallelepiped shape, one imaging unit 30 images one side surface of the chip element 1. Each imaging unit 30 is composed of an imaging unit and an irradiation unit. For example, the first imaging unit 31 is composed of an imaging unit 31a and an irradiation unit 31b (the same applies to other imaging units). The imaging unit 31a is, for example, a cylindrical camera. The camera is, for example, a CCD camera. The irradiation unit 31b is, for example, an annular light source surrounding the periphery of the imaging unit 31a. The irradiation unit 31b may be a light source that irradiates light coaxially with the optical axis of the imaging unit 31a. The light source is, for example, an LED light source.

[0023] Each imaging unit 30 is arranged at a predetermined interval around the table 10 between the supply unit 20 and the recovery unit 40. The imaging unit 32a and the irradiation unit 32b are adjusted so as to be able to photograph the appearance of the side surface of the chip element 1 conveyed by the rotation of the table 10 with appropriate brightness.

[0024] The first imaging unit 31 performs light irradiation and imaging of the first side surface 3a of the chip element 1. The first side surface 3a faces upward of the table 10, and the first imaging unit 31 is arranged above the table 10. The irradiation unit 31b irradiates light toward the first side surface 3a at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the first side surface 3a of the chip element 1. The imaging unit 31a images the first side surface 3a at an angle, for example, of 0 degrees or more and 10 degrees or less with respect to the normal direction of the first side surface 3a of the chip element 1.

[0025] The second imaging unit 32 irradiates light onto and images the second side surface 3b of the chip body 1. The second side surface 3b faces outward in the radial direction of the table 10, and the second imaging unit 32 is disposed outward in the radial direction of the table 10. The irradiation unit 32b irradiates light toward the second side surface 3b at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the second side surface 3b of the chip body 1. The imaging unit 32a images the second side surface 3b at an angle, for example, of 0 degrees or more and 10 degrees or less with respect to the normal direction of the second side surface 3b of the chip body 1.

[0026] The third imaging unit 33 irradiates light onto and images the third side surface 3c of the chip body 1. The third side surface 3c faces downward of the table 10, and the third imaging unit 33 is disposed below the table 10. The light irradiation and imaging of the third side surface 3c by the third imaging unit 33 are performed through the table 10. The irradiation unit 33b irradiates light toward the third side surface 3c at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the third side surface 3c of the chip body 1. The imaging unit 33a images the third side surface 3c at an angle, for example, of 0 degrees or more and 10 degrees or less with respect to the normal direction of the third side surface 3c of the chip body 1.

[0027] The fourth imaging unit 34 irradiates light onto and images the fourth side surface 3d of the chip body 1. The fourth side surface 3d faces inward in the radial direction of the table 10. The fourth imaging unit 34 is above the table 10 and is disposed inward in the radial direction of the table 10 than the placement area 12. The irradiation unit 34b irradiates light toward the fourth side surface 3d at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the fourth side surface 3d of the chip body 1. The imaging unit 34a images the fourth side surface 3d at an angle, for example, of 0 degrees or more and 10 degrees or less with respect to the normal direction of the fourth side surface 3d of the chip body 1. The fourth imaging unit 34 is tilted so as to be able to perform light irradiation and imaging of the fourth side surface 3d.

[0028] The fifth imaging unit 35 irradiates and images the fifth side surface 3e of the chip body 1. The fifth side surface 3e faces the rotation direction R of the table 10. The fifth imaging unit 35 is disposed above the table 10 and faces the direction opposite to the rotation direction R of the table 10. The irradiation unit 35b irradiates light toward the fifth side surface 3e at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the fifth side surface 3e of the chip body 1. The imaging unit 35a images the fifth side surface 3e at an angle, for example, of 20 degrees or more and 30 degrees or less with respect to the normal direction of the fifth side surface 3e of the chip body 1. The fifth imaging unit 35 is tilted so as to be able to irradiate and image the fifth side surface 3e.

[0029] The sixth imaging unit 36 irradiates and images the sixth side surface 3f of the chip body 1. The sixth side surface 3f faces the direction opposite to the rotation direction R of the table 10. The sixth imaging unit 36 is disposed above the table 10 and faces the rotation direction R of the table 10. The sixth imaging unit 36 is tilted so as to be able to irradiate and image the sixth side surface 3f. The irradiation unit 36b irradiates light toward the sixth side surface 3f at an angle, for example, of 0 degrees or more and 70 degrees or less with respect to the normal direction of the sixth side surface 3f of the chip body 1. The imaging unit 36a images the sixth side surface 3f at an angle, for example, of 20 degrees or more and 30 degrees or less with respect to the normal direction of the sixth side surface 3f of the chip body 1.

[0030] FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2. In this figure, a table 10, a chip body 1 placed on the table 10, and a third imaging unit 33 that performs light irradiation and imaging on the third side surface 3c of the chip body 1 are shown. The third side surface 3c is an example of one side surface of the chip body 1 that faces the table 10 and is irradiated with light through the table 10. The table 10 has a substrate region 14 in the placement area 12, and the substrate region 14 includes a first surface 14a and a second surface 14b that face each other. The substrate region 14 is made of transparent glass or synthetic resin. In this specification, "transparent" means transparent to the light emitted from the irradiation unit of the imaging unit. In the present embodiment, a table 10 is provided in which the reflection of the light incident from the second surface 14b and transmitted through the substrate region 14 on the first surface 14a is suppressed.

[0031] The chip body 1 is placed on the first surface 14a such that one side surface thereof faces the first surface 14a. In the present embodiment, the one side surface facing the first surface 14a is the third side surface 3c. The form in which one side surface is placed on the first surface 14a includes a form in which one side surface is indirectly placed on the first surface 14a. Another member may be disposed between the chip body 1 and the substrate region 14. In the third imaging unit 33, the irradiation unit 33b irradiates light through the substrate region 14 from the second surface 14b side onto one side surface (the third side surface 3c). The imaging unit 33a receives the light reflected by the third side surface 3c through the substrate region 14. The light from the irradiation unit 33b may be white light or red light.

[0032] Table 10 further has a reflection suppression region 16 on the first surface 14a of the substrate region 14 in the placement area 12. In the present embodiment, as the table 10, a table 10 is prepared in which the reflection suppression region 16 suppresses the reflection of light incident from the second surface 14b and passing through the substrate region 14 on the first surface 14a. The chip element 1 may be placed on the reflection suppression region 16 such that one side surface thereof faces the first surface 14a. The reflection suppression region 16 is made of a transparent material. The reflection suppression region 16 is formed, for example, by providing an antireflection film or an antireflection coating on the substrate region 14. FIG. 3 shows an example in which an antireflection film or an antireflection coating is formed on the substrate region 14. The antireflection film is a sheet-like member attached on the substrate region 14. The antireflection coating is a film-like member formed by applying a coating agent on the substrate region 14. The antireflection film and the antireflection coating are made of, for example, a dielectric layer made of a material having a refractive index smaller than that of glass. Examples of the dielectric include TiO2, Ta2O5, Al2O3, SiO2, or MgF2.

[0033] The reflection suppression region 16 may be formed on the substrate region 14 by changing the composition of the surface of the substrate region 14 itself and its vicinity region. In this case, a part of the substrate region 14 changes to the reflection suppression region 16, and as a result, the reflection suppression region 16 is provided on the substrate region 14. The substrate region 14 and the reflection suppression region 16 are integrated. The substrate region 14 may change to the reflection suppression region 16, for example, by irradiation with laser light or application of a chemical substance to the surface of the substrate region 14. In the application of the chemical substance, for example, the chemical substance may be applied or the chemical substance may be vapor-deposited.

[0034] In this embodiment, the substrate area 14 in the placement area 12 is an area at the periphery included in the table 10, and an anti-reflection area 16 is formed on that area. The table 10 only needs to have transparency in the substrate area 14 which is an area, but may have transparency in the entire area of the table 10. The table 10 may have the anti-reflection area 16 in the entire area of the table 10. The table 10 has a base area 13 other than the placement area 12, and has a base body area 18. The base body area 18 may be an area formed simultaneously with the substrate area 14 and integral with the substrate area 14. In this case, after the substrate area 14 and the base body area 18 are formed simultaneously, the anti-reflection area 16 may be formed only on the substrate area 14. The base body area 18 may be formed separately from the substrate area 14 and integrated with the substrate area 14 after its formation. In this case, the anti-reflection area 16 is formed only on the substrate area 14, and the substrate area 14 on which the anti-reflection area 16 is formed and the base body area 18 on which the anti-reflection area is not formed may be integrated with each other. The substrate area 14 may be made of the same material as the material constituting the base body area 18.

[0035] In this embodiment, the refractive index of the substrate area 14 is, for example, 1.45 to 1.55. The refractive index of the anti-reflection area 16 is, for example, 1.30 to 1.40. The thickness of the anti-reflection area 16 is, for example, 100 μm to 250 μm.

[0036] Fig. 4(a) is a diagram showing the optical path of light incident from the substrate area 14 side of the table 10 according to this embodiment to one side surface (third side surface 3c) of the chip element 1. As described above, the third side surface 3c of the chip element 1 is not flat over its entire area and may have a depression 4 in part. In this figure, the depression 4 existing on the third side surface 3c of the chip element 1 is shown enlarged. The depression 4 has a depth d from the outermost surface 16a of the anti-reflection area 16 to the sunken part. The outermost surface 16a of the anti-reflection area 16 is the uppermost surface of the table 10 in the placement area 12. The magnitude of the depth d varies according to the shape of the depression 4.

[0037] In the example shown in Fig. 4(a), an anti-reflection region 16 is disposed on the substrate region 14. The anti-reflection region 16 is made of a MgF2 coating film. Since the anti-reflection region 16 is disposed, reflection at the first surface 14a of the substrate region 14 facing the anti-reflection region 16 is suppressed with respect to light (incident light L1) incident from the second surface 14b of the substrate region 14 into the substrate region 14. When the anti-reflection region 16 is disposed, the incident light L1 incident from the second surface 14b and transmitted through the substrate region 14 generates reflected light L2 reflected by the third side surface 3c, but it is difficult to generate reflected light at the first surface 14a.

[0038] The outermost surface 16a of the anti-reflection region 16 may include irregularities having a predetermined surface roughness. The first surface 14a of the substrate region 14 may include irregularities having a predetermined surface roughness. The surface roughness of the outermost surface 16a may be greater than the surface roughness of the first surface 14a. In a configuration where the surface roughness of the outermost surface 16a is equal to or less than the surface roughness of the first surface 14a, the chip element 1 may move on the outermost surface 16a as the table 10 rotates. In this case, the imaging unit 30 has difficulty appropriately imaging each side surface of the chip element 1. On the other hand, in a configuration where the surface roughness of the outermost surface 16a is greater than the surface roughness of the first surface 14a, the chip element 1 is difficult to move on the outermost surface 16a, so the imaging unit 30 appropriately images each side surface of the chip element 1. The surface roughness of the outermost surface 16a and the first surface 14a is defined, for example, by the maximum height (Rz). The maximum height (Rz) is defined in JIS B 0601:2001 (ISO 4287:1997). The surface roughness of the outermost surface 16a is, for example, 12 to 20 μm. An example of the surface roughness of the outermost surface 16a is 14 μm. The surface roughness of the first surface 14a is, for example, 2 to 10 μm. An example of the surface roughness of the first surface 14a is 6 μm.

[0039] (b) of FIG. 4 is a diagram showing the path of light incident on one side surface (third side surface 3c) of the chip element 1 from the substrate region 14 side of the table 10p according to the comparative example. Also in this figure, the recess 4 is enlarged and shown for easy explanation. The recess 4 has a depth d from the first surface 14a of the substrate region 14 to the sunken part. Air has entered the recess 4. The first surface 14a of the substrate region 14 is the uppermost surface of the table 10p in the placement area 12.

[0040] In this comparative example, unlike the table 10 in (a) of FIG. 4, no reflection suppression region is arranged on the substrate region 14. Since there is no reflection suppression region, the incident light L1 that enters from the second surface 14b and passes through the substrate region 14 is likely to be reflected at the first surface 14a of the substrate region 14. The incident light L1 that has passed through the substrate region 14 generates a reflected light L2 reflected by the third side surface 3c and a reflected light L3 reflected by the first surface 14a of the substrate region 14.

[0041] The incident light L1 that has traveled from the air inside the recess 4 to the third side surface 3c generates a reflected light L2 by fixed-end reflection at the interface between the air and the third side surface 3c. The phase of the reflected light L2 is shifted by π corresponding to a half wavelength compared to the phase of the incident light L1. The incident light L1 that has traveled from the second surface 14b into the substrate region 14 to the first surface 14a generates a reflected light L3 by free-end reflection at the first surface 14a. The phase of the reflected light L3 is not shifted from the phase of the incident light L1. Therefore, the reflected light L2 and the reflected light L3 may reinforce each other or cancel each other out depending on the magnitude of the depth d. As shown in (b) of FIG. 4, since the magnitude of the depth d changes according to the shape of the recess 4, the reflected light L2 and the reflected light L3 form interference fringes in which reinforcement and cancellation are repeated. Since the light sensed by the imaging unit 33a is the two lights of the reflected light L2 and the reflected light L3, interference fringes are added to the portion corresponding to the recess 4 in the image of the third side surface 3c.

[0042] As described above, in the appearance inspection method according to the present embodiment, the light irradiated from the second surface 14b side through the substrate region 14 onto one side surface (third side surface 3c) of the chip element 1 is reflected on the one side surface. Since the reflection on the first surface 14a of the substrate region 14 is suppressed, the light (incident light L1) incident from the second surface 14b and transmitted through the substrate region 14 is less likely to be reflected by the first surface 14a when reaching the first surface 14a. The appearance inspection method according to the present embodiment suppresses the generation of interference fringes due to light irradiation.

[0043] In the present embodiment, as the table 10, a reflection suppression region 16 is provided on the first surface 14a, and the table 10 in which the reflection suppression region 16 suppresses the reflection of the light incident from the second surface 14b and transmitted through the substrate region 14 on the first surface 14a is prepared. In this case, the generation of interference fringes due to light irradiation is surely suppressed.

[0044] In the present embodiment, the chip element 1 is a ceramic fired body. In this case, in the appearance inspection of one side surface (third side surface 3c) of the ceramic fired body, the generation of interference fringes is more surely suppressed.

[0045] In the present embodiment, the chip element 1 is a ceramic fired body before forming the terminal electrodes on the outer surface. In this case, the generation of interference fringes is more surely suppressed for the ceramic fired body without terminal electrodes.

[0046] In the present embodiment, the surface roughness of one side surface (third side surface 3c) is greater than 0 μm and equal to or less than 0.1 μm. In this case, after reducing the scattering of the light (incident light L1) on the third side surface 3c of the chip element 1, the generation of interference fringes is suppressed.

[0047] In the present embodiment, the light (incident light L1) is red light. In this case, the color unevenness on one side surface (third side surface 3c) of the chip element 1 is easily detected.

[0048] As described above, the embodiments of the present invention have been described, but the present invention is not necessarily limited to the above-described embodiments, and various modifications are possible without departing from the gist thereof.

Explanation of Reference Numerals

[0049] 1… chip body, 3c… third side surface (one side surface), 10… table, 14… substrate region, 14a… first surface, 14b… second surface, 16… reflection suppression region, L1… incident light (light).

Claims

1. A method for inspecting the appearance of a chip body, which is a ceramic fired body formed by firing and barrel-polishing a plurality of laminated and pressure-bonded ceramic green sheets, before forming terminal electrodes on the outer surface, by irradiating one side surface of the chip body with a surface roughness greater than 0 μm and equal to or less than 0.1 μm and performing an appearance inspection on the one side surface, A table on which the chip body is placed, having a substrate region including a first surface and a second surface facing each other, and a reflection suppression region provided on the first surface, the reflection suppression region suppressing reflection of light incident from the second surface and passing through the substrate region on the first surface, prepare a table, Place the chip body in contact with the reflection suppression region such that the one side surface faces the first surface, An appearance inspection method of irradiating the one side surface with red light from the second surface side through the substrate region.

2. The appearance inspection method according to claim 1, wherein a table is prepared in which the reflection suppression region is provided on the first surface only in the placement area for placing the chip body as the table.

3. The appearance inspection method according to claim 2, wherein a table is prepared in which the placement area is located at the periphery of the table as the table.

4. The appearance inspection method according to any one of claims 1 to 3, wherein the surface roughness of the outermost surface of the reflection suppression region is greater than the surface roughness of the first surface.

Citation Information

Patent Citations

  • Document holding member of image scanner

    JP1992208766A

  • Inspection table for translucent of transparent film

    JP1994174651A

  • Document platen for optical read, and optical reader

    JP2003177482A

  • Method of manufacturing ceramic electronic component

    JP2007273720A

  • Appearance-inspecting apparatus

    JP2010230514A