Drive Circuit for Semiconductor Element

Abstract

To provide a driving circuit of a semiconductor element capable of executing an ASC mode as prescribed even in constitution provided with a protection function.SOLUTION: An abnormality detection section 9, when detecting flow of overcurrent in an IGBT 3, outputs an abnormality detection signal to a normal driving section 8. An abnormality disabling signal generation section 7, when inputting an over-voltage detection signal from an over-voltage detection section 12, outputs a disabling signal for disabling the detection of the abnormality to the abnormality detection section 9. The normal driving section 8, when inputting the abnormality detection signal, stops output of a driving signal for turning on the IGBT 3, but the abnormality detection section 9, when inputting the abnormality disabling signal, stops output of the over-voltage detection signal.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a circuit for driving a semiconductor element.

Background Art

[0002] For example, as an operation mode of a three-phase inverter that drives a load such as a motor, when the voltage of a battery as a power source rises excessively, an ASC (Active Short Circuit) mode may be set to lower the voltage, for example, by turning on all phases of the upper arm or the lower arm simultaneously.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, generally, a circuit for driving a power semiconductor element such as an IGBT that constitutes an inverter is provided with a circuit for protecting the element from overcurrent, for example. When the ASC mode is executed, an overcurrent flows through the IGBT, so the ASC mode cannot be continued due to the operation of the protection circuit.

[0005] The present invention has been made in view of the above circumstances, and an object thereof is to provide a drive circuit for a semiconductor element that can execute the ASC mode as expected even in a configuration having a protection function.

Means for Solving the Problems

[0006] According to the drive circuit for a semiconductor element described in claim 1, when the element abnormality detection unit detects an abnormality related to the drive state of the semiconductor element, the element abnormality detection unit outputs an element abnormality detection signal to the control signal output unit. The invalidation signal output unit receives from the outside Elements for setting the ASC (Active Short Circuit) modeWhen a forced ON command is input, an invalidation signal for invalidating the detection of the abnormality is output to the element abnormality detection unit. When an element abnormality detection signal is input, the drive signal output unit stops outputting a drive signal for turning on the semiconductor element. However, when an invalidation signal is input, the element abnormality detection unit element stops outputting an abnormality detection signal.

[0007] With such a configuration, when a forced ON command is input from the outside, the control signal is a control signal for turning on the semiconductor element becomes Accordingly, even if the element abnormality detection unit detects an abnormality regarding the driving state of the semiconductor element along with this, the output of the abnormality detection signal is stopped by the input of the invalidation signal. Therefore, the drive signal output unit can continue to output a drive signal for turning on the semiconductor element in accordance with the input of the forced ON command.

[0008] Claim 4 According to the drive circuit of the semiconductor element described in claim, when the circuit abnormality detection unit detects an abnormality in the peripheral circuit of the element abnormality detection unit, it outputs a circuit abnormality detection signal to the control signal output unit. When a circuit abnormality detection signal is input, the control signal output unit stops outputting a control signal for turning on the semiconductor element. When a forced ON command is input from the outside, the invalidation signal output unit also outputs an invalidation signal to the circuit abnormality detection unit. Then, when an invalidation signal is input, the circuit abnormality detection unit stops outputting a circuit abnormality detection signal.

[0009] That is, when a circuit abnormality detection signal is input while the control signal output unit is performing normal control of turning the semiconductor element ON / OFF, the control signal output unit stops outputting a control signal for turning on the semiconductor element. On the other hand, when a forced ON command is input from the outside, the output of the circuit abnormality detection signal is stopped by the invalidation signal output unit also outputting an invalidation signal to the circuit abnormality detection unit. Therefore, even if the circuit abnormality detection unit detects an abnormality in the peripheral circuit during the period when the control signal output unit outputs a control signal for turning on the semiconductor element due to the input of a forced ON command from the outside, the control signal output unit can continue to output a control signal for turning on the semiconductor element.

[0010] Claim 5 According to the drive circuit of the semiconductor device described, when the device abnormality detection unit detects an abnormality related to the drive state of the semiconductor device, it outputs an element abnormality detection signal to the control signal output unit and the drive signal output unit. The invalidation signal output unit outputs an invalidation signal that invalidates the detection of an abnormality to the control signal output unit when a forced ON command is input from the outside Elements for setting the ASC (Active Short Circuit) mode When the drive signal output unit receives the element abnormality detection signal, it stops outputting the drive signal to turn on the semiconductor device. However, when the invalidation signal is input, the element abnormality detection unit stops outputting the abnormality detection signal to the drive signal output unit

[0011] When the control signal output unit receives the element abnormality detection signal, it stops outputting the control signal to turn on the semiconductor device on the condition that the forced ON command has not been input. When the element abnormality detection signal is input during the period when the forced ON command is input, it outputs the control signal to turn on the device. With this configuration, if the forced ON command is input, the control signal output unit can output the control signal to turn on the semiconductor device regardless of the input state of the element abnormality detection signal

[0012] Claim 6 According to the drive circuit of the semiconductor device described, when the control signal output unit is outputting the control signal to turn on the semiconductor device and an invalidation signal is input via the circuit abnormality detection unit in a state where the forced ON command has not been input, it stops outputting the control signal. That is, in this case, although the invalidation signal output unit has not output the invalidation signal, it is considered that the invalidation signal has been output due to some abnormality occurring in the circuit abnormality detection unit. Therefore, by the control signal output unit stopping the output of the control signal to turn on the semiconductor device, it is possible to avoid continuing the ON / OFF control of the semiconductor device in a state where there is an abnormality in the drive circuit

[0013] Claim 7According to the driving circuit of the semiconductor device described, when the device abnormality detection unit detects an abnormality related to the driving state of the semiconductor device, it outputs an element abnormality detection signal to the control signal output unit. The control signal output unit stops outputting the control signal for turning on the semiconductor device when the element abnormality detection signal is input. And, when a Elements for setting the ASC (Active Short Circuit) mode forced ON command is input from the outside, the forced ON signal output unit outputs a forced ON signal for turning on the semiconductor device regardless of the output state of the control signal by the control signal output unit.

[0014] With such a configuration, even if the control signal output unit stops outputting the control signal for turning on the semiconductor device when the device abnormality detection unit detects an abnormality related to the driving state of the semiconductor device, when a forced ON command is input from the outside, the forced ON signal output unit outputs a separate forced ON signal, so that the semiconductor device can be continuously turned on.

Brief Description of the Drawings

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Best Mode for Carrying Out the Invention

[0016] (First Embodiment) As shown in FIG. 1, in this embodiment, the three-phase motor 1 is driven by a three-phase inverter 2, but only one phase arm 2U thereof is shown in FIG. 1. The arm 2U is configured by connecting two IGBTs 3P and 3N in series between the system power supply and the ground. The common connection point of the IGBTs 3P and 3N is connected to the U-phase winding terminal of the motor 1.

[0017] The IGBTs 3P and 3N, which are examples of semiconductor elements, are switched and controlled by a control unit 4 composed of, for example, a microcomputer, and are driven by drive ICs 5P and 5N. The control unit 4 includes a normal drive signal generation unit 6 and an abnormality invalidation signal generation unit 7 inside. The drive ICs 5P and 5N include a normal drive unit 8P and an abnormality detection unit 9P corresponding to the upper-arm IGBT 3P, and a normal drive unit 8N and an abnormality detection unit 9N corresponding to the lower-arm IGBT 3N, respectively.

[0018] The normal drive unit 8 corresponding to the drive signal output unit turns the IGBT 3 ON / OFF according to the drive signal input from the control unit 4. The IGBT 3 has an emitter terminal for collector current sensing, and the sense emitter terminal of the IGBT 3P is connected to the collector of the IGBT 3N via a series circuit of resistor elements 10P and 11P. The sense emitter terminal of the IGBT 3N is connected to the ground via a series circuit of resistor elements 10N and 11N. Feedback diodes 13P and 13N are connected between the collectors and emitters of the IGBTs 3P and 3N, respectively.

[0019] The common connection point of the resistance elements 10 and 11 is connected to the input terminal of the abnormality detection unit 9. The abnormality detection unit 9 performs overcurrent detection by comparing the voltage divided by the resistance elements 10 and 11 with a threshold value. When the voltage exceeds the threshold value, an overcurrent detection signal is output to the normal drive signal generation unit 6 and the normal drive unit 8. When an overcurrent detection signal is input, the normal drive unit 8 forcibly turns off the IGBT 3. The abnormality detection unit 9 is an example of an element abnormality detection unit.

[0020] The overvoltage detection unit 12 performs overvoltage detection by comparing the DC voltage of the system power supply with a threshold value, and when the voltage exceeds the threshold value, an overvoltage detection signal is output to the normal drive signal generation unit 6 and the abnormality invalidation signal generation unit 7 of the control unit 4. In this embodiment, the overvoltage detection signal is a command signal for executing the ASC mode. For example, when the system power supply is a battery mounted on a vehicle, an overvoltage state may occur depending on its charge state. The overvoltage detection signal is an example of a forced ON command.

[0021] When an overvoltage detection signal is input, the normal drive signal generation unit 6 corresponding to the control signal output unit outputs a drive signal to the normal drive units 8P and 8N so as to turn on the IGBTs 3P and 3N simultaneously. As a result, a short-circuit current flows from the system power supply to the ground via the IGBTs 3P and 3N, consuming power and reducing the voltage of the system power supply. This voltage is referred to as the system voltage.

[0022] Next, the operation of this embodiment will be described. As shown in FIG. 2, (1) when the system voltage at node A rises beyond the overvoltage detection threshold set in the overvoltage detection unit 12, (2) an overvoltage detection signal is output from node B, which is the output terminal of the overvoltage detection unit 12, and the ASC mode becomes active. (3) In response to this, the abnormality invalidation signal generation unit 7 outputs an abnormality invalidation signal from node C, which is the output terminal, with a slight delay.

[0023] (4)(5) When the overvoltage detection signal is input, the normal drive signal generation unit 6 of the control unit 4 outputs a drive ON signal to the normal drive units 8P and 8N. Accordingly, the normal drive units 8P and 8N output drive signals to turn on the IGBTs 3P and 3N, respectively. FIG. 2 shows only the signal waveform of the node D which is the output terminal of the normal drive unit 8N. At this time, since the IGBTs 3P and 3N are turned on simultaneously, a short-circuit current flows through the arm 2U, and both the abnormality detection units 9P and 9N detect an overcurrent.

[0024] (6) However, since an abnormality invalidation signal is input to the abnormality detection unit 9, an overcurrent detection signal is not output from the node E which is the output terminal of the abnormality detection unit 9N. Therefore, the output of the drive signals for turning on the IGBT 3 to the normal drive units 8P and 8N is not hindered by the overcurrent detection signal and continues. The power is consumed by the short-circuit current flowing through the arm 2U, the system voltage drops, and when it falls below the overvoltage threshold, the output of the overvoltage detection signal stops.

[0025] When the output of the overvoltage detection signal stops, the drive signal output by the normal drive unit 8 stops output with a slight delay time, and the abnormality invalidation signal stops output with a delay time longer than the above-mentioned delay time. Thereafter, it returns to the normal operation.

[0026] As described above, according to the present embodiment, when the abnormality detection unit 9 detects an abnormality regarding the driving state of the IGBT 3, specifically, that an overcurrent has flowed through the IGBT 3, it outputs an abnormality detection signal to the normal drive unit 8. When the overvoltage detection signal is input from the overvoltage detection unit 12, the abnormality invalidation signal generation unit 7 outputs an invalidation signal for invalidating the detection of the abnormality to the abnormality detection unit 9. When the abnormality detection signal is input, the normal drive unit 8 stops outputting the drive signal for turning on the IGBT 3, but when the abnormality invalidation signal is input, the abnormality detection unit 9 stops outputting the overvoltage detection signal.

[0027] With such a configuration, when an overvoltage detection signal is input from the outside, the normal drive unit 8 outputs a drive signal to turn on the IGBT 3. Accordingly, even if the abnormality detection unit 9 detects an overcurrent, the output of the abnormality detection signal is stopped when an abnormality invalidation signal is input. Therefore, the normal drive unit 8 can continue to output a drive signal to turn on the IGBT 3 in accordance with the input of the overvoltage detection signal.

[0028] Note that since the overcurrent detection signal is also input to the normal drive signal generation unit 6, the normal drive signal generation unit 6 may stop outputting a control signal to turn on the IGBT 3 when the overcurrent detection signal is input.

[0029] (Second Embodiment) Hereinafter, the same parts as those in the first embodiment will be denoted by the same reference numerals and the description thereof will be omitted, and different parts will be described. In the second embodiment, as shown in FIG. 3, drive ICs 21P and 21N that replace the drive ICs 5P and 5N are provided with an abnormality detection unit 22 that replaces the abnormality detection unit 9. The abnormality detection unit 22 has a function of detecting an overcurrent as well as the abnormality detection unit 9, and also has a function of detecting an abnormality of the normal drive unit 8.

[0030] As shown in FIG. 4, the normal drive unit 8 includes an on-drive unit 8a, an off-drive unit 8b, and an off-hold unit 8c, and the abnormality detection unit 22 includes a gate monitoring unit 22a and an off-hold monitoring unit 22b. The on-drive unit 8a outputs a high-level signal to the gate to turn on the IGBT 3. The off-drive unit 8b includes a driver 23 and an N-channel MOSFET 24 that is an off-drive switch, and drives the gate to a low level to turn off the IGBT 3. The off-hold unit 8c includes a driver 25 and an N-channel MOSFET 26 that is an off-hold switch, and drives the gate to a low level in duplicate with the off-drive unit 8b to hold the IGBT 3 in the off state. The off-hold unit 8c is an example of a peripheral circuit.

[0031] The gate monitoring unit 22a includes a comparator 27, and the gate voltage V of the IGBT 3 GIt is compared with the threshold value for keeping IGBT3 in the off state, and the comparison result is output to the control unit 4. The off-hold monitoring unit 22b also includes a comparator 28, which compares the level of the signal input by the control unit 4 to the off-hold unit 8c with the off-hold monitoring threshold value and outputs the comparison result to the control unit 4. The off-hold monitoring threshold value is a threshold value for confirming that the gate voltage of FET26 is at a high level.

[0032] As shown in FIG. 5, when the input drive signal MIN indicates a high level, the control unit 4 turns on both FET24 of the off-drive unit 8b and FET26 of the off-hold unit 8c to make the gate voltage V G go to a low level and keep IGBT3 in the off state. When the drive signal MIN changes from a high level to a low level, the control unit 4 turns off FET24 and 26 and drives the gate of IGBT3 to a high level by the on-drive unit 8a.

[0033] From this state, when the drive signal MIN changes to a high level, the control unit 4 stops driving the gate by the on-drive unit 8a, first turns on FET24 of the off-drive unit 8b, and drives the gate of IGBT3 to a low level. Then, when the signal output by the comparator 27 of the gate monitoring unit 22a changes to a low level because the gate voltage V G falls below the off-hold threshold value, the control unit 4 turns on FET26 of the off-hold unit 8c. Then, the control unit 4 monitors the signal output by the comparator 28 of the off-hold monitoring unit 22b to confirm that FET26 of the off-hold unit 8c is on.

[0034] That is, the control unit 4 drives IGBT3 to OFF by the off-drive unit 8b, and the gate voltage V GEven if it is below the off-hold threshold value, if the output signal of the comparator 28 of the off-hold monitoring unit 22b becomes low level, the FET 26 is OFF, indicating that the off-hold unit 8c is not functioning properly. The signal flow in this case is shown in FIG. 3. Also, as described above, when the output signal of the comparator 28 becomes low level, the circuit abnormality detection signal becomes active. The control unit 4 is configured to undertake part of the functions of the circuit abnormality detection unit.

[0035] FIG. 3 shows the case where the ASC mode is inactive. (1) The output signal of the comparator 28 is input to the normal drive signal generation unit 6 and the normal drive unit 8 of the control unit 4. (2) When the circuit abnormality detection signal is input to the normal drive unit 8, the IGBT 3 is immediately driven OFF. (3) Thereafter, a signal for driving the IGBT 3 OFF is output to the normal drive unit 8 via the normal drive signal generation unit 6.

[0036] On the other hand, when the ASC mode becomes active, the same operations as in (3) to (6) of the first embodiment are performed, and the abnormality invalidation signal generation unit 7 outputs an abnormality invalidation signal. As a result, the abnormality detection unit 22 stops outputting the circuit abnormality detection signal. Then, the normal drive signal generation unit 6 outputs a drive ON signal to the normal drive units 8P and 8N, and the normal drive units 8P and 8N output drive signals for turning on the IGBTs 3P and 3N, respectively, thereby executing the ASC mode.

[0037] As described above, according to the second embodiment, when the off-hold monitoring unit 22b detects an abnormality in the off-hold unit 8c of the normal drive unit 8, it outputs a circuit abnormality detection signal to the normal drive signal generation unit 6. When the above signal is input, the normal drive signal generation unit 6 stops outputting the control signal for turning on the IGBT 3, and when the overvoltage detection signal is input, the abnormality invalidation signal generation unit 7 also outputs an invalidation signal to the abnormality detection unit 22. Then, when the invalidation signal is input, the abnormality detection unit 22 stops outputting the circuit abnormality detection signal.

[0038] Therefore, even if the off-hold monitoring unit 22b detects an abnormality in the off-hold unit 8c during the period when the normal drive signal generation unit 6 outputs a control signal to turn on the IGBT 3 in response to the input of the overvoltage detection signal, the normal drive signal generation unit 6 can continue to output the control signal to turn on the IGBT 3.

[0039] (Third Embodiment) As shown in FIG. 6, the third embodiment includes a control unit 31 that replaces the control unit 4, and drive ICs 32P and 32N that replace the drive ICs 5P and 5N. The control unit 31 includes a forced drive signal generation unit 33 that replaces the abnormality invalidation signal generation unit 7, and the drive IC 32 includes a forced drive unit 34. The forced drive signal generation unit 33 corresponding to the forced ON signal output unit outputs a forced drive signal to the forced drive unit 34 when an overvoltage detection signal is input.

[0040] Similar to the normal drive unit 8, the forced drive unit 34 drives the gate of the IGBT 3 to turn it on, but the ON drive ability of the forced drive unit 34 is set to be higher than the OFF drive ability of the normal drive unit 8.

[0041] Next, the operation of the third embodiment will be described. As described above, since the forced drive signal generation unit 33 outputs a forced drive signal when an overvoltage detection signal is input, the forced drive units 34P and 34N receive this and turn on the IGBTs 3P and 3N. At this time, even if the normal drive units 8P and 8N are driving the IGBTs 3P and 3N to turn them off due to the overcurrent detection signal output by the abnormality detection unit 9, the ON drive ability of the forced drive unit 34 exceeds the OFF drive ability of the normal drive unit 8, so the ON drive state of the IGBTs 3P and 3N is maintained.

[0042] According to the third embodiment as described above, the control unit 31 is provided with a forced drive signal generation unit 33, and the drive IC 32 is provided with a forced drive unit 34 whose ON drive ability is set higher than the OFF drive ability of the normal drive unit 8. When an overvoltage detection signal is input, the forced drive signal generation unit 33 outputs a forced drive signal to the forced drive unit 34. With this configuration, when an overvoltage detection signal is input, the IGBTs 3P and 3N can be forcibly turned on to execute the ASC mode regardless of the drive states of the IGBTs 3P and 3N by the normal drive units 8P and 8N.

[0043] (Fourth Embodiment) The fourth embodiment shows a different execution form of the ASC mode. In the motor 1 and the inverter 2 shown in a three-phase form in FIG. 7, on the input side of the inverter 2, a battery 41, a smoothing capacitor 42, and a voltage sensor 43, which are power sources, are connected in parallel. The drive control circuit 44 includes, for example, the control unit 4 and the drive IC 5 of the first embodiment.

[0044] When the motor 1 decelerates, a counter electromotive force is generated. Since the counter electromotive force is regenerated to the battery 41 side through the feedback diode 13P on the upper arm side of the inverter 2, the system voltage rises. Therefore, when the counter electromotive force becomes excessive, the system voltage also rises excessively, resulting in an overvoltage state. When the overvoltage detection unit 12 detects the overvoltage and outputs an overvoltage detection signal, the normal drive signal generation unit 6 outputs a drive ON signal only to, for example, the normal drive unit 8N of each of the U, V, and W phases.

[0045] At this time, since the connection state of each phase winding of the motor 1 is equivalently short-circuited as shown in FIG. 8, a so-called short-circuit brake is applied. Also in this case, the overcurrent detection unit 9N detects an overcurrent, but since the abnormality invalidation signal generation unit 7 outputs an abnormality invalidation signal, no overcurrent detection signal is output. Therefore, the output of the drive signal for turning on the IGBT 3N of each phase is not hindered by the overcurrent detection signal and continues, so the rise in the system voltage is suppressed. Note that a short-circuit brake may be applied by outputting a drive ON signal only to the normal drive unit 8P of each phase.

[0046] (Embodiment 5) In Embodiment 5 shown in FIG. 9, the abnormality detection unit 9NA provided in the drive IC 5NA outputs an abnormality invalidation signal that passes through its own interior to the normal drive signal generation unit 6A provided in the control unit 4A. Then, the normal drive signal generation unit 6A operates as follows. As shown in FIG. 10, when the normal drive signal generation unit 6A is outputting a control signal to turn on the IGBT 3N, if an abnormality invalidation signal passing through the abnormality detection unit 9A is input although no overvoltage detection signal is input from the overvoltage detection unit 12, the output of the above control signal is stopped at that time and the IGBT 3N is turned off.

[0047] That is, in this case, since the overvoltage detection unit 12 is not outputting an overvoltage detection signal, although the abnormality invalidation signal generation unit 7 is not outputting an invalidation signal, it means that an invalidation signal has been output due to some abnormality occurring in the abnormality detection unit 9NA. Therefore, by stopping the output of the control signal for turning on the IGBT 3N by the normal drive signal generation unit 6A, it is possible to avoid continuing the ON / OFF control of the IGBT 3N in a state where there is an abnormality in the drive circuit.

[0048] (Embodiment 6) The configuration of Embodiment 6 shown in FIG. 11 is the same as that of Embodiment 1 with respect to the input / output relationship of each signal, but the internal logic of the normal drive signal generation unit 6B provided in the control unit 4B and the abnormality detection unit 9NB provided in the drive IC 5NB is different from that of Embodiment 1. As shown in FIG. 12, the signal waveforms of nodes A to D are the same as those of Embodiment 1, but the abnormality detection unit 9NB outputs the overcurrent detection signal to node E but not to node F.

[0049] Therefore, an overcurrent detection signal is input to the normal drive signal generation unit 6B. During a period when a forced ON command is not input, the normal drive signal generation unit 6B does not output a control signal to turn on the IGBT3N when an overcurrent detection signal is input. However, during a period when an overvoltage detection signal is input, the overcurrent detection signal is invalidated internally and a control signal to turn on the IGBT3N is output. As a result, the normal drive unit 8N outputs a drive signal from node D in the same manner as in the first embodiment.

[0050] As described above, according to the sixth embodiment, the abnormality detection unit 9NB outputs an overcurrent detection signal to the normal drive signal generation unit 6B and the normal drive unit 8N. When a forced ON command is input, the abnormality invalidation signal generation unit 7 outputs an invalidation signal to the normal drive signal generation unit 6B. When an overcurrent detection signal is input, the normal drive unit 8N stops outputting a drive signal to turn on the FET3N. However, when an invalidation signal is input, the abnormality detection unit 9NB stops outputting the overcurrent detection signal to the normal drive unit 8N.

[0051] When an overcurrent detection signal is input, the normal drive signal generation unit 6B stops outputting a control signal to turn on the FET3 on the condition that a forced ON command is not input. When an overcurrent detection signal is input during a period when a forced ON command is input, the control signal to turn on is output. With this configuration, if a forced ON command is input, the normal drive signal generation unit 6B can output a control signal to turn on the IGBT3 regardless of the input state of the overcurrent detection signal.

[0052] (Other Embodiments) In the first embodiment, the object for detecting an abnormality in the driving state of the IGBT3 is not limited to overcurrent, and other conditions such as overheating may also be applicable. In the second embodiment, the object for detecting an abnormality in the function of the normal drive unit 8 is not limited to the off-hold function. The semiconductor element is not limited to an IGBT, and may be a bipolar transistor, a MOSFET, or the like.

[0053] Although the present disclosure has been described in accordance with the embodiments, it is understood that the present disclosure is not limited to such embodiments or structures. The present disclosure also encompasses various modifications and variations within the equivalent scope. In addition, various combinations and forms, and further other combinations and forms including only one element, more than one element, or less than one element thereof, are within the scope and spirit of the present disclosure.

Explanation of Reference Numerals

[0054] In the drawings, 3 indicates an IGBT, 4 indicates a control unit, 5 indicates a drive IC, 6 indicates a normal drive signal generation unit, 7 indicates an abnormality invalidation signal generation unit, 8 indicates a normal drive unit, 9 indicates an abnormality detection unit, and 12 indicates an overvoltage detection unit.

Claims

1. A drive signal output unit (8) that outputs a drive signal to the semiconductor element in response to a control signal for turning the semiconductor element ON / OFF; An element abnormality detection unit (9, 9NA) that detects an abnormality related to the driving state of the semiconductor element and outputs an element abnormality detection signal to the drive signal output unit; An invalidation signal output unit (7) that outputs an invalidation signal for invalidating the detection of the abnormality to the element abnormality detection unit when a forced ON command for setting an ASC (Active Short Circuit) mode is input from the outside; The control signal becomes a control signal for turning ON the semiconductor element when the forced ON command is input; The drive signal output unit stops outputting a drive signal for turning ON the semiconductor element when the element abnormality detection signal is input; The element abnormality detection unit stops outputting the element abnormality detection signal when the invalidation signal is input, for a drive circuit of a semiconductor element.

2. The drive circuit of a semiconductor element according to Claim 1, further comprising a control signal output unit (6, 6A) that outputs the control signal.

3. The element abnormality detection unit also outputs an element abnormality detection signal to the control signal output unit; The drive circuit of a semiconductor element according to Claim 2, wherein the control signal output unit stops outputting a control signal for turning ON the semiconductor element when the element abnormality detection signal is input.

4. A circuit abnormality detection unit (22) that monitors the operation of peripheral circuits excluding the element abnormality detection unit and outputs a circuit abnormality detection signal to the control signal output unit when an abnormality occurs in the operation; The control signal output unit stops outputting a control signal for turning ON the semiconductor element when the circuit abnormality detection signal is input; The invalidation signal output unit also outputs the invalidation signal to the circuit abnormality detection unit when the forced ON command is input; The drive circuit of a semiconductor element according to Claim 2 or 3, wherein the circuit abnormality detection unit stops outputting the circuit abnormality detection signal when the invalidation signal is input.

5. A control signal output unit (6B) that outputs a control signal for turning the semiconductor element ON / OFF; A drive signal output unit (8B) that outputs a drive signal to the semiconductor element according to the control signal; An element abnormality detection unit (9B) that detects an abnormality related to the driving state of the semiconductor element and outputs an element abnormality detection signal to the control signal output unit and the drive signal output unit; When a forced ON command for setting the ASC (Active Short Circuit) mode is input from the outside, it includes an invalidation signal output unit (7) that outputs an invalidation signal for invalidating the detection of the abnormality to the control signal output unit. When the element abnormality detection signal is input, the drive signal output unit stops outputting a drive signal for turning on the semiconductor element. When the invalidation signal is input, the element abnormality detection unit stops outputting an abnormality detection signal to the drive signal output unit. The control signal output unit When the element abnormality detection signal is input, it stops outputting a control signal for turning on the semiconductor element on the condition that the forced ON command is not input. A drive circuit for a semiconductor element that outputs a control signal for turning on when the element abnormality detection signal is input during the period when the forced ON command is input.

6. The invalidation signal input to the element abnormality detection unit (9NA) is configured to be also input to the control signal output unit (6A) via the element abnormality detection unit. The drive circuit for a semiconductor element according to any one of claims 2 to 5, wherein when the invalidation signal is input while the forced ON command is not input when the control signal output unit is outputting a control signal for turning on the semiconductor element, the control signal output is stopped.

7. A control signal output unit (6) that outputs a control signal for turning on / off a semiconductor element, An element abnormality detection unit (9) that detects an abnormality related to the driving state of the semiconductor element and outputs an element abnormality detection signal to the control signal output unit. When the element abnormality detection signal is input, the control signal output unit stops outputting a control signal for turning on the semiconductor element. A drive circuit for a semiconductor element further including a forced ON signal output unit (34) that outputs a forced ON signal for turning on the semiconductor element regardless of the output state of the control signal by the control signal output unit when a forced ON command for setting the ASC (Active Short Circuit) mode is input from the outside.

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