Signal input / output device
By using a multiplexer with main and dummy input units and a control unit that manages the switching between these units, the signal input/output device effectively reduces potential deviation between the multiplexer output and operational amplifier output, addressing the issue of significant deviations in existing technologies.
Patent Information
- Application Number
- JP2022154762
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-09-28
- Publication Date
- 2025-06-26
- Estimated Expiration
- 2042-09-28
AI Technical Summary
In existing signal input/output devices, the deviation between the output potential of a multiplexer and the potential output from an operational amplifier becomes significant due to charge stored in capacitors, particularly when switching between operational amplifiers.
The signal input/output device incorporates a multiplexer with main and dummy input units connected to operational amplifiers via RC filters. The control unit manages the multiplexer to switch the output connection from a main input unit of one operational amplifier to a dummy input unit of another, and then to the main input unit of the second operational amplifier, thereby minimizing potential deviation.
This configuration reduces the difference between the potential output from the multiplexer and the operational amplifier, ensuring a more stable signal output when switching between operational amplifiers.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to a signal input / output device including a multiplexer.
Background Art
[0002] In the input signal processing device described in Patent Document 1, a multiplexer and a plurality of operational amplifiers are connected. The output of the multiplexer outputs the signal input from any of the plurality of operational amplifiers. Also, an RC filter (low-pass filter) is connected between each operational amplifier and the multiplexer. Further, in the input signal processing device of Patent Document 1, before switching the output of the multiplexer from being connected to a certain operational amplifier to being connected to another operational amplifier, the output of the multiplexer is connected to a chm terminal held at the ground potential, thereby rapidly and forcibly discharging the charge stored in the capacitor on the output side.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] Here, in the input signal processing device of Patent Document 1, the low-pass filter between the operational amplifier and the multiplexer includes a capacitor. And this capacitor is charged by the potential output from the operational amplifier. When the output of the multiplexer is connected to the operational amplifier, due to the influence of the charge stored in this capacitor and the charge stored in the capacitor (pattern capacitance) on the output side, a deviation occurs between the output potential of the multiplexer and the potential output from this operational amplifier. Also, this potential deviation becomes larger when the difference between the potential in the state immediately before the output of the multiplexer is connected to the operational amplifier and the potential output from this operational amplifier is larger.
[0005] On the other hand, in the case of connecting the output of the multiplexer to the chm terminal held at the ground potential as in Patent Document 1 and then connecting it to the operational amplifier, when the potential output from the operational amplifier connected to the output of the multiplexer later is at a high potential, the difference between the potential of the chm terminal (ground potential) and the potential output from this operational amplifier is large. Therefore, in this case, the difference between the potential in the state immediately before the output of the multiplexer is connected to the operational amplifier and the potential output from this operational amplifier also becomes large. As a result, in the case of Patent Document 1, when the operational amplifier is connected to the output of the multiplexer, the deviation between the output potential of the multiplexer and the potential output from this operational amplifier becomes large.
[0006] An object of the present invention is to provide a signal input / output device capable of suppressing as much as possible the deviation between the output potential of the multiplexer and the potential output from this operational amplifier when the output of the multiplexer is connected to the operational amplifier.
Means for Solving the Problem
[0007] The signal input / output device according to the first invention includes a plurality of operational amplifiers, a multiplexer, and a control unit that controls the multiplexer. The multiplexer includes a plurality of main input units individually provided for each of the plurality of operational amplifiers and connected to the corresponding operational amplifier via an RC filter, at least one dummy input unit individually provided for at least one of the plurality of operational amplifiers and connected to the corresponding operational amplifier via an RC filter, and an output unit selectively connected to any one of the plurality of main input units and the at least one dummy input unit. The plurality of operational amplifiers include a first operational amplifier and a second operational amplifier that is different from the first operational amplifier and is connected to the dummy input unit. The control unit controls the multiplexer such that the output unit is switched from a state of being connected to the main input unit corresponding to the first operational amplifier to a state of being connected to the dummy input unit corresponding to the second operational amplifier, and then the output unit is switched to a state of being connected to the main input unit corresponding to the second operational amplifier.
[0008] Here, different from the present invention, consider a case where the multiplexer is controlled such that the output unit is directly switched from a state of being connected to the main input unit corresponding to the first operational amplifier to a state of being connected to the main input unit corresponding to the second operational amplifier. When switching is performed in this way, due to the influence of the charge stored in the capacitor constituting the RC filter connected between the operational amplifier and the corresponding main input unit and the charge stored in the pattern capacitance in the output unit, when the output unit is connected to the main input unit corresponding to the second operational amplifier, the difference between the potential output from the output unit and the potential output from the second operational amplifier may become large.
[0009] On the other hand, if the connection destination of the output unit is switched as in the present invention, the difference between the potential output from the output unit and the potential output from the second operational amplifier can be reduced while the output unit is connected to the main input unit corresponding to the second operational amplifier. In the present invention, the first operational amplifier may be an operational amplifier connected to the dummy input unit or an operational amplifier not connected to the dummy output unit.
[0010] The signal input / output device according to the second invention includes a plurality of operational amplifiers, a multiplexer, the multiplexer, and a control unit that controls the multiplexer. The multiplexer is provided individually for each of the plurality of operational amplifiers and includes a plurality of main input units connected to the corresponding operational amplifier via an RC filter, at least one dummy input unit provided individually for at least one of the plurality of operational amplifiers and connected to the corresponding operational amplifier via an RC filter, and an output unit selectively connected to any one of the plurality of main input units and the at least one dummy input unit. The plurality of operational amplifiers include a third operational amplifier, a fourth operational amplifier different from the third operational amplifier, and a fifth operational amplifier connected to the dummy input unit and different from the third operational amplifier. The difference between the potential output by the fifth operational amplifier and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier. The control unit controls the multiplexer so as to switch the output unit from a state where it is connected to the main input unit corresponding to the third operational amplifier to a state where it is connected to the dummy input unit corresponding to the fifth operational amplifier, and then switch the output unit to a state where it is connected to the main input unit corresponding to the fourth operational amplifier.
[0011] Here, consider a case where, unlike the present invention, the multiplexer is controlled so as to directly switch from a state in which the output unit is connected to the main input unit corresponding to the third operational amplifier to a state in which the output unit is connected to the main input unit corresponding to the fourth operational amplifier. In this case, when the output unit is connected to the main input unit corresponding to the fourth operational amplifier, the difference between the potential output from the output unit and the potential output from the fourth operational amplifier may become large.
[0012] On the other hand, if the connection destination of the output unit is switched as in the present invention, the difference between the potential output from the output unit and the potential output from the fourth operational amplifier can be reduced in a state where the output unit is connected to the main input unit corresponding to the fourth operational amplifier.
[0013] The signal input / output device according to the third invention is the signal input / output circuit according to the second invention, and includes a plurality of operational amplifiers individually connected to each of the plurality of dummy input units. Among the plurality of operational amplifiers connected to the dummy input unit, the potential output by the fifth operational amplifier has the smallest difference from the potential output by the fourth operational amplifier.
[0014] According to the present invention, the difference between the potential output from the output unit and the potential output from the fourth operational amplifier when the output unit is connected to the main input unit corresponding to the fourth operational amplifier can be made particularly small.
Advantages of the Invention
[0015] In the present invention, the difference between the potential output from the output unit and the potential output from this operational amplifier when the output unit of the multiplexer is connected to the main input unit corresponding to the operational amplifier can be reduced.
Brief Description of the Drawings
[0016]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Embodiments for Carrying Out the Invention
[0017] [First Embodiment] A preferred first embodiment of the present invention will be described with reference to FIG. 1.
[0018] <Configuration of Signal Input / Output Device> The signal input / output device 1 of the first embodiment includes a multiplexer 11, four operational amplifiers 12, a buffer amplifier 13, and a control unit 14.
[0019] The multiplexer 11 has four main input sections 21, four dummy input sections 22, and an output section 23.
[0020] The four main input sections 21 are individual for the four operational amplifiers 12. Each main input section 21 is connected to the corresponding operational amplifier 12 via an RC filter 31. The four dummy input sections 22 are individual for the four operational amplifiers 12. Each dummy input section 22 is connected to the corresponding operational amplifier 12 via an RC filter 32. The RC filters 31 and 32 each have a resistor 33 and a capacitor 34, and suppress noise (high-frequency components) input to the corresponding main input section 21 or dummy input section 22.
[0021] Here, when the distance D between the operational amplifier 12 and the corresponding main input section 21 and dummy input section 22 is long (for example, 10 cm or more), noise easily enters the main input section 21 and dummy input section 22 via the wiring connecting the operational amplifier 12 and the corresponding main input section 21 and dummy input section 22. Therefore, in the first embodiment, as described above, an RC filter 31 is connected between the operational amplifier 12 and the corresponding main input section 21 to suppress the noise input to the main input section 21. Also, an RC filter 32 is connected between the operational amplifier 12 and the corresponding dummy input section 22 to suppress the noise input to the dummy input section 22.
[0022] Note that here, it is described assuming that the distance between each operational amplifier 12 and the corresponding main input section 21, and the distance between each operational amplifier 12 and the corresponding dummy input section 22 are the same, but the distance between each operational amplifier 12 and the corresponding main input section 21 and the distance between each operational amplifier 12 and the corresponding dummy input section 22 may be different.
[0023] The output unit 23 is connected to the buffer amplifier 13. The output unit 23 can be selectively connected to either the four main input units 21 or the four dummy input units 22. The buffer amplifier 13 is for transmitting the potential output from the output unit 23 to an A / D conversion circuit (not shown) or the like.
[0024] Also, the resistor 19 in FIG. 1 is a resistor between the output unit 23 and the ground, and has a function of preventing the output unit 23 from being connected to neither of the input units 21 and 22 and the input of the buffer amplifier 13 (operational amplifier) from reaching an open state (as a result, the output voltage of the operational amplifier becomes indeterminate). When the output unit 23 is not connected to either of the input units 21 and 22 due to the resistor 19, the output voltage of the operational amplifier becomes 0V. Also, the capacitor 18 in FIG. 1 illustrates the pattern capacitance (parasitic capacitance) between the output unit 23 and the ground, and its capacitance is sufficiently smaller compared to the capacitor 34. For example, the capacitance of the capacitor 18 is about 1 / 1000 of the capacitance of the capacitor 34.
[0025] The control unit 14 outputs a switching signal S to the multiplexer 11 to selectively connect the output unit 23 to either the four main input units 21 or the four dummy input units 22 in the multiplexer 11.
[0026] In the signal input / output device 1, the four operational amplifiers 12 output the potentials of V_1, V_2, V_3, and V_4 in order from the one located on the upper side in FIG. 1. Also, in the multiplexer 11, the output unit 23 is selectively connected to either the four main input units 21 or the four dummy input units 22. Thereby, a potential corresponding to the potential output from the operational amplifier 12 connected to the output unit 23 is output from the output unit 23.
[0027] <Switching of connections in the multiplexer> Next, the switching of connections in the multiplexer 11 will be described with reference to FIGS. 2(a) to 2(c).
[0028] Here, in FIGS. 2(a) to 2(c), the main input parts 21 indicated by INm_M and INm_M+1 are any one of the four main input parts 21 indicated by INm_1 to INm_4 in FIG. 1. More specifically, when INm_M is INm_1, INm_M+1 is INm_2. When INm_M is INm_2, INm_M+1 is INm_3. When INm_M is INm_3, INm_M+1 is INm_4. When INm_M is INm_4, INm_M+1 is INm_1.
[0029] Also, in FIGS. 2(a) to 2(c), the dummy input parts 22 indicated by INd_M and INd_M+1 are any one of the four dummy input parts 22 indicated by INd_1 to INd_4 in FIG. 1. More specifically, when INd_M is INd_1, INd_M+1 is INd_2. When INd_M is INd_2, INd_M+1 is INd_3. When INd_M is INd_3, INd_M+1 is INd_4. When INd_M is INd_4, INd_M+1 is INd_1.
[0030] In the first embodiment, by outputting the switching signal S from the control unit 14 to the multiplexer 11, at a certain timing, in the multiplexer 11, as shown in FIG. 2(a), the output unit 23 is connected to the main input part 21 (INm_M) corresponding to any one of the four operational amplifiers 12, i.e., the first operational amplifier 12a. In this state, a potential corresponding to the potential V_M output from the first operational amplifier 12a is output from the output unit 23. Here, when INm_M is INm_1, V_M is V_1. When INm_M is INm_2, V_M is V_2. When INm_M is INm_3, V_M is V_3. When INm_M is INm_4, V_M is V_4.
[0031] From this state, the control unit 14 outputs a switching signal to the multiplexer 11 so as to switch to a state where the output unit 23 is connected to the dummy input part 22 (INd_M+1) corresponding to the second operational amplifier 12b different from the first operational amplifier 12a, as shown in FIG. 2(b).
[0032] After that, as shown in Fig. 2(c), the control unit 14 outputs a switching signal to the multiplexer 11 so as to switch to a state where the output unit 23 is connected to the main input unit 21 (INm_M + 1) corresponding to the second operational amplifier 12b. In this state, a potential corresponding to the potential V_M+1 output from the second operational amplifier 12b is output from the output unit 23. Here, when INm_M + 1 is INm_1, V_M+1 is V_1. When INm_M + 1 is INm_2, V_M+1 is V_2. When INm_M + 1 is INm_3, V_M+1 is V_3. When INm_M + 1 is INm_4, V_M+1 is V_4.
[0033] Here, the potential output from the output unit 23 when the input units 21 and 22 connected to the output unit 23 in the multiplexer 11 are switched will be described. Let the potential output from the output unit 23 in a state where the output unit 23 is connected to any of the input units 21 and 22 in the multiplexer 11 be V O1 Then, the electrostatic energy Q1 of the capacitor 18 in this state can be expressed as follows using the capacitance C of the capacitor 18 B as follows.
Equation
[0034] From this state, when the output unit 23 is switched to a state connected to another input unit 21 or 22, let the potential output from the operational amplifier 12 corresponding to the input units 21 and 22 after the switching be V IN Then, the electrostatic energy Q2 of the capacitor 34 corresponding to the input units 21 and 22 after the switching can be expressed by the following equation using the capacitance C of the capacitor 34 A as follows.
Equation
[0035] Therefore, after the above switching, let the potential output from the output unit 23 be V O2Then, the following relationship holds.
Number
[0036] From this relationship, V O2 is expressed by the following formula.
Number
[0037] As described above, since C B is sufficiently small with respect to C A from the above formula (4), V O2 is a potential close to V IN but it can be seen that it becomes a potential deviated from V IN Also, it can be seen that the difference between V O1 2 -V IN 2 becomes larger as (V O2 and V IN That is, it can be seen that the difference between V O1 and V IN becomes larger as the difference between V O2 and V IN becomes larger.
[0038] On the other hand, consider a configuration (Comparative Example 1) in which the multiplexer 11 does not have the dummy input section 22 as shown in FIGS. 3(a) and 3(b). And in this configuration, consider the case of switching from the state where the output section 23 is connected to the main input section 21(IN_M) corresponding to the first operational amplifier 12a as shown in FIG. 3(a) to the state where the output section 23 is connected to the main input section 21(IN_M + 1) corresponding to the second operational amplifier 12b as shown in FIG. 4(b). In this case, V O1 in the above formula (4) when switched to the state of FIG. 3(b) is a potential close to the potential V_M output from the first operational amplifier 12a. Therefore, when the difference between the potential V_M output from the first operational amplifier 12a and the potential V_M+1 output from the second operational amplifier 12b is large, V O1(Potential close to V_M) and V IN The difference from (V_M + 1) becomes large. As a result, the potential V output from the output unit 23 O2 and the potential V output from the second operational amplifier 12b IN The difference from becomes large.
[0039] Also, as shown in FIG. 3(c), the multiplexer 11 is held at the ground potential and has a ground terminal 40 connectable to the output unit 23. Consider the case of switching from the state of FIG. 3(a) to the state where the output unit 23 is connected to the ground terminal 40 as shown in FIG. 3(c) and then switching to the state of FIG. 3(b) (corresponding to the prior art described in Comparative Example 2 and Patent Document 1). In this case, in the formula (4) when switching to the state of FIG. 3(b), V O1 becomes 0V. Therefore, when V IN (V_M + 1) is at a high potential, the difference between V O1 (0V) and V IN (V_M + 1) becomes large. As a result, the potential V output from the output unit 23 O2 and the potential V output from the second operational amplifier 12b IN The difference from becomes large.
[0040] On the other hand, according to the signal input / output device 1 according to the first embodiment of the present invention, in the state of FIG. 2(b), the potential output from the output unit 23 may have a large difference from V_M + 1, but since it is originally connected to the dummy input unit 22, it is not necessary to use the output signal (the potential output from the output unit 23) when the dummy input unit 22 is connected. Then, after that, when switched to the state of FIG. 2(c), in the formula (4) above, V O1 becomes a potential close to V_M + 1, and V IN is V_M + 1, so that the difference between V O1 (Potential close to V_M + 1) and V IN (V_M + 1) becomes small. As a result, the potential V output from the output unit 23 O2 and the potential V output from the second operational amplifier 12b IN The difference from can be made small.
[0041] <Effect> According to the first embodiment described above, from the state where the output unit 23 is connected to the main input unit 21 corresponding to the first operational amplifier 12a, the output unit 23 is switched to the state of being connected to the dummy input unit 22 corresponding to the second operational amplifier 12b, and then, the output unit 23 is switched to the state of being connected to the main input unit 21 corresponding to the second operational amplifier 12b. Thereby, as described above, the difference between the potential output from the output unit 23 in the state where the output unit 23 is connected to the main input unit 21 and the potential output from the corresponding operational amplifier 12 can be reduced. Therefore, if the potential output from the output unit 23 (buffer amplifier 13) is acquired at the timing when the output unit 23 is connected to the main input unit 21, the acquired potential can have a small difference from the potential output from the connected operational amplifier 12.
[0042] [Second Embodiment] Next, a preferred second embodiment of the present invention will be described with reference to FIG. 4. As shown in FIG. 4, the signal input / output device 100 of the second embodiment has four operational amplifiers 12, similar to the first embodiment, whereas the multiplexer 111 has four main input units 21 and three dummy input units 22. And, similar to the first embodiment, all four operational amplifiers 12 are connected to the corresponding main input units 21. On the other hand, different from the first embodiment, among the four operational amplifiers 12, the upper three operational amplifiers 12 in the figure are connected to the corresponding dummy input units 22, but the lowermost operational amplifier 12 in the figure is not connected to the dummy input unit 22.
[0043] Also, in the second embodiment, the difference between V_2 and V_4, and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4. Also, the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4.
[0044] In the second embodiment, as shown in FIG. 5(a), the control unit 14 switches the output unit 23 from the state where it is connected to the main input unit 21 (INm_3) corresponding to the third operational amplifier 12 (the “third operational amplifier” of the present invention) from the top in the figure of FIG. 4 to the state where the output unit 23 is connected to the dummy input unit 22 (INd_2) corresponding to the second operational amplifier 12 (the “fifth operational amplifier” of the present invention) from the top in the figure of FIG. 4 as shown in FIG. 5(b). Then, thereafter, as shown in FIG. 5(c), the output unit 23 is switched to the state where it is connected to the main input unit 21 (INm_4) corresponding to the lowermost operational amplifier 12 (the “fourth operational amplifier” of the present invention) in the figure of FIG. 4. The switching procedure of the connection of the other main input units 21 and dummy input units 22 is the same as that described in the first embodiment.
[0045] In this way, when switching from the state of FIG. 5(a) to the state of FIG. 5(b) and then to the state of FIG. 5(c), the potential output from the output unit 23 in the state of FIG. 5(b) becomes a potential close to V_2. Therefore, thereafter, when switching to the state of FIG. 5(c), V in the above formula (4) O1 becomes close to V_2. On the other hand, different from this embodiment (the second embodiment), when directly switching from the state of FIG. 5(a) to the state of FIG. 5(c), V in the above formula (4) when switching to the state of FIG. 5(c) O1 becomes close to V_3. Also, as described above, the difference between the potential V_2 and the potential V_4 is smaller than the difference between the potential V_3 and the potential V_4.
[0046] From the above, when switching from the state of FIG. 5(a) to the state of FIG. 5(b) and then to the state of FIG. 5(c) as in the second embodiment, compared to the case of directly switching from the state of FIG. 5(a) to the state of FIG. 5(c), V in the above formula (4) when switching to the state of FIG. 5(c) O1 can be made a potential closer to V_4. Thereby, the difference between the potential output from the output unit 23 in the state of FIG. 5(c) and the potential output from the operational amplifier 12 connected to the output unit 23 can be reduced.
[0047] <Effect> In the second embodiment, when a plurality of operational amplifiers 12 constituting the signal input / output device include an operational amplifier 12 not connected to the dummy input unit 22, the output unit switches to a state connected to the main input unit 21 of the operational amplifier 12 by the above-described procedure. As a result, when the output unit 23 switches to a state connected to the main input unit 21 corresponding to the operational amplifier 12 not connected to the dummy input unit 22, the difference between the potential output from the output unit 23 and the potential output from the operational amplifier 12 can be reduced.
[0048] Also, in the second embodiment, the difference between V_2 and V_4 and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4, and the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4. In such a case, in the second embodiment, the state is switched from the state of FIG. 5(a) to the state of FIG. 5(b), and then to the state of FIG. 5(c). That is, in the second embodiment, among the plurality of operational amplifiers 12 connected to the dummy input unit 22, the difference between the potential output by the fifth operational amplifier and the potential V_4 output by the fourth operational amplifier is the smallest. Thereby, the difference between the potential output from the output unit 23 and the potential V_4 output from the fourth operational amplifier 12 when switching to the state of FIG. 5(c) can be made particularly small.
[0049] In the second embodiment, the third operational amplifier from the top in FIG. 4 is the third operational amplifier, the fourth operational amplifier from the top in FIG. 4 is the fourth operational amplifier, and the fourth operational amplifier from the top in FIG. 4 is the fifth operational amplifier. However, the operational amplifiers 12 that become the third to fifth operational amplifiers may be different from this.
[0050] [Third Embodiment] Next, a preferred third embodiment of the present invention will be described with reference to FIG. 6. In the signal input / output device 200 of the third embodiment, the multiplexer 211 is composed of two ICs 201 and 202.
[0051] IC201 and 202 each have two main input parts 221, two dummy input parts 222, and an output part 223. The two main input parts 221 of IC201 are the same as the upper two main input parts 21 among the four main input parts 21 in FIG. 1. The two main input parts 221 of IC202 are the same as the lower two main input parts 21 among the four main input parts 21 in FIG. 1. The two dummy input parts 222 of IC201 are the same as the upper two dummy input parts 22 among the four dummy input parts 22 in FIG. 1. The two dummy input parts 222 of IC202 are the same as the lower two dummy input parts 22 among the four dummy input parts 22 in FIG. 1.
[0052] The output part 223 of IC201 is connected to the buffer amplifier 13 and is selectively connected to either of the two main input parts 221 and the two dummy input parts 222 of IC201. The output part 223 of IC202 is connected to the buffer amplifier 13 and is selectively connected to either of the two main input parts 221 and the two dummy input parts 222 of IC202.
[0053] Also, in the third embodiment, the control unit 14 transmits a switching signal S to IC201 and 202. The switching signal S is a signal that instructs IC201 and 202 which of the two main input parts 221 and the two dummy input parts 222 to connect the output part 223 to.
[0054] Also, in the third embodiment, the control unit 14 transmits an enable signal ENB1 to the IC 201. The enable signal ENB1 is a signal that switches whether or not to permit the output unit 223 in the IC 201 to be selectively connected to either two main input units 221 or two dummy input units 222 based on the switching signal S. When the enable signal ENB1 is at a high level (H), in the IC 201, based on the switching signal S, the output unit 223 is selectively connected to either two main input units 221 or two dummy input units 222. When the enable signal ENB1 is at a low level (L), in the IC 201, regardless of the switching signal S, the output unit 223 is not connected to either two main input units 221 or two dummy input units 222.
[0055] Also, in the third embodiment, the control unit 14 transmits an enable signal ENB2 to the IC 202. The enable signal ENB2 is a signal that switches whether or not to permit the output unit 223 in the IC 202 to be selectively connected to either two main input units 221 or two dummy input units 222 based on the switching signal S. When the value of the enable signal ENB2 is at a high level (H), in the IC 202, based on the switching signal S, the output unit 223 is selectively connected to either one of two main input units 221 or two dummy input units 222. When the enable signal ENB2 is at a low level (L), in the IC 202, regardless of the switching signal S, the output unit 223 is not connected to either two main input units 221 or two dummy input units 222.
[0056] Next, with reference to FIG. 7, the switching of the connection in the multiplexer 211 by the switching signal S and the enable signals ENB1 and ENB2 in the third embodiment will be described.
[0057] INd_1, INm_1, INd_2, and INm_2 in FIG. 7 indicate whether the switching signal S instructs the output units 223 of IC201 and 202 to be connected to either the two main input units 221 or the two dummy input units 222. At each moment, one of INd_1, INm_1, INd_2, and INm_2 becomes high level (H), and the remaining three become low level (L).
[0058] More specifically, when the switching signal S instructs the output unit 223 in IC201 and 202 to be connected to the upper dummy input unit (INd_1) of the two dummy input units 222 in FIG. 6, INd_1 becomes high level and INm_1, INd_2, and INm_2 become low level in FIG. 7. When the switching signal S instructs the output unit 223 in IC201 and 202 to be connected to the lower main input unit (INm_1) of the two main input units 221 in FIG. 6, INm_1 becomes high level and INd_1, INd_2, and INm_2 become low level in FIG. 7. When the switching signal S instructs the output unit 223 in IC201 and 202 to be connected to the lower dummy input unit (INd_2) of the two dummy input units 222 in FIG. 6, INd_2 becomes high level and INd_1, INm_1, and INm_2 become low level in FIG. 7. When the switching signal S instructs the output unit 223 in IC201 and 202 to be connected to the lower main input unit (INm_2) of the two main input units 221 in FIG. 6, INm_2 becomes high level and INd_1, INm_1, and INd_2 become low level in FIG. 7.
[0059] ENB1 and ENB2 in FIG. 7 respectively indicate the changes in the enable signals ENB1 and ENB2.
[0060] The time variations of each signal in FIG. 7 will be described. For example, at time T0, INm_1 is at a high level, INd_1, INd_2, and INm_2 are at a low level, ENB1 is at a high level, and ENB2 is at a low level. As a result, in IC201, the output unit 223 is connected to the upper main input unit (Nm_1) in FIG. 6, and in IC202, the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222.
[0061] After that, this state continues until time T1, and at time T1, INm_1 switches to a low level and INd_2 switches to a high level. As a result, in IC201, the output unit 223 switches to a state where it is connected to the lower dummy input unit 222 (INd_2) in FIG. 6. In IC202, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0062] After that, this state continues until time T2, and at time T2, INd_2 switches to a low level and INm_2 switches to a high level. As a result, in IC201, the output unit 223 switches to a state where it is connected to the lower main input unit 221 (INm_2) in FIG. 6. In IC202, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0063] After that, this state continues until time T3, and at time T3, ENB1 switches to a low level. Also, immediately after that, at time T4, INm_2 switches to a low level and INd_1 switches to a high level. Also, immediately after that, at time T5, ENB2 switches to a high level. Here, the lengths of the periods from time T3 to time T4 and from time T4 to time T5 are each, for example, about 100 μs.
[0064] As a result, during the period from time T3 to T5, in ICs 201 and 202, the output unit 223 continues to be in a state where it is not connected to any of the two main input units 221 and the two dummy input units 222. At time T5, in IC202, the output unit 223 switches to a state where it is connected to the upper dummy input unit 222 (INd_1) shown in FIG. 6. In IC201, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0065] After that, this state continues until time T6. At time T6, INd_1 switches to the low level and INm_1 switches to the high level. As a result, in IC202, the output unit 223 switches to a state where it is connected to the upper main input unit 221 (INm_1) shown in FIG. 6. In IC201, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0066] After that, this state continues until time T7. At time T7, INm_1 switches to the low level and INd_2 switches to the high level. As a result, in IC202, the output unit 223 switches to a state where it is connected to the lower dummy input unit 222 (INd_2) shown in FIG. 6. In IC201, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0067] After that, this state continues until time T8. At time T8, INd_2 switches to the low level and INm_2 switches to the high level. As a result, in IC202, the output unit 223 switches to a state where it is connected to the lower main input unit 221 (INm_2) shown in FIG. 6. In IC201, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues.
[0068] This state continues until the subsequent time T9, at which time ENB2 switches to the low level. Immediately after that, at time T10, INm_2 switches to the low level and INd_1 switches to the high level. Immediately after that, at time T11, ENB1 switches to the high level. Here, the length of the period from time T9 to time T10 and the length of the period from time T10 to time T11 are each, for example, about 100 μs.
[0069] As a result, during the period from time T9 to T11, in IC201 and 202, the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222. At time T11, in IC201, the output unit 223 is connected to the upper dummy input unit 222 (INd_1) in FIG. 6, and in IC202, the output unit 223 switches to a state where it is not connected to any of the two main input units 221 and the two dummy input units 222.
[0070] This state continues until the subsequent time T12, at which time INd_1 switches to the low level and INm_1 switches to the high level. As a result, in IC201, the output unit 223 switches to a state where it is connected to the upper main input unit 221 (INm_1) in FIG. 6. In IC202, the state where the output unit 223 is not connected to any of the two main input units 221 and the two dummy input units 222 continues. This state is the same as the state at time T0, and thereafter, the connection destination of the output unit 23 in IC201 and 202 repeatedly switches in the same manner as described above.
[0071] <Effect> In the third embodiment, in the multiplexer 211, the output unit 223 is switched from the state of being connected to the main input unit 221 corresponding to the operational amplifier 12 to the state of being connected to the dummy input unit 222 corresponding to another operational amplifier 12. Then, afterwards, the output unit 223 is switched to the state of being connected to the main input unit 221 corresponding to the other operational amplifier 12. Thereby, similar to what was described in the first embodiment, when the output unit 223 is connected to the main input unit 221, the difference between the potential output from the output unit 23 and the potential output from the connected operational amplifier 12 can be reduced.
[0072] Here, different from this embodiment (the third embodiment), consider the case where at time T4, ENB1 is switched to the low level and ENB2 is controlled to be switched to the high level. Even if ENB1 and ENB2 are controlled to be switched at the same timing in this way, there may be a slight deviation between the timing when ENB1 is actually switched to the low level and the timing when ENB2 is switched to the high level. And due to this deviation, both ENB1 and ENB2 temporarily become high level, and through the output unit 223 of IC201 and the output unit 223 of IC202, the dummy input unit 222 of IC201 and the dummy input unit 222 of IC202 are short-circuited. Similarly, different from the third embodiment, when at time T10, ENB1 is switched to the high level and ENB2 is controlled to be switched to the low level, through the output unit 223 of IC201 and the output unit 223 of IC202, the main input unit 221 of IC201 and the main input unit 221 of IC202 are short-circuited.
[0073] Therefore, in the third embodiment, it is controlled such that ENB1 switches to the low level at time T3, then INm_2 switches to the low level at subsequent time T4, INd_1 switches to the high level, and then ENB2 switches to the high level at subsequent time T5. Also, it is controlled such that ENB2 switches to the low level at time T9, then INm_2 switches to the low level at subsequent time T10, INd_1 switches to the high level, and then ENB2 switches to the high level at subsequent time T11. Thereby, ENB1 and ENB2 do not become high level simultaneously, and in the multiplexer 11, it is possible to prevent the main input portions 221 from shorting with each other or the dummy input portions 222 from shorting with each other.
[0074] [Modification Example] As described above, the preferred first to third embodiments of the present invention have been described. However, the present invention is not limited to the above-described first to third embodiments, and various modifications are possible as long as they are within the scope described in the claims.
[0075] In the first embodiment, the signal input / output device 1 has four operational amplifiers 12, and correspondingly, the multiplexer 11 has four main input portions 21 and four dummy input portions 22. However, the present invention is not limited to this. In the first embodiment, the signal input / output device 1 may have two, three, or five or more operational amplifiers 12, and correspondingly, the multiplexer 11 may have the same number of main input portions 21 and dummy input portions 22 as the operational amplifiers 12.
[0076] In the second embodiment, the difference between V_2 and V_4 and the difference between V_1 and V_4 are smaller than the difference between V_3 and V_4, and the difference between V_2 and V_4 is smaller than the difference between V_1 and V_4. However, from the state of FIG. 5(a), the state is switched to the state of FIG. 5(b), and then switched to the state of FIG. 5(c), but it is not limited to this. In such a case, from the state of FIG. 5(a), the output unit 23 may be switched to the state of being connected to the uppermost dummy input unit 22 in FIG. 4, and then switched to the state of FIG. 5(c). In this case, the uppermost operational amplifier 12 in FIG. 4 corresponds to the "fifth operational amplifier" of the present invention. That is, when there are a plurality of operational amplifiers 12 that are connected to the dummy input unit 22 and the difference between the output potential and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, the fifth operational amplifier may be an operational amplifier 12 other than the operational amplifier 12 having the smallest difference from the potential output by the fourth operational amplifier among these plurality of operational amplifiers 12.
[0077] Also, when there is only one operational amplifier 12 that is connected to the dummy input unit 22 and the difference between the output potential and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, the fifth operational amplifier may be this operational amplifier 12.
[0078] In the second embodiment, the signal input / output device 100 has four operational amplifiers 12, and the multiplexer 111 has four main input units 21 individual to the four operational amplifiers 12 and three dummy input units 22 individual to three of the four operational amplifiers 12, but it is not limited to this. In the second embodiment, the signal input / output device 100 may have three or five or more operational amplifiers 12, and the multiplexer 111 may have the same number of main input units 21 as the operational amplifiers 12. Also, when the signal input / output device 100 has four or more operational amplifiers 12, two or more of the partial operational amplifiers 12 may not be connected to the dummy input unit 22.
[0079] Also, in the third embodiment, the multiplexer 211 was constituted by two ICs 201 and 202, but this is not restrictive. The multiplexer 211 may be constituted by three or more ICs.
Explanation of Signs
[0080] 1: Signal input / output device 11: Multiplexer 12: Operational amplifier 12a: First operational amplifier 12b: Second operational amplifier 14: Control unit 21: Main input section 22: Dummy input section 32: RC filter 100: Signal input / output device 111: Multiplexer 200: Signal input / output device 201, 202: IC
Claims
1. A plurality of operational amplifiers, a multiplexer, and a control unit for controlling the multiplexer, wherein the multiplexer has a plurality of main input parts provided individually for each of the plurality of operational amplifiers and connected to the corresponding operational amplifier via an RC filter, at least one dummy input part provided individually for at least one of the plurality of operational amplifiers and connected to the corresponding operational amplifier via an RC filter, and an output part selectively connected to any one of the plurality of main input parts and the at least one dummy input part, wherein the plurality of operational amplifiers include a first operational amplifier, and a second operational amplifier different from the first operational amplifier and connected to the dummy input part, and the control unit controls the multiplexer such that the output part is switched from a state of being connected to the main input part corresponding to the first operational amplifier to a state of being connected to the dummy input part corresponding to the second operational amplifier, and then the output part is switched to a state of being connected to the main input part corresponding to the second operational amplifier. A signal input / output device characterized by this.
2. A plurality of operational amplifiers, a multiplexer, and a control unit for controlling the multiplexer, wherein the multiplexer has a plurality of main input parts provided individually for each of the plurality of operational amplifiers and connected to the corresponding operational amplifier via a filter, at least one dummy input part provided individually for at least one of the plurality of operational amplifiers and connected to the corresponding operational amplifier via a filter, and an output part selectively connected to any one of the plurality of main input parts and the at least one dummy input part, wherein the plurality of operational amplifiers include a third operational amplifier, a fourth operational amplifier different from the third operational amplifier, and a fifth operational amplifier different from the third operational amplifier and connected to the dummy input part, wherein the difference between the potential output by the fifth operational amplifier and the potential output by the fourth operational amplifier is smaller than the difference between the potential output by the third operational amplifier and the potential output by the fourth operational amplifier, and the control unit A signal input / output device, characterized in that the multiplexer is controlled such that, after switching from a state where the output unit is connected to the main input unit corresponding to the third operational amplifier to a state where the output unit is connected to the dummy input unit corresponding to the fifth operational amplifier, the output unit is then switched to a state where it is connected to the main input unit corresponding to the fourth operational amplifier. **Claim 3** comprising a plurality of operational amplifiers individually connected to each of the plurality of dummy input units; The signal input / output device according to claim 2, characterized in that, among the plurality of operational amplifiers connected to the dummy input unit, the potential output by the fifth operational amplifier has the smallest difference from the potential output by the fourth operational amplifier.
Citation Information
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