Photoelectric conversion device, method for manufacturing the same, and equipment

Abstract

To improve the bondability of two substrates included in a photoelectric conversion device.SOLUTION: A photoelectric conversion device has a first substrate having a first semiconductor layer on which light receiving element are formed, and a second substrate having a second semiconductor layer on which a circuit element for processing signals generated from the light receiving elements is formed, which are bonded to each other, and the photoelectric conversion device has: an electrode pad for external connection; an opening extending to the electrode pad; and a conductive pattern between the first semiconductor layer and the second semiconductor layer. The conductive pattern includes a plurality of wiring members used for the drive of the photoelectric conversion device, and a plurality of dummy members not used for the drive of the photoelectric conversion device. The plurality of dummy members include a dummy member outside the opening in a plan view with respect to the boundary between the first substrate and the second substrate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device, a method for manufacturing the same, and equipment.

Background Art

[0002] A technique for forming a semiconductor device by bonding two semiconductor substrates together and electrically connecting them is known. Patent Document 1 describes forming a photoelectric conversion device by bonding a pixel substrate on which a light receiving element is formed and a circuit substrate on which a signal processing circuit is formed. Patent Document 2 describes a method of providing dummy wiring to improve the flatness of a wiring layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] When forming a photoelectric conversion device by bonding two substrates, if the flatness of the bonding surface is low, there is a concern that the bonding property between the two substrates may deteriorate. Also, if the bonding property of the scribe region to be cut during dicing is low, there is a concern that the bonding surface may peel off due to the stress during dicing. Therefore, high bonding property is required not only for the region where the circuit is arranged but also for the entire region including the region where the circuit is not arranged. One aspect of the present invention aims to provide a technique for improving the bonding property between two substrates included in a photoelectric conversion device.

Means for Solving the Problems

[0005] In view of the above problems, a photoelectric conversion device in which a first substrate having a first semiconductor layer on which a light receiving element is formed and a second substrate having a second semiconductor layer on which a circuit element for processing a signal generated by the light receiving element is formed are joined, the photoelectric conversion device having an electrode pad for external connection and an opening extending to the electrode pad, the first substrate having a plurality of conductive patterns between a boundary between the first substrate and the second substrate and the first semiconductor layer, the plurality of conductive patterns including a first conductive pattern and a second conductive pattern that is farther from the boundary than the first conductive pattern, each of the plurality of conductive patterns including a plurality of wiring members used for driving the photoelectric conversion device and a plurality of dummy members that are disposed in a region other than a region where the plurality of wiring members are disposed and are not used for driving the photoelectric conversion device, and in each of the plurality of conductive patterns, the plurality of dummy members including a dummy member that is outside the opening in a plan view with respect to the boundary Look, the plurality of dummy members of the second conductive pattern includes dummy members to which vias are not connected. A photoelectric conversion device characterized by the above is provided.

Effect of the Invention

[0006] By the above means, the joinability of two substrates included in the photoelectric conversion device is improved.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the invention according to the claims. Although a plurality of features are described in the embodiments, not all of these plurality of features are essential to the invention, and the plurality of features may be arbitrarily combined. Further, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant descriptions are omitted.

[0009] <First Embodiment> With reference to FIG. 1, a structural example of a photoelectric conversion device 100 according to the first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view focusing on a portion near the side surface 109 of the photoelectric conversion device 100. The photoelectric conversion device 100 is composed of a pixel substrate 101 and a circuit substrate 102. The pixel substrate 101 and the circuit substrate 102 are overlapped with each other and joined at a boundary 103 between the pixel substrate 101 and the circuit substrate 102. "Joining" means maintaining a state in which the pixel substrate 101 and the circuit substrate 102 are overlapped with each other, and may be expressed as "bonding" depending on the specific method.

[0010] Hereinafter, an embodiment in which the photoelectric conversion device 100 is used for imaging will be mainly described. In this case, the photoelectric conversion device 100 can be used as an image sensor for generating an image. Further, as other examples of the photoelectric conversion device 100, there are a distance measuring element (a sensor used for focus detection or distance measurement using TOF (Time Of Flight)), a photometric element (a sensor used for measuring the incident light amount), a LiDAR (Light Detection and Ranging) sensor, and the like. The embodiments described below can be generally applied to photoelectric conversion devices.

[0011] In a plan view with respect to the boundary 103, the photoelectric conversion device 100 includes a light-receiving region 104, a peripheral region 105, an opening region 106, and an outer peripheral region 107. The light-receiving region 104 is a region in which a plurality of light-receiving elements 108 are arranged. In FIG. 1, an example in which the light-receiving element 108 is a SPAD (Single Photon Avalanche Diode) sensor is described. Instead of this, the light-receiving element 108 may be another structure, for example, a CMOS (Complementary Metal Oxide Semiconductor) sensor. The opening region 106 is a region in which an opening 110 extending to an electrode pad 111 for external connection is formed. The peripheral region 105 is a region between the light-receiving region 104 and the opening region 106. The outer peripheral region 107 is a region outside the opening region 106. The outer peripheral region 107 has a side surface 109 of the photoelectric conversion device 100. The peripheral region 105 and the outer peripheral region 107 may not include circuit elements used for driving the photoelectric conversion device 100.

[0012] The pixel substrate 101 has an optical layer 120, a semiconductor layer 130, a wiring layer 140, and a bonding layer 150. A bonding surface 101A of the pixel substrate 101 is bonded to the circuit substrate 102. Hereinafter, the configuration of each layer of the pixel substrate 101 will be specifically described.

[0013] The semiconductor layer 130 includes a semiconductor substrate 131 on which a plurality of light receiving elements 108 are formed. The semiconductor substrate 131 is made of, for example, silicon. Impurity regions 132 and 133 are formed in the semiconductor substrate 131. The impurity region 132 functions as the anode of the SPAD sensor. The impurity region 133 functions as the cathode of the SPAD sensor. In this way, the light receiving element 108 is constituted by the impurity regions 132 and 133. When the SPAD sensor is driven, a voltage with a large difference from the ground potential (for example, a voltage of about -30V) is applied to the impurity region 132 (anode). On the other hand, a voltage of about 1V is applied to the impurity region 133 (cathode). The voltages applied to these impurity regions are not limited to these values, and any value that enables avalanche multiplication in the light receiving element 108 may be used. For example, a voltage of 0V may be applied to the anode and a voltage of 30V may be applied to the cathode.

[0014] When a reverse bias voltage is applied, there are a Geiger mode in which the potential difference between the anode and the cathode is operated in a state where it is larger than the breakdown voltage, and a linear mode in which the potential difference between the anode and the cathode is operated in a state near or below the breakdown voltage. An APD operated in the Geiger mode is called a SPAD. The APD requires a larger voltage than a photodiode that does not perform avalanche multiplication. The light receiving element 108 of the present embodiment may operate in the linear mode or the Geiger mode. The SPAD is advantageous in that the potential difference becomes larger than that of the linear mode APD and the effect of breakdown voltage resistance becomes remarkable.

[0015] The wiring layer 140 is composed of an interlayer insulating film 141, a plurality of conductive patterns 142 to 144 embedded in the interlayer insulating film 141, and a plurality of vias 147. Each of the plurality of vias 147 connects different conductive patterns to each other or connects a conductive pattern and an impurity region to each other. In the example of FIG. 1, three layers of conductive patterns 142 to 144 are shown, but the number of layers of the conductive patterns is not limited to this. Among the three layers of conductive patterns 142 to 144, the conductive pattern 144 is the closest to the boundary 103, the conductive pattern 143 is the next closest to the boundary 103, and the conductive pattern 142 is the next closest (i.e., the farthest) from the boundary 103. In other words, the conductive pattern 143 is farther from the boundary 103 than the conductive pattern 144, and the conductive pattern 142 is farther from the boundary 103 than the conductive pattern 143. The conductive patterns 142 to 144 may be made of aluminum.

[0016] Each of the conductive patterns 142 to 144 includes a plurality of conductive members used for driving the photoelectric conversion device 100 and a plurality of conductive members not used for driving the photoelectric conversion device 100. "Used for driving the photoelectric conversion device 100" may mean used for signal transmission or power supply in the driving of the photoelectric conversion device 100. "Not used for driving the photoelectric conversion device 100" may mean not used for either signal transmission or power supply in the driving of the photoelectric conversion device 100.

[0017] Hereinafter, the conductive member used for driving the photoelectric conversion device 100 is represented as a wiring member 146, and the conductive member not used for driving the photoelectric conversion device 100 is represented as a dummy member 145. In the following description, the wiring member 146 is a general term for a plurality of wiring members, and when referring to an individual wiring member, it is suffixed as 146a. Similarly, the dummy member 145 is a general term for a plurality of dummy members, and when referring to an individual dummy member, it is suffixed as 145a. In FIG. 1, among the members included in the plurality of conductive patterns 142 to 144, the member connected to the via is the wiring member 146, and the member not connected to the via is the dummy member 145.

[0018] The plurality of wiring members 146 includes a wiring member 146a electrically connected to the impurity region 132 (anode) and a wiring member 146b electrically connected to the impurity region 133 (cathode). Both the wiring member 146a and the wiring member 146b are included in the conductive pattern 142 closest to the semiconductor layer 130 among the plurality of conductive patterns 142 to 144.

[0019] The conductive pattern 142 and the conductive pattern 143 may have the same planar layout as each other. By laminating conductive patterns with the same planar layout in this way and connecting them to each other with vias, it becomes possible to reduce the wiring resistance while maintaining the conductive pattern at a film thickness that enables fine processing. When the light receiving element 108, such as an SPAD sensor, requires a large current, it is advantageous to reduce the wiring resistance in this way. The conductive patterns with the same planar layout may be two layers as in this embodiment, or more than that.

[0020] In each of the plurality of conductive patterns 142 to 144, the plurality of dummy members 145 includes a dummy member (for example, the dummy member 145a in the outer peripheral region 107) that is outside the opening 110 in a plan view with respect to the boundary 103. Further, in each of the plurality of conductive patterns 142 to 144, the plurality of dummy members 145 may include a dummy member (for example, the dummy member 145b in the peripheral region 105) that is inside the opening 110 in a plan view with respect to the boundary 103. The conductive pattern 144 further includes an electrode pad 111 for external connection. As described above, the electrode pad 111 is exposed to the outside by the opening 110. When the photoelectric conversion device 100 is mounted on a package, a bonding wire is connected to the electrode pad 111.

[0021] The electrode pad 111 may be made of aluminum so that wire bonding is possible. By also making other members (for example, the wiring member 146 and the dummy member 145) included in the conductive pattern 144 made of aluminum, it becomes possible to process all the members included in the conductive pattern 144 collectively. Thereby, the man-hours of the manufacturing method of the photoelectric conversion device 100 are reduced.

[0022] In the photoelectric conversion device 100, an electrode pad 111 is formed on the pixel substrate 101. Therefore, power is supplied from the electrode pad 111 to the impurity region 132 (anode) via the wiring member 146a (member for anode connection) without passing through the circuit board 102. In the SPAD sensor, a high voltage of about -30V with a large difference from the ground potential is applied to the anode. Since the circuit board 102 does not need to include a signal path for applying such a high voltage, the degree of freedom in the circuit layout of the circuit board 102 is improved.

[0023] The wiring layer 140 may further include a moisture-resistant ring 113 in a ring shape surrounding the opening 110. In FIG. 1, only the portion of the moisture-resistant ring 113 outside the opening 110 is shown. In each of the plurality of conductive patterns 142 to 144, the plurality of dummy members 145 may include a dummy member (dummy member 145a between the moisture-resistant ring 113 and the side surface 109) outside the moisture-resistant ring 113 in a plan view with respect to the boundary 103.

[0024] The bonding layer 150 is composed of a via 151, a barrier film 152, a bonding film 153, and a plurality of electrodes. All of the plurality of electrodes face the boundary 103. The plurality of electrodes include a plurality of electrodes used for driving the photoelectric conversion device 100 and a plurality of electrodes not used for driving the photoelectric conversion device 100. Hereinafter, the electrode used for driving the photoelectric conversion device 100 is represented as a wiring electrode 154, and the electrode not used for driving the photoelectric conversion device 100 is represented as a dummy electrode 155. In FIG. 1, among the plurality of electrodes facing the boundary 103, the electrode connected to the via is the wiring electrode 154, and the electrode not connected to the via is the dummy electrode 155. The via 151 connects the wiring electrode 154 and the conductive pattern 144. The wiring electrode 154, the dummy electrode 155, and the via 151 are made of, for example, copper.

[0025] The bonding film 153 is disposed around the plurality of electrodes and insulates the plurality of electrodes from each other. The bonding film 153 faces the boundary 103. The bonding film 153 is made of, for example, an oxide. The barrier film 152 is located between the wiring layer 140 and the bonding film 153. The barrier film 152 is made of, for example, a nitride. The barrier film 152 prevents the copper of the electrode material from diffusing into the semiconductor layer 130.

[0026] The optical layer 120 is composed of an interlayer optical film 122, an optical separation member 125, an interlayer color filter film 121, a color filter 124, and a microlens 123. The optical separation member 125 is embedded in the interlayer optical film 122. The optical separation member 125 suppresses color mixing between adjacent light receiving elements 108. The color filter 124 is embedded in the interlayer color filter film 121. The microlens 123 condenses the light incident from the side of the optical layer 120 (upper side in FIG. 1) onto the light receiving element 108.

[0027] The circuit board 102 has a semiconductor layer 180, a wiring layer 170, and a bonding layer 160. The bonding surface 102A of the circuit board 102 is bonded to the pixel substrate 101. The circuit board 102 has a signal processing circuit for processing the signal generated by the light receiving element 108. This signal processing circuit includes circuit elements (for example, transistors) for processing the signal generated by the light receiving element 108.

[0028] The semiconductor layer 180 includes a semiconductor substrate 181. The semiconductor substrate 181 is made of, for example, silicon. An impurity region 182 is formed in the semiconductor substrate 181. Further, a gate electrode 183 is formed so as to cover a part of the surface of the semiconductor substrate 181.

[0029] The wiring layer 170 is composed of an interlayer insulating film 171, a plurality of conductive patterns 172 to 174 embedded in the interlayer insulating film 171, and a plurality of vias. The wiring layer 170 is the same as the wiring layer 140 except that it does not have the electrode pad 111. Also in the wiring layer 170, each of the plurality of conductive patterns 172 to 174 includes a plurality of conductive members (wiring members 176) used for driving the photoelectric conversion device 100 and a plurality of conductive members (dummy members 175) not used for driving the photoelectric conversion device 100. Further, in each of the plurality of conductive patterns 172 to 174, the plurality of dummy members 175 include dummy members located outside the opening 110 in a plan view with respect to the boundary 103. In each of the plurality of conductive patterns 172 to 174, the plurality of dummy members 175 also include dummy members located inside the opening 110 in a plan view with respect to the boundary 103.

[0030] Similar to the wiring layer 140, the wiring layer 170 may further include a moisture-resistant ring 114. In FIG. 1, only a part of the moisture-resistant ring 113 is shown. In each of the plurality of conductive patterns 172 to 174, the plurality of dummy members 175 may include dummy members (dummy members between the moisture-resistant ring 114 and the side surface 109) located outside the moisture-resistant ring 114 in a plan view with respect to the boundary 103.

[0031] The bonding layer 160 is composed of a bonding film 161, a barrier film 162, and a plurality of electrodes. The plurality of electrodes include a plurality of electrodes (wiring electrodes 163) used for driving the photoelectric conversion device 100 and a plurality of electrodes (dummy electrodes 164) not used for driving the photoelectric conversion device 100. Since the configuration of the bonding layer 160 is the same as that of the bonding layer 150, redundant descriptions are omitted.

[0032] The pixel substrate 101 and the circuit substrate 102 are bonded by bonding the bonding film 153 and the bonding film 161, bonding the wiring electrode 154 and the wiring electrode 163, and bonding the dummy electrode 155 and the dummy electrode 164.

[0033] In the pixel substrate 101, since the plurality of conductive patterns 142 to 144 include the dummy member 145, the flatness of the bonding surface 101A of the pixel substrate 101 is improved as described later. Similarly, in the circuit substrate 102, since the plurality of conductive patterns 172 to 174 include the dummy member 175, the flatness of the bonding surface 102A of the circuit substrate 102 is also improved. Therefore, the bondability of the boundary 103 when the pixel substrate 101 and the circuit substrate 102 are bonded is improved, and the gap generated between them can be reduced. Therefore, for example, it is possible to suppress the occurrence of cracks due to the load when performing wire bonding on the electrode pad 111.

[0034] At least one of the dummy electrodes 155 is arranged at a position overlapping the electrode pad 111 in a plan view with respect to the boundary 103. By arranging in this way, the bondability of the two substrates is further improved, and the bonding strength between the pixel substrate 101 and the circuit substrate 102 in the opening region 106 is further improved. In another embodiment, the dummy electrode 155 may not be arranged at a position overlapping the electrode pad 111.

[0035] Furthermore, at least one of the dummy members 175 of the circuit substrate 102 is arranged at a position overlapping the electrode pad 111 in a plan view with respect to the boundary 103. By arranging in this way, the bondability of the two substrates is further improved. In another embodiment, the dummy member 175 may not be arranged at a position overlapping the electrode pad 111.

[0036] Referring to FIG. 2, the planar layout of the conductive patterns 142 to 144 will be described. As described above, since the planar layout of the conductive pattern 142 and the planar layout of the conductive pattern 143 may be the same as each other, the planar layout of the conductive pattern 143 will be omitted below. In FIG. 2, among the dummy members 145, those included in the conductive pattern 144 are represented as dummy members 200, and those included in the conductive pattern 142 are represented as dummy members 201.

[0037] As shown in FIG. 2, each of the plurality of dummy electrodes 155, the plurality of dummy members 200, and the plurality of dummy members 201 is arranged periodically in a lattice pattern. With such a periodic arrangement, the arrangement of these dummy electrodes or dummy members can be performed mechanically. Each of one dummy electrode 155, one dummy member 200, and one dummy member 201 has a square shape in a plan view of the boundary 103.

[0038] The width 202 (the length of one side in the case of a square) of one dummy electrode 155 is included in the range of, for example, 2.7 μm to 3.3 μm, and is, for example, 3.0 μm. The arrangement pitch 205 of the plurality of dummy electrodes 155 is included in the range of, for example, 6.0 μm to 6.8 μm, and is, for example, 6.39 μm.

[0039] The width 203 (the length of one side in the case of a square) of one dummy member 200 is included in the range of, for example, 2.0 μm to 2.4 μm, and is, for example, 2.2 μm. The arrangement pitch 206 of the plurality of dummy members 200 is included in the range of, for example, 3.5 μm to 4.1 μm, and is, for example, 3.8 μm.

[0040] The width 204 (the length of one side in the case of a square) of one dummy member 201 is included in the range of, for example, 2.0 μm to 2.4 μm, and is, for example, 2.2 μm. The arrangement pitch 207 of the plurality of dummy members 201 is included in the range of, for example, 4.5 μm to 5.5 μm, and is, for example, 5.0 μm.

[0041] Generally, the array pitch 205 may be larger than the array pitch 206. Instead, the array pitch 205 may be equal to or less than the array pitch 206. The array pitch 205 may be larger than the array pitch 207. Instead, the array pitch 205 may be equal to or less than the array pitch 207. The array pitch 206 may be larger than the array pitch 207. Instead, the array pitch 206 may be equal to or less than the array pitch 207. The array pitch of the plurality of dummy members 145 of the conductive pattern 142 may be equal to the array pitch of the plurality of dummy members 145 of the conductive pattern 143. At least one of the array pitch 206 and the array pitch 207 may be smaller than the array pitch 112 of the plurality of light receiving elements 108.

[0042] Generally, in a plan view with respect to the boundary 103, the area of one dummy electrode 155 may be larger than the area of one dummy member 200. Instead, the area of one dummy electrode 155 may be equal to or less than the area of one dummy member 200. In a plan view with respect to the boundary 103, the area of one dummy member 200 may be the same as the area of one dummy member 201. Instead, the area of one dummy member 200 may be different from the area of one dummy member 201.

[0043] Generally, in a plan view with respect to the boundary 103, the area density of the plurality of dummy members 200 included in the conductive pattern 144 may be smaller than the area density of the plurality of dummy members 201 included in the conductive pattern 143. In a plan view with respect to the boundary 103, the area density of the dummy members 201 included in the conductive pattern 143 may be substantially equal to (for example, the error is less than 5%) the area density of the wiring members 146 included in the same conductive pattern 143. By making the area densities of both substantially equal in this way, the flatness of the upper surface of the wiring layer 140 can be further improved. Instead, the area densities of both may not be substantially equal. For example, the area density of the dummy members 201 included in the conductive pattern 143 may be larger than the area density of the wiring members 146 included in the same conductive pattern 143. In this case, it becomes easier to suppress the light that enters through the wiring layer 140 from the side surface 109 by the dummy members 201. Conversely, the area density of the dummy members 201 included in the conductive pattern 143 may be smaller than the area density of the wiring members 146 included in the same conductive pattern 143. In this case, the thickness of the wiring layer 140 in the light-receiving region 104 becomes thicker than the thickness of the wiring layer 140 in other regions. Therefore, the bonding property between the wiring electrode 154 of the pixel substrate 101 and the wiring electrode 163 of the circuit substrate 102 is improved. A similar relationship may hold between the area density of the dummy members 200 included in the conductive pattern 144 and the area density of the wiring members 146 included in the same conductive pattern 144.

[0044] The plurality of dummy members 200 may include a dummy member (for example, the dummy member 200b) that entirely overlaps any one of the plurality of dummy electrodes 155 and a dummy member (for example, the dummy member 200a) that does not overlap any of the plurality of dummy electrodes 155 at all. Instead, the plurality of dummy members 200 may include only dummy members of one of the two types.

[0045] In the above example, in a plan view with respect to the boundary 103, all of the dummy members 145 were square. Instead, in a plan view with respect to the boundary 103, the dummy members 145 may have other shapes. For example, the shape of the dummy member 145 in a plan view with respect to the boundary 103 may be circular or polygonal with all vertices being obtuse angles. By adopting such a shape, even if there is a wiring member to which a high voltage is applied near the dummy member 145, the electric field concentration of the dummy member 145 is alleviated, and the breakdown voltage between the conductive members is improved.

[0046] Subsequently, with reference to FIGS. 3 to 5, an example of a manufacturing method of the photoelectric conversion device 100 will be described. In the following method, two semiconductor wafers are separately formed, and after joining them, dicing is performed to form a plurality of photoelectric conversion devices 100. The state before dicing in which the pixel substrates 101 of the plurality of photoelectric conversion devices 100 are not separated is also referred to as the pixel substrate 101. Similarly, the state before dicing in which the circuit boards 102 of the plurality of photoelectric conversion devices 100 are not separated is also referred to as the circuit board 102.

[0047] First, impurity regions 132 and 133 are formed on a semiconductor substrate 131, and an interlayer insulating film 301 is formed thereon. Thereafter, vias penetrating the interlayer insulating film 301 are formed, and a conductive pattern 142 including wiring members 146 and dummy members 145 is formed on the interlayer insulating film 301. Thereby, the structure shown in FIG. 3(a) is formed. The dummy members 145 are arranged in regions other than the regions where the wiring members 146 are arranged. The conductive pattern 142 is formed, for example, by forming an aluminum film by sputtering or the like and then performing photolithography and dry etching.

[0048] Thereafter, by further forming an interlayer insulating film 302 on the conductive pattern 142, the structure shown in FIG. 3(b) is formed. The interlayer insulating film 302 is formed using, for example, plasma CVD (Chemical Vapor Deposition) or the like. The upper surface of the interlayer insulating film 302 has irregularities due to the influence of the conductive pattern 142.

[0049] Thereafter, by performing etching from the upper surface of the interlayer insulating film 302, a part of the interlayer insulating film 302 is removed so that the interval between the unevenness of the interlayer insulating film 302 is reduced. Thereby, the structure shown in FIG. 3(c) is formed. For the etching, for example, photolithography and dry etching are used.

[0050] Thereafter, the upper surface of the interlayer insulating film 302 is planarized by, for example, CMP (Chemical Mechanical Polishing). Thereby, the structure shown in FIG. 3(d) is formed. Since the conductive pattern 142 has the dummy member 145, the flatness of the upper surface of the interlayer insulating film 302 is improved as compared with the case where it does not have the dummy member 145.

[0051] Thereafter, the same process is repeated, and the wiring layer 140 is formed by sequentially forming the conductive patterns 143 and 144. The interlayer insulating film 141 is constituted by a plurality of interlayer insulating films 301, 302, etc. formed in order. Thereafter, by forming the bonding layer 150, the structure shown in FIG. 4(a) is formed. Separately from the formation of this structure, the circuit board 102 is also formed in the same manner.

[0052] Thereafter, as shown in FIG. 4(b), the structure of FIG. 4(a) prepared as described above and the circuit board 102 are overlapped so that the bonding layer 150 and the bonding layer 160 face each other, and both are bonded. Thereafter, the semiconductor substrate 131 is thinned, and the optical layer 120 is formed. Thereafter, an opening 110 extending to the electrode pad 111 is formed. Thereby, the structure shown in FIG. 5(a) is formed.

[0053] FIG. 5(a) shows a dicing line 501 for dicing a semiconductor wafer. The dicing line 501 passes through the dummy members 145 and 175. Therefore, when dicing the semiconductor wafer along the dicing line 501, there is a concern that chipping may occur due to the influence of the dummy members 145 and 175. Therefore, before dicing, a groove 500 may be formed along the dicing line 501. In the example of the figure, the groove 500 is formed from the optical layer 120 side, but the groove may also be formed from the opposite side of the optical layer 120. This groove 500 reaches, for example, the semiconductor substrate 181 of the circuit board 102. This groove 500 is formed by a process using heat such as laser processing. By forming the groove 500, a residue 502 from which a part of the dummy member 175 has been removed remains in the photoelectric conversion device 100 (specifically, the wiring layer 170). Although not shown, a residue from which a part of the dummy member 145 has been removed may remain in the photoelectric conversion device 100 (specifically, the wiring layer 140). Thereafter, by dicing the structure of FIG. 5(b) along the dicing line 501, a plurality of photoelectric conversion devices 100 can be obtained.

[0054] Referring to FIG. 6, a method for manufacturing a photoelectric conversion device according to a comparative example will be described. FIG. 6(a) shows the process corresponding to FIG. 3(c). In this comparative example, although the conductive pattern 142 includes the wiring member 146, it does not include the dummy member 145. Therefore, although the region 600 where the light receiving element 108 is formed includes a conductive member, the other region 601 does not include a conductive member.

[0055] Thereafter, as shown in FIG. 6(b), the upper surface of the interlayer insulating film 302 is planarized. Since the polishing amount of the interlayer insulating film 302 in the region 601 is larger than the polishing amount of the interlayer insulating film 302 in the region 600, the flatness of the upper surface of the interlayer insulating film 302 deteriorates. Specifically, the film thickness of the interlayer insulating film 302 in the region 601 becomes thinner than the film thickness of the interlayer insulating film 302 in the region 600.

[0056] Thereafter, as shown in FIG. 6(c), other conductive patterns and a bonding layer 150 are formed. By not forming the dummy member 145 in other conductive patterns, the accumulation of steps increases. Therefore, the flatness of the bonding surface according to the comparative example is lower than the flatness of the bonding surface 101A (FIG. 4(a)) of the pixel substrate 101 according to the first embodiment. Similarly, the flatness of the upper surface of the bonding layer 160 of the circuit substrate 102 formed in the same manner is also lower than the flatness of the upper surface of the bonding layer 160 of the photoelectric conversion device 100 according to the first embodiment. Therefore, when bonding the pixel substrate and the circuit substrate having these low-flatness upper surfaces, there is a concern that a gap may occur between the two and a bonding failure may occur. In the photoelectric conversion device 100, the flatness of the bonding surface can be improved by disposing the dummy member 145 also in the region 601 where the wiring member 146 is not disposed.

[0057] In the photoelectric conversion device 100 according to the first embodiment, each of the plurality of conductive patterns 142 to 144 of the pixel substrate 101 includes a dummy member 145. Instead, only a part of the plurality of conductive patterns 142 to 144 may include the dummy member 145. Even if only a part includes the dummy member 145, the flatness of the bonding surface 101A is improved as compared with the case where no dummy member 145 is included at all. Similarly, only a part of the plurality of conductive patterns 172 to 174 of the circuit substrate 102 may include a dummy member 175. Further, the pixel substrate 101 may include the dummy member 145 and the circuit substrate 102 may not include the dummy member 175, or vice versa. If any one of the plurality of conductive patterns between the semiconductor layer 130 of the pixel substrate 101 and the semiconductor layer 180 of the circuit substrate 102 includes a dummy member, the bonding property between the two substrates is improved as compared with the case where none of the conductive patterns includes a dummy member.

[0058] In the photoelectric conversion device 100, the light-receiving region 104 does not include the dummy member 145. Instead, the light-receiving region 104 may also include the dummy member 145. By arranging the dummy member 145 in the light-receiving region 104 in this way, it becomes easier to adjust the area density of the conductive members across the conductive pattern, so that the flatness of the bonding surface 101A is further improved. In order to facilitate the arrangement of the dummy member 145 in the light-receiving region 104, the width of one dummy member 145 (width 203 or width 204) may be equal to or less than half of the arrangement pitch 112 of the plurality of light-receiving elements 108. In addition to this, the arrangement pitch (arrangement pitch 206 or arrangement pitch 207) of the plurality of dummy members 145 may be equal to or less than half of the arrangement pitch 112 of the plurality of light-receiving elements 108.

[0059] As described above, a voltage of about -30V with a large difference from the ground voltage is applied to the wiring member 146a connected to the anode of the SPAD sensor. Therefore, in order to ensure the breakdown voltage, the dummy member 145 may not be arranged between the wiring member 146a and the surrounding wiring member 146b. For example, as shown in FIG. 1, the distance between the wiring member 146a and the wiring member 146b is equal to or less than the arrangement pitch of the plurality of light-receiving elements 108 (arrangement pitch 112 or less). Therefore, a dummy member not used for driving the photoelectric conversion device 100 may not be arranged between the wiring member 146a and the wiring member 146b.

[0060] In the photoelectric conversion device 100, no via is connected to the dummy member 145. Therefore, the position of the dummy member 145 is not affected by the position of the dummy member 145 in other layers, so the degree of freedom in the layout of the dummy member 145 is improved. Instead, a via may be connected to the dummy member 145. Similarly, in the photoelectric conversion device 100, no via is connected to the dummy electrode 155. Therefore, the position of the dummy electrode 155 is not affected by the position of the dummy member 145, so the degree of freedom in the layout of the dummy electrode 155 is improved. Instead, a via may be connected to the dummy electrode 155.

[0061] <Second Embodiment> Referring to FIG. 7, a structural example of a photoelectric conversion device 700 according to a second embodiment of the present invention will be described. Hereinafter, the differences from the first embodiment will be mainly described. Regarding matters not described below, they may be the same as those in the first embodiment. FIG. 7 shows a cross-sectional view of the photoelectric conversion device 700 at a position corresponding to FIG. 1.

[0062] In the photoelectric conversion device 700 according to the second embodiment, electrode pads 111 are formed on the circuit board 102. Therefore, the opening 110 penetrates the pixel substrate 101 and enters a part of the circuit board 102. The dummy electrodes 155 and 164 are not formed at the position where the opening 110 is formed in the opening region 106.

[0063] Since the electrode pads 111 are located on the circuit board 102, the wiring distance between the electrode pads 111 and the signal processing circuit in the circuit board 102 can be shortened. Thereby, the delay of the signal can be reduced. <Other Embodiments>

[0064] An embodiment related to a device 800 including a semiconductor device 803 will be described in detail with reference to FIG. 8(a). The semiconductor device 803 may be a photoelectric conversion device according to any of the above embodiments. The semiconductor device 803 may include a semiconductor device 801 and a package 802 that houses the semiconductor device 801. The package 802 may include a substrate to which the semiconductor device 801 is fixed and a lid such as glass facing the semiconductor device 801. The package 802 may further include a bonding member such as a bonding wire or a bump that connects a terminal provided on the substrate and a terminal (bonding pad) provided on the semiconductor device 801.

[0065] The apparatus 800 may include at least any one of an optical device 804, a control device 805, a processing device 806, a display device 807, a storage device 808, and a mechanical device 809. The optical device 804 is, for example, a lens, a shutter, or a mirror. The control device 805 controls the semiconductor device 803. The control device 805 is a semiconductor device such as, for example, an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0066] The processing device 806 processes the signal output from the semiconductor device 803. The processing device 806 is a semiconductor device such as a CPU (Central Processing Unit) or an ASIC for constituting an AFE (Analog Front End) or a DFE (Digital Front End). The display device 807 is an EL (Electro-Luminescence) display device or a liquid crystal display device that displays the information (image) obtained by the semiconductor device 803. The storage device 808 is a magnetic device or a semiconductor device that stores the information (image) obtained by the semiconductor device 803. The storage device 808 is a volatile memory such as an SRAM (Static Randam Access Memory) or a DRAM (Dynamic Random Access Memory), or a non-volatile memory such as a flash memory or a hard disk drive.

[0067] The mechanical device 809 has a movable part or a propulsion part such as a motor or an engine. In the apparatus 800, the signal output from the semiconductor device 803 is displayed on the display device 807 or transmitted to the outside by a communication device (not shown) included in the apparatus 800. For this purpose, the apparatus 800 may further include a storage device 808 and a processing device 806 separately from the storage circuit and the arithmetic circuit included in the semiconductor device 803. The mechanical device 809 may be controlled based on the signal output from the semiconductor device 803.

[0068] In addition, the device 800 is suitable for electronic devices such as information terminals with a photographing function (e.g., smartphones and wearable terminals) and cameras (e.g., interchangeable-lens cameras, compact cameras, video cameras, surveillance cameras). The mechanical device 809 in the camera may drive the components of the optical device 804 for zooming, focusing, and shutter operations. Instead of this, the mechanical device 809 in the camera may move the semiconductor device 803 for anti-vibration operations.

[0069] Also, the device 800 can be a transportation device such as a vehicle, a ship, or an aircraft. The mechanical device 809 in the transportation device may be used as a moving device. The device 800 as a transportation device may be one that transports the semiconductor device 803 or one that assists and / or automates driving (operation) by means of a photographing function. The processing device 806 for assisting and / or automating driving (operation) may perform processing for operating the mechanical device 809 as a moving device based on the information obtained by the semiconductor device 803. Instead of this, the device 800 may be a medical device such as an endoscope, a measuring device such as an analysis and ranging sensor, an analysis device such as an electron microscope, or an office device such as a copying machine.

[0070] Using FIGS. 8(b) and 8(c), an embodiment related to an imaging system and a moving body will be described. FIG. 8(b) shows an example of an imaging system 810 related to an in-vehicle camera. The imaging system 810 includes a photoelectric conversion device 811. The photoelectric conversion device 811 may be any of the photoelectric conversion devices of the above-described embodiments. The imaging system 810 includes an image processing unit 812, which is a processing device that performs image processing on a plurality of pieces of image data acquired by the photoelectric conversion device 811. Further, the imaging system 810 includes a parallax acquisition unit 813, which is a processing device that calculates parallax (phase difference of a parallax image) from a plurality of pieces of image data acquired by the photoelectric conversion device 811. Furthermore, the imaging system 810 includes a distance acquisition unit 814, which is a processing device that calculates the distance to an object based on the calculated parallax, and a collision determination unit 815, which is a processing device that determines whether there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 813 and the distance acquisition unit 814 are examples of information acquisition means for acquiring information such as distance information to an object. That is, the distance information is information related to parallax, defocus amount, distance to an object, and the like. The collision determination unit 815 may determine the possibility of collision using any of these distance information. Each of the above-described various processing devices may be realized by dedicatedly designed hardware, or may be realized by general-purpose hardware that performs calculations based on software modules. Further, the processing device may be realized by an FPGA, an ASIC, or the like, or may be realized by a combination thereof.

[0071] The imaging system 810 is connected to a vehicle information acquisition device 816 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the imaging system 810 is connected to a control ECU 817, which is a control device that outputs a control signal for generating a braking force for the vehicle based on the determination result of a collision determination unit 815. That is, the control ECU 817 is an example of moving body control means for controlling a moving body based on distance information. Further, the imaging system 810 is also connected to an alarm device 818 that issues an alarm to the driver based on the determination result of the collision determination unit 815. For example, when the determination result of the collision determination unit 815 indicates a high possibility of collision, the control ECU 817 performs vehicle control to avoid collision and reduce damage, such as applying brakes, returning the accelerator, and suppressing engine output. The alarm device 818 warns the user by sounding an alarm such as a sound, displaying alarm information on a screen of a car navigation system, or applying vibration to a seat belt or a steering wheel.

[0072] In the present embodiment, the imaging system 810 images the surroundings of the vehicle, for example, the front or the rear. FIG. 8(c) shows the imaging system 810 when imaging the front of the vehicle (imaging range 819). The vehicle information acquisition device 816 sends an instruction to operate the imaging system 810 to execute imaging.

[0073] In the above description, an example of control to avoid collision with other vehicles has been described, but it is also applicable to control for automatically driving while following other vehicles, control for automatically driving without deviating from the lane, and the like. Further, the imaging system is not limited to vehicles such as automobiles, and can be applied to moving bodies (transportation devices) such as ships, airplanes, or industrial robots. The moving device in the moving body (transportation device) is various moving means such as an engine, a motor, wheels, or a propeller. In addition, it can be applied not only to moving bodies but also to devices that widely utilize object recognition, such as an advanced road traffic system (ITS).

[0074] The above-described embodiments can be appropriately modified without departing from the technical idea. Note that the disclosure of this specification includes not only what is described in this specification but also all matters that can be understood from this specification and the drawings attached hereto. Further, the disclosure of this specification includes the complementary set of the concepts described in this specification. That is, for example, if this specification describes that "A is larger than B", even if the description that "A is not larger than B" is omitted, it can be said that this specification discloses that "A is not larger than B". This is because when the description that "A is larger than B" is given, it is premised that the case where "A is not larger than B" is considered. Claims are attached to publicly disclose the scope of the invention.

Explanation of Reference Numerals

[0075] 100 Photoelectric conversion device, 101 Pixel substrate, 102 Circuit substrate, 110 Opening, 145 Dummy member, 146 Wiring member

Claims

1. A photoelectric conversion device in which a first substrate having a first semiconductor layer on which a light-receiving element is formed and a second substrate having a second semiconductor layer on which a circuit element for processing a signal generated by the light-receiving element is formed are joined, an electrode pad for external connection, and an opening extending to the electrode pad, and the first substrate has a plurality of conductive patterns between a boundary between the first substrate and the second substrate and the first semiconductor layer, the plurality of conductive patterns include a first conductive pattern and a second conductive pattern that is farther from the boundary than the first conductive pattern, each of the plurality of conductive patterns includes a plurality of wiring members used for driving the photoelectric conversion device and a plurality of dummy members that are arranged in a region other than a region where the plurality of wiring members are arranged and are not used for driving the photoelectric conversion device, in each of the plurality of conductive patterns, the plurality of dummy members include a dummy member that is outside the opening in a plan view with respect to the boundary, The photoelectric conversion device, wherein the plurality of dummy members of the second conductive pattern include dummy members to which vias are not connected.

2. The first substrate has a plurality of dummy electrodes that face the boundary and are not used for driving the photoelectric conversion device, The photoelectric conversion device according to claim 1, wherein the plurality of conductive patterns included in the first substrate further include a third conductive pattern that is farther from the boundary than the second conductive pattern.

3. The photoelectric conversion device according to claim 2, wherein an array pitch of the plurality of dummy electrodes is larger than an array pitch of the plurality of dummy members of the first conductive pattern.

4. The photoelectric conversion device according to claim 2 or 3, wherein an array pitch of the plurality of dummy electrodes is larger than an array pitch of the plurality of dummy members of the third conductive pattern.

5. The photoelectric conversion device according to any one of claims 2 to 4, wherein an array pitch of the plurality of dummy members of the first conductive pattern is larger than an array pitch of the plurality of dummy members of the third conductive pattern.

6. The photoelectric conversion device according to any one of claims 2 to 5, wherein an array pitch of the plurality of dummy members of the second conductive pattern is equal to an array pitch of the plurality of dummy members of the third conductive pattern.

7. The array pitch of the plurality of dummy electrodes is larger than the array pitch of the plurality of dummy members of the first conductive pattern. The photoelectric conversion device according to any one of claims 2 to 6, wherein the array pitch of the plurality of dummy members of the first conductive pattern is larger than the array pitch of the plurality of dummy members of the second conductive pattern.

8. The photoelectric conversion device according to any one of claims 2 to 7, wherein, in a plan view with respect to the boundary, the area of one electrode of the plurality of dummy electrodes is larger than the area of one dummy member of the plurality of dummy members of the first conductive pattern.

9. The photoelectric conversion device according to any one of claims 2 to 8, wherein, in a plan view with respect to the boundary, the plurality of dummy members of the first conductive pattern include a dummy member that entirely overlaps with any of the plurality of dummy electrodes and an electrode that does not overlap with any of the plurality of dummy electrodes at all.

10. The photoelectric conversion device according to any one of claims 2 to 9, wherein, in a plan view with respect to the boundary, the area density of the plurality of dummy members of the first conductive pattern is smaller than the area density of the plurality of dummy members of the second conductive pattern or the third conductive pattern.

11. The photoelectric conversion device according to any one of claims 1 to 10, wherein the plurality of dummy members include a dummy member that is inside the opening in a plan view with respect to the boundary.

12. The photoelectric conversion device according to any one of claims 1 to 11, wherein the plurality of conductive patterns are made of aluminum.

13. The photoelectric conversion device according to any one of claims 1 to 12, wherein the light receiving element is a SPAD sensor.

14. The plurality of wiring members include a first wiring member connected to the anode of the light receiving element and a second wiring member connected to the cathode of the light receiving element. The interval between the first wiring member and the second wiring member is equal to or less than the array pitch of the light receiving element. The photoelectric conversion device according to any one of claims 1 to 13, wherein no dummy member that is not used for driving the photoelectric conversion device is included between the first wiring member and the second wiring member.

15. The photoelectric conversion device according to any one of claims 1 to 14, wherein the plurality of dummy members include a dummy member having a circular shape in a plan view with respect to the boundary.

16. The photoelectric conversion device according to any one of claims 1 to 15, wherein the plurality of dummy members include a dummy member having a polygonal shape in which all vertices are obtuse angles in a plan view with respect to the boundary.

17. The photoelectric conversion device according to any one of claims 1 to 16, wherein the plurality of dummy members include a dummy member having a width of half or less of the arrangement pitch of the light receiving elements.

18. The photoelectric conversion device according to any one of claims 1 to 17, wherein the arrangement pitch of the plurality of dummy members is smaller than the arrangement pitch of the light receiving elements.

19. The photoelectric conversion device according to any one of claims 1 to 18, wherein in a plan view with respect to the boundary, the area density of the plurality of dummy members is different from the area density of the plurality of wiring members.

20. The photoelectric conversion device according to any one of claims 1 to 19, an optical device corresponding to the photoelectric conversion device, a control device for controlling the photoelectric conversion device, a processing device for processing a signal output from the photoelectric conversion device, a display device for displaying information obtained by the photoelectric conversion device, a storage device for storing information obtained by the photoelectric conversion device, and at least one of a mechanical device that operates based on information obtained by the photoelectric conversion device, and is characterized by comprising.

21. A method for manufacturing a photoelectric conversion device, preparing a first substrate having a first semiconductor layer on which a light receiving element is formed, and a second substrate having a second semiconductor layer on which a circuit element for processing a signal generated by the light receiving element is formed; bonding the first substrate and the second substrate; forming an opening extending to an electrode pad for external connection; and dicing the first substrate and the second substrate along a dicing line, and the first substrate prepared in the preparing step has a plurality of conductive patterns between the boundary between the first substrate and the second substrate and the first semiconductor layer, the plurality of conductive patterns include a first conductive pattern and a second conductive pattern that is farther from the boundary than the first conductive pattern. Each of the plurality of conductive patterns includes a plurality of wiring members used for driving the photoelectric conversion device and a plurality of dummy members disposed in a region other than the region where the plurality of wiring members are disposed and not used for driving the photoelectric conversion device. In each of the plurality of conductive patterns, the plurality of dummy members include dummy members that are outside the opening in a plan view with respect to the boundary. The manufacturing method according to claim 21, wherein the plurality of dummy members of the second conductive pattern include dummy members to which vias are not connected.

22. The manufacturing method according to claim 21, further including a step of forming a groove by a treatment using heat along the dicing line before the step of dicing.

Images