Package Structure, Electronic Device System, and Optoelectronic Fusion Device

Abstract

An object of the present invention is to provide a technology capable of shortening the transmission distance of an electric signal and realizing high-speed communication and high integration or high speed of a semiconductor chip. 【Solution means】The package structure of the present invention is such that a chamber including the package substrate, a frame body, and a top plate is disposed on the package substrate. The frame body is provided with an inlet and / or an outlet for a coolant. A semiconductor chip and a photoelectric conversion element are disposed in the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

Description

Technical Field

[0001] The present invention relates to a package structure, a system, and an optoelectronic fusion device compatible with high-speed communication and optical communication. Electronic device

Background Art

[0002] In recent years, with the spread of the Internet and mobile communication, both the communication speed and the communication volume have increased significantly. In response, data centers and the like to which optical communication is applied have been developed. For further high-speed and large-capacity high-speed communication, the frequency of communication signals has been increasing, and the concept of optical communication applied to connections between servers and within a server rack, and further to connections between semiconductor chips has been progressing.

[0003] In response to the trend of optical communication implementation, currently, development of a package structure is underway in which a plurality of semiconductor chips are mounted on a single package substrate, and an optical communication connector and an optoelectronic conversion element are arranged at the edge of the package substrate, and the optical signal is converted into an electrical signal inside the substrate and transmitted to the semiconductor chip. The insulating material of the package substrate has been developed to have a low dielectric tangent in order to suppress signal attenuation when passing through the substrate in accordance with the high-frequency of the electrical signal. However, in recent years, the requirements for high-speed and large-capacity communication, which have been accelerating significantly, cannot be sufficiently met only by material development, and limitations are becoming apparent.

[0004] Therefore, in order to avoid the influence of attenuation in the insulating material, it is required to arrange the optoelectronic conversion element near the semiconductor chip. In addition, since a plurality of semiconductor chips are mounted on the same package substrate and the size of the package substrate is increasing, consideration is also required for the layout of the optoelectronic conversion element. Furthermore, due to the high integration and high speed of logic semiconductor chips, the power consumption has increased, and the thermal influence and cooling efficiency due to heat generation have also become problems.

[0005] ​Regarding the cooling effect of semiconductor chips, many methods have been studied conventionally. Among them, the liquid cooling method such as that in Patent Document 1 has high cooling efficiency and is considered effective as a future package cooling method. Specifically, Patent Document 1 sets as its problem "to provide a mounting structure of a semiconductor device / electronic component capable of suppressing a temperature rise accompanying heat generation of a semiconductor device or electronic component with high power consumption and operating stably", and discloses the following content as an invention of the mounting structure of a semiconductor device / electronic component. "An interposer 10, a semiconductor device 11 mounted on a surface 10a of the interposer 10, and a cover 12 that is closely adhered and fixed to the surface 10a of the interposer 10 so as to enclose the semiconductor device 11 and forms an internal space S together with the interposer 10. The cover 12 has an inlet 13 for introducing a fluid L that absorbs heat from the outside into the internal space S and an outlet 14 for discharging the fluid L from the internal space S to the outside. The internal space S is a closed space excluding the inlet 13 and the outlet 14."

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] There are many problems in incorporating optical communication into a semiconductor package. First, since high-frequency electrical signals in a semiconductor package are greatly affected by attenuation due to the transmission distance, it is necessary to arrange a photoelectric conversion element near the semiconductor chip so that the transmission distance becomes short. However, for example, since a laser, which is a photoelectric conversion element, is vulnerable to heat, consideration is also required for cooling the photoelectric conversion element. Among other things, there is a problem of how to connect (couple) an optical signal from an optical communication cable to a photoelectric conversion element near a semiconductor chip, for example, how to ensure the optical transmission path, connection method, and optical axis alignment accuracy to the photoelectric conversion element without interfering with the cooling of the photoelectric conversion element.

[0008] Regarding the cooling of the semiconductor chip, a liquid cooling method such as that in Patent Document 1 is considered effective as a future package cooling method due to its high cooling efficiency. In particular, a method of creating a sealed space by a cooling chamber provided with an inlet and an outlet on a package substrate and cooling the semiconductor chip inside with a liquid flow is considered to be able to achieve stable cooling against the heat generation of the semiconductor chip. However, since the sealed space inside the cooling chamber is filled with a coolant, it is not easy to connect optical communication inside the cooling chamber while maintaining the sealed state, and it has been difficult to arrange a photoelectric conversion element inside the cooling chamber.

[0009] Therefore, an object of the present invention is to provide a technology capable of realizing shortening of the transmission distance of an electrical signal and realizing high-speed communication and high integration or high speed of a semiconductor chip.

Means for Solving the Problems

[0010] In order to solve the above problems, one of the typical package structures of the present invention is that a chamber including the package substrate, a frame body, and a top plate is arranged on a package substrate, the frame body is provided with an inlet and / or an outlet for a coolant, a semiconductor chip and a photoelectric conversion element are arranged in the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

Effects of the Invention

[0011] According to the present invention, it is possible to provide a technology capable of realizing shortening of the transmission distance of an electrical signal and realizing high-speed communication and high integration or high speed of a semiconductor chip. Problems, configurations, and effects other than those described above will be clarified by the description in the following embodiments for carrying out the invention.

Brief Description of the Drawings

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[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the present invention is not limited to these embodiments. Also, in the description of the drawings, the same reference numerals are used to denote the same parts. When there are a plurality of components having the same or similar functions, different subscripts may be attached to the same reference numeral for description. Also, when it is not necessary to distinguish these plurality of components, the subscripts may be omitted in the description. The positions, sizes, shapes, ranges, numbers, etc. of the respective components shown in the drawings may not represent the actual positions, sizes, shapes, ranges, numbers, etc. in order to facilitate understanding of the invention. For this reason, the present invention is not necessarily limited to the positions, sizes, shapes, ranges, numbers, etc. disclosed in the drawings.

[0014] In the present disclosure, a package structure including a semiconductor chip, a photoelectric conversion element, etc. will be described. Since the package structure functions as an electronic device, it can also be referred to as, for example, an "optoelectronic fusion device".

[0015] [First Embodiment] (Configuration) Referring to FIGS. 1 and 2, the configuration of the first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view showing an example of the package structure 1. In the package structure 1, a chamber 52 including a package substrate 10, a frame body 34, and a top plate 38 is disposed on the package substrate 10. The frame body 34 is provided with an inlet 34i and / or an outlet 34o for the coolant. Inside the chamber 52, a semiconductor chip 50 and a photoelectric conversion element 28 are disposed. The photoelectric conversion element 28 is connected to an optical waveguide circuit 36 formed on the top plate 38. Specifically, the package structure 1 has a chamber structure surrounded by the package substrate 10, the top plate 38, and the frame body 34. The chamber 52 is filled with the coolant, and the semiconductor chip 50 is cooled.

[0016] In the first embodiment, the package substrate 10 is a rigid substrate having a low CTE close to the silicon chip (semiconductor chip 50) and having a sufficient thickness. The package substrate 10 includes, for example, a first wiring layer 10a, a low-expansion CCL (Copper Clad Laminate) 10b, and a second wiring layer 10c. The first wiring layer 10a and the second wiring layer 10c are electrically connected via an electrode portion 10d. The first wiring layer 10a and the second wiring layer 10c have wirings having a predetermined shape in the xy plane. The semiconductor chip 50 disposed on the first wiring layer 10a is electrically connected to a terminal 18 disposed on the second wiring layer 10c. The capacitor 20 is disposed on the second wiring layer 10c and exhibits a decoupling function of preventing, for example, an AC component noise from being applied to the terminal 18. Note that the configuration of the package substrate 10 is not limited to the above description. The package substrate 10 can be set with materials and configurations according to the package structure 1.

[0017] In addition, the package structure 1 includes an interposer 12 disposed on the package substrate 10. The semiconductor chip 50 and the photoelectric conversion element 28 are mounted on the interposer 12, and the interposer 12 is formed of silicon or glass. Specifically, an interposer 12 formed of silicon or glass is disposed on the package substrate 10, and the package substrate 10 and the interposer 12 are electrically connected via solder bumps 14. An underfill 16 is filled between the package substrate 10 and the interposer 12.

[0018] Further, a plurality of semiconductor chips 50 are mounted on the interposer 12, and the semiconductor chip 50 and the interposer 12 are electrically connected via solder bumps 24. An underfill 26 is filled between the semiconductor chip 50 and the interposer 12. Note that the capacitor 22 is disposed on the surface of the interposer 12 in the minus z-axis direction and exhibits a decoupling function similar to that of the capacitor 20, for example.

[0019] The semiconductor chip 50 has connection terminals on both the surface on the interposer 12 side (the surface in the minus z-axis direction) and the surface opposite to the surface on the interposer 12 side (the surface in the minus z-axis direction). The photoelectric conversion element 28 is disposed so as to be connected to the connection terminal disposed on the surface opposite to the interposer 12 side. The photoelectric conversion element 28 and the semiconductor chip 50 are electrically connected via solder bumps 30. An underfill 32 is filled between the photoelectric conversion element 28 and the semiconductor chip 50.

[0020] Note that as for the use of the connection terminals, power is mainly supplied to the connection terminals on the surface of the semiconductor chip 50 on the interposer 12 side (the surface on the minus z-axis direction side) through the package substrate 10 and the interposer 12. In addition, the connection terminals on the surface of the semiconductor chip 50 opposite to the interposer 12 side (the surface on the plus z-axis direction side) include connection terminals for electrical signals and power supply terminals to the photoelectric conversion element 28.

[0021] In recent years, for the purpose of efficient power supply, a design that separates the power circuit and the signal circuit in a semiconductor chip with the transistor formation surface as the boundary is often adopted. This embodiment, which connects the electrical signal from the photoelectric conversion element 28 from the opposite side of the package substrate 10, can also be applied to such a semiconductor chip.

[0022] The frame 34 is disposed on the package substrate 10 so as to surround the interposer 12. Further, the top plate 38 has an optical waveguide circuit 36 formed on the surface in the minus z-axis direction, and the optical waveguide circuit 36 is disposed on the frame 34 so as to face the minus z-axis direction on the frame 34. A connector 40 is disposed on the optical waveguide circuit 36, and the optical signal input from the optical cable 42 propagates (is connected) to the optical waveguide circuit 36. In the following description, the case where the optical signal is mainly input from the optical cable 42 to the package structure 1 and the optical signal is converted into an electrical signal by the photoelectric conversion element 28 will be described, but the present disclosure is not limited to this case. The electrical signal may be converted into an optical signal by the photoelectric conversion element, and the optical signal may be output to the outside from the optical cable 42.

[0023] The space between the frame 34 and the package substrate 10 and the space between the frame 34 and the top plate 38 are fixed by an adhesive 44. The frame 34 has grooves formed in the portion in contact with the package substrate 10 and the portion in contact with the top plate 38, and the area of the surface of the adhesive 44 in contact with the frame 34 is increased. Further, the space between the top plate 38 and the photoelectric conversion element 28 is fixed by a resin 46.

[0024] The space defined by the package substrate 10, the frame 34, and the top plate 38 forms a chamber 52. The frame 34 is formed with an inlet 34i and an outlet 34o for the coolant, and the coolant can be introduced into the chamber 52 in the direction from arrow A1 to arrow A2 to cool the semiconductor chip 50 and the photoelectric conversion element 28. The temperature sensor 54 is disposed near the outlet 34o of the frame 34, and the temperature of the chamber 52 can be determined by detecting the temperature of the temperature sensor 54. Although the case where the coolant flows from the inlet 34i to the outlet 34o of the chamber 52 has been described, the present disclosure is not limited to the above case. For example, the coolant may be discharged from the inlet 34i, or the coolant may be introduced into the chamber 52 from the outlet 34o. Further, although the case where the inlet and the outlet are provided separately has been shown, the chamber 52 may have a single opening, and both the functions of the inlet and the outlet may be provided in the single opening.

[0025] (Connection structure between the photoelectric conversion element 28 and the top plate 38) Next, with reference to FIG. 2, the connection structure between the photoelectric conversion element 28 and the top plate 38 will be described. FIG. 2 is a diagram showing an enlarged view of the portion of the photoelectric conversion element 28 in the package structure 1. FIG. 2 shows the configuration (including the optical waveguide circuit 36, the top plate 38, etc.) of the portion including the photoelectric conversion element 28 on the plus x-axis direction side among the two photoelectric conversion elements 28 shown in FIG. 1. Although the configuration of the portion including the photoelectric conversion element 28 on the minus x-axis direction side may not be the same as the configuration and orientation of the portion including the photoelectric conversion element 28 on the plus x-axis direction side, since they have the same configuration, one will be described and the description of the other will be omitted. Regarding other configurations and the configurations included in other embodiments, unless otherwise specified, the typical configurations will be described and the descriptions of others may be omitted. The photoelectric conversion element 28 is provided with an input portion 28i for an optical signal on the surface opposite to the semiconductor chip 50. Further, the optical waveguide circuit 36 has a light emitting portion 36o from which the optical signal propagated in the core material (core) 360 is output. By aligning the optical axes of the light emitting portion 36o of the optical waveguide circuit 36 and the input portion 28i of the photoelectric conversion element 28, the optical signal can be transmitted from the optical waveguide circuit 36 to the photoelectric conversion element 28 while suppressing loss. For ease of understanding, the case where an optical signal propagates from the optical waveguide circuit 36 to the input portion 28i of the photoelectric conversion element 28 (for example, when the photoelectric conversion element converts an optical signal into an electrical signal like a photodiode) will be described, but the present disclosure is not limited to this case. The present disclosure can also be applied when the optical signal output from the photoelectric conversion element 28 propagates through the optical waveguide circuit 36, propagates through the optical cable 422 from the package structure 1, and is output to the outside of the package structure 1. In this case, the light emitting portion 36o of the optical waveguide circuit 36 functions as a light receiving portion, and the input portion 28i of the photoelectric conversion element 28 also functions as an output portion.

[0026] In addition, the connection portion between the optical waveguide circuit 36 and the photoelectric conversion element 28 is formed of a resin having the same refractive index as the member (core material 360) that forms the core of the optical waveguide circuit 36. Specifically, the connection portion between the input portion 28i of the photoelectric conversion element 28 and the light output portion 36o of the optical waveguide circuit 36 is connected by a resin 46, and the resin 46 is transparent and has the same refractive index as the core material 360 of the optical waveguide circuit 36. Note that the connection portion having the same refractive index as the core material 360 is for suppressing the loss of optical signals due to the difference in refractive index distribution. As causes of light loss, reflection and scattering of optical signals are considered at the interface between the optical waveguide circuit 36 and the connection portion (resin 46) and at the interface between the connection portion (resin 46) and the photoelectric conversion element 28. The fact that the connection portion (resin 46) has the same refractive index means, for example, that the difference between the refractive index of the resin 46 and the refractive index of the core material 360 is smaller than the difference between the refractive index of the cladding material forming the optical waveguide circuit 36 and the refractive index of the core material 360. In the following description, expressions such as a resin having the same refractive index as the core material may be used, but unless otherwise specified, they have the same meaning as described above.

[0027] (Alignment) In the package structure 1, the optical waveguide circuit 36 is a first optical waveguide circuit formed in the vicinity of the surface of the top plate 38 that adheres to the frame 34. The top plate 38 is formed of a light-transmissive member. Specifically, in the first embodiment, in the manufacturing process of the package structure 1, the optical waveguide circuit 36 is formed on a transparent (formed of a light-transmissive member such as glass) substrate as the top plate 38, and direct alignment is performed while looking through (visually recognizing) the input portion 28i of the photoelectric conversion element 28 and the light output portion 36o of the optical waveguide circuit 36 through this transparent top plate 38. In order to improve the alignment accuracy (hereinafter also referred to as "optical axis alignment accuracy"), it is important that a plurality of semiconductor chips 50 and the photoelectric conversion elements 28 mounted thereon are accurately arranged in alignment.

[0028] The core size of the optical waveguide circuit 36 (the width of the core material 360 in the cross-section parallel to the yz plane of FIG. 2) is generally several μm, and the requirement for the accuracy of optical axis alignment becomes strict. Since the package size is also increasing, the influence of misalignment of the photoelectric conversion element 28 cannot be ignored. In the present embodiment, solder bumps are used for connecting the connection terminals of the semiconductor chip 50 and the photoelectric conversion element 28, and high placement accuracy can be ensured by self-alignment during reflow of BGA (Ball Grid Array) mounting.

[0029] In order to obtain high placement accuracy by self-alignment, first, the accuracy of the pattern of the interposer 12 must be improved. For this purpose, it is preferable to form the pattern using equipment with high alignment accuracy during the manufacture of the interposer 12, and it is also preferable to adopt silicon or glass with high flatness as the material of the interposer 12.

[0030] Further, the top plate 38 is formed of glass having the same CTE as the interposer 12 as a material, so that the displacement between the interposer 12 and the top plate 38 does not increase due to thermal expansion and contraction.

[0031] In the present embodiment, the semiconductor chip 50 is mounted on the package substrate 10 using the interposer 12, but a glass core substrate may be used instead of the package substrate 10 and the interposer 12. The glass core substrate is flat and can be used in the manufacturing equipment of the previous process of the semiconductor, and has a thickness of about half of the package substrate 10 and can ensure the same rigidity as the package substrate 10. Therefore, by adopting a glass core substrate as the package substrate, the enlargement of the package substrate can be suppressed.

[0032] [Modification Example of the First Embodiment] With reference to FIGS. 3 to 5, the configuration of a modification example of the first embodiment will be described. In the following description, the same or equivalent components as those in the above-described first embodiment are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0033] FIG. 3 is a cross-sectional view showing an example of the package structure 1a. In the package structure 1a, semiconductor chips 501 and 502 are disposed on the interposer 12. A photoelectric conversion element 281 is disposed on the semiconductor chip 501, and a photoelectric conversion element 282 is disposed on the semiconductor chip 502. Further, the memory chip 561 is disposed on the interposer 12 adjacent to the semiconductor chip 501, and the memory chip 562 is disposed on the interposer 12 adjacent to the semiconductor chip 502. The semiconductor chips 501 and 502 and the memory chips 561 and 562 are each electrically connected to the interposer 12 by solder bumps 24. Also, underfill 26 is filled between each of the semiconductor chips 501 and 502 and the memory chips 561 and 562 and the interposer 12. The memory chip 561 is electrically connected to the semiconductor chip 501 via the interposer 12, and the memory chip 562 is electrically connected to the semiconductor chip 502 via the interposer 12.

[0034] As an arrangement (layout) of the photoelectric conversion element 28 and the semiconductor chip 50 that facilitates alignment during manufacturing, as shown in FIG. 3, by arranging the photoelectric conversion elements 281 and 282 together in the central portion of the chamber 52, the distance d from the center cp of the top plate 38 (or the package substrate 10) to the photoelectric conversion element 281 (for example, the distance from the center cp of the top plate 38 to the light receiving portion 201i of the photoelectric conversion element 281) becomes small, and the influence of magnification deviation due to Θ deviation during alignment or the difference in CTE between the top plate 38 and the package substrate 10 can be suppressed.

[0035] Regarding the θ shift and the magnification shift, reference is made to FIGS. 4 and 5 for description. FIG. 4 is a diagram schematically showing the θ shift. FIG. 4 shows a case where the photoelectric conversion elements 28a to 28c are arranged on the semiconductor chip 50. When based on the center cp of the top plate 38, the photoelectric conversion elements 28a to 28c are arranged at different positions. Let the distance between the photoelectric conversion element 28a and the center cp of the top plate 38 be da, the distance between the photoelectric conversion element 28b and the center of the top plate 38 be db, and the distance between the photoelectric conversion element 28c and the center of the top plate 38 be dc. Note that the distance from the center is the length obtained by projecting the distance between the center cp of the top plate 38 and the center of the photoelectric conversion element 28 in the x-axis direction. Also, although the case of the distance between the center of the top plate 38 and the center of the photoelectric conversion element 28 is described, the present disclosure is not limited to this case. The present disclosure can also be applied to the case of the distance between the center of the top plate 38 and the input portion 28i of the photoelectric conversion element 28.

[0036] The broken line indicates a case where a θ shift occurs from the photoelectric conversion element 28a to the photoelectric conversion element 28c. Since the positions of the photoelectric conversion elements 28a to 28c change due to the θ shift, the distance between the center of the photoelectric conversion element 28 and the center cp of the top plate 38 also changes. When a θ shift occurs, let the distance between the photoelectric conversion element 28a and the center cp of the top plate 38 be daθ, the distance between the photoelectric conversion element 28b and the center cp of the top plate 38 be dbθ, and the distance between the photoelectric conversion element 28c and the center cp of the top plate 38 be dcθ. As is clear from FIG. 4, the difference between daθ and da is smaller than the difference between dbθ and db, and is also smaller than the difference between dcθ and dc. Therefore, when the photoelectric conversion element is arranged at a position close to the center cp of the top plate 38, even if a θ shift occurs, the influence of the θ shift can be reduced.

[0037] Also, FIG. 5 is a diagram schematically showing the magnification shift. FIG. 5 shows a case where the photoelectric conversion elements 28a to 28c are arranged on the semiconductor chip 50, similar to FIG. 4.

[0038] The broken line indicates a case where a magnification shift occurs from the photoelectric conversion element 28a to the photoelectric conversion element 28c. Since the position of the photoelectric conversion element changes from 28a to 28c due to the magnification shift, the distance between the center of the photoelectric conversion element 28 and the center cp of the top plate 38 changes. When a Θ shift occurs, let the distance between the photoelectric conversion element 28a and the center cp of the top plate 38 be daM, the distance between the photoelectric conversion element 28b and the center cp of the top plate 38 be dbM, and the distance between the photoelectric conversion element 28c and the center cp of the top plate 38 be dcM. As is clear from FIG. 5, the difference between daM and da is smaller than the difference between dbM and db, and also smaller than the difference between dcM and dc. Therefore, when the photoelectric conversion element is arranged at a position close to the center cp of the top plate 38, even if a magnification shift occurs, the influence of the magnification shift can be reduced.

[0039] (First Method of Forming an Optical Waveguide Circuit) With reference to FIGS. 6 to 11, a method of forming an optical waveguide circuit 36 on a glass top plate 38 will be described. FIGS. 6 to 11 are diagrams showing an enlarged view of a portion near the light emitting portion 36o in FIG. 2, for example. FIG. 6 is a diagram showing a case where a core material and a cladding material are arranged on a glass substrate serving as a top plate.

[0040] First, as shown in FIG. 6, a first layer of cladding material 362 is formed on a glass substrate that will become the top plate 38 (hereinafter, may be simply referred to as "glass substrate 38"), and a core material 360 is formed on the cladding material 362. Then, a core pattern, which is a core having a predetermined shape extending in the xy-plane direction, is formed by photolithography, and a second layer of cladding material is formed on the core material and the cladding material on which the core pattern is formed. As a result, as shown in FIG. 6, a core material 360 and a cladding material 362 are formed on the glass substrate that will become the top plate 38. Note that the glass substrate is the one that becomes the top plate 38 in the package structure 1, and although the shape (such as thickness) of the top plate 38 of the package structure 1 may be different at the stage of forming the optical waveguide circuit 36, expressions such as "glass substrate that will become the top plate 38", "top plate 38", and "glass substrate" may be used to indicate the relationship with the top plate 38 of the package structure 1.

[0041] There are several methods for forming the core pattern. In the example of this embodiment, a photosensitive resin is used as the core material 361 and formed using photolithography.

[0042] Next, a mirror is formed on the light-emitting portion 36o of the optical waveguide circuit 36. FIG. 7 is a diagram showing the case where a resist is formed. FIG. 8 is a diagram showing the case where etching is performed. As shown in FIG. 6, after forming the second-layer cladding material 362, as shown in FIG. 7, a resist 364 is applied, and a pattern that is inclined in the thickness direction (inclined by an angle θr from the z-axis direction) is formed by harmonic exposure on the portion that will be the light-emitting portion 36o of the optical waveguide circuit 36. Then, as shown in FIG. 8, the resist 364, the cladding material 362, and the core material 360 are etched by anisotropic dry etching while maintaining the inclined pattern of the resist 364. The arrow A3 in the z-axis direction indicates the state where the radicals used for etching are irradiated. If the etching rates of the resist 364 and the cladding material 362 are the same, a resist 364 film with an inclination of θr = 45° in FIG. 7 may be formed. Also, when the etching rate of the cladding material 362 is lower than the etching rate of the resist 364, the inclination angle θr of the resist 364 is made larger than 45°, and when the etching rate of the cladding material 362 is higher than the etching rate of the resist 364, the inclination angle θr of the resist 364 is made lower than 45° so that the angle θc of the cladding material becomes 45°.

[0043] FIG. 9 is a diagram showing the case where the resist is removed. After the process of FIG. 8, the resist 364 is removed, and as shown in FIG. 9, a metal film 366 such as AL which becomes a reflective film (mirror) is sputter-deposited. When sputtering, it is preferable to sputter at an angle as shown by arrow A4 so as not to adhere to the wall surface 360s where the core is exposed. In that case, by arranging the optical waveguide circuit 36 so as to be in the same direction as the mirrors in other places, it becomes possible to process by full-surface sputtering at once. Also, a smoothing process may be performed on the cladding material 362 before sputtering as needed so that the mirror surface becomes smooth. The smoothing process is selected according to the material of the cladding material 362, such as heat treatment or chemical solution treatment.

[0044] Next, FIG. 10 is a diagram showing the case of removing unnecessary portions of the metal film. As shown in FIG. 10, using a resist pattern 368 which is a resist film having a predetermined shape as a mask, unnecessary portions of the metal film 366 are etched and removed. In this way, a mirror portion 370 is formed from the metal film 366. Finally, FIG. 11 is a diagram showing the case of removing the resist. The resist pattern 368 is removed, and as shown in FIG. 11, the light emitting portion 36o is completed.

[0045] Note that, in order to easily form a state of being connected to the photoelectric conversion element 28, it is also possible to previously fill the recess of the mirror portion 370 with a resin having a refractive index equivalent to that of the core material 360.

[0046] (Second forming method of optical waveguide circuit (first groove forming method)) Referring to FIGS. 12 to 21, another forming method of the optical waveguide circuit will be described. As a means for forming the optical waveguide circuit 36 on the top plate 38, there is also a method in which a glass substrate serving as the top plate 38 is used as a cladding layer, a groove is formed in the glass substrate, and the groove is used as the core of the optical waveguide. After forming the groove, a reflective film for the light emitting portion, filling of the core material, and formation of the cladding layer are performed, and the optical waveguide circuit is formed. First, the groove forming method will be described. In this first groove forming method, a core material is formed on a glass substrate by anisotropic dry etching using a resist as a mask. This will be described with reference to FIGS. 12 to 15. In FIGS. 12 to 21 below, the coordinate directions are set so that an optical waveguide circuit corresponding to the optical waveguide circuit 36 in FIG. 2 is formed.

[0047] FIGS. 12 and 13 are cross-sectional image diagrams in the direction of cutting the core of the optical waveguide. FIG. 12 shows a case where a resist pattern 480 is formed on the glass substrate that will become the top plate 38. FIG. 13 shows a case where dry etching is performed to form a groove. As a method of forming the groove, it can be appropriately set. For example, as one method, first, as shown in FIG. 12, patterning is performed so that the glass substrate that will become the top plate 38 is exposed in accordance with the core pattern of the optical waveguide circuit 36 by the resist pattern 480. Subsequently, as shown in FIG. 13, anisotropic dry etching is performed on the glass substrate using the resist pattern 480 as a mask. The arrow 5A in FIG. 13 indicates the etching radicals to be irradiated.

[0048] Figs. 14 and 15 are cross-sectional image diagrams along the optical waveguide. Fig. 14 shows a case where a resist pattern is formed in a portion of the glass substrate serving as the top plate where the light-emitting portion of the optical waveguide circuit is formed, and Fig. 15 shows a case where dry etching is performed to form a groove. Here, in the case of patterning the light-emitting portion 36o of the optical waveguide circuit 36, as shown in Fig. 14, the angle θp of the wall surface at the end of the core pattern corresponding to the light-emitting portion 36o of the optical waveguide circuit 36 is made to have an inclined shape of θp = 45° by harmonic exposure, and the shape of the depth direction (z-axis direction) of the resist pattern 480a is made inclined. Arrow A6 indicates harmonic exposure. Subsequently, as shown in Fig. 15, dry etching is performed to etch the resist pattern 480. By doing so, the etching of the glass substrate in the portion where the resist pattern 480 is formed can be delayed compared to the etching of the glass substrate in the portion where the resist pattern 480 is not formed, and the glass substrate can be inclined. In Fig. 15, the dashed line before dry etching indicates the resist pattern 480, and the resist pattern 480a indicates the shape of the resist pattern after dry etching. Also, arrow A7 indicates the state where radicals used for dry etching are irradiated.

[0049] Thereafter, by removing the resist pattern 480, a groove is formed in the glass substrate serving as the top plate 38.

[0050] (Second method for forming an optical waveguide (second method for forming a groove)) Referring to Figs. 16 to 21, a second method for forming a groove will be described. In this second method for forming a groove, a modified portion is formed on the surface of the glass substrate serving as the top plate 38 by a pulsed laser, and a core material is formed on the glass substrate by wet etching starting from that point. This will be described with reference to Figs. 16 to 21. Figs. 16 and 17 are cross-sectional image diagrams in the direction of cutting the core of the optical waveguide. Fig. 16 shows a case where a laser modification part is formed on the glass substrate serving as the top plate. Fig. 17 shows a case where wet etching is performed on the glass substrate serving as the top plate. As a second groove forming method for forming a groove in the glass substrate, as shown in Fig. 16, the focus of the pulsed laser is set at a portion close to the surface layer of the glass substrate serving as the top plate 38, and the pulsed laser is irradiated onto the portion where the core pattern of the optical waveguide circuit 36 is formed to modify the glass. The laser modification part 38m indicates the modified portion of the glass substrate. As shown in Fig. 17, starting from the laser modification part 38m, a groove 38e is formed by wet etching with a hydrofluoric acid solution.

[0051] Figs. 18 to 21 are diagrams showing a case of forming a core pattern in a portion of the glass substrate serving as the top plate where the light emitting part of the optical waveguide circuit is formed. Fig. 18 is a cross-sectional image diagram along the optical waveguide, showing a cross-sectional image of the incident depth of the pulsed laser when forming a laser modification part. Fig. 19 is a top view image of the laser modification part in Fig. 18. In Fig. 19, the laser modification part 38m is shown by a line, but it shows an image of the area where a plurality of pulsed lasers are incident according to the size of the core pattern. Fig. 20 is a cross-sectional image diagram after etching the laser modification part in Fig. 18. Fig. 21 is a top view image after etching. As shown in Fig. 18, the portion corresponding to the mirror of the light emitting part of the optical waveguide can form a shape of 45° obliquely as shown in Fig. 20 by adjusting the output of the pulsed laser and changing the depth of the laser modification part 38m. Also, by changing the shape of the laser modification part 38m when viewed in the xy plane as shown in Fig. 19, the planar area of the inclined portion corresponding to the mirror can be expanded as shown in Fig. 21.

[0052] (Second Forming Method of Optical Waveguide (Forming Method of Reflective Film and Cladding Material)) Referring to FIGS. 22 to 26, a method for forming a reflective film and a cladding material will be described. After forming grooves in a glass substrate using the above two groove forming methods, a metal material to be a reflective film is deposited on the entire surface. FIG. 22 is a diagram showing a case of forming a metal film on a glass substrate serving as a top plate. In FIG. 22, an aluminum film 366a is formed by sputtering. Arrow 8A indicates sputtering using aluminum.

[0053] FIG. 23 is a diagram showing a case of removing unnecessary portions of the aluminum film 366a. After the sputtering shown in FIG. 22, as shown in FIG. 23, only the portion corresponding to the light emitting portion 36o of the optical waveguide circuit 36 is covered with a resist pattern 364a, the aluminum film 366a of the other portions is etched, and the resist pattern 364a is removed.

[0054] Next, FIG. 24 shows a case where a core material is disposed on a glass substrate serving as a top plate. As shown in FIG. 24, a resin having a difference in refractive index from the glass substrate and serving as a core material 360a is deposited so as to fill the grooves of the glass substrate, and the surface is polished to leave only the core material 360a in the groove portion of the glass substrate.

[0055] FIG. 25 is a diagram showing a case where a cladding material and a resist pattern are disposed on a glass substrate serving as a top plate. As shown in FIG. 25, a resin having the same refractive index as the glass substrate and serving as a cladding material 362a is deposited thereon, a resist pattern 368a is formed so as to expose the portion corresponding to the light emitting portion 36o of the optical waveguide circuit 36, and the cladding material 362a is etched.

[0056] FIG. 26 is a diagram showing a case of disposing an embedding resin. After peeling of the resist pattern 368a, in order to connect to the photoelectric conversion element 28 as shown in FIG. 26, it is also possible to previously fill the etched portion with a resin (embedding resin 380) having the same refractive index as the core material.

[0057] Also, instead of the resin cladding material 362a, a glass film or the like having an opening previously disposed in the portion corresponding to the light emitting portion 36o of the optical waveguide circuit 36 may be attached.

[0058] (Method for bonding the top plate and the frame) Referring to FIG. 1, a method for bonding the top plate 38 and the frame 34 will be described. In the package structure 1, the adhesive 44 for bonding the frame 34 and the top plate 38 is a photosensitive curable resin. The specific bonding method of the top plate 38 and the frame 34 in the present embodiment is to use a photocurable resin for the adhesive 44 for bonding the top plate 38 and the frame 34 and the resin 46 for connecting the optical waveguide circuit 36 and the photoelectric conversion element 28, and arrange the photocurable resin on the frame 34 and the photoelectric conversion element 28. After the arrangement, the top plate 38 is covered on the package substrate 10 side (the top plate 38 is brought closer to the package substrate 10 side from the positive z-axis direction). When covering the top plate 38, alignment is performed while aiming at the optical waveguide circuit 36 and the photoelectric conversion element 28 from the upper part (positive z-axis direction) of the top plate 38, and the top plate 38 is arranged on the frame 34 and the photoelectric conversion element 28. Subsequently, by irradiating light, the adhesive 44 and the resin 46 are cured. In this way, it is possible to adopt a method of simultaneously performing the fixation of the optical axis position and the bonding of the top plate 38 and the frame 34.

[0059] The adhesive 44 for bonding the frame 34 and the top plate 38 uses the same member as the resin 46 connecting the optical waveguide circuit 36 and the photoelectric conversion element 28, especially for the purpose of alignment, and is not specialized for the purpose of bonding. If the bonding between the frame 34 and the top plate 38 is not sufficiently performed, there is a concern about the occurrence of peeling caused by the increase and decrease of the liquid flow of the coolant or the pressure generated by heat generation, or the leakage of the coolant 48.

[0060] Therefore, a groove structure is formed on the bonding surface side of the frame 34 with the top plate 38, and the contact area between the frame 34 and the adhesive 44 is increased to make the structure resistant to the stress in the shear direction. Also, the area of the outlet 34o is made larger than the area of the inlet 34i of the coolant (the cross-sectional area in the zy plane) so that the internal pressure of the chamber 52 does not increase even if the flow rate of the coolant fluctuates. Also, by adopting a method of sucking from the outlet 34o side of the coolant for the circulation of the coolant, the flow rate of the coolant is controlled (regulated) to suppress the increase in the internal pressure.

[0061] A temperature sensor 54 is attached to the frame 34 to measure the temperature of the chamber 52 or the coolant, and based on the measured temperature, the flow rate of the coolant can be controlled to maintain a certain temperature range.

[0062] (Coolant circulation system) Referring to FIGS. 27 and 28, the coolant circulation system will be described. The package structure 1 can also be applied to a circulation system for introducing coolant into the package structure 1. For example, a circulation system 100 for introducing coolant into the package structure 1 is connected to the outlet 34o, discharges the coolant from the chamber 52, and includes a pump 102 that generates a liquid flow towards the inlet 34i, and a controller 106 that monitors the temperature of the chamber 52 and controls the flow rate of the liquid flow and the temperature of the coolant according to the monitored temperature. The outlet 34o can be made to have a larger cross-sectional area with respect to the liquid flow than the inlet 34i. In the circulation system 100, the coolant flowing out of the chamber 52 is cooled by passing through a chiller or radiator and then returns to the chamber 52 as a liquid flow.

[0063] FIG. 27 is a diagram showing an example of the coolant circulation system. FIG. 27 shows a system for adjusting the coolant flow rate and the temperature of the chiller with a controller. Specifically, the circulation system 100 includes the package structure 1, a pump 102, a chiller 104, and a controller 106. The pump 102 is disposed on the outlet 34o side of the chamber 52 of the package structure 1 and discharges the coolant from the chamber 52. The chiller 104 cools the coolant discharged by the pump 102. The coolant whose temperature has been adjusted by the chiller 104 is introduced into the chamber 52 from the inlet 34i of the chamber 52.

[0064] Note that FIG. 28 is a diagram showing an enlarged view of the chamber. The outlet 34o has a larger cross-sectional area with respect to the liquid flow than the inlet 34i. FIG. 28 shows a case where the chamber 52 has one outlet 34o and three inlets 34i. Even when the number of semiconductor chips or the like included in the chamber 52 increases and the chamber 52 needs to be enlarged, as shown in FIG. 28, by inclining the wall on the outlet 34o side of the chamber 52, the resistance of the liquid flow can be reduced, and the temperature control of the chamber 52 becomes easier while suppressing the internal pressure.

[0065] [Second Embodiment] (Configuration) Referring to FIGS. 29 and 30, the configuration of the second embodiment of the present invention is shown. FIG. 29 is a cross-sectional view showing an example of the package structure 1b. In the package structure 1b, the optical waveguide circuit 36b is a second optical waveguide circuit formed in the vicinity of the surface opposite to the surface in contact with the frame 34 of the top plate 38. The top plate 38 is formed of a translucent member, and through holes 601 (or 602) penetrating both surfaces thereof are formed. The through holes 601 (or 602) are filled with a resin having the same refractive index as the member forming the core of the second optical waveguide circuit. The photoelectric conversion element 281 (or 282) is connected to the second optical waveguide circuit through the through hole 601 (or 602). In the following description, the same or equivalent components as those in the first embodiment described above are denoted by the same reference numerals, and the description thereof is simplified or omitted.

[0066] In the package structure 1 of the first embodiment, the surface of the top plate 38 on which the optical waveguide circuit 36 is formed is the inner surface of the chamber 52, whereas in the package structure 1b of the second embodiment, the optical waveguide circuit 36b forms the outer surface of the chamber 52, which is different from the first embodiment.

[0067] In the package structure 1 of the first embodiment, the optical waveguide circuit 36 is adhered to the frame 34, and there is a risk of deformation of the optical waveguide circuit 36 due to stress caused by pressure or heat in the chamber 52. On the other hand, in the package structure 1b of the second embodiment, since the optical waveguide circuit 36b does not contact the frame 34 and is arranged away from the chamber 52, the risk is eliminated. Further, since the optical waveguide circuit 36b is outside the chamber 52, post-formation or modification of the optical waveguide circuit 36a is also possible.

[0068] The transmission of the optical signal from the optical waveguide circuit 36b formed outside the top plate 38 to the photoelectric conversion element 281 is performed through the through holes 601 formed in the top plate 38 which is a glass substrate. The through holes 601 are filled with a transparent resin having a refractive index difference from that of the glass, and the resin between the top plate 38 and the photoelectric conversion element 281 has substantially the same refractive index as the resin filled in the through holes 601. Also, the relationship between the photoelectric conversion element 282 and the through hole 602 is the same as the relationship between the photoelectric conversion element 281 and the through hole 601.

[0069] The formation of the through holes 601 and 602 in the glass substrate is performed by forming a modified layer (laser modified part, micro fracture layer) in the depth direction of the glass substrate to be the top plate 38 by a pulsed laser and performing infiltration etching with a diluted hydrofluoric acid solution. The sizes of the formed through holes 601 and 602 can be, for example, several μm to several tens of μm in diameter (when viewed in the xy plane direction).

[0070] Regarding the shape of the through holes 601 and 602 in the x-axis direction, it can be adjusted from an X shape to a straight shape by adjusting the concentration of the diluted hydrofluoric acid solution and the intensity of the pulsed laser according to the depth of the glass substrate to be the top plate 38.

[0071] The formed through holes 601 and 602 are filled with a transparent resin having a refractive index higher than that of the glass and used as a waveguide for optical signals. For example, by embedding an epoxy resin having a refractive index difference of about 0.2% to 6% from the refractive index of the glass substrate to be the top plate 38, the loss of the optical signal can be transmitted with less loss.

[0072] In the second embodiment, the mirror that guides the optical signal from the optical waveguide circuit 36b formed on the top plate 38 to the through holes 601 and 602 of the top plate 38 can be manufactured relatively easily compared to the case of the first embodiment.

[0073] For example, in the first embodiment, when the light is bent by 90° and emitted from the optical waveguide circuit 36, a 45° slope is created, and the surface of the slope is covered with a metal film to form a mirror, which is filled with a resin having the same refractive index as the core. On the other hand, in the second embodiment, after filling the portion to be bent by 90° with a resin having the same refractive index as the core, the filled resin is cut to form a 45° slope, and a mirror can be formed by making the side opposite to the surface facing the core air, and there is no need to cover it with a metal film. FIG. 30 is a diagram showing an enlarged view of the portion of the photoelectric conversion element 281 in the package structure 1b. FIG. 30 shows a connection image of the photoelectric conversion element 28 and the optical waveguide circuit 36b as a cross-sectional view. As shown in FIG. 30, a 45° slope is formed in the light emitting portion 36bo. Note that, since the photoelectric conversion element 282 has the same configuration as the photoelectric conversion element 281, the description thereof is omitted.

[0074] (Method of manufacturing the mirror) Referring to FIGS. 31 to 35, a method for fabricating a mirror will be described. FIGS. 31 to 35 are diagrams showing an enlarged view of a portion near the light emitting portion 36o in FIG. 30, for example. FIG. 31 is a diagram showing a case where a core material and a cladding material are disposed on a glass substrate serving as a top plate. A specific method for fabricating the mirror of the optical waveguide circuit 36b is as follows. First, as shown in FIG. 31, a first layer of cladding material, a core material, and a second layer of cladding material are formed on a glass substrate serving as the top plate 38. In the glass substrate, before disposing the cladding material and the core material, a through hole 601 is formed and filled with a resin 60r. The resin 60r is a resin having a refractive index equivalent to that of the core material 360 of the optical waveguide circuit 36b. The end portion of the core material 360b of the optical waveguide circuit 36b is exposed by removing the cladding material 362b so that the through hole 601 on the surface of the top plate 38 is exposed. For example, etching is performed to expose the through hole 60. The resist pattern 364b disposed on the cladding material 362b has a shape that exposes the through hole 60, and the arrow A9 indicates the state where radicals used for etching are irradiated.

[0075] Next, FIG. 32 is a diagram showing a case where a resin material is introduced into the through hole. After removing the resist pattern 364b as shown in FIG. 32, the portion where the cladding material 362b has been removed is further filled with the resin 60r and polished so that the surface of the resin 60r coincides with the surface of the cladding material 362b.

[0076] Next, FIG. 33 is a diagram showing a case where a resist pattern is formed. As shown in FIG. 33, a photosensitive resist layer is disposed on the cladding material 362b and the resin 60r formed in FIG. 32, and a resist pattern 368b is formed by forming the same shape as the mirror shape by harmonic exposure on the embedded resin with a direct drawing exposure machine. The arrow A10 indicates the harmonic exposure.

[0077] Next, FIG. 34 is a diagram showing a case where etching is performed to form a mirror shape. As shown in FIG. 34, the underlying resin 60r is etched together with the resist pattern 368b by anisotropic dry etching, and the shape of the resist pattern 368b is transferred to the resin 60r on the through hole 601. Arrow A11 indicates the state in which radicals used for etching are irradiated.

[0078] Next, FIG. 35 is a diagram showing a case where the resist pattern is removed. As shown in FIG. 35, the resist pattern 368b is removed, and the mirror is completed, and the light emitting portion 36bo of the optical waveguide circuit 36b is formed.

[0079] [First Modification of the Second Embodiment] (Configuration) With reference to FIG. 36, the configuration of the first modification of the second embodiment will be described. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0080] FIG. 36 is a diagram showing an example of the package structure 1c in cross section. FIG. 36 shows the configuration of a modified example of the second embodiment in which optical waveguide circuits are formed on both sides of the top plate. In the package structure 1c, the top plate 38 includes, as optical waveguide circuits, a first optical waveguide circuit (optical waveguide circuit 36c2) formed in the vicinity of the surface of the top plate 38 on the side in contact with the frame 34 of the top plate 38 and a second optical waveguide circuit (optical waveguide circuit 36c1) formed in the vicinity of the surface of the top plate 38 opposite to the surface in contact with the frame 34 of the top plate 38. The top plate 38 is formed of a translucent member, and through holes 601 and 602 penetrating both sides thereof are formed. The through holes 601 and 602 are filled with a resin having a refractive index equivalent to that of the member forming the core of the first optical waveguide circuit and the member forming the core of the second optical waveguide circuit. The photoelectric conversion elements 281 and 282 are connected to the first optical waveguide circuit, and the first optical waveguide circuit is connected to the second optical waveguide circuit through the through hole. The package structure 1c is different from the package structures of the above-described embodiments and modified examples in that optical waveguide circuits (the optical waveguide circuit 36c1 arranged on the plus z-axis direction side and the optical waveguide circuit 36c2 arranged on the minus z-axis direction side) are arranged mainly on both sides of the top plate 38.

[0081] Regarding the package structure 1b of the second embodiment in FIG. 29, when the distance (distance in the z-axis direction) between the top plate 38 in the chamber 52 and the photoelectric conversion element 28b is large, the optical signals passing through the through holes 601 and 602 may be diffused. In such a case, as shown in FIG. 36, optical waveguide circuits 36c1 and 36c2 are formed on both surfaces of the top plate 38, and mirrors with a predetermined shape are formed on the optical waveguide circuits 361 and 362 so that the light beam of the optical signal can reach the photoelectric conversion elements 281 and 282 efficiently. In the case of FIG. 36, the optical signal incident from the optical cable 421 travels in the minus x-axis direction through the optical waveguide circuit 36c1, changes its direction in the minus z-axis direction at a predetermined position, and enters the through hole 601. The optical signal emitted from the through hole 601 travels in the plus x-axis direction through the optical waveguide circuit 36c2, changes its direction in the minus z-axis direction at a predetermined position, and enters the photoelectric conversion element 281. Also, the optical signal incident from the optical cable 422 travels in the plus x-axis direction through the optical waveguide circuit 36c1, changes its direction in the minus z-axis direction at a predetermined position, and enters the through hole 601. The optical signal emitted from the through hole 601 travels in the plus x-axis direction through the optical waveguide circuit 36c2, changes its direction in the minus z-axis direction at a predetermined position, and enters the photoelectric conversion element 282.

[0082] (Method of creating a mirror) Referring to FIGS. 37 to 44, a method for fabricating a mirror will be described. In FIGS. 37 to 44, for ease of understanding, a case where the optical waveguide extends in the x-axis direction is shown, but this does not indicate that the content of the present disclosure is limited in this case. The mirror of the optical waveguide circuit 36c2 in the chamber 52 in the first modification of the second embodiment needs to use a metal film. FIG. 37 is a diagram showing a case of forming a metal film. FIG. 38 is a diagram showing a case of forming a resist pattern. FIG. 39 is a diagram showing a case of disposing a resin. A specific fabrication method can apply the same method as the fabrication method shown in the second embodiment. For example, for the portion with the through hole, after forming the shape (core material 360c2 and cladding material 362c2) shown in FIG. 35, a metal film 366c is formed by sputtering as shown in FIG. 37. Arrow A12 indicates the sputtering of the metal film. Next, as shown in FIG. 38, a resist pattern 364c2 is formed only on the portion where the metal film 366c remains, and the unnecessary metal film of the metal film 366c2 is removed. Next, after removing the resist pattern 364c2, a resin 60c2r is embedded as shown in FIG. 39 so that the metal film 366c is not corroded.

[0083] In FIG. 39, for the resin 60c2r to be embedded, a resin having a refractive index equivalent to that of the core material 360c2 of the optical waveguide circuit 36c2 may be used in accordance with the mirror for transmitting an optical signal from the optical waveguide circuit 36c2 to the photoelectric conversion element 28. In FIG. 39, the embedded resin 60cr is polished accordingly, and the surface of the embedded resin 60c2r (the surface in the minus z-axis direction) is made to coincide with the surface of the cladding material 362c2.

[0084] On the other hand, when transmitting an optical signal from the optical waveguide circuit 36c1 to the photoelectric conversion element 28 arranged in the minus z-axis direction, the mirror in this case is opposite to the direction of the light-emitting portion 36c2o of the optical waveguide circuit 36c2 shown in FIG. 39. Also, considering the distance from the photoelectric conversion element 28, a mirror shape that condenses light onto the photoelectric conversion element 28 is formed. FIG. 40 is a diagram showing the case of forming a resist pattern. Specifically, in advance, a clad material 362c1 and a core material 360c1 are formed on a glass substrate that will become the top plate 38, an opening is formed at a location that will become the light-emitting portion 36c1o, and the resin 60c1r is filled. Next, as shown in FIG. 40, the resist pattern 368c1 at the location where the mirror is to be formed is formed into a concave shape by harmonic exposure (arrow A13) of a direct drawing exposure machine. Next, FIG. 41 is a diagram showing the case of etching. As shown in FIG. 41, by etching the resist pattern 368c1 and the embedded resin by anisotropic etching, a concave mirror shape is formed, and a light-emitting portion 36c1o that emits an optical signal in the minus z-axis direction is formed. Arrow A14 shows the state where radicals used for etching are irradiated.

[0085] Next, the resist pattern 368c1 is removed, and sputtering is performed from an oblique direction (arrow A15) so that a metal sputtered film is not attached to the vertical portion in the same manner as the sputtering of the metal film shown in FIG. 9. FIG. 42 is a diagram showing the case of peeling the resist. As shown in FIG. 42, the metal film 366c1 does not adhere to the vertical surface of the optical waveguide circuit 36c1 (the surface facing the x-axis direction) and the inclined surface portion of the mirror in contact with the vertical surface (the portion of the resin 60c1r).

[0086] Next, FIG. 43 is a diagram showing the case of removing an unnecessary portion of the metal film 366c1. As shown in FIG. 43, a resist pattern 369c1 is formed only on the portion where the metal film 366c1 is to be left, and the unnecessary metal film of the metal film 366c1 is removed.

[0087] Next, FIG. 44 is a diagram showing the case where the resin is disposed. After removing the resist pattern 369c1, as shown in FIG. 44, a resin 366c1r having a refractive index equivalent to that of the core of the optical waveguide circuit 36c1 is embedded and polished so that the surface becomes the same as the cladding layer.

[0088] In addition, in order to reduce costs, a large number of through holes filled with resins having a refractive index difference in the top plate 38 are formed in advance, and a through hole to be used is selected from among them to form an optical waveguide circuit, so that generalization can be achieved and mass production becomes easy. Further, the refractive indices of the cores of the optical waveguide circuits 36c1 and 36c2 and the refractive indices of the resins filled in the through holes 601 and 602 (the refractive index of the resin 60c1r and the refractive index of the resin 60c2r) can be made equivalent, but the present disclosure is not limited to this case. It is also possible to make the refractive index of the resin 60c1r different from the refractive index of the resin 60c2r.

[0089] [Second Modification of the Second Embodiment] (Configuration) With reference to FIG. 45, the configuration of the second modification of the second embodiment of the present invention will be described. FIG. 45 is a diagram showing an example of the package structure 1d in cross section. In the following description, the same or equivalent components as those in the above-described embodiments and modifications are denoted by the same reference numerals, and the description thereof is simplified or omitted.

[0090] In the package structure 1d, the top plate 38 is formed of a translucent member, and the optical waveguide circuit 36d is a third optical waveguide circuit formed in the vicinity of the surface opposite to the surface in contact with the frame 34 of the top plate 38. On the third optical waveguide circuit, an electrical wiring layer 62 is formed which is electrically connected by the package substrate 10 and the wire wiring 64 or the flexible substrate and in which a first opening (opening 62o1) for exposing the third optical waveguide circuit is formed. On the electrical wiring layer 62, optical components 611 and 612 are mounted which are electrically connected to the electrical wiring layer 62 and connected to the third optical waveguide circuit exposed in the first opening of the electrical wiring layer 62. The top plate 38 is formed with through holes 601 and 602 penetrating both of its surfaces, and the through holes 601 and 602 are filled with a resin having the same refractive index as the member forming the core of the third optical waveguide circuit. The optical component 611 (or 612) and the photoelectric conversion element 281 (or 282) are connected via the through hole 601 (or 602) and the third optical waveguide circuit. The package structure 1d of the second modification of the second embodiment is different from the first modification of the second embodiment in that the optical switch devices 611 and 612 are arranged on the optical waveguide circuit 36.

[0091] By mounting the optical switch devices 611 and 612, which are optical components, on the upper part (plus z-axis side) of the top plate 38 with respect to the plurality of semiconductor chips 501 and 502 in the chamber 52, efficient optical signal distribution becomes possible.

[0092] Specifically, the optical switch device 611 can switch whether the optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 282. Also, the optical switch device 612 can switch whether the optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 281.

[0093] Generally, chiplets with multiple semiconductor chips mounted in a package are effective in shortening the development period and reducing costs. The number of semiconductor chips to be mounted is also increasing, and the information between semiconductor chips is also required to be speeded up. Optical communication is also required for communication between the mounted semiconductor chips. In order to efficiently utilize the optical waveguide circuit serving as the communication network, a switching device for distributing communication is required.

[0094] In the second modification of the second embodiment, an electrical wiring layer 62 is formed on the upper part of the optical waveguide circuit 36d formed outside the top plate 38, and an opening 62o1 of the electrical wiring layer 62 serving as an input / output part of an optical signal is formed so that the optical switch devices 611 and 612 can be connected to the optical signal of the optical waveguide circuit 36d. The electrical wiring layer 62 is arranged on the optical waveguide circuit 36d using, for example, solder. In addition, although the case of forming the opening 62o1 is described, the opening 62o1 does not have to be left as a space. By filling and curing a resin having the same refractive index as the member (core material 360) for forming a core between the optical switch device, the opening 62o1, and the electrical wiring layer 62, the connection loss of the optical signal can be suppressed, and the electrical connection reliability of the optical switch device can also be improved.

[0095] The power supplies of the optical switch devices 611 and 612 supply power to the electrical wiring layer 62 from the package substrate 10 through wire wirings 64. Power supply by other flexible substrates or the like for the wire wirings is also possible.

[0096] With this structure, the circuit of the optical waveguide circuit 36d does not become complicated, and communication between the semiconductor chips 501 and 502 in the package can be efficiently performed. Furthermore, for optical communication from the outside, the optical switch devices 611 and 612 can directly distribute it to the semiconductor chips 501 and 502 in the package.

[0097] In addition, by placing components on the surface of the top plate 38 outside the chamber 52, it becomes necessary to form a mirror that transmits an optical signal in a direction opposite to the direction in which the mirror of the optical waveguide circuit 36d transmits the optical signal to the through holes 601 and 602. Therefore, the method for forming the mirror on the top plate 38 outside the chamber 52 is formed in the same manner as the mirrors of the optical waveguide circuits 36c1 and 36c2 inside the chamber 52 in the first modification of the second embodiment.

[0098] Further, when the electrical wiring layer 62 is disposed on the third optical waveguide circuit (optical waveguide circuit 36d), it has a second opening (opening 62o2) that exposes any one or two or more of the locations where the frame 34 and the top plate 38 are adhered, the locations where the photoelectric conversion elements 281 and 282 are disposed, and the locations where the alignment marks are disposed. When adhering the top plate 38 and the frame 34, alignment is performed while confirming the positions of the photoelectric conversion elements 281 and 282, the positions of the through holes 601 and 602, and the position of the frame 34 through the transparent top plate 38 and the opening 62o2 so that the connection portions of the optical signals of the photoelectric conversion elements 281 and 282 coincide with the positions of the through holes 601 and 602. After alignment, the photocurable adhesive between the frame 34 and the top plate 38 is fixed with ultraviolet light. Although the case where the opening 62o2 of the electrical wiring layer 62 has a shape that exposes the location where the frame 34 and the top plate 38 are adhered and the locations where the photoelectric conversion elements 281 and 282 are disposed has been described, the present disclosure is not limited to this case. For example, when alignment marks for positioning are disposed on the package substrate 10, the opening may expose any one or two or more of the locations where the frame 34 and the top plate 38 are adhered, the locations where the photoelectric conversion elements 281 and 282 are disposed, and the locations where the alignment marks are disposed. Specifically, the case where the opening 62o2 exposes the location where the frame 34 and the top plate 38 are adhered and the locations where the photoelectric conversion elements 281 and 282 are disposed can be considered. Alternatively, when alignment marks are used, the case where the opening exposes the location where the alignment marks are disposed can be considered. The alignment marks may or may not be disposed. Also, there may be one alignment mark or two or more alignment marks. The entire or a part of the location where the frame 34 and the top plate 38 are adhered may be exposed.

[0099] Note that, as a modification of the package structure 1d, it is also possible to arrange an optical waveguide circuit (a fourth optical waveguide circuit) inside the top plate 38 (inside the chamber 52). In this case, the top plate 38 further includes a fourth optical waveguide circuit formed in the vicinity of the surface of the top plate 38 that contacts the frame 34 of the top plate 38. The fourth optical waveguide circuit is connected to the third optical waveguide circuit (optical waveguide circuit 36d) via through-holes 601 and 602, and the optical component 611 (or 612) and the photoelectric conversion element 281 (or 282) are connected via the through-hole 601 (or 602), the third optical waveguide circuit, and the fourth optical waveguide circuit.

[0100] [Third Embodiment] (Configuration) Referring to FIGS. 46 and 47, the configuration of the third embodiment of the present invention will be described. FIG. 46 is a cross-sectional view showing an example of the package structure 1d. The package structure 1e is different from the first and second embodiments in that the chamber portion 80 is disposed on the package substrate 10, and a chamber 52 is formed between the chamber portion 80 and the package substrate 10. Coolant flows into the chamber 52 from the inlet 80i of the chamber portion 80 and flows out from the outlet 80o of the chamber portion 80. In the following description, the same or equivalent components as those in the above-described embodiments and modifications are denoted by the same reference numerals, and the description thereof is simplified or omitted. Note that, since the "chamber portion" has a function that also serves as a top plate and a frame, it can also be referred to as a "top plate" and a "frame".

[0101] In the third embodiment, an optical waveguide circuit 36e is formed on the package substrate 10, and the photoelectric conversion elements 281 and 282 are adhered so that the light-emitting portion of the optical signal of the optical waveguide circuit 36e and the light-input portions of the photoelectric conversion elements 281 and 282 are aligned. The resin 46e used as the adhesive has a refractive index equivalent to that of the optical waveguide circuit 36e.

[0102] Near the center of the package substrate 10, memory chips 701 and 702 are arranged, and a semiconductor chip 501 serving as a processor is arranged between the photoelectric conversion element 281 and the memory chip 701. Also, a semiconductor chip 502 is arranged between the photoelectric conversion element 282 and the memory chip 702. In the area where the memory chips 701 and 702 and the semiconductor chips 501 and 502 are arranged, the layer of the optical waveguide circuit 36e is removed, and the memory chips 701 and 702 and the semiconductor chips 501 and 502 are electrically connected to the package substrate 10 by solder bumps 71 for power supply. Also, underfill 72 is filled between the package substrate 10, the memory chips 701 and 702, and the semiconductor chips 501 and 502.

[0103] By making the terminals on the substrate surfaces (the surfaces on the package substrate 10 side) of the semiconductor chips 501 and 502 and the memory chips 701 and 702 only power supply terminals, the voltage distribution of the power supply can be made constant, enabling stable operation.

[0104] The optical signal passes through the optical waveguide circuit 36e and is transmitted to the semiconductor chips 501 and 502 via the photoelectric conversion element 281 (or 282). An example of the path of the optical waveguide circuit 36e is shown in FIG. 47 as a top view of the package substrate 10. FIG. 47 is a diagram showing an image of the top surface of the package structure 1e. The connector 40 receives an optical signal input from the outside of the package structure 1e. The optical signal passes through the optical waveguide circuit 36eL and is transmitted to the photoelectric conversion element 28L in the chamber 52. The photoelectric conversion element 28L in FIG. 47 corresponds to the photoelectric conversion element 281 in FIG. 46, and the optical waveguide circuit 36eL in FIG. 47 corresponds to the optical waveguide circuit 36e in FIG. 46.

[0105] Return to the description of FIG. 46. The semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 are arranged on the package substrate 10. In the chamber 52, from the side of the surfaces of the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 opposite to the surfaces in contact with the package substrate 10, a bridge substrate 731 (or 734) for connecting the semiconductor chip 501 (or 502) and the photoelectric conversion element 281 (or 282) is further provided. Also, the bridge substrate can connect a plurality of components (for example, semiconductor chips) to each other in addition to the semiconductor chips and the photoelectric conversion elements. Specifically, the photoelectric conversion elements 281 and 282 and the semiconductor chips 501 and 502, and the semiconductor chips 501 and 502 and the memory chips 701 and 702 perform electrical signal exchange through the bridge substrates 731 to 734, which are connected to the electrical connection terminals arranged on the surfaces opposite to the package substrate 10 side. For example, the power supplies of the semiconductor chips 501 and 502 and the memory chips 701 and 702 are supplied from the package substrate 10, and the power supply of the photoelectric conversion element 281 (or 282) is supplied to the semiconductor chip 501 (or 502) via the bridge substrate 731 (or 734). Also, the semiconductor chip 501 (or 502) transmits and receives electrical signals to and from the memory chip 701 (or 702) through the bridge substrate 731 (or 734). Note that the components on the bridge substrates 731 to 734 are electrically connected by solder bumps. Also, the space between the bridge substrates 731 to 734 and the components on the bridge substrates 731 to 734 is filled with underfill 75. Note that when connecting a plurality of semiconductor chips to each other by a bridge substrate, it is not limited to the case where all of the plurality of semiconductor chips are connected, and a specific set of semiconductor chips among the plurality of semiconductor chips may be connected. Also, when connecting two semiconductor chips, they may be connected by one bridge substrate or two or more bridge substrates.

[0106] The chamber portion 80 surrounding the chamber 52 for cooling the semiconductor chips 501 and 502, the memory chips 701 and 702, and the photoelectric conversion elements 281 and 282 is adhered on the package substrate 10. Also, a temperature sensor 81 is disposed in the chamber portion 80, and a stable temperature can be obtained by measuring the temperature of the chamber 52 and controlling the liquid flow of the coolant. Also, similar to the case of the first embodiment of FIG. 28, the outlet 80o is larger than the inlet 80i of the coolant so that the pressure in the chamber 52 does not increase significantly. Also, all the connection terminals are covered with underfill.

[0107] (Alignment) The alignment between the photoelectric conversion elements 281 and 282 and the optical waveguide circuit 36e is performed by using a photo-curable resin 46e as an adhesive and aligning the photoelectric conversion elements 281 and 282 with the resin 46e using a high-precision mounter. Thereafter, the photoelectric conversion elements 281 and 282 are mounted on the optical waveguide circuit 36e and at the same time irradiated with light for temporary fixing, and finally cured by heat. High-precision alignment is possible in such a way.

[0108] (Another method of alignment) As another method, Fig. 48 is a diagram showing a method for aligning a photoelectric conversion element. Fig. 48 shows an enlarged view of a portion including the light-emitting portion 36eo of the optical waveguide circuit 36e. As a method for alignment, first, as shown in Fig. 48, a metal film 76 having a difference in wettability with respect to the cladding material of the optical waveguide circuit 36b and the resin 46e as an adhesive for the photoelectric conversion elements 281 and 282 is formed on the optical waveguide circuit 36e by a metal sputtering, photolithography, and etching process in accordance with the sizes and arrangements of the photoelectric conversion elements 281 and 282. The photoelectric conversion elements are arranged with the liquid resin 46e sandwiched therebetween on the metal film 76, and the photoelectric conversion elements are moved to accurate positions by a self-alignment effect due to the surface tension of the resin 46e and fixed by heat curing. Fig. 49 is a diagram showing an enlarged view of the photoelectric conversion element 28 and the optical waveguide circuit 36e. When using this method, the metal film 76 is arranged between the photoelectric conversion element 28 and the optical waveguide circuit 36e.

[0109] When specifically implementing this method, as an example, the aluminum film used for mirror formation is left as the metal film 76 in accordance with the size of the photoelectric conversion element 28. Subsequently, by creating a difference in wettability through CF4 / O2 plasma treatment and arranging the photoelectric conversion element 28 using the resin 46e as an adhesive that wets well with hydrophilicity, the photoelectric conversion element 28 can be arranged on the optical waveguide circuit 36e by a self-alignment effect at a predetermined position. In such a case, it is not necessary to use a high-precision mounter for alignment, and the resin 46e does not have to be a photocurable resin.

[0110] (Effect of the bridge substrate) The bridge substrates 731 to 734 can not only shorten the transmission distance of electrical signals, but also have a simpler structure compared to the case of embedding electrical wiring in the package substrate 10, reducing the manufacturing cost, and increasing the yield rate for connection after chip mounting. Regarding the countermeasure for misalignment during the mounting of the semiconductor chips 501 and 502, a bridge substrate assuming misalignment can be prepared in advance, and the yield rate can be improved by selecting one that matches the misalignment.

[0111] Moreover, the bridge substrates 731 to 734 are smaller than the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282, and can obtain a sufficient cooling effect without interfering with the cooling of the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282.

[0112] Conventionally, using a bridge substrate on the surface opposite to the package substrate of a semiconductor chip has a risk of breaking due to the influence of warping caused by the heat of the package substrate, and there is a problem of reduced reliability. In this embodiment, since liquid cooling is used and the temperature can be kept constant by the liquid flow, there is little thermal fluctuation, and the risk of breakage caused by the package substrate can be reduced.

[0113] [Modification of the Third Embodiment] Referring to FIG. 50, a modification of the third embodiment will be described. When applying a structure using a conventional cooling mechanism such as a heat sink instead of the bridge substrate as in the third embodiment to a chamber structure, by making the CTE of the lid material disposed between the semiconductor chips equivalent to the CTE of Si or glass used for the package substrate 10, the risk of breakage can be suppressed. FIG. 50 is a cross-sectional view showing an example of the package structure 1f. As shown in FIG. 50, a depression may be provided in the lid 90, and the lid 90 may be adhered so as to be in close contact with the semiconductor chips 501 and 502, etc. using solder bumps or a highly thermally conductive paste 91. For example, ceramics can be applied to the material of the lid 90.

[0114] Between the package substrate 10 and the semiconductor chip 501, between the package substrate 10 and the memory chip 701, between the package substrate 10 and the semiconductor chip 502, and between the package substrate 10 and the memory chip 702, they are connected by solder bumps 93. Also, between the package substrate 10 and the semiconductor chip 501, between the package substrate 10 and the memory chip 701, between the package substrate 10 and the semiconductor chip 502, and between the package substrate 10 and the memory chip 702, underfill 94 is filled.

[0115] Also, between the bridge substrate 735 and the memory chip 701, between the bridge substrate 735 and the memory chip 701, between the bridge substrate 736 and the memory chip 702, and between the bridge substrate 736 and the memory chip 702, they are connected by solder bumps 95. Also, underfills 96 are filled between the bridge substrate 735 and the memory chip 701, between the bridge substrate 735 and the memory chip 701, between the bridge 736 and the memory chip 702, and between the bridge substrate 736 and the memory chip 702. Also, between the lid 90 and the heat dissipation fins 92, they are adhered by paste 97.

[0116] The lid 90 is formed of a material with a low CTE and a high thermal conductivity, such as ceramic for example. By fixing the semiconductor chips 501 and 502 by the lid 90 between the heat dissipation fins 92 and the semiconductor chips 501 and 502, the stress applied to the bridge substrates 735 and 736 can be suppressed. In particular, silicon carbide (SiC), aluminum nitride (AlN), silicon nitride (Si3N4), etc. have the same CTE as the semiconductor chips and also have a high thermal conductivity, so they can be applied as the material for the lid 90.

[0117] In FIG. 50, it is assumed that an organic package substrate 10 with a low CTE is used, but if a glass core substrate or a ceramic substrate is used instead of the package substrate 10, higher reliability can be obtained.

[0118] The bridge substrate and lid method shown in FIG. 50 can also be used to shorten the transmission distance of electrical signals and is also effective in improving the yield rate for conventional packages. When using a lid for cooling the photoelectric conversion element, it is also possible to additionally provide a mechanism for forcibly cooling the lid.

[0119] [Fourth Embodiment] Referring to FIG. 51, the configuration of the fourth embodiment of the present invention will be described. FIG. 51 is a diagram showing an example of the package structure 1g in cross section. The package structure 1g includes an interposer 200 disposed on a package substrate 10, a chamber portion 80 is disposed in the interposer 200, and semiconductor chips 501 and 502 and photoelectric conversion elements 281 and 282 are mounted on the interposer 200. The interposer 200 is formed of silicon or glass. In the following description, the same or equivalent components as those in the above-described embodiments and modified examples are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0120] In the fourth embodiment, an interposer 200 on which an optical waveguide circuit 36b is formed is mounted on the package substrate 10. Wiring layers are formed on both sides of the interposer 200, and electrical connection terminals (electrical terminals, connection terminals) are formed in the wiring layer 202 on the package substrate 10 side. The electrical connection terminals of the wiring layer 202 are electrically connected to the package substrate 10 through solder bumps 204. In addition, a TGV (Through Glass Via) 203 is formed in the interposer 200, and the wiring layer 202 on the package substrate 10 side and the wiring layer 201 on the opposite side are electrically connected through an electrical conduction layer formed in the TGV 203. Further, electrical connection terminals are formed in the wiring layer 201, and the electrical connection terminals of the wiring layer 201 are electrically connected to the semiconductor chips 501 and 502 through solder bumps 71.

[0121] Note that an underfill 205 is filled between the interposer 200 and the package substrate 10. In addition, a capacitor 206 is disposed on the package substrate 10 side of the interposer 200. The interposer 200 is formed of silicon or glass.

[0122] The optical waveguide circuit 36g is formed on the wiring layer 201 of the interposer 200. Further, the photoelectric conversion elements 281 and 282 are adhered onto the optical waveguide circuit 36g, and are arranged such that the light emitting portion 36go of the optical signal of the optical waveguide circuit 36g aligns with the light input portions of the photoelectric conversion elements 281 and 282. The resin 46g used as the adhesive has a refractive index equivalent to that of the optical waveguide circuit 36g.

[0123] The arrangements of the photoelectric conversion elements 281 and 282, the semiconductor chips 501 and 502, and the memory chips 701 and 702 are the same as those in the third embodiment. The memory chips 701 and 702 and the semiconductor chips 501 and 502 are arranged at the center of the package substrate 10 (or the interposer 200). Also, in the region where the memory chips 701 and 702 and the semiconductor chips 501 and 502 are arranged, the optical waveguide circuit 36g is removed (an opening is formed), and the memory chips 701 and 702 and the semiconductor chips 501 and 502 are electrically connected to the interposer 200.

[0124] In this embodiment, the photoelectric conversion element 281 and the semiconductor chip 501 are connected by the bridge substrate 731, and the semiconductor chip 501 and the memory chip 701 are connected in the wiring layer 201 of the interposer 200. Similarly, the photoelectric conversion element 282 and the semiconductor chip 502 are connected by the bridge substrate 734, and the semiconductor chip 502 and the memory chip 702 are connected in the wiring layer 201 of the interposer 200.

[0125] The interposer 200 enables finer wiring formation than the package substrate 10 and is capable of supporting multi-channel communication such as HBM (High Bandwidth Memory) standardized by JEDEC, for example.

[0126] (Alignment) Referring to FIGS. 52 to 54, a method of alignment will be described. FIG. 52 is a diagram showing a location where the photoelectric conversion element 282 is disposed in the optical waveguide circuit 36b. FIG. 53 is a diagram showing the cross section taken along line aa' of FIG. 52 when the photoelectric conversion element 282 is disposed in the optical waveguide circuit 36g. FIG. 54 is a diagram showing the cross section taken along line bb' of FIG. 52 when the photoelectric conversion element 282 is disposed in the optical waveguide circuit 36g. In FIG. 52, the state where the optical waveguide circuit 36g is disposed on the wiring layer 201 of the interposer 200 is shown. Here, the region R1 indicates a location where the photoelectric conversion element 282 is disposed. The region R2 indicates a location where the interposer 200 is exposed in the optical waveguide circuit 36g. The light emitting portion 36go of the optical waveguide circuit 36g emits an optical signal toward the photoelectric conversion element 282. As shown in FIG. 53, the light emitting portion 36go is at a position corresponding to the light receiving portion of the photoelectric conversion element 282. Also, as shown in FIG. 54, in the portion corresponding to the region R1, the resin 46g is filled as an adhesive in the z-axis direction.

[0127] The alignment between the photoelectric conversion elements 281 and 282 and the optical waveguide circuit 36g is the same as that in the third embodiment. However, for example, as shown in FIG. 52, by partially exposing a region R1 having the same size as the photoelectric conversion element 282 (when the interposer 200 is formed of glass), a difference in wettability can be formed, and a self-alignment effect can also be caused.

[0128] Note that the chamber portions 80 for cooling the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 are adhered to the interposer 200. By measuring the temperature of the chamber 52 with the temperature sensor 81 and controlling the liquid flow, it is possible to set the inside of the chamber 52 to a stable temperature. Also, by making the outlet 80o larger than the inlet 80i of the coolant, the pressure inside the chamber 52 can be prevented from rising significantly. Further, the photoelectric conversion elements 281 and 282, the semiconductor chips 501 and 502, the bridge substrates 731 and 734, and the wiring layer 101 have connection terminals (electrical connection terminals), and all of the connection terminals are covered with underfill.

[0129] [Fifth Embodiment] Referring to FIG. 55, the configuration of the fifth embodiment of the present invention will be described. FIG. 55 is a cross-sectional view showing an example of the package structure 1h. In the following description, the same or equivalent components as those in the above-described embodiments and modified examples are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0130] In the package structure 1g of the fourth embodiment shown in FIG. 51, the photoelectric conversion element and the semiconductor chip are connected by the bridge substrate, whereas the package structure 1h of the fifth embodiment is different in that the electrical signal is transmitted in the wiring layer 201h of the interposer 200.

[0131] FIG. 56 is a diagram showing a location where the photoelectric conversion element 282 is disposed in the optical waveguide circuit 36h. FIG. 57 is a diagram showing a cross section taken along the line cc' of FIG. 56 when the photoelectric conversion element 282 is disposed in the optical waveguide circuit 36h.

[0132] As shown in FIG. 56, an electrode 2010 is formed in the wiring layer 201h. The optical waveguide circuit 36h has a shape that does not interfere with the location where the electrode 2010 is formed.

[0133] As shown in FIG. 57, the electrode 2010 is connected to the electrode 280, which is a terminal of the electrical signal of the photoelectric conversion element 282, through the solder bump 2011. Also, the light emitting portion 36ho of the optical waveguide circuit 36h is disposed to correspond to the input portion 282i of the photoelectric conversion element 282. The resin 46h filled between the photoelectric conversion element 282 and the wiring layer 201h (interposer 200) has a refractive index equivalent to that of the core material (core) 360h of the optical waveguide circuit 36h.

[0134] Since the interposer 200 enables fine wiring formation, the photoelectric conversion element 281 and the semiconductor chip 501 (or the photoelectric conversion element 282 and the semiconductor chip 502) can be disposed close enough to each other. In addition to shortening the transmission distance of the transmission signal, it is also possible to reduce the signal frequency by multi-channeling.

[0135] In the present embodiment, the input portion 282i of the photoelectric conversion element 282 and the electrode 280 as the terminal of the electrical signal are arranged on the same plane (a plane parallel to the xy plane).

[0136] As in the previous embodiments, when the electrode 280 as the terminal of the electrical signal and the input portion 282i of the optical signal are arranged on different planes, although a modification such as arraying the optical channels (arraying the optical waveguides) to increase the number is possible, depending on circumstances such as the number of optical communication channels and the margin of the arrangement area of the photoelectric conversion elements, it may be more advantageous in terms of manufacturing cost to select the cases shown in FIGS. 55 to 57. Also, the cooling effect is higher in the present embodiment compared to the case of the modification.

[0137] [Sixth Embodiment] With reference to FIG. 58, the configuration of the sixth embodiment of the present invention will be described. FIG. 58 is a cross-sectional view showing an example of the package structure 1i. In the package structure 1i, the top plate 38 is formed of glass, and the package substrate is the glass core substrate 300. In the following description, the same or equivalent components as those in the above-described embodiments and modifications are denoted by the same reference numerals, and the description thereof is simplified or omitted.

[0138] Regarding the connection of the optical signal, the package structure 1i of the sixth embodiment is configured to transmit the optical signal to the photoelectric conversion elements 281 and 282 through the top plate 38 on which the optical waveguide circuit 36 shown in the first embodiment (package structures 1 and 1a in FIGS. 1 and 3) or the second embodiment (package structures 1b, 1c, and 1d in FIGS. 29, 36, and 45) is formed. Also, regarding the connection between the photoelectric conversion element and the semiconductor chip, it is configured to connect the electrical signal using the bridge substrate shown in the third embodiment (package structures 1e and 1f in FIGS. 46 and 50), the fourth embodiment (package structure 1g in FIG. 51), and the fifth embodiment (package structure 1h in FIG. 55).

[0139] Specifically, the semiconductor chip 501 and the memory chip 561 are connected through the bridge substrate 737, and the semiconductor chip 502 and the memory chip 562 are connected through the bridge substrate 738. The bridge substrates 737 and 738 are disposed in the chamber 52. In the package structure 1i, a glass core substrate 300 is used. In the glass core substrate 300, wiring layers 300a and 300c are formed on the glass core 300b, and the wiring layers 300a and 300c are electrically connected through the through electrodes 300d.

[0140] Also in the first embodiment (package structure 1 in FIG. 1, package structure 1a in FIG. 3), semiconductor chips and memory chips are mounted on the Si or glass interposer 12, and since the influence of thermal fluctuations is suppressed, it is possible to use a bridge substrate. However, in order to obtain higher reliability, in the sixth embodiment, the package substrate is a glass core substrate 300 to further suppress the influence of thermal fluctuations, and on this basis, the chamber 52 is formed on the glass core substrate 300. The glass core substrate 300, the semiconductor chips 501 and 502, the memory chips 561 and 562, and the top plate 38 formed of glass have equivalent CTEs, are less likely to be strained by heat, and have high rigidity, so high reliability can be obtained.

[0141] Also, since the semiconductor chip 501 and the memory chip 561 are connected by the bridge substrate 737 (the semiconductor chip 502 and the memory chip 562 are connected by the bridge substrate 738), an interposer becomes unnecessary, and there is an advantage in that the glass core substrate 300, which is the package substrate, also does not need to form fine wiring. Note that instead of the glass core substrate 300, it is also possible to use a ceramic substrate in which ceramics are applied to the glass core 300b.

[0142] [Operation and Effect] In the present disclosure, as a method of introducing optical communication into a package structure, a cooling chamber is constituted by a frame and a top plate, an optical waveguide circuit and a connector of an external optical cable are arranged on the top plate, an optical signal is connected from an optical fiber to the optical waveguide circuit, and an optical connection is made from the optical waveguide circuit on the top plate to a photoelectric conversion element in the chamber (the first embodiment (package structure 1 in FIG. 1, package structure 1a in FIG. 3), the second embodiment (package structure 1b in FIG. 29, package structure 1c in FIG. 35, package structure 1d in FIG. 45), the sixth embodiment (package structure 1i in FIG. 58)).

[0143] In the case of this structure, by using a package substrate or an interposer as a glass substrate and also using the top plate as a glass substrate, the influence of thermal expansion can be suppressed, the arrangement accuracy of the semiconductor chip, the photoelectric conversion element (circuit), and the optical waveguide circuit is improved, and the problem of optical axis alignment accuracy can also be solved.

[0144] Also, by three-dimensionally mounting a semiconductor chip such as a processor and a photoelectric conversion element as Chip on Chip, it is possible to shorten the transmission distance of electrical signals.

[0145] Since the photoelectric conversion element is smaller than the semiconductor chip of the processor, even if the photoelectric conversion element is arranged in the chamber together with the semiconductor chip, the surface of the semiconductor chip can be directly brought into contact with the cooling liquid, and sufficient cooling efficiency can be ensured even when the connection terminals of the photoelectric conversion element and the semiconductor chip are covered with underfill.

[0146] Also, as another method, a wiring substrate on which an optical waveguide circuit is formed is connected on a package substrate, the photoelectric conversion element is arranged so as to be aligned with the light input / output part of the optical waveguide circuit, and a semiconductor chip is mounted adjacent to the photoelectric conversion element (the third embodiment (package structure 1e in FIG. 46), the fourth embodiment (package structure 1g in FIG. 51), the fifth embodiment (package structure 1h in FIG. 55)) is shown.

[0147] In this method, by mounting the photoelectric conversion element while directly aligning it individually with the optical waveguide circuit, the alignment accuracy of the optical axis can be improved. Also, although some recent mounting devices have the ability to mount with an alignment accuracy of several microns, it is also possible to apply a method of achieving high-precision optical axis alignment through self-alignment. As a method of aligning by self-alignment, an optical waveguide circuit is formed on a glass substrate, the glass in the portion where the photoelectric conversion element is mounted is partially exposed, the self-alignment effect is manifested by the surface tension of the adhesive resin, and it is cured as it is.

[0148] Regarding shortening the transmission distance of the electrical signal, it can be achieved by adopting a bridge substrate that connects the connection terminals on the opposite side of the package substrate of the adjacent semiconductor chip and the photoelectric conversion element so as to straddle the semiconductor chip and the photoelectric conversion element. Also, by stabilizing the temperature of the package by liquid cooling, high reliability can be ensured even for the connection on the bridge substrate side of the surface opposite to the package substrate side of the semiconductor chip.

[0149] As described above, according to the present disclosure, it is possible to shorten the transmission distance of the electrical signal, and to achieve high-speed communication and high integration or high speed of the semiconductor chip. Also, by combining liquid flow cooling and the arrangement structure of the optical waveguide circuit, the photoelectric conversion element that is vulnerable to heat can be arranged near the semiconductor chip. Also, the transmission distance of the electrical signal after photoelectric conversion can be shortened, enabling efficient high-frequency signal communication.

[0150] In particular, the structure in which the optical waveguide circuit is arranged on the top plate of the liquid cooling chamber enables signal exchange from the upper part on the opposite side of the package substrate, and can accommodate various semiconductor chip arrays and stacked structures. There are also fewer restrictions on the optical waveguide circuit, enabling an efficient design. Also, in the structure that adopts the connection by the bridge structure between the semiconductor chip and the photoelectric conversion element on the surface opposite to the package substrate, the yield can be improved because it is connected accordingly after mounting the semiconductor chip etc. on the package substrate.

[0151] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present invention.

[0152] Aspects that can be the content of the present invention will be described below, but are not limited thereto. (Aspect 1) A chamber including the package substrate, a frame, and a top plate is disposed on the package substrate, The frame is provided with an inlet and / or an outlet for a coolant, A semiconductor chip and a photoelectric conversion element are disposed in the chamber, The photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate, and a package structure characterized by this. (Aspect 2) The optical waveguide circuit is a first optical waveguide circuit formed in the vicinity of the surface of the top plate that contacts the frame, The top plate is formed of a light-transmissive member, and the package structure according to Aspect 1, characterized by this. (Aspect 3) The optical waveguide circuit is a second optical waveguide circuit formed in the vicinity of the surface of the top plate opposite to the surface that contacts the frame, The top plate is formed of a light-transmissive member, and through holes penetrating both surfaces thereof are formed, The through holes are filled with a resin having a refractive index equivalent to that of the member forming the core of the second optical waveguide circuit, The photoelectric conversion element is connected to the second optical waveguide circuit through the through holes, and the package structure according to Aspect 1 or Aspect 2, characterized by this. (Aspect 4) The top plate includes a first optical waveguide circuit formed in the vicinity of the surface of the top plate that contacts the frame and a second optical waveguide circuit formed in the vicinity of the surface of the top plate opposite to the surface that contacts the frame as the optical waveguide circuit, The top plate is formed of a light-transmissive member, and through holes penetrating both surfaces thereof are formed, The through hole is filled with a resin having the same refractive index as the member forming the core of the first optical waveguide circuit and the member forming the core of the second optical waveguide circuit. The photoelectric conversion element is connected to the first optical waveguide circuit. The package structure according to any one of Aspects 1 to 3, wherein the first optical waveguide circuit is connected to the second optical waveguide circuit via the through hole. (Aspect 5) The package structure according to any one of Aspects 1 to 4, wherein the adhesive for bonding the frame and the top plate is a photosensitive curable resin. (Aspect 6) The package structure according to any one of Aspects 1 to 5, wherein the connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed of a resin having the same refractive index as the member forming the core of the first optical waveguide circuit. (Aspect 7) The top plate is formed of a translucent member. The optical waveguide circuit is a third optical waveguide circuit formed in the vicinity of the surface of the top plate opposite to the surface in contact with the frame. On the third optical waveguide circuit, an electrical wiring layer is formed which is electrically connected to the package substrate and the wire wiring or the flexible substrate and has a first opening formed to expose the third optical waveguide circuit. On the electrical wiring layer, an optical component is mounted which is electrically connected to the electrical wiring layer and connected to the third optical waveguide circuit exposed in the first opening of the electrical wiring layer. The top plate has through holes formed therethrough on both sides. The through holes are filled with a resin having the same refractive index as the member forming the core of the third optical waveguide circuit. The package structure according to any one of Aspects 1 to 6, wherein the optical component and the photoelectric conversion element are connected via the through hole and the third optical waveguide circuit. (Aspect 8) The package structure according to any one of Aspects 1 to 7, wherein the optical component is an optical switch device. (Aspect 9) The top plate further includes a fourth optical waveguide circuit formed in the vicinity of the surface of the top plate that contacts the frame of the top plate. The fourth optical waveguide circuit is connected to the third optical waveguide circuit through the through hole. The package structure according to any one of Aspects 1 to 8, wherein the optical component and the photoelectric conversion element are connected through the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit. (Aspect 10) When the electrical wiring layer is disposed on the third optical waveguide circuit, the package structure according to any one of Aspects 1 to 9, wherein the electrical wiring layer has a second opening that exposes any one or two or more of the locations where the frame and the top plate are adhered, the location where the photoelectric conversion element is disposed, and the location where the alignment mark is disposed. (Aspect 11) The package structure includes an interposer disposed on the package substrate. The semiconductor chip and the photoelectric conversion element are mounted on the interposer. The top plate is formed of glass. The package structure according to any one of Aspects 1 to 10, wherein the interposer is formed of silicon or glass. (Aspect 12) The top plate is formed of glass. The package structure according to any one of Aspects 1 to 10, wherein the package substrate is a glass core substrate. (Aspect 13) The semiconductor chip and the photoelectric conversion element are disposed on the package substrate. In the chamber, from the side of the surface opposite to the surface in contact with the package substrate of the semiconductor chip and the photoelectric conversion element, a bridge substrate for connecting the semiconductor chip and the photoelectric conversion element is further provided, which is a package structure according to any one of aspects 1 to 12. (Aspect 14) The semiconductor chip is a plurality of semiconductor chips arranged on the package substrate. In the chamber, from the side of the surface opposite to the surface in contact with the package substrate of the plurality of semiconductor chips, a bridge substrate for connecting the plurality of semiconductor chips to each other is further provided, which is a package structure according to any one of aspects 1 to 13. (Aspect 15) A circulation system for introducing a coolant into the package structure according to any one of aspects 1 to 14, including a pump connected to the outlet for discharging the coolant from the chamber and generating a liquid flow toward the inlet, a controller for monitoring the temperature of the chamber and controlling the flow rate of the liquid flow and the temperature of the coolant according to the monitored temperature. The circulation system is characterized in that the outlet has a larger cross-sectional area than the inlet with respect to the liquid flow. (Aspect 16) On the package substrate, a chamber including the package substrate, a frame body, and a top plate is arranged. The frame body is provided with an inlet and / or an outlet for the coolant. In the chamber, a semiconductor chip and a photoelectric conversion element are arranged. The photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate, which is an optoelectronic fusion device.

[0153] Further, the present disclosure also includes the following first aspect. [First Aspect (Optical Waveguide on Substrate)] (Aspect 1A) An optical waveguide circuit is formed on a package substrate, and a cooling chamber having an inlet and an outlet for a coolant is installed thereon, and the package structure is characterized by including a semiconductor chip and a photoelectric conversion element. (Aspect 2A) The photoelectric conversion element has an optical connection portion disposed on one side and electrical connection terminals disposed on the opposite side thereof, and is attached so as to optically connect the optical connection portion to the optical waveguide toward the package substrate side and to be adjacent to the semiconductor chip. The semiconductor chip has electrical connection terminals also on the side opposite to the package substrate in a state of being electrically connected to the electrical terminals of the package substrate, and the electrical terminals on the side opposite to the package substrate of the adjacent photoelectric conversion element and the semiconductor chip are connected and connected by a bridge substrate. The package structure according to Aspect 1A. (Aspect 3A) Monitoring the temperature of the liquid in the chamber or the chamber, and controlling the liquid flow and liquid temperature of the supplied coolant so that the internal temperature is stabilized. The cooling method according to Aspect 1A or Aspect 2A. (Aspect 4A) The adhesive for adhering the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the core of the optical waveguide after curing. The package structure according to any one of Aspects 1A to 3A. (Aspect 5A) On the surface of the package substrate to which the photoelectric conversion element is attached, a metal film is formed in an area of the same size as the photoelectric conversion element except for the optical connection portion, and a cured adhesive is sandwiched between the metal film and the photoelectric conversion element. The package structure according to any one of Aspects 1A to 4A. (Aspect 6A) A plurality of semiconductor chips electrically connected to the same substrate are electrically connected by a bridge substrate on the surface opposite to the substrate. The package structure according to any one of Aspects 1A to 5A.

[0154] Further, the present disclosure also includes the following second aspect. [Second Aspect (Optical Waveguide on Substrate)] (Aspect 1B) An optical waveguide circuit is formed on a package substrate having a glass core, and a cooling chamber having an inlet and an outlet for a coolant is installed thereon, and the package structure is characterized by including a semiconductor chip and a photoelectric conversion element. (Aspect 2B) The photoelectric conversion element has an optical connection portion disposed on one side and electrical connection terminals disposed on the opposite surface thereof, and is attached so as to optically connect the optical connection portion to the optical waveguide toward the package substrate side and adjacent to the semiconductor chip. The semiconductor chip has electrical connection terminals also on the side opposite to the package substrate in a state of being electrically connected to the electrical terminals of the package substrate, and the electrical terminals on the surface opposite to the package substrate of the adjacent photoelectric conversion element and semiconductor chip are connected and connected by a bridge substrate. The package structure according to Aspect 1B. (Aspect 3B) Monitoring the temperature of the liquid in the chamber or the chamber, and controlling the liquid flow and liquid temperature of the supplied coolant so that the internal temperature is stabilized. The cooling method according to Aspect 1B or Aspect 2B. (Aspect 4B) The adhesive for bonding the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the core of the optical waveguide after curing. The package structure according to any one of Aspects 1B to 3B. (Aspect 5B) On the surface of the package substrate to which the photoelectric conversion element is attached, a metal film is formed in an area having the same size as the photoelectric conversion element except for the optical connection portion, and a cured adhesive is sandwiched between the metal film and the photoelectric conversion element. The package structure according to any one of Aspects 1B to 4B. (Aspect 6B) A plurality of semiconductor chips electrically connected to the same substrate are electrically connected by a bridge substrate on the surface opposite to the substrate. The package structure according to any one of Aspects 1B to 5B.

[0155] Further, the present disclosure also includes the following third aspect. [Third Aspect] (Aspect 1C) A chamber with an inlet and an outlet for a coolant is installed on a package substrate or an interposer. The chamber contains a semiconductor chip and a photoelectric conversion element. A package structure, wherein an optical signal connected to the photoelectric conversion element is connected through an optical waveguide circuit formed on the package substrate or the interposer. (Aspect 2C) The photoelectric conversion element has an optical connection part arranged on one side and electrical connection terminals arranged on the opposite side. The optical connection part is installed so as to be optically connected to an optical waveguide toward the package substrate side and adjacent to the semiconductor chip. The semiconductor chip has electrical connection terminals on the side opposite to the package substrate while being electrically connected to the electrical terminals of the package substrate or the interposer. The electrical terminals on the side opposite to the package substrate of the adjacent photoelectric conversion element and the semiconductor chip are connected and joined by a bridge substrate. The package structure according to Aspect 1C. (Aspect 3C) A package structure according to Aspect 1C or Aspect 2C, wherein there is no optical waveguide circuit layer on the surface of the package substrate or the interposer overlapping with the semiconductor chip. (Aspect 4C) A metal film equivalent to the photoelectric conversion element is formed on the surface of the optical waveguide layer where the photoelectric conversion element is installed. A package structure according to any one of Aspects 1C to 3C, wherein the photoelectric conversion element is installed with a transparent resin having a refractive index equivalent to that of the core of the optical waveguide sandwiched thereabove on the metal film. (Aspect 5C) The core of the package substrate or the interposer where the photoelectric conversion element is installed is formed of a glass material. Part of the optical waveguide layer and the electrical wiring layer at the location where the photoelectric conversion element is installed are evenly removed with respect to the arrangement of the photoelectric conversion element, and the glass surface is exposed. A package structure according to any one of Aspects 1C to 4C, wherein the photoelectric conversion element is installed with a transparent resin having a refractive index equivalent to that of the core of the optical waveguide sandwiched thereabove on the exposed glass surface. (Aspect 6C) A package structure including a plurality of semiconductor chips encapsulated within a chamber provided with an inlet and an outlet for a coolant fluid, disposed on a package substrate or an interposer, each of the semiconductor chips being adjacent to each other in a state of being electrically connected to electrical terminals of the package substrate or the interposer, each of the semiconductor chips having electrical connection terminals also on a surface opposite to the package substrate, and adjacent semiconductor chips being electrically connected by a bridge substrate connected to electrical terminals on a surface opposite to the package substrate.

Explanation of Reference Numerals

[0156] 1, 1a - 1i... Package structure, 10... Package substrate, 12, 200... Interposer, 16, 26, 28, 28a, 28b, 28c, 281, 282, 28L... Photoelectric conversion element, 34... Frame body, 36, 36a, 36b, 36c, 36c1, 36c2, 36d, 36e, 36g, 36h, 36eL, 361, 362... Optical waveguide circuit, 38... Top plate, 50, 501, 502... Semiconductor chip, 52... Chamber, 300... Glass core substrate, 611, 612... Optical component, 731 - 738... Bridge substrate, 80... Chamber section

Claims

1. On a package substrate, a chamber surrounded by the package substrate, a frame, and a top plate is disposed, On the top plate and outside the chamber, a connector for introducing an optical signal is disposed, The frame is provided with an inlet and / or an outlet for a coolant, Inside the chamber, a semiconductor chip and a photoelectric conversion element are disposed, The photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate and propagating the optical signal introduced from the connector, and characterized by a package structure.

2. The optical waveguide circuit is a first optical waveguide circuit formed on a surface of the top plate in contact with the frame, The top plate is formed of a light-transmissive member, and characterized by the package structure according to Claim 1.

3. The optical waveguide circuit is a second optical waveguide circuit formed in the vicinity of a surface of the top plate opposite to the surface in contact with the frame, The top plate is formed of a light-transmissive member, and through holes penetrating both surfaces thereof are formed, The through holes are filled with a resin having a refractive index equivalent to that of a member forming a core of the second optical waveguide circuit, The photoelectric conversion element is connected to the second optical waveguide circuit through the through holes, and characterized by the package structure according to Claim 1.

4. The top plate includes a first optical waveguide circuit formed in the vicinity of a surface of the top plate in contact with the frame and a second optical waveguide circuit formed in the vicinity of a surface of the top plate opposite to the surface in contact with the frame as the optical waveguide circuit, The top plate is formed of a light-transmissive member, and through holes penetrating both surfaces thereof are formed, The through holes are filled with a resin having a refractive index equivalent to that of a member forming a core of the first optical waveguide circuit and a member forming a core of the second optical waveguide circuit, The photoelectric conversion element is connected to the first optical waveguide circuit, The first optical waveguide circuit is connected to the second optical waveguide circuit through the through holes, and characterized by the package structure according to Claim 1.

5. The adhesive for bonding the frame and the top plate is a photosensitive curable resin, and characterized by the package structure according to Claim 2.

6. The connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed of a resin having a refractive index equivalent to that of a member forming a core of the first optical waveguide circuit, and characterized by the package structure according to Claim 2.

7. The top plate is formed of a translucent member, The optical waveguide circuit is a third optical waveguide circuit formed in the vicinity of the surface of the top plate opposite to the surface in contact with the frame of the top plate, On the third optical waveguide circuit, an electrical wiring layer is formed in which a first opening for electrically connecting the package substrate and the wire wiring or the flexible substrate and exposing the third optical waveguide circuit is formed, On the electrical wiring layer, an optical component is mounted that is electrically connected to the electrical wiring layer and connected to the third optical waveguide circuit exposed in the first opening of the electrical wiring layer, The top plate has through holes formed through both sides thereof, The through holes are filled with a resin having the same refractive index as the member forming the core of the third optical waveguide circuit, The package structure according to claim 1, wherein the optical component and the photoelectric conversion element are connected via the through hole and the third optical waveguide circuit.

8. The package structure according to claim 7, wherein the optical component is an optical switch device.

9. The top plate further includes a fourth optical waveguide circuit formed in the vicinity of the surface of the top plate in contact with the frame of the top plate, The fourth optical waveguide circuit is connected to the third optical waveguide circuit via the through hole, The package structure according to claim 7, wherein the optical component and the photoelectric conversion element are connected via the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit.

10. The package structure according to claim 7, wherein when the electrical wiring layer is disposed on the third optical waveguide circuit, the electrical wiring layer has a second opening that exposes any one or two or more of the locations where the frame and the top plate are adhered, the location where the photoelectric conversion element is disposed, and the location where the alignment mark is disposed.

11. The package structure includes an interposer disposed on the package substrate, The semiconductor chip and the photoelectric conversion element are mounted on the interposer, The top plate is formed of glass, The package structure according to claim 1, wherein the interposer is formed of silicon or glass.

12. The top plate is formed of glass, The package structure according to claim 1, wherein the package substrate is a glass core substrate.

13. The semiconductor chip and the photoelectric conversion element are disposed on the package substrate. The package structure according to claim 1, further comprising a bridge substrate for connecting the semiconductor chip and the photoelectric conversion element from a side opposite to a surface of the semiconductor chip and the photoelectric conversion element that contacts the package substrate within the chamber.

14. The semiconductor chip is a plurality of semiconductor chips disposed on the package substrate. The package structure according to claim 1, further comprising a bridge substrate for connecting the plurality of semiconductor chips to each other from a side opposite to a surface of the plurality of semiconductor chips that contacts the package substrate within the chamber.

15. An electronic device system including the package structure according to claim 1 and a circulation system for introducing a coolant into the package structure, wherein the circulation system includes a pump connected to the outlet for discharging the coolant from the chamber and generating a liquid flow toward the inlet, and a controller for monitoring the temperature of the chamber and controlling the flow rate of the liquid flow and the temperature of the coolant according to the monitored temperature. The electronic device system is characterized in that the outlet has a larger cross-sectional area than the inlet with respect to the liquid flow.

16. A chamber surrounded by the package substrate, a frame, and a top plate is disposed on the package substrate. A connector for introducing an optical signal is disposed on the top plate and outside the chamber. The frame is provided with an inlet and / or an outlet for the coolant. A semiconductor chip and a photoelectric conversion element are disposed within the chamber. The photoelectric fusion device is characterized in that the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate and for propagating the optical signal introduced from the connector.

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