Glass substrate and glass interposer
The glass substrate with fine through holes and smooth surfaces addresses the challenges of pitch narrowing and cost in glass interposers by enabling easy lamination and reducing warpage, achieving cost-effective multilayer wiring.
Patent Information
- Application Number
- JP2022107231
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-07-01
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2041-04-19
AI Technical Summary
Conventional glass interposers face challenges in narrowing the pitch of connection pads and miniaturizing wirings due to warpage from thermal expansion differences and high production costs associated with multilayer wiring layers.
A glass substrate with fine through holes and smooth wiring surfaces, formed by laser-assisted etching and chemical mechanical polishing, allows for easy lamination and reduces warpage and production costs.
Enables the realization of narrow pitch glass interposers with reduced production costs and enhanced adhesion, facilitating the formation of a multilayer wiring structure that is resistant to deformation.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to a glass substrate and a glass interposer using the same.
Background Art
[0002] Conventionally, as materials for interposers, silicon-based materials and resin-based materials have been widely adopted.
[0003] However, when considering coping with the narrowing of the pitch of connection pads (bumps) and the miniaturization of wirings, there are demerits that the production cost becomes high in the case of silicon-based materials, and it is difficult to achieve miniaturization in the case of resin-based materials.
[0004] Therefore, among the conventional technologies, there is one that constitutes a glass interposer using a glass material (see, for example, Patent Document 1). According to this technology, it is said that a technical problem peculiar to glass called metallization is solved, and a suitable glass interposer is realized.
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0006] However, in the conventional glass interposer including the above-mentioned Patent Document 1, since a multilayer wiring layer composed of a plurality of materials other than glass is formed on a glass substrate, it may be difficult to narrow the pitch of connection pads (bumps) and miniaturize the wirings.
[0007] For example, there are demerits such as warpage occurring due to the difference in the coefficient of thermal expansion between the glass and the multilayer wiring layer, or the multilayer wiring layer being deformed by an external force during lamination.
[0008] Furthermore, when the multilayer wiring layer is made of resin, it is difficult to miniaturize as described above, and since the processes for forming the multilayer wiring layer involve multiple steps, the production cost tends to be high.
[0009] An object of the present invention is to provide a glass substrate capable of realizing narrow pitch of a glass interposer while suppressing production cost, and a glass interposer using this glass substrate.
Means for Solving the Problems
[0010] The glass substrate according to the present invention has a plurality of fine through holes. The diameter of the fine through holes is in the range of about 5 μm to 500 μm, and is formed, for example, by laser-assisted etching.
[0011] This glass substrate includes a wiring filling recess and a wiring portion. The wiring filling recess is provided at a position where wiring is to be formed on the main surface of the glass substrate. Examples of the wiring filling recess include, but are not limited to, fine grooves in which fine wiring is arranged and recesses that spread to cover a desired region.
[0012] The wiring portion is made of a conductive material including a metal material such as copper or chromium, and is disposed in the fine through holes and the wiring filling recesses, respectively.
[0013] Of this wiring portion, the upper surface of the wiring portion disposed in the wiring filling recess and the main surface of the glass substrate are disposed on the same plane and each has a smooth surface. In order to realize such a configuration, for example, after filling the wiring filling recess with the wiring portion, the entire surface of the glass substrate main surface may be polished by chemical mechanical polishing or the like.
[0014] In the above configuration, the surface roughness Ra of the smooth surface of the upper surface of the wiring portion disposed in the wiring filling recess and the smooth surface of the main surface of the glass substrate may each be 10 nm or less, and preferably 1 nm or less.
[0015] This is because the higher the smoothness of the main surface of the glass substrate, the easier it is to join the glass substrates to form a glass interposer. Furthermore, when the surface roughness Ra of the smooth surface is smoothed to 0.5 nm or less (more preferably 0.1 nm or less) by chemical mechanical polishing or the like, the glass substrates can be easily joined by room temperature bonding.
[0016] By enhancing the adhesion between a plurality of glass substrates and laminating them to form an interposer having a multilayer wiring structure, it becomes possible to inexpensively form a multilayer wiring structure that is free from warpage due to thermal expansion and is difficult to deform by an external force.
[0017] In particular, since it is easy to realize the enlargement and ultra-thinning of the glass substrate, it is easier to suppress the cost when producing an interposer with a narrow pitch compared to the case of adopting other materials such as resin, ceramics, and silicon.
Advantages of the Invention
[0018] According to this invention, it becomes possible to realize narrowing of the pitch of the glass interposer while suppressing the production cost.
Brief Description of the Drawings
[0019]
Figure 1
Figure 2
Figure 3
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Figure 6
Figure 7
Figure 8
Embodiment for Carrying Out the Invention
[0020] Figs. 1(A) to 1(D) show an outline of a glass interposer 10 as an embodiment of the present invention. The glass interposer 10 is supported by a probe card 2 so as to be positionally adjustable. In this embodiment, an example of using the glass interposer 10 in the probe card 2 will be described, but the glass interposer 10 can be used for other applications such as semiconductor memories.
[0021] The probe card 2 is attached to a prober 4 which is connected to a tester or the like and is configured to be movable. The probe card 2 is configured to measure the electrical characteristics of a measurement object 6 (for example, a silicon wafer on which a semiconductor integrated circuit is formed) on a stage (not shown).
[0022] A probe support substrate 8 is connected to the main surface of the glass interposer 10 facing the measurement object 6. The probe support substrate 8 has a plurality of probes 9. Note that only the number of probes 9 for the sake of illustration is shown. The probe support substrate 8 is made of a resin, ceramics, silicon, or the like having a plurality of through holes, but like the glass interposer 10, it is also possible to adopt a glass member.
[0023] The glass interposer 10 is configured to adapt the pitch of the probes 9 provided on the probe support substrate 8 to the pitch of the spring electrodes 7 provided on the probe card 2. Specifically, as shown in Fig. 1(B), it is configured to conduct between connection pads 70 and connection pads 90 having different arrangement pitches from each other.
[0024] As shown in FIG. 1(B), the glass interposer 10 is configured to stack a plurality of glass substrates 12. In this embodiment, the glass interposer 10 is configured by joining three glass substrates 12 at room temperature, but the number of glass substrates 12 and the joining method are not limited to these.
[0025] Since the glass substrates 12 constituting the glass interposer 10 have substantially the same configuration as each other, for the sake of convenience, a single glass substrate 12 will be described here.
[0026] As shown in FIGS. 1(C) and 1(D), the glass substrate 12 includes a through-wiring portion 122 provided on the inner wall surface of the through-hole 126 and an in-plane wiring portion 124 provided as a circuit pattern on a predetermined portion of the main surface of the glass substrate 12 from the opening of the through-hole 126. The in-plane wiring portion 124 is arranged to be filled in the wiring filling recess 128.
[0027] In this embodiment, both the through-wiring portion 122 and the in-plane wiring portion 124 are constituted by a copper plating layer, but it is not limited to this as long as it is a conductive layer. The probe 9 and the spring electrode 7 are electrically connected by the above-described through-wiring portion 122, in-plane wiring portion 124, connection pad 70, connection pad 90, and a conductive paste (such as silver, chromium, silicon nitride, etc.) provided in the through-hole 126 and in the vicinity thereof as necessary.
[0028] In the glass substrate 12, the upper surface of the in-plane wiring portion 124 in the wiring filling recess 128 and the main surface of the glass substrate 12 are arranged on the same plane. Further, the upper surface of the in-plane wiring portion 124 and the main surface of the glass substrate 12 are each surface-treated so that the surface roughness 1Ra is 1 nm or less.
[0029] The reason for adopting such a configuration is to facilitate the bonding of the glass substrates 12. If there are irregularities on the bonding surfaces of the glass substrates 12, it becomes difficult to stack the glass substrates 12 to form the glass interposer 10. However, by smoothing the entire main surface of the glass substrate 12 including the upper surface of the in-plane wiring portion 124, it becomes easier to bond the glass substrates 12. For example, when bonding the glass substrates 12 by room-temperature bonding, it is preferable that the surface roughness 1Ra is 1 nm or less, more preferably about 0.1 nm to 0.5 nm, and even more preferably 0.1 nm or less. Also, even when using an adhesive or the like, it is preferable that the glass substrate 12 has a smoothness with a surface roughness of about 10 nm or less.
[0030] Subsequently, an example of a method for manufacturing the glass substrate 12 will be described with reference to FIGS. 2(A) to 2(E). First, as shown in FIGS. 2(A) and 2(B), wiring filling recesses 128 are provided at the circuit pattern formation positions on the main surface of the glass substrate 12. The wiring filling recesses 128 are formed, for example, by selectively etching using a photoresist, a chromium mask, an etching-resistant film, or the like.
[0031] Thereafter, as shown in FIG. 2(C), through-holes 126 are provided. The through-holes 126 are formed by so-called laser-assisted etching or the like. In this embodiment, through-holes 126 having a diameter of about 50 μm to 100 μm are formed, but the diameter of the through-holes 126 can be appropriately set in the range of about 5 μm to 500 μm by adjusting the beam diameter of the laser.
[0032] Subsequently, as shown in FIG. 2(D), the through-wiring portion 122 and the in-plane wiring portion 124 are formed. Here, after forming a copper seed layer of about 1 μm by electroless copper plating, a copper plating layer of 50 to 60 μm is formed by electroplating. Further, if necessary, a conductive paste such as chromium is filled in the through-holes 126.
[0033] However, the formation methods of the through-wiring portion 122 and the in-plane wiring portion 124 are not limited to this. For example, for the through-wiring portion 122 and the in-plane wiring portion 124, it is also possible to adopt a method of forming an adhesion layer such as Ti or TiW and a copper seed layer by sputtering. Also, when forming the copper seed layer, a metal oxide film may be formed by the sol-gel method or a primer may be used.
[0034] Then, as shown in FIG. 2(E), the entire main surface of the glass substrate 12 including the upper surface of the in-plane wiring portion 124 is surface-treated by CMP (Chemical Mechanical Polishing) treatment, that is, chemical mechanical polishing treatment.
[0035] In this embodiment, due to the surface chemical action of an abrasive (abrasive grains) such as SeO and the action of the chemical components contained in the slurry, the mechanical polishing effect due to the relative movement between the main surface of the glass substrate 12 and the slurry is increased. As a result, it becomes possible to obtain a sufficiently smooth polished surface for room-temperature bonding with a surface roughness 1Ra of 0.1 nm or less.
[0036] The glass substrate 12 subjected to CMP treatment on the main surface will be laminated by room-temperature bonding in the required number to form the glass interposer 10. Known bonding methods such as the surface activation method and the atomic diffusion bonding method can be cited as the room-temperature bonding method.
[0037] FIGS. 3(A) to 3(C) show how the wiring filling recess 128 is formed on the main surface of the glass substrate 12 described with reference to FIG. 2(B).
[0038] Here, first, as shown in FIG. 3(A), a photoresist 30 with etching resistance is applied to the main surface of the glass substrate 12, and the formation position of the wiring filling recess 128 is exposed by removing the photoresist 30 at the desired position by exposure, development, etc.
[0039] Thereafter, as shown in FIG. 3(B), a wiring filling recess 128 is formed by dissolving a desired position of the glass substrate 12 by an etching process. Then, as shown in FIG. 3(C), after forming the wiring filling recess 128, the photoresist 30 is removed. Note that instead of the process using the photoresist 30, after attaching an etching-resistant film to the main surface of the glass substrate 12, the film at the desired position may be removed by a laser process to expose the formation position of the wiring filling recess 128, or the same process may be performed by a process using a chromium mask or other methods.
[0040] FIGS. 4(A) and 4(B) show an example of a method for forming a through hole 126 in the glass substrate 12. Here, a modified portion having a property that is easily etched is formed at this position by irradiating a laser beam to the position where the through hole 126 is to be formed in the glass substrate 12.
[0041] The type and irradiation conditions of the laser beam are not particularly limited as long as the laser beam can modify the formation planned position of the through hole 126 in the glass substrate 12 to a property that is easily etched. In this embodiment, a laser beam oscillated from a short pulse laser (for example, picosecond laser, femtosecond laser) is irradiated from the laser head, but for example, a CO2 laser, a nanosecond laser, etc. may be used.
[0042] Also, in this embodiment, output control is performed so that the average laser energy of the laser beam is about 30 μJ to 300 μJ, but it is not limited thereto.
[0043] Preferably, the condensing area of the laser beam is adjusted as appropriate. Here, by adjusting the condensing area of the laser beam to cover the entire thickness direction of the glass substrate 12, the through hole 126 can be easily formed.
[0044] Following the above-described laser processing, a through hole 126 is formed in the glass substrate 12 by etching the above-described modified portion.
[0045] The etching process is performed, for example, using an etching apparatus 50 of a single-wafer spray etching method as shown in FIGS. 5(A) and 5(B). The glass substrate 12 is introduced into the etching apparatus 50 and subjected to an etching process using an etching solution containing hydrofluoric acid, hydrochloric acid, and the like. Usually, an etching solution containing about 1 to 10% by weight of hydrofluoric acid and 5 to 20% by weight of hydrochloric acid is used, and a surfactant or the like is appropriately used in combination as necessary.
[0046] In the etching apparatus 50, as shown in FIGS. 5(A) and 5(B), while the glass substrate 12 is being conveyed by a conveying roller, the etching solution is brought into contact with the main surface of the glass substrate 12 in the etching chamber 52, whereby the etching process for the glass substrate 12 is performed.
[0047] Since a cleaning chamber 53 for washing away the etching solution adhering to the glass substrate 12 is provided at the subsequent stage of the etching chamber 52 in the etching apparatus 50, the glass substrate 12 is discharged from the etching apparatus 50 with the etching solution removed.
[0048] By the method of assisting etching by laser processing in this way, it becomes possible to minimize the etching processing time to the limit.
[0049] As a result, it becomes difficult for the surface of the glass substrate 12 to be roughened or the shape of the through hole 126 to be distorted when the through hole 126 is formed. The diameter of the through hole 126 can be appropriately adjusted within a range of about 5 μm to 500 μm.
[0050] In principle, if the thickness of the glass substrate 12 is thin, it becomes easier to reduce the diameter of the through hole 126. The reason is that in the etching process, the diameter of the through hole 126 slightly increases more than the laser beam diameter.
[0051] As a countermeasure against this slight increase, in the etching process, by adding a fluorine complexing agent such as titanium oxide or an alkali such as potassium hydroxide or sodium hydroxide, it has been clarified by the applicant's experiments that the slight increase in the groove width of the through-hole 126 in the etching process is suppressed. Therefore, by appropriately adding a fluorine complexing agent or an alkali to the etching solution as needed, it becomes possible to adjust the diameter and shape of the through-hole 126.
[0052] Subsequently, as shown in FIGS. 6(A) and 6(B), the formation process of the through-wiring portion 122 and the in-plane wiring portion 124 and the CMP process for the glass substrate 12 are performed. As described above, here, after forming a copper seed layer of about 1 μm by electroless copper plating, a copper plating layer of 50 to 60 μm is formed by electrolytic plating.
[0053] When the diameter of the through-hole 126 exceeds 100 μm, it tends to be difficult to fill the through-hole 126 with a conductive material only by electrolytic plating. Therefore, it is preferable to appropriately fill the through-hole 126 with a conductive paste such as chromium. Usually, copper plating layers having a thickness of about 1.1 to 1.5 times the thickness of the copper plating layer in the through-hole 126 are formed on both main surfaces of the glass substrate 12.
[0054] Then, as shown in FIG. 6(E), the entire main surface of the glass substrate 12 including the upper surface of the in-plane wiring portion 124 is surface-treated by a CMP (Chemical Mechanical Polishing) process, that is, a chemical mechanical polishing process.
[0055] In this embodiment, due to the surface chemical action of an abrasive (abrasive grains) such as SeO and the action of chemical components contained in the slurry, the mechanical polishing effect due to the relative movement between the main surface of the glass substrate 12 and the slurry is increased. As a result, the surface roughness 1Ra can be adjusted to a range from 10 nm to 0.1 nm or less, and it becomes possible to obtain a sufficiently smooth polished surface for room-temperature bonding.
[0056] The glass substrate 12 that has been subjected to CMP processing on the main surface will be laminated by room-temperature bonding in the number required to form the glass interposer 10.
[0057] According to the above-described embodiment, it becomes possible to suitably perform micropore formation and metallization on the glass substrate, and moreover, it becomes possible to inexpensively realize the glass interposer 10 corresponding to the narrow pitch of the connection pads.
[0058] By appropriately using the above-described laser-assisted etching for outer shape processing, even if the glass substrate 12 has an irregular shape (for example, a polygon having a round corner, a circle, an ellipse, etc.), it is possible to appropriately perform outer shape processing.
[0059] In the above-described embodiment, an example in which etching is performed by the etching apparatus 50 of the spray etching method is shown, but it is not limited thereto. For example, as shown in FIG. 7(A), in the overflow type etching chamber 54, a configuration may be adopted in which the glass substrate 12 is conveyed while being in contact with the overflowed etching solution.
[0060] Furthermore, as shown in FIG. 7(B), it is also possible to adopt dip-type etching in which the single or a plurality of glass substrates 12 stored in the carrier are immersed in the etching tank 56 in which the etching solution is stored.
[0061] Of course, as shown in this figure, the shape of the glass substrate 12 may not only be circular but also square. Further, by appropriately preparing a jig, it is possible to cope with glass substrates 12 of any shape.
[0062] When the size of the glass substrate 12 is small and there is a possibility of hindrance to conveyance and handling, it is also possible to use a carrier member such as a support tray, a basket, or a jig with a mesh member having etching resistance.
[0063] Also, as shown in FIGS. 8(A) to 8(C), it is also possible to simultaneously form the through holes 126 and the recesses 128 for wiring filling by using laser-assisted etching.
[0064] In this case, as shown in FIG. 8(A), the region on the glass substrate 12 where the recesses 128 for wiring filling are to be formed is modified by irradiating a laser beam while adjusting the laser focus.
[0065] Furthermore, as shown in FIG. 8(B), the formation positions of the through holes 126 are modified by the laser beam. Then, as shown in FIG. 8(C), by dissolving the modified portions by etching treatment, the through holes 126 and the recesses 128 for wiring filling are simultaneously formed.
[0066] The description of the above embodiments should be considered as illustrative in all respects and not restrictive. The scope of the present invention is shown not by the above embodiments but by the scope of the claims. Furthermore, it is intended that the scope of the present invention includes all modifications within the meaning and scope equivalent to the scope of the claims.
Explanation of Reference Numerals
[0067] 10 - Glass interposer 12 - Glass substrate 122 - Through wiring portion 124 - In-plane wiring portion 126 - Through hole 128 - Recess for wiring filling
Claims
1. A glass substrate having a plurality of fine through-holes, a wiring filling recess provided at a position where wiring is to be formed on the main surface of the glass substrate, and a wiring portion made of a conductive material disposed in each of the fine through-holes and the wiring filling recess, characterized in that the upper surface of the wiring portion disposed in the wiring filling recess and the main surface of the glass substrate are disposed on the same plane, and each has a polished surface sufficiently smooth for room-temperature bonding.
2. The glass substrate according to claim 1, wherein the surface roughness Ra of the smooth surface of the upper surface of the wiring portion disposed in the wiring filling recess and the smooth surface of the main surface of the glass substrate is 1 nm or less, and each has a polished surface sufficiently smooth for room-temperature bonding.
3. A glass interposer formed by bonding a plurality of glass substrates each having a polished surface sufficiently smooth for room-temperature bonding according to claim 1 or 2.
Citation Information
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