Chip package module, manufacturing method thereof, power module, and electronic device

Abstract

The present application provides a chip package module including a first conductive frame, a first bare die disposed on the first conductive frame, and a second conductive frame disposed laterally spaced apart from the first conductive frame. The chip package module further includes a first conductive connection sheet, a second bare die, and a conductive cover plate. The first conductive connection sheet is connected to a surface of the first bare die remote from the first conductive frame and extends to overlap the second conductive frame. The second bare die is stacked on the first bare die and connected to the first conductive connection sheet. The conductive cover plate is connected to a surface of the second bare die remote from the first conductive frame and extends to connect to the first conductive frame. The first conductive connection sheet and the conductive cover plate are used to implement electrical interconnection between the vertically stacked first bare die and the second bare die, packaging the two bare dies in one device, thereby improving the performance of the single device. The present application further provides a power module including the chip package module, an electronic device, and a method for manufacturing the chip package module.

Description

Technical Field

[0001] [Technical Field] This application relates to the field of chip packaging, and more particularly to chip package modules, methods for manufacturing chip package modules, power modules in which chip package modules are used, and electronic devices.

Background Art

[0002] As requirements for power and application frequency increase due to power modules such as in-package power (PSIP) and brick module power (BMP), a single metal oxide semiconductor field effect transistor (MOSFET) chip has been forced to evolve towards miniaturization, low loss, and high power density. Existing single-transistor MOSFET packages contain only one bare wafer. Under the current manufacturing process, the performance improvement speed of the wafer has become unable to catch up with the performance improvement speed of the power module. Only one bare wafer is packaged in the device, and the space in the height direction of the package body is not fully utilized. In addition, the performance of a single device completely depends on the performance of the bare wafer. If the performance of the bare wafer is insufficient even when system requirements are high, a performance bottleneck is formed, preventing further optimization of the power module.

Summary of the Invention

[0003] A first aspect of an embodiment of this application provides a chip package module, which includes the following: A first conductive frame; A first bare die disposed on the first conductive frame; A second conductive frame disposed at an interval from the first conductive frame; A first conductive connection sheet connected to the surface of the first bare die away from the first conductive frame and extending to overlap the second conductive frame; A second bare die laminated on the surface of the first bare die away from the first conductive frame and connected to the first conductive connection sheet; and A conductive cover plate connected to the surface of the second bare die away from the first conductive frame and extending so as to be connected to the first conductive frame.

[0004] According to the chip package module in the first aspect of the present application, by using the first conductive connection sheet, the conductive cover plate, etc., an electrical interconnection between the vertically stacked first bare die and the second bare die is implemented, and by packaging the two bare dies in one device, the performance of a single device is improved, and the requirements for a high-performance power supply system for the device are satisfied to a certain extent.

[0005] In one implementation form of the present application, the first electrode of the first bare die is electrically connected to the first conductive frame, and the second electrode of the second bare die is electrically connected to the conductive cover plate to implement an electrical connection between the first electrode and the second electrode, and both the third electrode of the first bare die and the fourth electrode of the second bare die are electrically connected to the first conductive connection sheet to implement an electrical connection between the third electrode and the fourth electrode.

[0006] The vertically stacked first bare die and second bare die packaged in one device have two pairs of electrodes that are electrically interconnected.

[0007] In one implementation form of the present application, the chip package module further includes a third conductive frame and a second conductive connection sheet. The first conductive frame, the second conductive frame, and the third conductive frame are arranged at intervals from each other. The second conductive connection sheet is connected to the surface of the first bare die away from the first conductive frame and extends so as to overlap the third conductive frame. The second conductive connection sheet is arranged at an interval from the first conductive connection sheet.

[0008] In one implementation of the present application, both the fifth electrode of the first bare die and the sixth electrode of the second bare die are electrically connected to the second conductive connection sheet to implement an electrical connection between the fifth electrode and the sixth electrode.

[0009] The vertically stacked first bare die and second bare die packaged within one device have three pairs of electrodes that are electrically interconnected.

[0010] In one implementation of the present application, the first electrode is the first source, the third electrode is the first drain, the fifth electrode is the first gate, the second electrode is the second source, the fourth electrode is the second drain, the sixth electrode is the second gate, the first source, the first drain and the first gate are electrically connected in a one-to-one correspondence to the first conductive frame, the first conductive connection sheet and the second conductive connection sheet, and the second source, the second drain and the second gate are electrically connected in a one-to-one correspondence to the conductive cover plate, the first conductive connection sheet and the second conductive connection sheet.

[0011] In one implementation of the present application, the first source is connected in parallel to the second source, the first drain is connected in parallel to the second drain, and the first gate is connected in parallel to the second gate.

[0012] The first bare die and the second bare die may be MOSFET chips, and the three terminals of the second bare die and the first bare die vertically stacked within a single device, namely, the source, the drain and the gate, are connected in parallel to greatly improve the device performance.

[0013] In one implementation of the present application, the first drain is electrically connected to the first conductive frame, the first gate is electrically connected to the first conductive connection sheet, the first source is electrically connected to the second conductive connection sheet, the second drain is electrically connected to the conductive cover plate, the second gate is electrically connected to the first conductive connection sheet, and the second source is electrically connected to the second conductive connection sheet.

[0014] In one implementation of the present application, the conductive cover plate includes a flat plate and at least one side plate bent and connected to the flat plate. The flat plate covers the surface of the second bare die away from the first conductive frame, and each side plate is connected between the flat plate and the first conductive frame.

[0015] The side plate is supported between the flat plate and the first conductive frame to provide support. The conductive cover plate is connected to the first conductive frame by the bent side plate, and can withstand the weight of the conductive cover plate itself and the weight of the plastic packaging material obtained after a part of the chip package module is packaged in plastic, and can relieve the stress of the lower first bare die to a certain extent.

[0016] In one implementation of the present application, each side plate is connected perpendicularly to the flat plate.

[0017] In one implementation of the present application, the conductive cover plate includes three side plates connected perpendicularly to the flat plate.

[0018] The conductive cover plate is connected to the first conductive frame by three side plates bent perpendicularly. The three side plates can withstand the weight of the conductive cover plate itself and the weight of the plastic packaging material obtained after a part of the chip package module is packaged in plastic, and can relieve the stress of the lower first bare die to a certain extent.

[0019] In one implementation form of the present application, solder is disposed between the first bare die and the first conductive frame, and electrical connection is implemented by soldering. Solder is disposed in a region where the first conductive connection sheet overlaps the first bare die and the second conductive frame, and the first conductive connection sheet is electrically connected to the first bare die and the second conductive frame by soldering. Solder is disposed in a region where the second bare die overlaps the first conductive connection sheet, and the second bare die is electrically connected to the first conductive connection sheet by soldering. Solder is disposed between the conductive cover plate and the second bare die, and the conductive cover plate is electrically connected to the second bare die by soldering.

[0020] The second aspect of the embodiment of the present application provides a power module including a circuit board and a chip package module located on the circuit board. The chip package module is the chip package module according to the first aspect of the embodiment of the present application.

[0021] The third aspect of the embodiment of the present application provides an electronic device including a circuit board and a chip package module located on the circuit board. The chip package module is the chip package module according to the first aspect of the embodiment of the present application.

[0022] The fourth aspect of the embodiment of the present application provides a method for manufacturing a chip package module, and the method includes the following: Providing a first conductive frame and a second conductive frame, wherein the second conductive frame is disposed at an interval beside the first conductive frame; Attaching the first bare die to the first conductive frame; Placing a first conductive connection sheet, wherein the first conductive connection sheet is connected to the surface of the first bare die away from the first conductive frame and extends to overlap the second conductive frame; Attaching a second bare die to the surface of the first bare die away from the first conductive frame, wherein the second bare die is connected to the first conductive connection sheet; and Placing a conductive cover plate, the conductive cover plate being connected to the surface of a second bare die away from the first conductive frame and extending to be connected to the first conductive frame.

[0023] According to the manufacturing method of the chip package module in the present application, without challenging the device manufacturing process, the innovation of the package structure improves the performance of a single device, increases the power density, thereby satisfying to a certain extent the requirements of a high-performance power supply system for the device, and the stress state of the device can be optimized through the special design of the conductive cover plate.

[0024] In one implementation form of the present application, the manufacturing method further includes providing a third conductive frame spaced laterally from the first conductive frame before the second bare die is placed, and placing a second conductive connection sheet, the second conductive connection sheet being connected to the surface of the first bare die away from the first conductive frame and extending to overlap the third conductive frame, and the second conductive connection sheet being disposed at an interval from the first conductive connection sheet.

[0025] In one implementation form of the present application, the conductive cover plate includes a flat plate and at least one side plate bent and connected to the flat plate, the flat plate covering the surface of the second bare die away from the first conductive frame, and each side plate being connected between the flat plate and the first conductive frame.

[0026] In one implementation of the present application, each of the first bare die and the second bare die includes a plurality of electrodes. The plurality of electrodes of the first bare die include a source, a drain, and a gate. The plurality of electrodes of the second bare die also include a source, a drain, and a gate. The source, drain, and gate of the first bare die are electrically connected in a one-to-one correspondence to the first conductive frame, the first conductive connection sheet, and the second conductive connection sheet. The source, drain, and gate of the second bare die are electrically connected in a one-to-one correspondence to the conductive cover plate, the first conductive connection sheet, and the second conductive connection sheet. The source of the first bare die is connected in parallel to the source of the second bare die. The drain of the first bare die is connected in parallel to the drain of the second bare die. The gate of the first bare die is connected in parallel to the gate of the second bare die.

[0027] In one implementation of the present application, the step of attaching the first bare die to the first conductive frame includes placing solder on the first conductive frame, placing the first bare die on the solder, and then electrically connecting the first bare die to the first conductive frame by soldering. The steps of arranging the first conductive connection sheet and the second conductive connection sheet include arranging two groups of solder spaced apart on the surface of the first bare die away from the first conductive frame, arranging solder separately on the second conductive frame and the third conductive frame, then placing the first conductive connection sheet on one group of solder of the first bare die and the solder of the second conductive frame, placing the second conductive connection sheet on the other group of solder of the first bare die and the solder of the third conductive frame, and electrically connecting the first conductive connection sheet to the first bare die and the second conductive frame by soldering, and electrically connecting the second conductive connection sheet to the first bare die and the third conductive frame by soldering. The step of attaching the second bare die includes placing solder separately on the surfaces of the first conductive connection sheet and the second conductive connection sheet away from the first bare die, placing the second bare die on the solder, and electrically connecting the second bare die to the first conductive connection sheet and the second conductive connection sheet by soldering. The step of arranging the conductive cover plate includes arranging solder on the surface of the second bare die away from the first conductive frame, installing the flat plate of the conductive cover plate on the solder, and electrically connecting the conductive cover plate to the second bare die by soldering.

Brief Description of Drawings

[0028]

Figure 1

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Figure 15

Embodiments for Carrying Out the Invention

[0029] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application. Unless otherwise specified, the data range in the present application should include the endpoint values.

[0030] Embodiments of the present application provide a chip package module having a new structure. In order to solve the problem that the performance of a single transistor cannot meet the system-level requirements due to the slow improvement of wafer-level performance, two bare wafers are packaged in parallel within a single device to reduce single-transistor loss, improve power density, and improve the performance of a single-chip package module.

[0031] Referring to FIGS. 1, 2, and 3, the chip package module 100 in the first embodiment of the present application includes a first conductive frame 11, a second conductive frame 12, and a third conductive frame 13. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are arranged at intervals from each other. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all in the shape of flat plates. Each of the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 is connected to a pin 101. The pin 101 is configured to be electrically connected to another electronic component (for example, an external circuit). The material of the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 may be a conductive metal.

[0032] As shown in FIG. 1, the chip package module 100 further includes a first bare die 41, a second bare die 42, a first conductive connection sheet 31, and a second conductive connection sheet 32. The first bare die 41 is disposed on the first conductive frame 11. In this embodiment, the area of the upper surface of the first conductive frame 11 used to install the first bare die 41 is larger than the area of the first bare die 41, and the first bare die 41 partially covers the upper surface of the first conductive frame 11. Solder 21 is disposed between the first bare die 41 and the first conductive frame 11, and electrical connection is implemented by soldering.

[0033] As shown in FIG. 1, the first conductive connection sheet 31 is connected to partially cover the surface of the first bare die 41 away from the first conductive frame 11, and extends to overlap the second conductive frame 12. The second conductive connection sheet 32 is connected to partially cover the surface of the first bare die 41 away from the first conductive frame 11, and extends to overlap the third conductive frame 13. The second conductive connection sheet 32 and the first conductive connection sheet 31 are disposed at intervals. Solder 21 is disposed in the region where the first conductive connection sheet 31 overlaps the first bare die 41 and the second conductive frame 12, and the first conductive connection sheet 31 is electrically connected to both the first bare die 41 and the second conductive frame 12 by soldering. Solder 21 is disposed in the region where the second conductive connection sheet 32 overlaps the first bare die 41 and the third conductive frame 13, and the second conductive connection sheet 32 is electrically connected to both the first bare die 41 and the third conductive frame 13 by soldering.

[0034] As shown in FIGS. 1 and 3, the second bare die 42 is laminated on the surface of the first bare die 41 together with the first conductive connection sheet 31 and the second conductive connection sheet 32, and is electrically connected to both the first conductive connection sheet 31 and the second conductive connection sheet 32. The first conductive connection sheet 31 and the second conductive frame 12 are disposed in cooperation, and the second conductive connection sheet 32 and the third conductive frame 13 are disposed in cooperation. Solder 21 is disposed in a region where the second bare die 42 overlaps the first conductive connection sheet 31 and the second conductive connection sheet 32, and the second bare die 42 is electrically connected to the first conductive connection sheet 31 and the second conductive connection sheet 32 by soldering. The first conductive connection sheet 31 is electrically connected to the first bare die 41 and the second bare die 42. The second conductive connection sheet 32 is also electrically connected to the first bare die 41 and the second bare die 42.

[0035] As shown in FIG. 1, the chip package module 100 further includes a conductive cover plate 33. The conductive cover plate 33 is connected to the surface of the second bare die 42 away from the first conductive frame 11 and extends to be connected to the first conductive frame 11. The conductive cover plate 33 includes a flat plate 331 and at least one side plate 333 bent and connected to the flat plate 331. The flat plate 331 covers the surface of the second bare die 42 away from the first conductive frame 11. Each side plate 333 is connected between the flat plate 331 and the first conductive frame 11. The conductive cover plate 33 and the first conductive frame 11 are disposed in cooperation. Solder 21 is disposed between the flat plate 331 and the second bare die 42, and solder 21 is also disposed between the side plate 333 and the first conductive frame 11. The conductive cover plate 33 is electrically connected to the second bare die 42 and the first conductive frame 11 by soldering.

[0036] In this embodiment, as shown in FIG. 1, the conductive cover plate 33 includes three side plates 333 vertically connected to the flat plate 331. On the side of the first conductive frame 11 where the second conductive frame 12 and the third conductive frame 13 are disposed, the side plates 333 are not disposed, so that the side plates 333 do not affect the extension of the first conductive connection sheet 31 and the second conductive connection sheet 32 so as to overlap the second conductive frame 12 and the third conductive frame 13 respectively. The side plates 333 are evenly supported between the flat plate 331 and the first conductive frame 11 to provide a supporting force. The structure of the side plates 333 includes, but is not limited to, a right-angle bend (the side plates 333 are vertically connected to the flat plate 331), a stepped bend, a strut, etc.

[0037] The conductive cover plate 33 is connected to the first conductive frame 11 by three bent side plates 333. The three side plates 333 can withstand the weight of the conductive cover plate 33 itself and the weight of the plastic packaging material obtained after a part of the chip package module 100 is packaged in plastic, and can relieve the stress of the lower first bare die to a certain extent.

[0038] Referring to FIG. 4, the structure of the chip package module 200 in the second embodiment of the present application is basically the same as the structure of the chip package module 100. The difference is that the conductive cover plate 33 of the chip package module 200 includes only one side plate 333 vertically connected to the flat plate 331. When the side where the second conductive frame 12 and the third conductive frame 13 are disposed of the first conductive frame 11 is the first side, the unique side plate 333 is disposed on the second side opposite to the first side. The single side plate 333 is connected to the first conductive frame 11, which also plays a role of support and can reduce the difficulty of the design and manufacture of the conductive cover plate 33.

[0039] As shown in FIGS. 1 to 3, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all rectangular plates, and the size of the first conductive frame 11 is larger than the sizes of the second conductive frame 12 and the third conductive frame 13. The second conductive frame 12 and the third conductive frame 13 are located on the same side edge of the first conductive frame 11. In this embodiment, the pin 101 of the first conductive frame 11 is connected to the side of the first conductive frame 11 that is away from the second conductive frame 12. The pin 101 of the second conductive frame 12 is connected to the side of the second conductive frame 12 that is away from the first conductive frame 11. The pin 101 of the third conductive frame 13 is connected to the side of the third conductive frame 13 that is away from the first conductive frame 11.

[0040] In this embodiment, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 have the same thickness. Therefore, when the first bare die 41 is disposed on the first conductive frame 11, the height of the first bare die 41 is greater than the heights of the second conductive frame 12 and the third conductive frame 13. The first conductive connection sheet 31 is bent and extends from the first bare die 41 to the second conductive frame 12, overlaps the second conductive frame 12, and covers the second conductive frame 12. The second conductive connection sheet 32 is bent and extends from the first bare die 41 to the third conductive frame 13, overlaps the third conductive frame 13, and covers the third conductive frame 13. The first conductive connection sheet 31 and the second conductive connection sheet 32 are installed at intervals from each other. As shown in FIG. 1, the first conductive connection sheet 31 includes two flat portions 310 and a connection portion 311 connected between the two flat portions 310. One flat portion 310 covers the first bare die 41, and the other flat portion 310 covers the second conductive frame 12. The connection portion is bent and extends from the end of each flat portion 310. Similarly, the second conductive connection Sheet also includes two flat portions 310 and a connection portion 311 connected between the two flat portions 310. One flat portion 310 covers the first bare die 41, and the other flat portion 310 covers the third conductive frame 13. The connection portion 311 is bent and extends from the end of each flat portion 310.

[0041] The chip package module 100 may further include a plastic package layer (not shown) for packaging the conductive cover plate 33, the first bare die 41, and the second bare die 42. The conductive cover plate 33 may be included inside the plastic package Layer or may be partially exposed to air to enhance heat dissipation capacity.

[0042] The first conductive connection sheet 31, the second conductive connection sheet 32, and the conductive cover plate 33 may be made of the same material. The material is a metal material or a solid conductive organic material, but is not limited thereto.

[0043] The first bare die 41 and the second bare die 42 each include a plurality of electrodes (not shown). The electrodes (first electrodes) of the first bare die 41 are electrically connected to the first conductive frame 11. The electrodes (second electrodes) of the second bare die 42 are electrically connected to the conductive cover plate 33. The first conductive frame 11 is electrically connected to the first bare die 41. Therefore, the first electrode pair of the first bare die 41 and the second bare die 42 is electrically connected to the conductive cover plate 33 by the first conductive frame 11. In addition, signal transmission with an external circuit is performed via the first conductive frame 11. Another electrode (third electrode) of the first bare die 41 and another electrode (fourth electrode) of the second bare die 42 are both electrically connected to the first conductive connection sheet 31. In other words, the second electrode pair of the first bare die 41 and the second bare die 42 is electrically connected by the first conductive connection sheet 31 and then electrically connected to the first conductive connection sheet 31 by the second conductive frame 12 to perform signal transmission with an external circuit. Yet another electrode (fifth electrode) of the first bare die 41 and yet another electrode (sixth electrode) of the second bare die 42 are both electrically connected to the second conductive connection sheet 32. That is, the third electrode pair of the first bare die 41 and the second bare die 42 is electrically connected by the second conductive connection sheet 32 and then electrically connected to the second conductive connection sheet 32 by the third conductive frame 13 to perform signal transmission with an external circuit.

[0044] According to the number of electrode pairs that need to be electrically connected in the first bare die 41 and the second bare die 42, the first conductive connection sheet 31 and the second conductive frame 12 are arranged in cooperation, and the second conductive connection sheet 32 and the third conductive frame 13 are arranged in cooperation. It can be understood that they can be correspondingly increased, decreased or omitted as necessary. For example, when it is only necessary to electrically connect only one pair of electrodes in the first bare die 41 and the second bare die 42, both the first conductive connection sheet 31 and the second conductive frame 12, and the second conductive connection sheet 32 and the third conductive frame 13 may be omitted. For example, when it is necessary to electrically connect two pairs of electrodes in the first bare die 41 and the second bare die 42, the second conductive connection sheet 32 and the third conductive frame 13 may be omitted.

[0045] According to the chip package modules 100 and 200 in the present application, the first conductive connection sheet 31, the second conductive connection sheet 32 and the conductive cover plate 33 are used to implement electrical interconnection between the vertically stacked bare dies 41 and 42, and the two bare dies are packaged in one device, thereby improving the performance of a single device and satisfying to a certain extent the requirements of a high-performance power supply system for the device.

[0046] In one embodiment, both the first bare die 41 and the second bare die 42 are MOSFET chips. The plurality of electrodes of the first bare die 41 include a source, a drain, and a gate, and the plurality of electrodes of the second bare die 42 also include a source, a drain, and a gate. The source, drain, and gate of the first bare die 41 are electrically connected in a one-to-one correspondence with the first conductive frame 11, the first conductive connection sheet 31, and the second conductive connection sheet 32. The specific correspondence connection relationship is not limited. For example, the source of the first bare die 41 is electrically connected to any one of the first conductive frame 11, the first conductive connection sheet 31, and the second conductive connection sheet 32. The drain of the first bare die 41 is electrically connected to one of the remaining two of the first conductive frame 11, the first conductive connection sheet 31, and the second conductive connection sheet 32. The gate of the first bare die 41 is electrically connected to the last remaining one of the first conductive frame 11, the first conductive connection sheet 31, and the second conductive connection sheet 32. The source, drain, and gate of the second bare die 42 are electrically connected in a one-to-one correspondence with the conductive cover plate 33, the first conductive connection sheet 31, and the second conductive connection sheet 32. The specific correspondence connection relationship is not limited. For example, the source of the second bare die 42 is electrically connected to any one of the conductive cover plate 33, the first conductive connection sheet 31, and the second conductive connection sheet 32. The drain of the second bare die 42 is electrically connected to one of the remaining two of the conductive cover plate 33, the first conductive connection sheet 31, and the second conductive connection sheet 32. The gate of the second bare die 42 is electrically connected to the last remaining one of the conductive cover plate 33, the first conductive connection sheet 31, and the second conductive connection sheet 32. The source of the first bare die 41 is connected in parallel to the source of the second bare die 42. The drain of the first bare die 41 is connected in parallel to the drain of the second bare die 42. The gate of the first bare die 41 is connected in parallel to the gate of the second bare die 42. The three terminals of the second bare die 42 and the first bare die 41 stacked vertically, namely, the source, the drain, and the gate, are connected in parallel.

[0047] In this embodiment, the first electrode of the first bare die 41 is a drain and is electrically connected to the first conductive frame 11. The third electrode of the first bare die 41 is a gate and is electrically connected to the first conductive connection sheet 31. The fifth electrode of the first bare die 41 is a source and is electrically connected to the second conductive connection sheet 32. However, it is not limited thereto. The second electrode of the second bare die 42 is a drain and is electrically connected to the conductive cover plate 33. The fourth electrode of the second bare die 42 is a gate and is electrically connected to the first conductive connection sheet 31. The sixth electrode of the second bare die 42 is a source and is electrically connected to the second conductive connection sheet 32. However, it is not limited thereto. In this case, three terminals of the second bare die 42 and the first bare die 41, that is, the source, the drain, and the gate are connected in parallel.

[0048] According to the chip package modules 100 and 200 in the present application, by using the first conductive connection sheet 31, the second conductive connection sheet 32, and the conductive cover plate 33 to implement parallel connection of three terminals of the vertically stacked bare dies 41 and 42, a single device has a vertically stacked chip, and the performance of the device is greatly improved.

[0049] It can be understood that the sizes and thicknesses of the first bare die 41 and the second bare die 42, and the area of the solder 21 coated in the chip package module 100 can be adjusted and designed as required.

[0050] As shown in FIG. 14, the present application further provides a power module 400 including a circuit board 530 and the aforementioned chip package modules 100 and 200 located on the circuit board 530. The pins 101 of the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 can all be electrically connected to the circuit board 530.

[0051] As shown in FIG. 15, the present application further provides an electronic device 500 including a housing 510, a circuit board 530 located within the housing 510, and the aforementioned chip package modules 100 and 200 located on the circuit board 530.

[0052] Referring to FIGS. 5 to 13, the present application further provides a method for manufacturing the aforementioned chip package module, including the following steps.

[0053] (1) Provide a first conductive frame 11, a second conductive frame 12, and a third conductive frame 13. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are arranged at intervals from each other.

[0054] (2) Attach a first bare die 41 to the first conductive frame 11.

[0055] (3) Arrange a first conductive connection sheet 31 and a second conductive connection sheet 32. The first conductive connection sheet 31 covers the surface of the first bare die 41 away from the first conductive frame 11 and extends to overlap the second conductive frame 12. The second conductive connection sheet 32 covers the surface of the first bare die 41 away from the first conductive frame 11 and extends to overlap the third conductive frame 13.

[0056] (4) Attach a second bare die 42 to the surface of the first bare die 41 having the first conductive connection sheet 31 and the second conductive connection sheet 32.

[0057] (5) Arrange a conductive cover plate 33. The conductive cover plate 33 includes a flat plate 331 and at least one side plate 333 bent and connected to the flat plate 331. The flat plate 331 covers the surface of the second bare die 42 away from the first conductive frame 11. Each side plate 333 is connected between the flat plate 331 and the first conductive frame 11.

[0058] As described above, according to the number of electrode pairs that need to be electrically connected in the first bare die 41 and the second bare die 42, the first conductive connection sheet 31 and the second conductive frame 12 are arranged in cooperation, the second conductive connection sheet 32 and the third conductive frame 13 are arranged in cooperation, and it can be understood that they can be increased, decreased, or correspondingly adjusted as necessary.

[0059] In this embodiment, as shown in FIG. 5, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all rectangular flat blocks, and the size of the first conductive frame 11 is larger than the sizes of the second conductive frame 12 and the third conductive frame 13. The second conductive frame 12 and the third conductive frame 13 are located on the same side edge of the first conductive frame 11. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all connected to the pin 101. In this embodiment, the pin 101 of the first conductive frame 11 is connected to the side of the first conductive frame 11 that is away from the second conductive frame 12. The pin 101 of the second conductive frame is connected to the side of the second conductive frame 12 that is away from the first conductive frame 11. The pin 101 of the third conductive frame 13 is connected to the side of the third conductive frame 13 that is away from the first conductive frame 11. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 can be obtained by cutting a conductive metal plate. The pin 101 may be obtained by processing a conductive metal plate. Specifically, the conductive frame and the pin 101 connected to the conductive frame are integrally formed. However, the present application is not limited thereto.

[0060] In this embodiment, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 have the same thickness.

[0061] As shown in FIGS. 6 and 7, the step of attaching the first bare die 41 to the first conductive frame 11 includes the steps of disposing solder 21 on the first conductive frame 11, placing the first bare die 41 on the solder 21, and then electrically connecting the first bare die 41 to the first conductive frame 11 by soldering. For example, heating (the heating temperature generally does not exceed 450° C.) is performed to join the solder 21 between the first bare die 41 and the first conductive frame 11.

[0062] As shown in FIGS. 8 and 9, the steps of disposing the first conductive connection sheet 31 and disposing the second conductive connection sheet 32 include disposing two groups of solder 21 spaced apart on the surface of the first bare die 41 away from the first conductive frame 11, separately disposing solder 21 on the second conductive frame 12 and the third conductive frame 13, and then installing the first conductive connection sheet 31 on one group of solder 21 of the first bare die 41 and the solder 21 of the second conductive frame 12, and disposing the second conductive connection sheet 32 on the other group of solder 21 of the first bare die 41 and the solder 21 of the third conductive frame 13. The steps include electrically connecting the first conductive connection sheet 31 to the first bare die 41 and the second conductive frame 12 by soldering, and electrically connecting the second conductive connection sheet 32 to the first bare die 41 and the third conductive frame 13 by soldering. For example, heating (the heating temperature generally does not exceed 450° C.) is performed to join the solder 21 between the first bare die 41 and the first conductive connection sheet 31 and between the second conductive frame 12 and the first conductive connection sheet 31, and heating is performed to join the solder 21 between the first bare die 41 and the second conductive connection sheet 32 and between the third conductive frame 13 and the second conductive connection sheet 32.

[0063] The shape of the first conductive connection sheet 31 needs to match the shapes of the first bare die 41 and the first conductive frame 11. The first conductive connection sheet 31 includes two flat portions 310 and a connection portion 311 connected between the two flat portions 310. The connection portion 311 is bent and extends from the end of each flat portion 310. One flat portion 310 covers the first bare die 41, and the other flat portion 310 covers the second conductive frame 12. Similarly, the shape of the second conductive connection Sheet needs to match the shapes of the first bare die 41 and the second conductive frame 12. The second conductive connection Sheet also includes two flat portions 310 and a connection portion 311 connected between the two flat portions 310. The connection portion 311 is bent and extends from the end of each flat portion 310. One flat portion 310 covers the first bare die 41, and the other flat portion 310 covers the third conductive frame 13.

[0064] As shown in FIGS. 10 and 11, the step of attaching the second bare die 42 includes separately disposing solder 21 on the surfaces of the first conductive connection sheet 31 and the second conductive connection sheet 32 away from the first bare die 41, installing the second bare die 42 on the solder 21, and electrically connecting the second bare die 42 to the first conductive connection sheet 31 and the second conductive connection sheet 32 by soldering. For example, heating is performed to join the solder 21 between the second bare die 42 and the first conductive connection sheet 31 and between the second bare die 42 and the second conductive connection sheet 32.

[0065] As shown in FIGS. 12 and 13, the step of disposing the conductive cover plate 33 includes disposing solder 21 on the surface of the second bare die 42 away from the first conductive frame 11, installing the flat plate 331 of the conductive cover plate 33 on the solder 21, and electrically connecting the conductive cover plate 33 to the second bare die 42 by soldering. For example, heating is performed to join the solder 21 between the conductive cover plate 33 and the second bare die 42.

[0066] According to the manufacturing method of the chip package module in the present application, without challenging the device manufacturing process, the innovation of the package structure improves the performance of a single device and increases the power density, thereby satisfying to a certain extent the requirements of a high-performance power supply system for the device, and the stress state of the device can be optimized through the special design of the conductive cover plate.

[0067] It should be noted that the foregoing description is only a specific implementation form of the present application and does not limit the protection scope of the present application. Any deformation or substitution that can be easily conceived by those skilled in the art within the technical scope disclosed in the present application shall be included within the protection scope of the present application. The implementation forms and features in the implementation forms in the present application can be combined with each other without causing any contradiction. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A chip package module, comprising: a first conductive frame; a first bare die disposed on the first conductive frame; a second conductive frame disposed at a distance from the first conductive frame; a first conductive connection sheet connected to the surface of the first bare die away from the first conductive frame and extending to overlap the second conductive frame; a second bare die laminated on the surface of the first bare die away from the first conductive frame and connected to the first conductive connection sheet; a conductive cover plate connected to the surface of the second bare die away from the first conductive frame and extending to be connected to the first conductive frame. The chip package module further comprises: The conductive cover plate includes a flat plate and three side plates bent and connected to the flat plate. The flat plate covers the surface of the second bare die away from the first conductive frame, and each of the three side plates is connected between the flat plate and the first conductive frame. A chip package module.

2. The first electrode of the first bare die is electrically connected to the first conductive frame, and the second electrode of the second bare die is electrically connected to the conductive cover plate to implement an electrical connection between the first electrode and the second electrode. Both the third electrode of the first bare die and the fourth electrode of the second bare die are electrically connected to the first conductive connection sheet to implement an electrical connection between the third electrode and the fourth electrode. The chip package module according to Claim 1.

3. The chip package module further comprises a third conductive frame and a second conductive connection sheet. The first conductive frame, the second conductive frame, and the third conductive frame are disposed at intervals from each other. The second conductive connection sheet is connected to the surface of the first bare die away from the first conductive frame and extends to overlap the third conductive frame. The second conductive connection sheet is disposed at a distance from the first conductive connection sheet. The chip package module according to Claim 1.

4. The chip package module according to claim 3, wherein both the fifth electrode of the first bare die and the sixth electrode of the second bare die are electrically connected to the second conductive connection sheet to effect electrical connection between the fifth electrode and the sixth electrode.

5. The first electrode is a first drain, the third electrode is a first gate, the fifth electrode is a first source, the second electrode is a second drain, the fourth electrode is a second gate, and the sixth electrode is a second source. The first drain, the first gate, and the first source are electrically connected to the first conductive frame, the first conductive connection sheet, and the second conductive connection sheet in a one-to-one correspondence. The second drain, the second gate, and the second source are electrically connected to the conductive cover plate, the first conductive connection sheet, and the second conductive connection sheet in a one-to-one correspondence. The chip package module according to claim 4.

6. The chip package module according to claim 5, wherein the first source is connected in parallel with the second source, the first drain is connected in parallel with the second drain, and the first gate is connected in parallel with the second gate.

7. The chip package module according to claim 6, wherein the first drain is electrically connected to the first conductive frame, the first gate is electrically connected to the first conductive connection sheet, the first source is electrically connected to the second conductive connection sheet, the second drain is electrically connected to the conductive cover plate, the second gate is electrically connected to the first conductive connection sheet, and the second source is electrically connected to the second conductive connection sheet.

8. The chip package module according to claim 1, wherein each of the three side plates is connected perpendicularly to the flat plate.

9. Solder is disposed between the first bare die and the first conductive frame, and electrical connection is implemented by soldering. Solder is disposed in a region where the first conductive connection sheet overlaps the first bare die and the second conductive frame, and the first conductive connection sheet is electrically connected to the first bare die and the second conductive frame by soldering. Solder is disposed in a region where the second bare die overlaps the first conductive connection sheet, and the second bare die is electrically connected to the first conductive connection sheet by soldering. Solder is disposed between the conductive cover plate and the second bare die, and the conductive cover plate is electrically connected to the second bare die by soldering. The chip package module according to claim 1.

10. A power module comprising a circuit board and a chip package module located on the circuit board, wherein the chip package module is the chip package module according to claim 1.

11. An electronic device comprising a circuit board and a chip package module located on the circuit board, wherein the chip package module is the chip package module according to claim 1.

12. A method for manufacturing a chip package module, providing a first conductive frame and a second conductive frame, wherein the second conductive frame is disposed at an interval beside the first conductive frame; attaching a first bare die to the first conductive frame; placing a first conductive connection sheet, wherein the first conductive connection sheet is connected to the surface of the first bare die away from the first conductive frame and extends to overlap the second conductive frame; attaching a second bare die to the surface of the first bare die away from the first conductive frame, wherein the second bare die is connected to the first conductive connection sheet; placing a conductive cover plate, wherein the conductive cover plate is connected to the surface of the second bare die away from the first conductive frame and extends to be connected to the first conductive frame; including The conductive cover plate includes a flat plate and three side plates bent and connected to the flat plate. The flat plate covers the surface of the second bare die away from the first conductive frame, and each of the three side plates is connected between the flat plate and the first conductive frame. A method for manufacturing a chip package module.

13. The manufacturing method further includes a step of providing a third conductive frame positioned at a distance beside the first conductive frame before the second bare die is disposed, and a step of disposing a second conductive connection sheet. The second conductive connection sheet is connected to the surface of the first bare die away from the first conductive frame and extends to overlap the third conductive frame. The second conductive connection sheet is disposed at a distance from the first conductive connection sheet. The method for manufacturing a chip package module according to claim 12.

14. Each of the first bare die and the second bare die includes a plurality of electrodes. The plurality of electrodes of the first bare die include a source, a drain, and a gate. The plurality of electrodes of the second bare die also include a source, a drain, and a gate. The source, the drain, and the gate of the first bare die are electrically connected to the first conductive frame, the first conductive connection sheet, and the second conductive connection sheet in a one-to-one correspondence. The source, the drain, and the gate of the second bare die are electrically connected to the conductive cover plate, the first conductive connection sheet, and the second conductive connection sheet in a one-to-one correspondence. The source of the first bare die is connected in parallel to the source of the second bare die. The drain of the first bare die is connected in parallel to the drain of the second bare die. The gate of the first bare die is connected in parallel to the gate of the second bare die. The method for manufacturing a chip package module according to claim 13.

15. The step of attaching the first bare die to the first conductive frame includes the steps of disposing solder on the first conductive frame, installing the first bare die on the solder, and then electrically connecting the first bare die to the first conductive frame by soldering. The step of disposing the first conductive connection sheet and the step of disposing the second conductive connection sheet include disposing two groups of solder spaced apart on the surface of the first bare die away from the first conductive frame, disposing solder separately on the second conductive frame and the third conductive frame, and then installing the first conductive connection sheet on one group of solder of the first bare die and the solder on the second conductive frame, and disposing the second conductive connection sheet on the other group of solder of the first bare die and the solder on the third conductive frame, and electrically connecting the first conductive connection sheet to the first bare die and the second conductive frame by soldering, and electrically connecting the second conductive connection sheet to the first bare die and the third conductive frame by soldering. The step of attaching the second bare die includes disposing solder separately on the surfaces of the first conductive connection sheet and the second conductive connection sheet away from the first bare die, installing the second bare die on the solder, and electrically connecting the second bare die to the first conductive connection sheet and the second conductive connection sheet by soldering. The step of disposing the conductive cover plate includes disposing solder on the surface of the second bare die away from the first conductive frame, installing the flat plate of the conductive cover plate on the solder, and electrically connecting the conductive cover plate to the second bare die by soldering. The method for manufacturing a chip package module according to claim 13.

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