Method of manufacturing a semiconductor device

Abstract

To provide a manufacturing method of a semiconductor device for improving the characteristics of a semiconductor device.SOLUTION: A manufacturing method of a semiconductor device includes the steps of etching a conductor layer on the upper layer of an oxide semiconductor with plasma generated by a first processing gas composed of a Cl-based gas, and removing a damaged layer formed in a channel region of the oxide semiconductor by plasma formed by a second processing gas consisting of Ar gas.SELECTED DRAWING: Figure 9

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device having a gate electrode, a gate insulating film overlapping the gate electrode, an oxide film overlapping the gate electrode via the gate insulating film, a source electrode and a drain electrode in contact with the oxide film, and an oxide insulating film in contact with the source electrode and the drain electrode.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in a BCE (Back Channel Etching) type TFT (Thin Film Transistor) as shown in Patent Document 1, after forming a conductor layer on an oxide semiconductor (oxide film), the conductor layer is etched by plasma treatment to form a source electrode and a drain electrode. This plasma treatment causes damage to the channel region of the oxide semiconductor, deteriorating the characteristics of the TFT.

[0005]

Means for Solving the Problems

[0006] To solve the above problems, according to one aspect, there is provided a step of etching a conductor layer on an upper layer of an oxide semiconductor with a plasma formed by a first processing gas composed of a Cl-based gas, and a damage layer formed in a channel region of the oxide semiconductor with a plasma formed by a second processing gas composed of an Ar gas physically etching the oxygen-deficient layer as and a step of removing the same, and a method for manufacturing a semiconductor device is provided.

Effects of the Invention

[0007] According to one aspect, it is possible to provide a method for manufacturing a semiconductor device that improves the characteristics of the semiconductor device.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments for implementing the present disclosure will be described with reference to the drawings. In each drawing, the same reference numerals are assigned to the same components, and redundant descriptions may be omitted.

[0010] [Plasma Processing Apparatus] First, the plasma processing apparatus 10 according to the embodiment will be described with reference to FIG. 1. FIG. 1 is a cross-sectional schematic view showing an example of the plasma processing apparatus 10 according to the embodiment. The plasma processing apparatus 10 according to the embodiment is an apparatus that generates plasma by inductive coupling in the processing chamber 4 and processes the substrate G to be processed. The plasma processing apparatus 10 according to the embodiment is used, for example, for etching a metal film, an ITO film, an oxide film, etc. when forming a thin film transistor on a glass substrate for an FPD (Flat Panel Display), or for ashing a resist film. Here, examples of the FPD include a liquid crystal display (LCD), an electro luminescence (EL) display, a plasma display panel (PDP), etc.

[0011] The plasma processing apparatus 10 has an airtight processing container 1 having a rectangular tube shape made of a conductive material, for example, aluminum whose inner wall surface is anodized (aluminum oxide treatment). The processing container 1 is grounded by a ground wire 1a. The processing container 1 is partitioned into an upper antenna chamber 3 and a lower processing chamber 4 by a metal window 2 formed to be insulated from the processing container 1. The metal window 2 constitutes the ceiling wall of the processing chamber 4 in this example. The metal window 2 is made of, for example, a non-magnetic and conductive metal. Examples of non-magnetic and conductive metals are aluminum or an alloy containing aluminum. The metal window 2 is supported by the side wall of the processing container 1.

[0012] A gas supply pipe 20a penetrates through the center of the antenna chamber 3 and is provided so as to communicate with the gas flow path 12. The gas flow path 12 branches into a plurality of branch pipes (not shown), is connected to partial windows of the metal window 2 divided into a plurality by the insulator 6, and supplies gas to each partial window. Each partial window has a gas space inside (not shown), has a plurality of gas discharge ports on the surface facing the processing chamber 4, and supplies gas into the processing chamber 4 from the plurality of gas discharge holes. The gas supply pipe 20a penetrates from the ceiling of the processing container 1 to the outside thereof and is connected to a processing gas supply unit 20 including a processing gas supply source, a valve system, and the like. Therefore, in plasma processing, the processing gas supplied from the processing gas supply unit 20 is discharged into the processing chamber 4 through the gas supply pipe 20a.

[0013] In the antenna chamber 3, a high-frequency (RF) antenna 13 is disposed above the metal window 2 so as to face the metal window 2. The high-frequency antenna 13 is separated from the metal window 2 by a spacer 17 made of an insulating member. The high-frequency antenna 13 constitutes a spiral antenna (not shown), and the metal window 2 is divided, for example, into 24 partial windows at the lower part of the spiral antenna. The high-frequency antenna 13 is an example of an inductively coupled antenna that is disposed above the metal window 2 via the spacer 17 of the insulating member in the antenna chamber 3 and generates inductively coupled plasma in the processing chamber 4.

[0014] During plasma processing, high-frequency power for forming an induction electric field, for example, high-frequency power with a frequency of 13.56 MHz, is supplied from the first high-frequency power supply (source power supply) 15 to the high-frequency antenna 13 via the matcher 14 and the power feeding member 16. Although not shown in the figure, the high-frequency antenna 13 in this example is composed of a concentric outer annular antenna, an intermediate annular antenna, and an inner annular antenna, and has power feeding parts 41, 42, and 43 connected to the power feeding member 16 respectively. Antenna wires extend in the circumferential direction from these respective power feeding parts 41, 42, and 43, and a three-ring high-frequency antenna 13 is formed. A capacitor 18 is connected to the end of each antenna wire, and each antenna wire is connected to the side wall 3a of the high-frequency antenna 13 via the capacitor 18 and grounded. Due to the high-frequency power supplied to the high-frequency antenna 13 in this way, an induction electric field is formed in the processing chamber 4 through the metal window 2, and the processing gas supplied into the processing chamber 4 is turned into plasma by this induction electric field.

[0015] Below in the processing chamber 4, a stage ST for placing a substrate to be processed G, for example, a glass substrate, is provided so as to face the high-frequency antenna 13 with the metal window 2 in between. The stage ST has a base 23 and an insulator frame 24. The base 23 is made of a conductive material, for example, aluminum whose surface has been anodized.

[0016] The base 23 is housed in the insulator frame 24 and is further supported by the bottom surface of the processing chamber 4. Also, an inlet / outlet 27a for loading and unloading the substrate to be processed G and a gate valve 27 for opening and closing it are provided on the side wall 4a of the processing chamber 4.

[0017] The second high-frequency power supply (bias power supply) 29 is connected to the base 23 via the matcher 28 by a power feeding line 25a provided in a hollow support column 25. The second high-frequency power supply 29 applies high-frequency power for a bias voltage, for example, high-frequency power with a frequency of 3.2 MHz, to the base 23 during plasma processing. A bias voltage is generated on the substrate to be processed G by this high-frequency power for the bias voltage, and ions in the plasma generated in the processing chamber 4 are drawn into the substrate to be processed G.

[0018] The electrostatic chuck 26 is provided on the base 23 and places the substrate G to be processed thereon. The electrostatic chuck 26 has a structure in which chuck electrodes 26a are sandwiched between insulators. A DC power supply 47 is connected to the chuck electrodes 26a. When a DC voltage is applied from the DC power supply 47 to the chuck electrodes 26a, a Coulomb force is generated, and the substrate G to be processed is adsorbed and held by the electrostatic chuck 26.

[0019] Furthermore, inside the base 23, a temperature control mechanism including heating means such as a ceramic heater and a refrigerant flow path, and a temperature sensor may be provided to control the temperature of the substrate G to be processed. Piping and wiring for these mechanisms and members are all led out of the processing chamber 1 through the hollow support column 25.

[0020] A baffle plate 32 is provided continuously or intermittently in an annular shape around the stage ST between the stage ST and the side wall 4a of the processing chamber 4 to allow gas to pass from the processing chamber 4 to the exhaust space. An exhaust device 30 including a vacuum pump or the like is connected to the bottom of the processing chamber 4 via an exhaust pipe 31. By the exhaust device 30, the exhaust space below the baffle plate 32 is exhausted, and during plasma processing, the inside of the processing chamber 4 is set and maintained at a predetermined vacuum atmosphere (for example, 1.33 Pa).

[0021] A He gas flow path 55 for supplying He gas as a heat transfer gas is provided between the electrostatic chuck 26 and the substrate G to be processed. A He gas line 56 is connected to the He gas flow path 55 and is connected to a He source via a pressure control valve 57.

[0022] Each component of the plasma processing apparatus 10 is connected to a control unit 50 composed of a computer and is configured to be controlled by the control unit 50. Further, a user interface 51 including a keyboard for a process manager to perform input operations of commands and the like to manage the plasma processing apparatus 10 and a display for visualizing and displaying the operating status of the plasma processing apparatus 10 is connected to the control unit 50. Furthermore, a storage unit 52 is connected to the control unit 50. The storage unit 52 stores a control program for realizing various processes executed in the plasma processing apparatus 10 under the control of the control unit 50 and a recipe which is a program for causing each component of the plasma processing apparatus 10 to execute a process according to processing conditions. The recipe may be stored in a hard disk or a semiconductor memory, or may be set at a predetermined position of the storage unit 52 in a state accommodated in a portable storage medium such as a CD-ROM or a DVD. Furthermore, the recipe may be appropriately transmitted from another device via, for example, a dedicated line. Then, as needed, by calling an arbitrary recipe from the storage unit 52 based on an instruction or the like from the user interface 51 and causing the control unit 50 to execute it, a desired process is performed on the substrate G to be processed in the processing chamber 4 of the plasma processing apparatus 10.

[0023] In the plasma processing apparatus 10 having such a configuration, an induced electric field is formed in the processing chamber 4 through the metal window 2 by the high-frequency power supplied to the high-frequency antenna 13. The processing gas supplied into the processing chamber 4 is plasmaized by this induced electric field, and a desired process is performed on the substrate G to be processed using inductively coupled plasma.

[0024] Next, a method for manufacturing a semiconductor device will be described with reference to FIGS. 2 and 3. FIG. 2 is a flowchart showing an example of substrate processing for manufacturing a semiconductor device. FIG. 3 is an example of a cross-sectional schematic view of the substrate G to be processed. Here, as the semiconductor device, a BCE (Back Channel Etching) type TFT (Thin Film Transistor) is formed.

[0025] In step S101, a substrate G to be processed is prepared. FIG. 3(a) is an example of a cross-sectional schematic view of the substrate G to be processed prepared in step S101. The substrate G to be processed has a substrate body 210, a gate electrode 220, a gate insulating film 230, an oxide semiconductor 240, and a conductor layer 250.

[0026] The substrate body 210 is formed of an insulating film such as a silicon oxide film or a silicon nitride film. The gate electrode 220 is formed of a conductor such as molybdenum or tungsten and is formed on the substrate body 210. The gate insulating film 230 is formed of an insulator such as a silicon oxide film or a silicon nitride film and is formed on the substrate body 210 and the gate electrode 220. The oxide semiconductor 240 is formed of, for example, an indium-gallium-zinc oxide semiconductor (hereinafter also referred to as IGZO) and is formed on the gate insulating film 230. The conductor layer 250 is formed of a conductor such as titanium, aluminum, or tungsten and is formed on the oxide semiconductor 240 and the gate insulating film 230.

[0027] In step S102, the conductor layer 250 is etched to form a source electrode 251 and a drain electrode 252. First, a photoresist mask (not shown) is formed on the conductor layer 250. Next, the conductor layer 250 is etched using the photoresist mask to form the source electrode 251 and the drain electrode 252. Here, a plasma processing apparatus 10 (see FIG. 1) is used, and an etching gas (a first processing gas) is supplied from a processing gas supply unit 20 into the processing chamber 4 to generate plasma by inductive coupling in the processing chamber 4, thereby performing an etching process on the conductor layer 250. As the etching gas, a gas containing Cl (a Cl-based gas), for example, Cl2 gas, a gas obtained by adding BCl3 to Cl2, or the like can be used. Thereafter, the photoresist mask is removed.

[0028] FIG. 3(b) is an example of a cross-sectional schematic view of the substrate G to be processed that has been subjected to the etching process in step S102. By etching the conductor layer 250, the source electrode 251 and the drain electrode 252 are formed.

[0029] Also, the plasma for etching the conductor layer 250 causes damage to the oxide semiconductor 240, and a damaged layer (oxygen-deficient layer) 245 is formed. As shown in FIG. 3(b), the damaged layer 245 is formed in the channel region between the source electrode 251 and the drain electrode 252. In the damaged layer 245, oxygen (O) deficiency (defects) occur due to the exposure of the oxide semiconductor 240 to the plasma, and the oxide semiconductor 240 becomes conductive.

[0030] In step S103, the damaged layer (oxygen-deficient layer) 245 of the oxide semiconductor 240 is removed. Here, using the plasma processing apparatus 10 (see FIG. 1), Ar gas (second processing gas) is supplied from the processing gas supply unit 20 into the processing chamber 4, and plasma is generated by inductive coupling in the processing chamber 4. For example, the pressure of the Ar gas is adjusted to 10 mT, the source power of the first high-frequency power supply (source power supply) 15 is set to 4 kW, the bias power of the second high-frequency power supply (bias power supply) 29 is set to 2 kW, and the discharge process is performed for 120 seconds. By this process, argon (Ar) is ionized by the source power, and the ionized argon (Ar) has kinetic energy by the bias power and collides with the surface of the substrate G to be processed. By causing the ionized argon (Ar) to collide with the damaged layer 245 of the oxide semiconductor 240, the damaged layer 245 is physically etched and the damaged layer 245 is removed.

[0031] FIG. 3(c) is an example of a cross-sectional schematic view of the substrate G to be processed that has been processed in step S103. By the collision of the ionized argon (Ar), the damaged layer 245 (see FIG. 3(b)) is removed.

[0032] In step S104, an insulating film 260 is formed over the oxide semiconductor 240, the source electrode 251, and the drain electrode 252. The insulating film 260 is formed of an insulator such as a silicon oxide film or a silicon nitride film, for example. The insulating film 260 is formed by a CVD (Chemical Vapor Deposition) apparatus, for example.

[0033] FIG. 3(d) is an example of a cross-sectional schematic view of a substrate G to be processed, which has been processed in step S104. An insulating film 260 is formed over the oxide semiconductor 240, the source electrode 251, and the drain electrode 252.

[0034] In step S105, the substrate G to be processed is subjected to an annealing process. The semiconductor device is activated by the annealing process. As a result, a TFT as a semiconductor device is formed on the substrate G to be processed.

[0035] Next, damage to the oxide semiconductor 240 will be described with reference to FIGS. 4 to 7.

[0036] FIG. 4 is an example of an XPS analysis of the oxide semiconductor 240 exposed to plasma formed by a first processing gas. Here, to simulate damage to the oxide semiconductor 240 in the etching process of the conductor layer 250 in step S102, the oxide semiconductor 240 (IGZO) was subjected to a plasma etching process using a first processing gas (Cl2 gas), and a damaged layer 245 was formed on the surface of the oxide semiconductor 240. Then, XPS analysis was performed on the oxide semiconductor 240 having the damaged layer 245 formed on its surface.

[0037] In FIG. 4(a), the horizontal axis represents the binding energy (eV), and the vertical axis represents the intensity (a.u.). Also, spectrum 301 shows the result of XPS analysis on the surface of the oxide semiconductor 240. Also, spectra 302 to 312 show the results of XPS analysis at positions dug 1.3 nm deep from the surface of the oxide semiconductor 240 in the depth direction. FIG. 4(b) shows the result of XPS analysis on the surface of the oxide semiconductor 240. FIG. 4(c) shows the result of XPS analysis at a position dug 1.3 nm deep from the surface of the oxide semiconductor 240 in the depth direction.

[0038] Here, the spectrum of the O1s orbital (indicated by a solid line) can be separated into an O I spectrum (indicated by a one-dot chain line) and an O II spectrum (indicated by a broken line). OI The spectrum is based on the bond between oxygen atoms and metal atoms. O II The spectrum is based on oxygen deficiency. Therefore, O I The peak intensity of the spectrum (indicated by the arrow) and O II The ratio of the peak intensity of the spectrum (indicated by the arrow) to O I and O II The peak ratio of O I / O II ) is used as an index of oxygen deficiency. The greater the oxygen deficiency, the lower the peak ratio of O I and O II (O I / O II ); the smaller the oxygen deficiency, the higher the peak ratio of O I and O II (O I / O II ).

[0039] In FIG. 4(b), the peak ratio of O I and O II (O I / O II ) is 0.31; in FIG. 4(c), the peak ratio of O I and O II (O I / O II ) is 35.6. That is, the peak ratio of O I and O II (O I / O II ) increases rapidly at a position 1.3 nm in the depth direction from the surface of the oxide semiconductor 240 shown in FIG. 4(c) as compared with the surface of the oxide semiconductor 240 shown in FIG. 4(b). That is, the damage layer 245 of the oxide semiconductor 240 is localized within 1.5 nm from the surface of the oxide semiconductor 240.

[0040] FIG. 5 is a graph showing an example of the result of the peak ratio of O I and O II (O I / O II ) on the surface of the oxide semiconductor 240. Here, the influence of the damage and the improvement of the damage of the oxide semiconductor 240 due to the gas species of the first processing gas and the second processing gas are explained.

[0041] Figure 5(a) shows the peak ratio of O I to O II (O I / O II ) on the surface of the untreated (Initial) oxide semiconductor 240. Figure 5(b) shows the peak ratio of O I to O II (O I / O II ) on the surface of the oxide semiconductor 240 treated with the plasma formed by the first processing gas, where BCl3 gas is added to Cl2 gas as the first processing gas. Figure 5(c) shows the peak ratio of O I to O II (O I / O II ) on the surface of the oxide semiconductor 240 treated with the plasma formed by the first processing gas, where Cl2 gas is used as the first processing gas.

[0042] Compared with the surface of the untreated oxide semiconductor 240 shown in Figure 5(a), the surface of the oxide semiconductor 240 treated with the plasma formed by the first processing gas shown in Figures 5(b) and (c) has a decreased peak ratio of O I to O II (O I / O II ). That is, the plasma formed by the first processing gas has damaged the oxide semiconductor 240. Also, Figure 5(b) with the addition of BCl3 gas shows greater damage to the oxide semiconductor 240 compared to Figure 5(c) without the addition of BCl3 gas.

[0043] Figures 5(d) to (g) show that the oxide semiconductor 240 was treated with the plasma formed by the first processing gas, where BCl3 gas is added to Cl2 gas as the first processing gas. Figure 5(d) shows the peak ratio of O I to O II (O I / O II) is shown. FIG. 5(e) shows the O on the surface of the oxide semiconductor 240 that has been processed with a plasma formed by a mixed gas of CF4 gas and O2 gas as the second processing gas I and O II peak ratio of (O I / O II ). FIG. 5(f) shows the O on the surface of the oxide semiconductor 240 that has been processed with a plasma formed by Ar gas as the second processing gas I and O II peak ratio of (O I / O II ). FIG. 5(g) shows the O on the surface of the oxide semiconductor 240 that has been processed with a plasma formed by O2 gas as the second processing gas and with bias power applied I and O II peak ratio of (O I / O II ).

[0044] In the plasma treatment with O2 gas (see FIG. 5(d)) and the plasma treatment with a mixed gas of CF4 gas and O2 gas (see FIG. 5(e)), no improvement in the damage to the oxide semiconductor 240 was observed. On the other hand, in the plasma treatment with Ar gas (see FIG. 5(f)), the damage to the oxide semiconductor 240 was improved. Also, in the plasma treatment with O2 gas with bias power applied (see FIG. 5(d)), the damage to the oxide semiconductor 240 progressed.

[0045] FIG. 6 is a graph showing an example of the results of the peak ratio of O I and O II on the surface of the oxide semiconductor 240 (O I / O II ). Here, the influence of the improvement in the damage to the oxide semiconductor 240 due to the ratio of the source power and the bias power during the plasma treatment is explained.

[0046] In FIG. 6, a gas obtained by adding BCl3 gas to Cl2 gas is used as the first processing gas. After the oxide semiconductor 240 is processed with the plasma formed by the first processing gas, Ar gas is used as the second processing gas, and O with respect to the oxide semiconductor 240 processed with the plasma formed by the second processing gas I and O II peak ratio of (O I / O II ) is shown. Note that the Ar gas supply rate was 1000 sccm, the pressure in processing chamber 4 was 10 mT, the source power was 4 kW, and the processing time was 120 seconds. The results when the bias power was 0 kW, 2 kW, and 4 kW are shown respectively. Also, Ref is the peak ratio of O I and O II with respect to the oxide semiconductor 240 processed with the plasma formed by the first processing gas (O I / O II ).

[0047] As shown in FIG. 6, at bias powers of 2 kW and 4 kW, the peak ratio of O I and O II (O I / O II ) was greatly improved. In other words, within the range where the ratio of "source power:bias power" is 2:1 or more and 1:1 or less, the damage to the oxide semiconductor 240 can be preferably improved.

[0048] FIG. 7 is a graph showing an example of the result of the peak ratio of O I and O II (O I / O II ) on the surface of the oxide semiconductor 240. Here, the influence of the improvement of the damage to the oxide semiconductor 240 due to the processing time is explained.

[0049] In FIG. 7, a gas obtained by adding BCl3 gas to Cl2 gas is used as the first processing gas. After the oxide semiconductor 240 is processed with the plasma formed by the first processing gas, Ar gas is used as the second processing gas, and O with respect to the surface of the oxide semiconductor 240 processed with the plasma formed by the second processing gas I and O IIPeak ratio of O I / O II ) is shown. In the plasma treatment with the second processing gas, the Ar gas supply rate was 1000 sccm, the pressure in the processing chamber 4 was 10 mT, the source power was 4 kW, and the bias power was 2 kW. Fig. 7(b) shows the results when the processing time with the second processing gas was 120 seconds. Fig. 7(c) shows the results when the processing time with the second processing gas was 240 seconds. Also, Fig. 7(a) shows O I and O II peak ratio of (O I / O II ) with respect to the surface of the oxide semiconductor 240 processed by the plasma formed by the first processing gas.

[0050] As shown in Fig. 7, at a processing time of 120 seconds, the peak ratio of O I and O II with respect to the surface of the oxide semiconductor 240 (O I / O II ) was greatly improved. Also, as shown in the results at a processing time of 240 seconds, it was confirmed that the peak ratio of O I and O II (O I / O II ) saturated with respect to the processing time.

[0051] Next, the damage to the oxide semiconductor 240 and the characteristics of the semiconductor device will be described with reference to Figs. 8 and 9.

[0052] Fig. 8 is a graph showing an example of the results of the peak ratio of O I and O II with respect to the surface of the oxide semiconductor 240 (O I / O II ).

[0053] Fig. 8(a) shows the peak ratio of O I and O II with respect to the surface of the untreated (Initial) oxide semiconductor 240 (O I / O II) is shown. FIG. 8(b) shows the peak ratio of O I to O II on the surface of the oxide semiconductor 240 that has been processed with the plasma formed by using Cl2 gas as the first processing gas (O I / O II ). FIG. 8(c) shows the peak ratio of O I to O II on the surface of the oxide semiconductor 240 that has been processed with the plasma formed by using a gas in which BCl3 gas is added to Cl2 gas as the first processing gas (O I / O II ). FIG. 8(d) shows the peak ratio of O I to O II on the surface of the oxide semiconductor 240 that has been processed with the plasma formed by using a gas in which BCl3 gas is added to Cl2 gas as the first processing gas and then processed with the plasma formed by using Ar gas as the second processing gas (O I / O II ). In FIG. 8, the peak ratio of O I to O II (O I / O II ) is normalized so that (a) becomes 1.

[0054] FIG. 9 is a graph showing an example of the results of the I-V characteristics of the semiconductor devices in FIGS. 8(b) to 8(d). The horizontal axis of each graph represents the gate-source voltage Vgs, and the vertical axis of each graph represents the drain current Id. Also, the results when the drain voltage Vd is 5.1 V are illustrated by a solid line, and the results when the drain voltage Vd is 0.1 V are illustrated by a broken line. Further, "Etching" in FIG. 9 shows the I-V characteristics of each semiconductor device in a state where the conductor layer 250 is etched in step S102 to form the source electrode 251 and the drain electrode 252 (see FIG. 3(b)). "Ar Treat" in FIG. 9 shows the I-V characteristics of each semiconductor device in a state where the damage layer 245 of the oxide semiconductor 240 is removed in step S103 (see FIG. 3(c)). "CVD" in FIG. 9 shows the I-V characteristics of each semiconductor device in a state where the insulating film 260 is formed in step S104 (see FIG. 3(d)). "Post Anneal" in FIG. 9 shows the I-V characteristics of each semiconductor device after the annealing process in step S105.

[0055] In FIG. 9(b), Cl2 gas was used as the first processing gas in step S102, step S103 was skipped, the insulating film 260 was formed in step S104, and an annealing process was performed in step S105 to form a semiconductor device. Hysteresis occurs in the I-V characteristics after the annealing process. Also, the drain current Id rises at a voltage where the gate-source voltage Vgs is greater than 0 V.

[0056] In FIG. 9(c), a gas in which BCl3 gas was added to Cl2 gas was used as the first processing gas in step S102, step S103 was skipped, the insulating film 260 was formed in step S104, and an annealing process was performed in step S105 to form a semiconductor device. The I-V characteristics after the annealing process are insulating.

[0057] In Fig. 9(d), a gas obtained by adding BCl3 gas to Cl2 gas as the first processing gas is used in step S102, Ar gas is used as the second processing gas in step S103, a dielectric film 260 is formed in step S104, an annealing process is performed in step S105, and a semiconductor device is formed. Hysteresis in the I-V characteristics after the annealing process is improved. Also, the drain current Id rises when the gate-source voltage Vgs rises from substantially 0V. That is, the I-V characteristics of the semiconductor device can be improved.

[0058] As described above, according to the method for manufacturing a semiconductor device according to this embodiment, damage to the oxide semiconductor 240 can be improved, and the characteristics of the semiconductor device can be enhanced.

[0059] The method for manufacturing a semiconductor device according to the embodiment disclosed this time should be considered to be illustrative in all respects and not restrictive. The embodiment can be modified and improved in various forms without departing from the scope and gist of the appended claims. Matters described in the above plurality of embodiments can adopt other configurations within a non-contradictory range and can also be combined within a non-contradictory range.

Description of Reference Numerals

[0060] 10 Plasma processing apparatus 15 First high-frequency power source (source power source) 29 Second high-frequency power source (bias power source) 210 Substrate 220 Gate electrode 230 Gate insulating film 240 Oxide semiconductor 245 Damage layer 250 Conductor layer 251 Source electrode 252 Drain electrode 260 Dielectric film

Claims

1. etching a conductor layer on an upper layer of an oxide semiconductor with a plasma formed by a first processing gas composed of a Cl-based gas; physically etching and removing an oxygen-deficient layer as a damage layer formed in a channel region of the oxide semiconductor with a plasma formed by a second processing gas composed of an Ar gas; and A method of manufacturing a semiconductor device.

2. The oxide semiconductor is an indium gallium zinc oxide semiconductor, The method of manufacturing a semiconductor device according to claim 1.

3. In the step of etching the damage layer, the ratio of source power to bias power is 2:1 or more and 1:1 or less, The method of manufacturing a semiconductor device according to claim 1 or claim 2.

Images