Lead frame, method for manufacturing lead frame, and method for manufacturing semiconductor device

The described method for manufacturing a lead frame addresses the challenges of deformation and recess formation in thin semiconductor devices by etching and resin coverage, ensuring structural stability and reliable bonding.

JP7705615B2Active Publication Date: 2025-07-10DAI NIPPON PRINTING CO LTD
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Patent Information

Application Number
JP2024076162
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-05-08
Publication Date
2025-07-10
Estimated Expiration
2040-03-18

AI Technical Summary

Technical Problem

Conventional lead frames face challenges in maintaining strength and stability during thinning and miniaturization, leading to deformation and difficulties in forming recesses on the side surface of semiconductor devices, especially when resin portions are present on the back surface.

Method used

A method for manufacturing a lead frame that involves etching the metal substrate from both the front and back surfaces to form recesses and resin coverage, allowing for the creation of inter-package recesses that open towards the side surface, enhancing structural integrity and facilitating wire bonding.

Benefits of technology

The method enables easy formation of recesses in semiconductor devices, improving structural stability and facilitating reliable wire bonding, while maintaining the strength of the lead frame even with thinner designs.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a manufacturing method of a lead frame, capable of easily forming a concave part opened toward a side face of a semiconductor device in the semiconductor device manufactured by using the lead frame having a backside resin.SOLUTION: A manufacturing method of a lead frame 10, comprises: a step of preparing a metal substrate 31; a step of forming a back face side concave part 36 by performing an etching from the back face side of the metal substrate 31 to a middle of a thickness direction; a step of forming a backside resin 18 on the back face side of the metal substrate 31 in a state where a region 10c on the back face side containing a circumference region 10b is exposed, and coating the back face side concave part 36 with the backside resin 18; a step of performing the etching from a front face side of the metal substrate 31 to the middle of the thickness direction; a step of forming a packages concave part 19 to the circumference region 10b by performing the etching from the back face side of the metal substrate 31 to the middle of the thickness direction; and a step of polishing the backside resin 18 by a predetermined thickness.SELECTED DRAWING: Figure 6
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Description

Technical Field

[0001] The present disclosure relates to a lead frame, a method for manufacturing a lead frame, and a method for manufacturing a semiconductor device.

Background Art

[0002] In recent years, miniaturization and thinning of semiconductor devices mounted on a substrate have been required. In order to meet such requirements, conventionally, a so-called QFN (Quad Flat Non-lead) type semiconductor device has been proposed, which uses a lead frame, seals a semiconductor element mounted on its mounting surface with a sealing resin, and exposes a part of the lead on the back side.

[0003] However, conventionally, as the lead frame becomes thinner, it has become difficult to maintain the strength of the lead frame, and there has been a problem that the lead frame is deformed after etching.

[0004] In recent years, there has also been a demand to increase the number of leads (pin count) without changing the chip size. In response to this, conventionally, the width of the leads has been made thinner, but as the leads become thinner, deformation is likely to occur in the leads, and there is a problem that it becomes difficult to stably perform wire bonding.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] Patent Document 1 discloses a technique of providing a resin portion on the back surface of a lead frame and then removing unnecessary portions of the resin portion. However, conventionally, when manufacturing a semiconductor device using a lead frame having a resin portion on the back surface, since the back surface is covered with the resin portion, it is difficult to form a recess (dimple) that opens toward the side surface in the lead portion of the semiconductor device.

[0007] The present disclosure provides a lead frame, a method for manufacturing a lead frame, and a method for manufacturing a semiconductor device, which can easily form a recess that opens toward the side surface of the semiconductor device in a semiconductor device manufactured using a lead frame having a resin portion on the back surface side.

Means for Solving the Problems

[0008] The method for manufacturing a lead frame according to the present disclosure includes, in the method for manufacturing a lead frame, a step of preparing a metal substrate, a step of forming a back surface side recess by etching the metal substrate from the back surface side of the metal substrate to the middle in the thickness direction, a step of forming a back surface side resin on the back surface side of the metal substrate in a state where a region on the back surface side including a region around the package region is exposed, and covering the back surface side recess with the back surface side resin, a step of etching the metal substrate from the front surface side of the metal substrate to the middle in the thickness direction, a step of forming an inter-package recess in a region around the package region by etching the metal substrate from the back surface side of the metal substrate to the middle in the thickness direction, and a step of polishing the back surface side resin by a predetermined thickness.

[0009] In the method for manufacturing a lead frame according to the present disclosure, the step of etching the metal substrate from the front surface side of the metal substrate and the step of forming the inter-package recess may be performed simultaneously.

[0010] In the method for manufacturing a lead frame according to the present disclosure, a step of roughening the back surface side of the metal substrate may be provided after the step of forming the back surface side recess.

[0011] The method for manufacturing a lead frame according to the present disclosure is a method for manufacturing a lead frame, which includes a step of preparing a metal substrate, a step of etching both the front surface side and the back surface side of the metal substrate, a step of covering the front surface side of the metal substrate with a coating material and forming a back surface side resin on the back surface side of the metal substrate in a state where a region including a region around the package region is exposed, a step of forming a recess between packages in the region around the package region by etching the metal substrate from the back surface side of the metal substrate to the middle in the thickness direction, and a step of polishing the back surface side resin by a predetermined thickness.

[0012] In the method for manufacturing a lead frame according to the present disclosure, the surface of the back surface side resin may be located on the same plane as the surface of the metal substrate.

[0013] In the method for manufacturing a lead frame according to the present disclosure, a step of roughening the back surface side of the metal substrate may be provided after the step of etching both the front surface side and the back surface side of the metal substrate.

[0014] In the method for manufacturing a lead frame according to the present disclosure, the package region has a die pad and lead portions arranged around the die pad, and a recess between packages may be formed outside the lead portions.

[0015] In the method for manufacturing a lead frame according to the present disclosure, the recess between packages may be formed over the entire width direction of the lead portions.

[0016] In the method for manufacturing a lead frame according to the present disclosure, the recess between packages may be formed only in a part of the width direction of the lead portions.

[0017] The lead frame according to the present disclosure is a lead frame having a plurality of package regions. In each package region, there are provided a die pad, lead portions disposed around the die pad, and a backside resin disposed around the die pad and the lead portions and on the backside of the lead frame. Package recesses unfilled with the backside resin are formed in regions outside the lead portions and around the package regions.

[0018] The method for manufacturing a semiconductor device according to the present disclosure is a method for manufacturing a semiconductor device, including the steps of preparing a lead frame according to the present disclosure, mounting a semiconductor element on the lead frame, electrically connecting the semiconductor element and the lead frame with a connecting member, and sealing the lead frame, the semiconductor element, and the connecting member with a sealing resin.

Advantages of the Invention

[0019] According to the present disclosure, in a semiconductor device manufactured using a lead frame having a backside resin, a recess opening toward the side surface of the semiconductor device can be easily formed.

Brief Description of the Drawings

[0020]

Figure 1

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BEST MODE FOR CARRYING OUT THE INVENTION

[0021] (First Embodiment) Hereinafter, the first embodiment will be described with reference to FIGS. 1 to 9. In the following figures, the same parts are denoted by the same reference numerals, and some detailed descriptions may be omitted.

[0022] In this specification, the X direction and the Y direction are two directions parallel to the respective sides of the lead frame 10, and the X direction and the Y direction are orthogonal to each other. Further, the Z direction is a direction perpendicular to both the X direction and the Y direction. Also, "inside" and "inner side" refer to the side facing the center direction of each package region 10a, and "outside" and "outer side" refer to the side away from the center of each package region 10a. Further, "surface" refers to the surface on the side where the semiconductor element 21 is mounted (the +Z direction side), and "back surface" refers to the surface on the opposite side of the "surface" (the -Z direction side) and is the side connected to an external wiring board (not shown).

[0023] Also, in this specification, half etching means etching the material to be etched halfway in its thickness direction. The thickness of the material to be etched after half etching is, for example, 30% or more and 75% or less, preferably 40% or more and 60% or less of the thickness of the material to be etched before half etching.

[0024] (Configuration of Lead Frame) First, with reference to FIGS. 1 to 3, an outline of the lead frame according to the present embodiment will be described. FIGS. 1 to 3 are diagrams showing the lead frame according to the present embodiment.

[0025] As shown in FIGS. 1 and 2, the lead frame 10 includes an outer frame 40 and package regions (unit lead frames) 10a disposed inside the outer frame 40.

[0026] In this case, a plurality of package regions 10a are arranged in multiple rows and multiple stages (in a matrix). However, the present invention is not limited to this, and it is sufficient that one or more package regions 10a exist. Note that each package region 10a is a region corresponding to a semiconductor device 20 (described later) and is a region located inside the virtual line in FIGS. 1 and 2. Also, the virtual lines in FIGS. 1 and 2 correspond to the outer peripheral edges of the semiconductor device 20.

[0027] Next, the configuration of the lead frame 10 will be further described with reference to FIGS. 1 to 3.

[0028] As shown in FIGS. 1 to 3, each package region 10a of the lead frame 10 includes a die pad 11, a plurality of elongated lead portions 12 provided around the die pad 11 and connecting the semiconductor element 21 and an external circuit (not shown), and a backside resin 18 disposed around the die pad 11 and the lead portions 12 and on the backside of the lead frame 10. A support lead (support member) 13 is disposed between adjacent package regions 10a. This support lead 13 supports the die pad 11 and the lead portions 12 and extends along the X direction and the Y direction, respectively.

[0029] The die pad 11 has a substantially square planar shape. In this case, the die pad 11 is not half-etched and has the same thickness as the metal substrate (metal substrate 31 described later) before processing. The planar shape of the die pad 11 is not limited to a square and may be a polygon such as a rectangle. Note that the surface side of the die pad 11 may be partially half-etched and thinned.

[0030] Suspension leads 14 are respectively connected to the four corners of the die pad 11, and the die pad 11 is connected and supported to the support lead 13 via these four suspension leads 14. Each support lead 13 is disposed around the package region 10a and outside the package region 10a. Each support lead 13 has an elongated bar shape. A plurality of lead portions 12 are connected to the support lead 13 at intervals along the longitudinal direction of the support lead 13. The support lead 13 is thinned from the backside, and the backside of the support lead 13 is in contact with the backside resin 18. Further, a corner portion 14a thinned from the backside is provided in the portion surrounded by the four package regions 10a, and the four suspension leads 14 extending from the four package regions 10a are connected to each other at the corner portion 14a. The die pad 11 of each package region 10a is connected and supported to each corner portion 14a via the four suspension leads 14. Four support leads 13 are respectively connected to each corner portion 14a.

[0031] A peripheral region 10b is formed in the region around each package region 10a. The peripheral region 10b is a region located outside each package region 10a and formed adjacent to each package region 10a. This peripheral region 10b is located between two adjacent package regions 10a. That is, two adjacent package regions 10a are connected to each other via the peripheral region 10b. Also, in the outermost package region 10a, the peripheral region 10b is also adjacent to an outer frame 40 located around the package region 10a. The support lead 13 is located within the peripheral region 10b.

[0032] As shown in FIGS. 3(a) and 3(b), the die pad 11 has a die pad surface 11a located on the front side and a die pad back surface 11b located on the back side. The semiconductor element 21 described later is mounted on the die pad surface 11a. The die pad back surface 11b is exposed outward from the lead frame 10. Also, on the side of the die pad 11 facing the lead portion 12, a first die pad side surface 11c and a second die pad side surface 11d are formed. The first die pad side surface 11c is located on the die pad surface 11a side and is exposed outward from the lead frame 10. The second die pad side surface 11d is located on the die pad back surface 11b side and is in close contact with the backside resin 18.

[0033] Each lead portion 12 is connected to the semiconductor element 21 via a bonding wire 22 as will be described later, and is disposed with a space therebetween from the die pad 11. Also, the lead portion 12 of one package region 10a and the lead portion 12 of the package region 10a adjacent to the package region 10a are connected to each other by a lead connection portion 16. The lead connection portion 16 is located outside each package region 10a and within the peripheral region 10b. Each lead connection portion 16 forms part of the support lead 13. When viewed from the back side (FIG. 2), a back side resin 18 is disposed between adjacent lead connection portions 16, and the lead connection portions 16 are separated from each other via the back side resin 18. Also, the lead portion 12 of one package region 10a, the lead portion 12 of the package region 10a adjacent to the package region 10a, and the lead connection portion 16 connecting these are integrated.

[0034] Each lead portion 12 is disposed at intervals along the longitudinal direction of the support lead 13 around the die pad 11. External terminals 17 that are each electrically connected to an external wiring board (not shown) are formed on the back surface of each lead portion 12. Each external terminal 17 is exposed outward from the semiconductor device 20 (described later) after the manufacture of the semiconductor device 20.

[0035] As shown in FIG. 3(a), the lead portion 12 has an inner lead 51 located on the inner side (die pad 11 side) and a terminal portion 53 located on the outer side (lead connection portion 16 side). Among these, the inner lead 51 extends from the terminal portion 53 toward the die pad 11 side, and an internal terminal 15 is formed at the tip portion on the front surface side thereof. This internal terminal 15 is an area that is electrically connected to the semiconductor element 21 via a bonding wire 22 as will be described later. Note that a plating layer 25 for improving the adhesion with the bonding wire 22 is provided on the internal terminal 15. The plating layer 25 may be made of, for example, silver plating.

[0036] The inner lead 51 is thinned by half-etching from the back side. The inner lead 51 has an inner lead surface 51a and an inner lead back surface 51b. An internal terminal 15 is formed on a part of the inner lead surface 51a. The inner lead back surface 51b is in close contact with the back-side resin 18. Also, an inner lead side surface 51c is formed on the side of the inner lead 51 facing the die pad 11. The inner lead side surface 51c is exposed outward from the lead frame 10.

[0037] The terminal portion 53 extends toward the lead connection portion 16 side, and its proximal end is connected to the lead connection portion 16. Note that the external terminal 17 described above is formed on the back surface of the terminal portion 53. The portion of the terminal portion 53 where the external terminal 17 is formed has the same thickness as the die pad 11 without being half-etched.

[0038] In the present embodiment, an inter-package recess 19 is formed in the outer side (opposite side of the inner lead 51) and the peripheral region 10b of the terminal portion 53 of the lead portion 12. The inter-package recess 19 is not filled with the back-side resin 18, and the metal surface is exposed. The inter-package recess 19 is on the back side of the lead frame 10 and is continuously formed across the lead portion 12 of one package region 10a, the lead connection portion 16 connected to the lead portion 12, and the lead portion 12 of the adjacent package region 10a.

[0039] The inter-package recess 19 is formed outside the external terminal 17 on the back surface of the lead portion 12. Also, a line corresponding to the outer periphery of the package region 10a crosses the inter-package recess 19. This inter-package recess 19 has a rectangular shape in plan view and extends along the longitudinal direction of the lead portion 12 and the lead connection portion 16 (FIG. 2).

[0040] The recess 19 between packages is formed by thinning from the back side by half-etching. That is, the recess 19 between packages is composed of a non-through recess that recesses from the back side of the lead portion 12 and the lead connection portion 16 to the middle in the thickness direction (Z direction). Note that the surface side of the recess 19 between packages is not thinned and is located on the same plane as the die pad surface 11a of the die pad 11.

[0041] Also, the recess 19 between packages is formed over the entire width direction of the lead portion 12 and the lead connection portion 16 (FIG. 2). In this case, the recess 19 between packages is formed in the portion of the back surface of the lead portion 12 that is outside the external terminal 17 and the entire back surface of the lead connection portion 16.

[0042] As shown in FIGS. 1 and 2, the back-side resin 18 is continuously formed so as to straddle one package region 10a, the peripheral region 10b around the package region 10a, and the adjacent package region 10a.

[0043] In each package region 10a, the back-side resin 18 is disposed around the die pad 11 and the lead portion 12. That is, as shown in FIG. 1, when viewed from the front side, the back-side resin 18 is located in a region surrounded by one side of the die pad 11, a plurality of lead portions 12 facing the side, two suspension leads 14, and the outer peripheral edge of the package region 10a. Also, as shown in FIG. 2, when viewed from the back side, the back-side resin 18 is located in a region surrounded by each side of the die pad 11, a plurality of lead portions 12, and the outer peripheral edge of the package region 10a. Note that in FIGS. 1 and 2, the back-side resin 18 is shown hatched (the same applies to FIGS. 4 and 9 described later).

[0044] As shown in FIGS. 3(a) and 3(b), the backside resin 18 is disposed on the backside of the lead frame 10. That is, the backside resin 18 does not exist on the front side (Z-direction plus side) of the lead frame 10 more than the intermediate position in the thickness direction (Z direction), and exists only on the backside (Z-direction minus side) more than the intermediate position in the thickness direction. Note that the above intermediate position is not limited to the center in the thickness direction of the lead frame 10, and may be located on the front side or the backside of the center in the thickness direction.

[0045] As shown in FIG. 3(a), in a sectional view, the backside resin 18 is disposed in a region surrounded by the terminal portion 53, the inner lead back surface 51b, and the second die pad side surface 11d. The backside resin 18 also has a resin front surface 18a located on the front side and a resin back surface 18b located on the backside. Among these, the resin front surface 18a is exposed outward from the space between the first die pad side surface 11c and the inner lead side surface 51c. The resin back surface 18b is exposed outward from the backside of the lead frame 10. Also, the resin back surface 18b, the die pad back surface 11b, and the external terminal 17 are located on the same plane.

[0046] As shown in FIG. 3(b), in a cross section of a location where the lead portion 12 does not exist, the backside resin 18 is continuously formed from the die pad 11 of one package region 10a to the die pad 11 of another adjacent package region 10a. Also, in the peripheral region 10b, the backside resin 18 is not thinned from the backside, and the resin back surface 18b is located on the same plane as the die pad back surface 11b and the external terminal 17 (FIGS. 3(a) and 3(b)).

[0047] As the backside resin 18, a thermosetting resin such as a silicone resin or an epoxy resin, or a thermoplastic resin such as a PPS resin can be used. Note that in order to enhance the adhesion between the backside resin 18 and the encapsulation resin 23 described later, it is preferable to use the same material as the encapsulation resin 23 as the backside resin 18.

[0048] The lead frame 10 described above is generally composed of metals such as copper, copper alloy, 42 alloy (Fe alloy with 42% Ni), etc. Also, the thickness of the lead frame 10 can be 80 μm or more and 250 μm or less, although it depends on the configuration of the semiconductor device 20 to be manufactured.

[0049] (Configuration of Semiconductor Device) Next, the semiconductor device according to the present embodiment will be described with reference to FIGS. 4 and 5. FIGS. 4 and 5 are diagrams showing the semiconductor device (QFN type) according to the present embodiment.

[0050] As shown in FIGS. 4 and 5, the semiconductor device (semiconductor package) 20 includes a die pad 11, a plurality of lead portions 12 arranged around the die pad 11, a semiconductor element 21 mounted on the die pad 11, and a plurality of bonding wires (connection members) 22 that electrically connect the lead portions 12 and the semiconductor element 21. Also, a backside resin 18 is disposed around the die pad 11 and the lead portions 12 on the backside of the semiconductor device 20. Further, the die pad 11, the lead portions 12, the semiconductor element 21, and the bonding wires 22 are resin-sealed by a sealing resin 23.

[0051] Among these, the die pad 11, the lead portions 12, and the backside resin 18 are made from the above-described lead frame 10. Also, among the back surfaces of the respective lead portions 12, recesses 26 are formed at positions corresponding to the outer periphery 20a of the semiconductor device 20. This recess 26 is a part of the inter-package recess 19 described above. Each recess 26 is formed in a region of the lead portion 12 that is outside the external terminal 17. Further, the recess 26 opens to the backside of the lead portion 12 and also opens to the side surface of the lead portion 12. This recess 26 has a rectangular shape when viewed from the outer periphery 20a side of the semiconductor device 20. Note that the sealing resin 23 and the backside resin 18 are not filled in the recess 26.

[0052] In addition, the configurations of the die pad 11, the lead portion 12, and the backside resin 18 are the same as those shown in FIGS. 1 to 3 described above, except for the regions not included in the semiconductor device 20, and thus detailed descriptions thereof are omitted here.

[0053] Also, as the semiconductor element 21, various semiconductor elements generally used in the past can be used, and there is no particular limitation. For example, integrated circuits, large-scale integrated circuits, transistors, thyristors, diodes, etc. can be used. This semiconductor element 21 has a plurality of electrodes 21a to which bonding wires 22 are respectively attached. Further, the semiconductor element 21 is fixed to the surface of the die pad 11 by an adhesive 24 such as die bonding paste.

[0054] Each bonding wire 22 is made of a material with good conductivity such as gold or copper. One end of each bonding wire 22 is connected to the electrode 21a of the semiconductor element 21, and the other end is connected to the plating layer 25 located on the internal terminal 15 of each lead portion 12.

[0055] As the encapsulating resin 23, a thermosetting resin such as a silicone resin or an epoxy resin, or a thermoplastic resin such as a PPS resin can be used. The thickness of the entire encapsulating resin 23 can be set to about 300 μm or more and 1500 μm or less. Also, one side of the encapsulating resin 23 (one side of the semiconductor device 20) can be, for example, 1 mm or more and 16 mm or less. In the space between the die pad 11 and the lead portion 12, the encapsulating resin 23 is in close contact with the resin surface 18a of the backside resin 18. In FIG. 4, the display of the encapsulating resin 23 located on the surface side of the die pad 11, the lead portion 12, and the backside resin 18 is omitted.

[0056] (Manufacturing method of lead frame) Next, the manufacturing method of the lead frame 10 shown in FIGS. 1 to 3 will be described with reference to FIGS. 6(a)-(i).

[0057] First, as shown in Fig. 6(a), a flat metal substrate 31 is prepared. As this metal substrate 31, a substrate made of a metal such as copper, a copper alloy, a 42 alloy (an Fe alloy with 42% Ni), etc. can be used. It is preferable to use a metal substrate 31 that has been degreased and the like on both sides and subjected to a cleaning process.

[0058] Next, a photosensitive resist is applied to the entire front and back surfaces of the metal substrate 31 and dried. Subsequently, the photosensitive resist on the metal substrate 31 is exposed through a photomask and developed to form etching resist layers 32 and 33 having desired openings 32b and 33b (Fig. 6(b)).

[0059] Next, by half-etching, the metal substrate 31 is thinned from the back surface side to the middle in the thickness direction. In this case, using the etching resist layer 33 on the back surface side as a corrosion-resistant film, the back surface side of the metal substrate 31 is etched with a corrosion liquid (Fig. 6(c)). At this time, the etching resist layer 32 on the front surface side may be covered with a film (not shown). Thereby, a back surface side recess 36, which is a non-penetrating recess, is formed on the back surface side of the metal substrate 31. This back surface side recess 36 has a shape corresponding to the back surface side resin 18. The corrosion liquid can be appropriately selected according to the material of the metal substrate 31 used. For example, when copper is used as the metal substrate 31, usually, an aqueous solution of ferric chloride is used, and this aqueous solution of ferric chloride may be spray-etched from one or both surfaces of the metal substrate 31.

[0060] Next, leaving the etching resist layer 32 on the front surface side, the etching resist layer 33 on the back surface side is peeled off and removed, and then the metal substrate 31 is washed with water and dried (Fig. 6(d)).

[0061] Subsequently, with the area 10c on the back side including the peripheral area 10b located around the package area 10a exposed, a back-side resin 18 is formed on the back side of the metal substrate 31, and the back-side recess 36 is covered with the back-side resin 18 (FIG. 6(e)). At this time, screen printing may be performed on the back side of the metal substrate 31 using, for example, a thermosetting resin or a thermoplastic resin to form the back-side resin 18 in a predetermined pattern. Thereby, the back-side resin 18 is filled into the back-side recess 36. Note that the thickness T1 of the back-side resin 18 from the portion 11e corresponding to the back surface 11b of the die pad may be 25 μm or more and 200 μm or less. In this case, the area 10c on the back side is the back surface of the metal substrate 31 and includes the peripheral area 10b and the portion outside the portion 17a corresponding to the external terminal 17 of the lead portion 12. This area 10c on the back side is not covered by the back-side resin 18, and the back surface of the metal substrate 31 is exposed.

[0062] Next, by half-etching, the metal substrate 31 is thinned from the front side of the metal substrate 31 to the middle in the thickness direction. In this case, using the etching resist layer 32 on the front side as a corrosion-resistant film, the front side of the metal substrate 31 is etched with a corrosive liquid (FIG. 6(f)). Thereby, the outer shapes of the die pad 11 and the lead portion 12 are formed. Also, due to the half-etching of the front side of the metal substrate 31, a gap is formed between the die pad 11 and the lead portion 12, and the back-side resin 18 is exposed on the front side. Note that as the corrosive liquid, the same one as that used when etching the back side of the metal substrate 31 can be used (FIG. 6(c)).

[0063] At the same time, by half-etching, the metal substrate 31 is thinned from the back side of the metal substrate 31 to the middle in the thickness direction. In this case, using the back-side resin 18 on the back side as a corrosion-resistant film, the back side of the metal substrate 31 is etched with a corrosive liquid (FIG. 6(f)). Thereby, a between-package recess 19 is formed in the area 10c on the back side of the metal substrate 31 including the peripheral area 10b. This between-package recess 19 is formed in the peripheral area 10b and the area outside the external terminal 17 in the lead portion 12.

[0064] In this way, by simultaneously performing the step of etching the metal substrate 31 from the front surface side and the step of forming the inter-package recess 19, using the etching resist layer 32 on the front surface side and the back surface resin 18 on the back surface side, the shapes of the die pad 11 and the lead portion 12 and the inter-package recess 19 can be efficiently formed together in a single etching. Note that this is not the only way, and the step of etching the metal substrate 31 from the front surface side and the step of forming the inter-package recess 19 from the back surface side of the metal substrate 31 may be performed in separate steps.

[0065] Next, the back surface resin 18 is polished by a predetermined thickness to expose the back surface of the metal substrate 31 (FIG. 6(g)). Specifically, the back surface resin 18 is polished from the back surface side, and when the back surface of the metal substrate 31 appears, the polishing of the back surface resin 18 is terminated. At this time, the metal surfaces constituting the die pad back surface 11b of the die pad 11 and the external terminals 17 of the lead portion 12 are exposed on the back surface side. As a method for polishing the back surface resin 18, for example, a method similar to back grinding for finishing the semiconductor element 21 to a predetermined thickness can be mentioned.

[0066] Next, the etching resist layer 32 is peeled off and removed, and then the metal substrate 31 is washed with water and dried (FIG. 6(h)).

[0067] Thereafter, electrolytic plating is performed on the inner lead 51 of the lead portion 12. Thereby, a metal (for example, silver) is deposited on the inner lead 51 of the lead portion 12 to form a plating layer 25. In this way, the lead frame 10 shown in FIGS. 1 to 3 is obtained (FIG. 6(i)).

[0068] (Method for manufacturing a semiconductor device) Next, a method for manufacturing the semiconductor device 20 shown in FIGS. 4 and 5 will be described with reference to FIGS. 7(a)-(f).

[0069] First, for example, the lead frame 10 is manufactured by the method shown in FIGS. 6(a)-(i) (FIG. 7(a)).

[0070] Next, the semiconductor element 21 is mounted on the die pad 11 of the lead frame 10. In this case, for example, using an adhesive 24 such as die bonding paste, the semiconductor element 21 is placed and fixed on the die pad 11 (die attach process) (FIG. 7(b)).

[0071] Next, each electrode 21a of the semiconductor element 21 and the plating layer 25 formed on each lead portion 12 are electrically connected to each other by bonding wires (connection members) 22 (wire bonding process) (FIG. 7(c)).

[0072] Next, a sealing resin 23 is formed by injection molding or transfer molding, for example, a thermosetting resin or a thermoplastic resin, with respect to the lead frame 10 (FIG. 7(d)). In this way, the lead frame 10, the lead portions 12, the semiconductor element 21, and the bonding wires 22 are sealed.

[0073] Next, the lead frame 10 is separated for each semiconductor device 20 by dicing the sealing resin 23 and the lead connection portion 16 located in the peripheral region 10b between the semiconductor elements 21 (FIG. 7(e)). At this time, for example, while rotating a blade 38 made of a diamond grindstone, the sealing resin 23 and the lead connection portion 16 (support lead 13) located in the peripheral region 10b may be cut. As a result, the portion of the inter-package recess 19 located in the peripheral region 10b is removed, and a recess 26 formed of a part of the inter-package recess 19 is formed in the region of each lead portion 12 outside the external terminal 17. This recess 26 opens to the back surface side and the side surface side of the lead portion 12.

[0074] In this way, the semiconductor device 20 shown in FIGS. 4 and 5 is obtained (FIG. 7(f)).

[0075] Thereafter, the semiconductor device 20 is connected to the wiring board 80 (FIG. 8). At this time, the back surface 11b of the die pad 11 is connected to the wiring board 80 by the solder portion 81. Also, the solder plating provided on the external terminal 17, the recess 26, and the outer surface 12a of the lead portion 12 forms a solder fillet 82. Thereby, the lead portion 12 and the wiring board 80 can be stably connected, and the connection reliability of the semiconductor device 20 can be improved. Further, since the solder fillet 82 is filled inside the recess 26, it is possible to easily confirm from the outside that the lead portion 12 and the wiring board 80 are connected during the appearance inspection.

[0076] According to the present embodiment, with the region 10c on the back surface side of the metal substrate 31 including the peripheral region 10b exposed, a back surface side resin 18 is formed on the back surface side of the metal substrate 31, and the back surface side recess 36 is covered with this back surface side resin 18 (FIG. 6(e)). Next, by etching the metal substrate 31 from the back surface side of the metal substrate 31 to the middle in the thickness direction, an inter-package recess 19 is formed in the peripheral region 10b (FIG. 6(f)). Thereafter, the back surface side resin 18 is polished by a predetermined thickness (FIG. 6(g)). When manufacturing the semiconductor device 20, this inter-package recess 19 is partially cut to form a recess 26 that opens to the back surface side and the side surface side of the lead portion 12 (FIG. 7(e)). Thus, according to the present embodiment, in the semiconductor device 20 manufactured using the lead frame 10 having the back surface side resin 18, the recess 26 that opens toward the side surface of the semiconductor device 20 can be easily formed.

[0077] Also, according to the present embodiment, the step of etching the metal substrate 31 from the front surface side of the metal substrate 31 and the step of forming the inter-package recess 19 on the back surface of the metal substrate 31 are performed simultaneously (FIG. 6(f)). Thereby, the etching for forming the die pad 11 and the lead portion 12 from the metal substrate 31 and the etching for forming the inter-package recess 19 can be performed in one operation.

[0078] Further, according to the present embodiment, the step of exposing the backside resin 18 to the front side by etching and the step of forming the inter-package recess 19 on the back surface of the metal substrate 31 (FIG. 6(f)) are performed before the step of polishing the backside resin 18 (FIG. 6(g)). Thereby, when etching the front side of the metal substrate 31, the backside of the metal substrate 31 except for the region 10c on the backside corresponding to the inter-package recess 19 is covered with the backside resin 18, so that there is no need to separately provide a step of covering the backside of the metal substrate 31 with another member.

[0079] Also, according to the present embodiment, since the photolithography process for forming the etching resist layers 32 and 33 can be performed once (FIG. 6(b)), the manufacturing process of the lead frame 10 can be simplified.

[0080] In the above embodiment, the case where the inter-package recess 19 is formed over the entire width direction of the lead portion 12 and the lead connection portion 16 has been described as an example (FIG. 2), but the present invention is not limited to this. As shown in FIG. 9, the inter-package recess 19 may be located substantially at the center in the width direction of the lead portion 12 and the lead connection portion 16. In this case, the external terminal 17 in the package region 10a has a concave shape (U-shaped) that opens outward when viewed from the bottom surface. Also, in the peripheral region 10b, edge portions 12b that are not thinned from the backside are formed on both sides in the width direction of the inter-package recess 19. After manufacturing the semiconductor device 20, the outer surface of the lead portion 12 has an inverted concave shape (inverted U-shaped) when viewed from the outside of the semiconductor device 20.

[0081] (Second Embodiment) Next, a second embodiment will be described with reference to FIGS. 10 to 12. FIGS. 10 to 12 are diagrams showing the second embodiment. The second embodiment shown in FIGS. 10 to 12 is different mainly in that the portions of the die pad 11 and the lead portion 12 that contact the back surface resin 18 are roughened, and other configurations are substantially the same as those of the first embodiment described above. In FIGS. 10 to 12, the same parts as those in the first embodiment shown in FIGS. 1 to 9 are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0082] (Configuration of Lead Frame and Semiconductor Device) FIG. 10 is a cross-sectional view showing a lead frame 10A according to the present embodiment, and FIG. 11 is a cross-sectional view showing a semiconductor device 20A according to the present embodiment.

[0083] In the lead frame 10A shown in FIG. 10 and the semiconductor device 20A shown in FIG. 11, among the die pad 11 and the lead portion 12, the portions that contact the back surface resin 18 are roughened. Specifically, the second die pad side surface 11d of the die pad 11, the inner surface 53a of the terminal portion 53 of each lead portion 12, and the inner lead back surface 51b of each lead portion 12 are each roughened.

[0084] This roughened portion is formed by roughening the surface of the metal substrate 31 (for example, micro-etching treatment) as will be described later. That is, the roughness of the roughened portions of the die pad 11 and the lead portion 12 is rougher than other portions of the die pad 11 and the lead portion 12. The average roughness of the roughened portion can be, for example, Ra = 0.2 μm or more and 0.6 μm or less. The average roughness Ra is the arithmetic average roughness defined in JIS B0601. In FIGS. 10 and 11, for the sake of convenience, the roughened portions are shown by thick dashed lines (the same applies to FIGS. 12, 16 to 18 described later).

[0085] Although not shown, the die pad back surface 11b of the die pad 11 and the external terminals 17 of the lead portion 12 may be roughened in the same manner.

[0086] (Method for manufacturing a lead frame) Next, a method for manufacturing the lead frame 10A shown in FIG. 10 will be described with reference to FIGS. 12(a)-(j). In FIGS. 12(a)-(j), the same parts as those in FIGS. 6(a)-(i) are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

[0087] First, in substantially the same manner as the steps shown in FIGS. 6(a) and (b) described above, a metal substrate 31 is prepared (FIG. 12(a)), and etching resist layers 32 and 33 are formed on the front and back surfaces of the metal substrate 31, respectively (FIG. 12(b)).

[0088] Next, in substantially the same manner as the step shown in FIG. 6(c) described above, by half-etching, the metal substrate 31 is thinned from the back surface side of the metal substrate 31 to the middle in the thickness direction, and a back surface side recess 36 is formed (FIG. 12(c)). Then, in substantially the same manner as the step shown in FIG. 6(d) described above, the etching resist layer 33 on the back surface side is peeled off and removed (FIG. 12(d)).

[0089] Subsequently, the back surface side of the metal substrate 31 is roughened (FIG. 12(e)). At this time, a micro-etching solution is supplied to the back surface of the metal substrate 31 to form a rough surface over the entire back surface of the metal substrate 31. Here, the micro-etching solution is a surface treatment agent that slightly dissolves the metal surface to form a rough surface with fine irregularities. For example, when roughening a metal substrate 31 made of copper or a copper alloy, a micro-etching solution mainly composed of hydrogen peroxide water and sulfuric acid may be used.

[0090] Subsequently, in substantially the same manner as the step shown in FIG. 6(e) described above, with the region 10c on the back surface side including the peripheral region 10b exposed, a back surface side resin 18 is formed on the back surface side of the metal substrate 31, and the back surface side recess 36 is covered with the back surface side resin 18 (FIG. 12(f)).

[0091] Next, in substantially the same manner as the process shown in FIG. 6(f) described above, the metal substrate 31 is thinned from the front surface side to the middle in the thickness direction by half etching (FIG. 12(g)). As a result, the outer shapes of the die pad 11 and the lead portion 12 are formed. Also, a gap is formed between the die pad 11 and the lead portion 12, and the back surface side resin 18 is exposed on the front surface side. At the same time, the metal substrate 31 is thinned from the back surface side to the middle in the thickness direction by half etching. As a result, a package-to-package recess 19 is formed in the back surface side region 10c of the metal substrate 31 including the peripheral region 10b.

[0092] Subsequently, in substantially the same manner as the process shown in FIG. 6(g) described above, the back surface side resin 18 is polished by a predetermined thickness to expose the back surface of the metal substrate 31 (FIG. 12(h)).

[0093] Next, in substantially the same manner as the process shown in FIG. 6(h) described above, the etching resist layer 32 is peeled off, and then the metal substrate 31 is washed with water and dried (FIG. 12(i)).

[0094] Thereafter, in substantially the same manner as the process shown in FIG. 6(i) described above, a plating layer 25 is formed on the inner lead 51 of the lead portion 12. In this way, the lead frame 10A shown in FIG. 10 is obtained (FIG. 12(j)).

[0095] (Method of manufacturing a semiconductor device) The method of manufacturing the semiconductor device 20A according to the present embodiment can be performed in substantially the same manner as the method of manufacturing the semiconductor device 20 shown in FIGS. 7(a)-(f).

[0096] According to the present embodiment, the portions of the die pad 11 and the lead portion 12 that come into contact with the back surface side resin 18 are roughened. As a result, the adhesion between the metal constituting the die pad 11 and the lead portion 12 and the resin constituting the back surface side resin 18 can be enhanced, and the back surface side resin 18 can be prevented from peeling off from the die pad 11 and the lead portion 12.

[0097] (Third Embodiment) Next, a third embodiment will be described with reference to FIGS. 13 to 15. FIGS. 13 to 15 are diagrams showing the third embodiment. The third embodiment shown in FIGS. 13 to 15 is different mainly in that the backside resin 18 is formed over the entire thickness direction (Z direction) of the lead frame 10. In FIGS. 13 to 15, the same parts as those in the first embodiment shown in FIGS. 1 to 9 and the second embodiment shown in FIGS. 10 to 12 are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0098] (Configuration of Lead Frame and Semiconductor Device) FIG. 13 is a cross-sectional view showing a lead frame 10B according to the present embodiment, and FIG. 14 is a cross-sectional view showing a semiconductor device 20B according to the present embodiment.

[0099] In the lead frame 10B shown in FIG. 13 and the semiconductor device 20B shown in FIG. 14, the backside resin 18 exists not only on the backside (Z direction minus side) of the intermediate position in the thickness direction (Z direction) of the lead frame 10 but also on the front side (Z direction plus side) of the intermediate position in the thickness direction. That is, the backside resin 18 is also filled in the space between the first die pad side surface 11c of the die pad 11 and the inner lead side surface 51c of the lead portion 12. The resin surface 18a of the backside resin 18, the die pad surface 11a of the die pad 11, and the inner lead surface 51a of the lead portion 12 are located on the same plane.

[0100] Note that, also in the lead frame 10B according to the present embodiment, support leads (support members) 13 are provided in the peripheral region 10b.

[0101] (Method of Manufacturing Lead Frame) Next, a method of manufacturing the lead frame 10B shown in FIG. 13 will be described with reference to FIGS. 15(a)-(i). In FIGS. 15(a)-(i), the same parts as those in FIGS. 6(a)-(i) are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0102] First, in substantially the same manner as the steps shown in FIGS. 6(a) and 6(b) described above, a metal substrate 31 is prepared (FIG. 15(a)), and etching resist layers 32 and 33 are formed on the front and back surfaces of the metal substrate 31, respectively (FIG. 15(b)).

[0103] Next, using the etching resist layers 32 and 33 as corrosion-resistant films, the metal substrate 31 is etched with a corrosion liquid. As a result, the outer shapes of the die pad 11 and the lead portion 12 are formed (FIG. 15(c)).

[0104] Subsequently, the etching resist layers 32 and 33 are peeled off and removed (FIG. 15(d)).

[0105] Subsequently, while covering the front surface side of the metal substrate 31 with a covering material 39 such as a resin film and exposing the back surface side region 10c including the peripheral region 10b, a back surface side resin 18 is formed on the back surface side of the metal substrate 31 (FIG. 15(e)). As a result, the back surface side of the metal substrate 31 excluding the region 10c is covered with the back surface side resin 18, and the region between the die pad 11 and the lead portion 12 is filled with the back surface side resin 18.

[0106] Next, with the front surface side of the metal substrate 31 covered with the covering material 39, the metal substrate 31 is thinned from the back surface side to the middle in the thickness direction by half etching (FIG. 15(f)). As a result, a package-to-package recess 19 is formed in the back surface side region 10c including the peripheral region 10b of the metal substrate 31.

[0107] Subsequently, in substantially the same manner as the step shown in FIG. 6(g) described above, the back surface side resin 18 is polished by a predetermined thickness to expose the back surface of the metal substrate 31 (FIG. 15(g)).

[0108] Next, the covering material 39 on the front surface side of the metal substrate 31 is peeled off and removed, and then the metal substrate 31 is washed with water and dried (FIG. 15(h)).

[0109] Thereafter, in substantially the same manner as the process shown in FIG. 6(i) described above, a plating layer 25 is formed on the inner lead 51 of the lead portion 12. In this way, the lead frame 10B shown in FIG. 13 is obtained (FIG. 15(i)).

[0110] (Method for manufacturing a semiconductor device) The method for manufacturing the semiconductor device 20B according to the present embodiment can be carried out in substantially the same manner as the method for manufacturing the semiconductor device 20 shown in FIGS. 7(a)-(f).

[0111] According to the present embodiment, the backside resin 18 is formed over the entire thickness direction (Z direction) of the lead frame 10B. Thereby, the adhesion between the metal constituting the die pad 11 and the lead portion 12 and the resin constituting the backside resin 18 can be enhanced, and the peeling of the backside resin 18 from the die pad 11 and the lead portion 12 can be suppressed.

[0112] (Fourth Embodiment) Next, a fourth embodiment will be described with reference to FIGS. 16 to 18. FIGS. 16 to 18 are diagrams showing the fourth embodiment. The fourth embodiment shown in FIGS. 16 to 18 is mainly different in that the portions of the die pad 11 and the lead portion 12 that come into contact with the backside resin 18 are roughened, and the other configurations are substantially the same as those of the third embodiment described above. In FIGS. 16 to 18, the same parts as those in the first embodiment shown in FIGS. 1 to 9, the second embodiment shown in FIGS. 10 to 12, and the third embodiment shown in FIGS. 13 to 15 are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

[0113] (Configuration of lead frame and semiconductor device) FIG. 16 is a cross-sectional view showing a lead frame 10C according to the present embodiment, and FIG. 17 is a cross-sectional view showing a semiconductor device 20C according to the present embodiment.

[0114] In the lead frame 10C shown in FIG. 16 and the semiconductor device 20C shown in FIG. 17, among the die pad 11 and the lead portions 12, the portions in contact with the back surface resin 18 are roughened. Specifically, the first die pad side surface 11c of the die pad 11, the second die pad side surface 11d of the die pad 11, the inner side surface 53a of the terminal portion 53 of each lead portion 12, the inner lead back surface 51b of each lead portion 12, and the inner lead side surface 51c of each lead portion 12 are each roughened.

[0115] This roughened portion is formed by roughening the surface of the metal substrate 31 (for example, micro-etching treatment) as described later. The configuration of this rough surface is substantially the same as that in the case of the second embodiment described above (FIGS. 10 and 11).

[0116] (Method for manufacturing a lead frame) Next, a method for manufacturing the lead frame 10C shown in FIG. 16 will be described with reference to FIGS. 18(a)-(j). In FIGS. 18(a)-(j), the same parts as those in FIGS. 6(a)-(i) and 15(a)-(i) are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0117] First, in substantially the same manner as the steps shown in FIGS. 15(a) and (b) described above, a metal substrate 31 is prepared (FIG. 18(a)), and etching resist layers 32 and 33 are formed on the front and back surfaces of the metal substrate 31, respectively (FIG. 18(b)).

[0118] Next, in substantially the same manner as the step shown in FIG. 15(c) described above, the etching resist layers 32 and 33 are used as corrosion-resistant films, and the metal substrate 31 is etched with a corrosion liquid. Thereby, the outer shapes of the die pad 11 and the lead portions 12 are formed (FIG. 18(c)).

[0119] Next, leaving the etching resist layer 32 on the front surface side, the etching resist layer 33 on the back surface side is peeled off and removed, and then the metal substrate 31 is washed with water and dried (FIG. 18(d)).

[0120] Subsequently, roughen the back side of the metal substrate 31 (Fig. 18(e)). At this time, supply a micro-etching solution to the back side of the metal substrate 31 to form a rough surface over the entire back side of the metal substrate 31. Here, the micro-etching solution is a surface treatment agent that slightly dissolves the metal surface to form a rough surface with fine irregularities. When roughening the metal substrate 31 made of copper or a copper alloy, a micro-etching solution mainly composed of hydrogen peroxide water and sulfuric acid may be used.

[0121] Subsequently, peel off and remove the etching resist layer 32 on the front side, and cover the front side of the metal substrate 31 with a covering material 39 such as a resin film in substantially the same manner as the process shown in Fig. 15(e) described above. Next, with the region 10c on the back side including the peripheral region 10b exposed, form a back-side resin 18 on the back side of the metal substrate 31 (Fig. 18(f)). Thereby, the back side of the metal substrate 31 excluding the region 10c is covered with the back-side resin 18, and the back-side resin 18 is filled in the region between the die pad 11 and the lead portion 12.

[0122] Next, in substantially the same manner as the process shown in Fig. 15(f) described above, with the front side of the metal substrate 31 covered with the covering material 39, thin the metal substrate 31 from the back side to the middle in the thickness direction by half-etching (Fig. 18(g)). Thereby, a package-to-package recess 19 is formed in the region 10c on the back side of the metal substrate 31 including the peripheral region 10b.

[0123] Subsequently, in substantially the same manner as the process shown in Fig. 15(g) described above, polish the back-side resin 18 by a predetermined thickness to expose the back side of the metal substrate 31 (Fig. 18(h)).

[0124] Next, in substantially the same manner as the process shown in Fig. 15(h) described above, peel off and remove the covering material 39 on the front side of the metal substrate 31, and then wash and dry the metal substrate 31 (Fig. 18(i)).

[0125] Thereafter, in substantially the same manner as the process shown in FIG. 15(i) described above, a plating layer 25 is formed on the inner lead 51 of the lead portion 12. In this way, the lead frame 10C shown in FIG. 16 is obtained (FIG. 18(j)).

[0126] (Method of manufacturing a semiconductor device) The method of manufacturing the semiconductor device 20C according to the present embodiment can be performed in substantially the same manner as the method of manufacturing the semiconductor device 20 shown in FIGS. 7(a)-(f).

[0127] According to the present embodiment, the portions of the die pad 11 and the lead portion 12 that come into contact with the backside resin 18 are roughened. Further, the backside resin 18 is formed over the entire thickness direction (Z direction) of the lead frame 10C. Thereby, the adhesion between the metal constituting the die pad 11 and the lead portion 12 and the resin constituting the backside resin 18 can be enhanced, and peeling of the backside resin 18 from the die pad 11 and the lead portion 12 can be suppressed.

[0128] It is also possible to appropriately combine a plurality of components disclosed in the above-described embodiments and modification examples as necessary. Alternatively, some components may be deleted from all the components shown in the above-described embodiments and modification examples.

Explanation of reference numerals

[0129] 10 Lead frame 10a Package region 11 Die pad 12 Lead portion 15 Internal terminal 17 External terminal 18 Backside resin 20 Semiconductor device 21 Semiconductor element 22 Bonding wire (connection member) 23 Encapsulating resin 24 Adhesive 25 Plating layer 31 Metal substrate 36 Backside recess

Claims

1. In a method for manufacturing a lead frame, a step of preparing a metal substrate; a step of forming a back surface side recess on the back surface side of the metal substrate; a step of forming a back surface side resin on the back surface side of the metal substrate in a state where a region on the back surface side of the metal substrate including a peripheral region located around a package region is exposed, and covering the back surface side recess with the back surface side resin; a step of thinning the metal substrate from the front surface side; a step of forming an inter-package recess in a region on the back surface side of the metal substrate including the peripheral region by etching the back surface side of the metal substrate using the back surface side resin as an anti-corrosion film. A method for manufacturing a lead frame, comprising:

2. The method further comprises a step of polishing the back surface side resin by a predetermined thickness, wherein the step of forming the inter-package recess is a step subsequent to the step of covering the back surface side recess with the back surface side resin and prior to the step of polishing the back surface side resin by a predetermined thickness. The method for manufacturing a lead frame according to claim 1.

3. The method for manufacturing a lead frame according to claim 1 or 2, wherein the step of thinning the metal substrate from the front surface side and the step of forming the inter-package recess are performed simultaneously.

4. The method for manufacturing a lead frame according to any one of claims 1 to 3, wherein a step of roughening the back surface side of the metal substrate is provided after the step of forming the back surface side recess.

5. In a method for manufacturing a lead frame, a step of preparing a metal substrate; a step of thinning the metal substrate from the front surface side and the back surface side; a step of covering the front surface side of the metal substrate with a covering material and forming a back surface side resin on the back surface side of the metal substrate in a state where a region on the back surface side of the metal substrate including a peripheral region located around a package region is exposed; a step of forming an inter-package recess in a region on the back surface side of the metal substrate including the peripheral region by etching the back surface side of the metal substrate using the back surface side resin as an anti-corrosion film. A method for manufacturing a lead frame, comprising:

6. The method further comprises a step of polishing the back surface side resin by a predetermined thickness, wherein the step of forming the inter-package recess is a step subsequent to the step of forming the back surface side resin and prior to the step of polishing the back surface side resin by a predetermined thickness. The method for manufacturing a lead frame according to claim 5.

7. The method for manufacturing a lead frame according to claim 5 or 6, wherein the surface of the back-side resin is located on the same plane as the surface of the metal substrate.

8. The method for manufacturing a lead frame according to any one of claims 5 to 7, wherein after the step of thinning the metal substrate from the front side and the back side, a step of roughening the back side of the metal substrate is provided.

9. The method for manufacturing a lead frame according to any one of claims 1 to 8, wherein the package region has a die pad and lead portions disposed around the die pad, and a recess between packages is formed outside the lead portions.

10. The method for manufacturing a lead frame according to claim 9, wherein the recess between packages is formed over the entire width direction of the lead portions.

11. The method for manufacturing a lead frame according to claim 9, wherein the recess between packages is formed only in a part of the width direction of the lead portions.

Citation Information

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